A single-phase three-level inverter circuit

Abstract

This invention discloses a single-phase three-level inverter circuit, relating to the field of inverter circuit technology. The inverter's output voltage is three-level. There are two switching modes when the inverter outputs a 0-level voltage. In the 0-level mode during the positive half-cycle of the grid, the input DC power supply charges the switching capacitor C2, replenishing the energy lost by the switching capacitor C2 during the energy transfer mode during the positive half-cycle. The switching capacitor C2 operates at the switching frequency. To address the issue of the voltage of the switching capacitor C2 continuously rising during the negative half-cycle of the grid, a 0-level mode is used to ensure that the current does not pass through the switching capacitor C2 during the entire negative half-cycle, maintaining the voltage stability of the switching capacitor C2. This invention can clamp the grid neutral point to the input DC voltage value by directly connecting the grid neutral point to the positive terminal of the input DC voltage, effectively eliminating the high-frequency common-mode current hazards present in non-isolated grid-connected inverter systems.

Description

Technical Field

[0001] This invention belongs to the field of inverter circuit technology, and in particular relates to a single-phase three-level inverter circuit. Background Technology

[0002] Photovoltaic power generation has a promising future due to its wide distribution, clean and pollution-free operation, and abundant resources. Currently, common grid-connected photovoltaic inverters can be divided into two types: isolated grid-connected inverters and non-isolated grid-connected inverters. Isolated grid-connected photovoltaic inverters, due to the presence of power frequency or high-frequency transformers, suffer from reduced overall inverter efficiency and power density, and increased costs. Therefore, to improve overall efficiency, reduce overall size, and lower costs in small- and medium-power grid-connected photovoltaic systems, non-isolated grid-connected photovoltaic inverters are typically used.

[0003] However, non-isolated grid-connected photovoltaic inverters do not contain transformers. Parasitic capacitance between the photovoltaic array and the ground, and between the photovoltaic grid-connected inverter and the ground, form a common-mode loop, generating common-mode current (commonly known as "leakage current"). The high-frequency common-mode voltage caused by high-frequency switching operations is applied to the parasitic capacitance, generating high-frequency leakage current. This can lead to conducted and radiated interference, increased harmonics in the grid-connected current, and increased losses, even endangering personnel and equipment safety.

[0004] Currently, single-phase non-isolated photovoltaic grid-connected inverters generally employ bipolar modulation full-bridge inverters, common-ground inverters, and half-bridge inverters. However, bipolar modulation full-bridge inverters output two levels, requiring a large filter inductor to improve output power quality, but this method reduces inverter efficiency and increases size. Patent CN102088252A discloses a common-ground inverter circuit that requires more power switching devices to achieve power transfer during the negative half-cycle, and all switches operate at high frequencies, placing high demands on the performance of power switching transistors, which is not conducive to reducing overall cost. The grid neutral point potential of the half-bridge inverter circuit is clamped to half of the DC voltage, and the output voltage utilization rate is only 50%, which is not conducive to application in small and medium power photovoltaic systems. Summary of the Invention

[0005] The purpose of this invention is to provide a single-phase three-level inverter circuit that can be used in small and medium power non-isolated photovoltaic grid-connected inverter systems. It has multiple adjustment modes and can realize reactive power transmission capability.

[0006] To solve the above-mentioned technical problems, the present invention is achieved through the following technical solution:

[0007] This invention relates to a single-phase three-level inverter circuit, including a circuit adjustment module:

[0008] The circuit adjustment module includes a capacitor parallel circuit formed by connecting the first switched capacitor C1 and the second switched capacitor C2 in parallel.

[0009] Positive half-cycle current release: The second switched capacitor C2 is connected in series with the grid. The inverter circuit output voltage is equal to the voltage of the second capacitor C2. Then, the first switched capacitor C1 and the second switched capacitor C2 are connected in parallel, and the first capacitor C1 replenishes the energy of the second capacitor C2. At this time, the inverter circuit output voltage is 0. Negative half-cycle freewheeling current: The conduction circuit adjustment module is turned on, and the inverter circuit output voltage is 0. Then, the first switched capacitor C1 and the second switched capacitor C2 are connected in parallel and work. The inverter circuit output voltage is equal to the DC input voltage U. pv The negative value.

[0010] Furthermore, during the freewheeling phase of the power grid's negative half-cycle: after the first switched capacitor C1 and the second switched capacitor C2 are connected in parallel, if the voltage of the first capacitor C1 is greater than or equal to that of the second capacitor C2, the first capacitor C1 charges the second capacitor C2. The voltage value of the second capacitor C2 is always limited to not exceeding the DC input voltage U throughout the entire power grid cycle. pv .

[0011] Furthermore, the circuit adjustment module also includes a first power switch S1, a second power switch S2, a third power switch S3, a fourth power switch S4, and a first power diode D1;

[0012] The positive terminal of the first capacitor C1 is connected to the anode of the first power diode D1 and the drain of the second power switch S2; the cathode of the first power diode D1 is connected to the positive terminal of the second capacitor C2 and the drain of the third power switch S3; the negative terminal of the first capacitor C1 is connected to the source of the first power switch S1; the drain of the first power switch S1 is connected to the source of the second power switch S2, the negative terminal of the second capacitor C2 and the source of the fourth power switch S4; the drain of the fourth power switch S4 and the source of the third power switch S3 are both connected to the output port of the circuit adjustment module.

[0013] Furthermore, it also includes photovoltaic DC power supply U. pv and single-phase AC distribution network u g Photovoltaic DC power supply U pv The positive and negative terminals are respectively connected to the positive and negative terminals of the first capacitor C1; the output port of the circuit adjustment module is connected to the single-phase AC distribution network u. g The other end of the AC distribution network is connected to the DC-side photovoltaic DC power supply U. pv The positive pole.

[0014] Furthermore, the AC distribution network is connected to the output port of the circuit regulation module through the AC filter inductor L1.

[0015] Furthermore, AC filtering can be inductive filters, capacitive filters, or inductive-capacitive combination filters.

[0016] Furthermore, the power diode D1 is a Schottky diode or a silicon power switching diode.

[0017] Furthermore, the power switch is a metal-oxide-semiconductor field-effect transistor.

[0018] Another circuit modification to the above single-phase three-level inverter circuit: swap the connection terminals of the first power switch S1 with the first capacitor C1 and the second power switch S2, and the connection between the drain of the first power switch S1 and the DC-side photovoltaic DC power supply U. pv Connect the positive terminals of the first power diode D1 to the second capacitor C2 and the second power switch S2, and swap their connections. The DC side photovoltaic DC power supply U of the first power diode D1... pv The negative terminal is connected.

[0019] The present invention has the following beneficial effects:

[0020] This invention directly connects the grid neutral point to the positive terminal of the photovoltaic panel, eliminating leakage current in non-isolated grid-connected inverter systems without additional control. Simultaneously, the neutral point potential of the distribution network is clamped to the input DC voltage value, increasing the output voltage utilization rate to 100%. The constructed inverter circuit is simple to control, with two complementary high-frequency power switches and two complementary power switches at the power frequency. The first capacitor, connected in parallel with the DC power supply, exhibits stable voltage fluctuations. The second capacitor operates under the switching frequency scale during the positive half-cycle of the grid, and adds a 0-level mode during the negative half-cycle, ensuring that current does not pass through the second capacitor throughout the entire negative half-cycle, maintaining its voltage stability. This helps reduce the capacitance of the switching capacitor, decreasing device cost and increasing power density. The constructed inverter circuit also has reactive power transmission capability, making it suitable for applications in small-to-medium power non-isolated photovoltaic grid-connected inverter systems.

[0021] Of course, any product implementing this invention does not necessarily need to achieve all of the advantages described above at the same time. Attached Figure Description

[0022] To more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0023] Figure 1 This is a schematic diagram of a single-phase three-level inverter circuit.

[0024] Figure 2 This is a schematic diagram of the power switch drive signal for a single-phase three-level inverter circuit.

[0025] Figure 3 is a schematic diagram of the modes of a single-phase three-level inverter circuit during the positive and negative half-cycles of the grid voltage;

[0026] Figure 4 is a schematic diagram of the positive and negative half-cycle modes of the mains voltage for a single-phase three-level inverter circuit operating with a non-unity power factor.

[0027] Figure 5 shows the operating waveform of a single-phase three-level inverter circuit when it is in three-level output mode.

[0028] Figure 6 shows the operating waveforms of a single-phase three-level inverter circuit under unity power factor and non-unity power factor conditions when it is in three-level output mode.

[0029] Figure 7 This is a waveform diagram of the voltage of the second capacitor in a single-phase three-level inverter circuit.

[0030] Figure 8 The diagram shows the structure of the single-phase three-level inverter circuit provided by this invention. Detailed Implementation

[0031] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0032] In the description of this invention, it should be understood that the terms "opening", "upper", "lower", "thickness", "top", "middle", "length", "inner", "around", etc., which indicate orientation or positional relationship, are only for the convenience of describing this invention and simplifying the description, and do not indicate or imply that the components or elements referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as limiting this invention.

[0033] This invention relates to a single-phase three-level inverter circuit, including a circuit adjustment module:

[0034] The circuit adjustment module includes a capacitor parallel circuit formed by connecting the first switched capacitor C1 and the second switched capacitor C2 in parallel.

[0035] Positive half-cycle current release: The second switched capacitor C2 is connected in series to the power grid. The output voltage of the inverter circuit is equal to the voltage of the second capacitor C2. Then, the first switched capacitor C1 and the second switched capacitor C2 are connected in parallel, and the first capacitor C1 replenishes the energy of the second capacitor C2. At this time, the output voltage of the inverter circuit is 0. Negative half-cycle current freewheeling: The conduction circuit adjustment module is turned on, and the output voltage of the inverter circuit is 0. Then, the first switched capacitor C1 and the second switched capacitor C2 are connected in parallel and work. The output voltage of the inverter circuit is equal to the negative value of the DC input voltage.

[0036] Furthermore, during the negative half-cycle of the power grid: after the first switching capacitor C1 and the second switching capacitor C2 are connected in parallel and operate, if the voltage of the first capacitor C1 is greater than or equal to that of the second capacitor C2, the first capacitor C1 charges the second capacitor C2, and the voltage value of the second capacitor C2 is always limited to not exceeding the DC input voltage throughout the entire power grid cycle.

[0037] Specifically, the single-phase three-level inverter circuit includes: a photovoltaic DC power supply U pv The following components are listed: first capacitor C1, second capacitor C2, first power switch S1, second power switch S2, third power switch S3, fourth power switch S4, first power diode D1, AC filter inductor L1, and single-phase AC distribution network u. g .

[0038] Photovoltaic DC power supply U pv The positive and negative terminals of the first capacitor C1 are connected to the positive and negative terminals of the first capacitor C1, respectively; the positive terminal of the first capacitor C1 is connected to the anode of the first power diode D1 and the drain of the second power switch S2; the cathode of the first power diode D1 is connected to the positive terminal of the second capacitor C2 and the drain of the third power switch S3; the negative terminal of the first capacitor C1 is connected to the source of the first power switch S1; the drain of the first power switch S1 is connected to the source of the second power switch S2, the negative terminal of the second capacitor C2, and the source of the fourth power switch S4; the drain of the fourth power switch S4 is connected to the source of the third power switch S3 and the inverter output port a; the inverter output port a is connected to the left end of the AC filter inductor L1; the right end of the AC filter inductor L1 is connected to one end of the AC distribution network; the other end of the AC distribution network is connected to the inverter output port b, i.e., to the DC-side photovoltaic DC power supply U. pv The positive terminals are connected.

[0039] Figure 2 The diagram shows the drive signal for the power switch transistor in a single-phase three-level inverter circuit, where the modulation wave v M The power frequency is 50Hz, v tri It is a high-frequency triangular carrier signal. M With v triThe modulation generates drive signals S1, S2, S3, and S4. Among them, power switches S1 and S2 are complementary high-frequency switches, and S3 and S4 are complementary power frequency switches. By controlling the switching mode of the power switch transistors, the circuit completes the level conversion.

[0040] Figure 3 shows the mode diagram of the inverter circuit of the present invention in unity power factor operation, wherein... Figure 3a , Figure 3b This is the operating mode diagram for the positive half-cycle of the grid voltage. Figure 3a This is a schematic diagram of mode 1. Figure 3b This is a schematic diagram of mode 2; Figure 3c , Figure 3d This is the operating mode diagram for the negative half-cycle of the grid voltage. Figure 3c This is a schematic diagram of mode 3. Figure 3d This is a schematic diagram of mode 4.

[0041] Mode 1 such as Figure 3a As shown, in the positive half-cycle energy transfer mode of the power grid, the second power switch S2 and the third power switch S3 are turned on, while the first power switch S1 and the fourth power switch S4 are turned off, so that the second capacitor C2 is connected in series to the power grid for discharge. At this time, the output voltage of the single-phase three-level inverter circuit of the present invention is equal to the voltage of the second capacitor C2.

[0042] Mode 2 such as Figure 3b As shown, this is the freewheeling mode of the grid during the positive half-cycle and the charging mode of the second capacitor C2. The first power switch S1 and the third power switch S3 are turned on, while the second power switch S2 and the fourth power switch S4 are turned off. Since the second capacitor C2 in mode 1 independently supplies power to the grid, its voltage is lower than that of the first capacitor C1. At this time, the anode potential of the first power diode D1 is higher than its cathode potential, causing D1 to conduct. This allows the first capacitor C1 to charge the second capacitor C2, making the voltage of the second capacitor C2 equal to the DC voltage U. pv The grid current flows through the first power diode D1, the third power switch S3, and the AC filter inductor L1 back to the grid. Thus, the output voltage of the single-phase three-level inverter circuit is equal to 0.

[0043] Mode 3 such as Figure 3c As shown, in the freewheeling mode of the negative half-cycle of the power grid, the second power switch S2 and the fourth power switch S4 are turned on, while the first power switch S1 and the third power switch S3 are turned off. At this time, the potentials at points a and b of the inverter output are equal, and the voltage across the second capacitor C2 does not participate in charging and discharging and remains unchanged. Thus, the output voltage of the single-phase three-level inverter circuit is equal to 0.

[0044] Mode 4 such Figure 3dAs shown, this represents the energy transfer and charging mode of the second capacitor C2 during the negative half-cycle of the power grid. The first power switch S1 and the fourth power switch S4 are turned on, while the second power switch S2 and the third power switch S3 are turned off. The first capacitor C1 provides a reverse voltage to the power grid. Thus, the output voltage of the single-phase three-level inverter circuit is equal to the negative value of the DC input voltage. Simultaneously, if the voltage of the first capacitor C1 is less than that of the second capacitor C2, the first capacitor C1 can replenish the energy of the second capacitor C2. If the voltage of the first capacitor C1 is greater than or equal to that of the second capacitor C2, the cathode potential of the first power diode D1 is higher than its anode potential and it is cut off, ending the charging of the second capacitor C2. Therefore, the voltage value of the second capacitor C2 is always limited to not exceeding the DC input voltage throughout the entire power grid cycle.

[0045] This invention's inverter has two switching modes, Mode 2 and Mode 3, when the output is at 0 level. In Mode 2, during the positive half-cycle of the grid, the DC power input charges the switching capacitor C2, replenishing the energy lost by the switching capacitor C2 during the discharge of the energy transfer mode 1 during the positive half-cycle, allowing the switching capacitor C2 to operate at the switching frequency. During the negative half-cycle of the grid, since there is no discharge process for the switching capacitor C2, if it is charged at 0 level during the negative half-cycle, the grid current will flow from the positive terminal to the negative terminal of the switching capacitor C2, causing the voltage of the switching capacitor C2 to rise continuously during the negative half-cycle, resulting in the degradation of the three output levels. Therefore, a 0-level Mode 3 is added during the negative half-cycle of the grid to ensure that the current does not pass through the switching capacitor C2 during the entire negative half-cycle, thus maintaining the stability of the voltage of the switching capacitor C2.

[0046] Figure 4 shows the inverter circuit of the present invention operating in a non-unity power factor mode, wherein... Figure 4a , Figure 4b This is the operating mode diagram for the positive half-cycle of the grid voltage. Figure 4a This is a schematic diagram of mode 5. Figure 4b This is a schematic diagram of mode 6; Figure 4c , Figure 4d This is the operating mode diagram for the negative half-cycle of the grid voltage. Figure 4c This is a schematic diagram of mode 7. Figure 4d This is a schematic diagram of mode 8.

[0047] Mode 5, such as Figure 4a As shown, the grid voltage is positive, the grid current is negative, the switching state of the power switch is the same as in mode 1, and the output voltage of the single-phase three-level inverter circuit is equal to the voltage of the second capacitor C2.

[0048] Modal 6 such Figure 4bAs shown, the grid voltage is positive and the grid current is negative. The switching state of the power switch is the same as that of mode 2. The grid current flows back to the grid after passing through the AC filter inductor L1, the second capacitor C2, the first power switch S1 and the first capacitor C1. Since the voltages on the first capacitor C1 and the second capacitor C2 are equal, the output voltage of the single-phase three-level inverter circuit is equal to 0.

[0049] Modal 7 such as Figure 4c As shown, the grid voltage is negative, the grid current is positive, the switching state of the power switch is the same as in mode 3, and the output voltage of the single-phase three-level inverter circuit is equal to 0.

[0050] Modal 8 such Figure 4d As shown, the grid voltage is negative and the grid current is positive. The switching state of the power switch is the same as in mode 4. The output voltage of the single-phase three-level inverter circuit is equal to the negative value of the input voltage.

[0051] Figure 5 shows the operating waveform of a single-phase three-level inverter circuit provided by the present invention when it is in three-level output mode. Figure 5a The output u of the inverter ab The waveform diagram, u ab The peak voltage and the photovoltaic DC power supply voltage U pv The voltage of the second capacitor C2 is the same as 400V; Figure 5b For grid voltage u g The waveform diagram, u g The peak voltage is 311V and the frequency is 50Hz (power frequency).

[0052] Figure 6 shows the operating waveforms of a single-phase three-level inverter circuit provided by the present invention under unity power factor and non-unity power factor conditions when in three-level output mode. Figure 6a The waveform is the operating waveform under unity power factor, and the grid voltage u is... g With grid current i g In phase, grid current i g The peak value was 6.43A; Figure 6b This is the operating waveform when the grid current leads the voltage by 20°. Figure 6c This is the operating waveform when the grid current lags the voltage by 20°. Therefore, the single-phase three-level inverter circuit has the ability to transfer reactive power to the grid.

[0053] Figure 7 The waveform of the second capacitor voltage in a single-phase three-level inverter circuit provided by the present invention shows that when the capacitance of the second capacitor C2 is 0.1mF, the voltage of the second capacitor C2 is stabilized at 400V at a switching frequency of 40kHz, and fluctuates only at the switching frequency scale of the positive half-cycle of the power grid.

[0054] In this embodiment, the power switches S1-S4 can be metal-oxide-semiconductor field-effect transistors or other fully controllable devices. The power diode D1 in this embodiment can be a Schottky diode or a silicon power switching diode, etc.

[0055] Figure 8 This invention provides a second embodiment of a single-phase three-level inverter circuit. In this embodiment, the neutral point of the power grid is connected to the negative terminal of the input DC power supply to form a common ground structure. In this case, the switched capacitor supplies power to the grid during the negative half-cycle and is powered by the DC power supply during the positive half-cycle. By using four modes to control each switching transistor, the voltage of the switched capacitor can be ensured to be no greater than the input DC voltage throughout the entire power grid cycle at unity power factor. Only during the negative half-cycle of the power grid does the switched capacitor experience charging and discharging fluctuations at the switching frequency scale, thus providing high-quality power to the grid. Figure 1 Modification of the circuit: Swap the connection terminals of the first power switch S1 with the first capacitor C1 and the second power switch S2 respectively, and swap the drain of the first power switch S1 with the DC-side photovoltaic DC power supply U. pv Connect the positive terminals of the first power diode D1 to the second capacitor C2 and the second power switch S2, and swap their connections. The DC side photovoltaic DC power supply U of the first power diode D1... pv The negative terminal is connected.

[0056] In the description of this specification, references to terms such as "an embodiment," "example," "specific example," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the invention. In this specification, illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.

[0057] The preferred embodiments of the present invention disclosed above are merely illustrative of the invention. These preferred embodiments do not exhaustively describe all details, nor do they limit the invention to the specific implementations described. Clearly, many modifications and variations can be made based on the content of this specification. This specification selects and specifically describes these embodiments to better explain the principles and practical applications of the invention, thereby enabling those skilled in the art to better understand and utilize the invention. The invention is limited only by the claims and their full scope and equivalents.

Claims

1. A single-phase three-level inverter circuit, characterized in that, Includes circuit adjustment module: The circuit adjustment module includes a capacitor parallel circuit formed by connecting the first switched capacitor (C1) and the second switched capacitor (C2) in parallel; Positive half-cycle grid current release: The second switched capacitor (C2) is connected in series with the grid, and the inverter circuit output voltage is equal to the voltage of the second capacitor (C2). Then, the first switched capacitor (C1) and the second switched capacitor (C2) are connected in parallel, and the first capacitor (C1) replenishes the energy of the second capacitor (C2). At this time, the inverter circuit output voltage is 0. Negative half-cycle grid current freewheeling: The conduction circuit adjustment module is turned on, and the inverter circuit output voltage is 0. Then, the first switched capacitor (C1) and the second switched capacitor (C2) are connected in parallel and operate. The inverter circuit output voltage is equal to the DC input voltage (U). pv The negative value of ).

2. The single-phase three-level inverter circuit according to claim 1, characterized in that, During the negative half-cycle of the power grid: After the first switched capacitor (C1) and the second switched capacitor (C2) are connected in parallel, if the voltage of the first capacitor (C1) is greater than or equal to that of the second capacitor (C2), the first capacitor (C1) charges the second capacitor (C2). The voltage value of the second capacitor (C2) is always limited to not exceeding the DC input voltage (U) throughout the entire power grid cycle. pv ).

3. A single-phase three-level inverter circuit according to claim 1 or 2, characterized in that, The circuit adjustment module also includes a first power switch (S1), a second power switch (S2), a third power switch (S3), a fourth power switch (S4), and a first power diode (D1). The positive terminal of the first capacitor (C1) is connected to the anode of the first power diode (D1) and the drain of the second power switch (S2); the cathode of the first power diode (D1) is connected to the positive terminal of the second capacitor (C2) and the drain of the third power switch (S3). The negative terminal of the first capacitor (C1) is connected to the source of the first power switch (S1); the drain of the first power switch (S1) is connected to the source of the second power switch (S2), the negative terminal of the second capacitor (C2), and the source of the fourth power switch (S4); the drain of the fourth power switch (S4) and the source of the third power switch (S3) are both connected to the output port of the circuit adjustment module.

4. A single-phase three-level inverter circuit according to claim 3, characterized in that, Also includes photovoltaic DC power supplies (U pv ) and single-phase AC distribution network (u g Photovoltaic DC power supply (U pv The positive and negative terminals of the circuit regulator module are connected to the positive and negative terminals of the first capacitor (C1), respectively; the output port of the circuit regulator module is connected to the single-phase AC distribution network (u g The other end of the AC distribution network is connected to the DC-side photovoltaic DC power source (U). pv The positive electrode of ).

5. A single-phase three-level inverter circuit according to claim 4, characterized in that, AC distribution network (u g It is connected through the output port of the AC filter circuit and the circuit adjustment module.

6. A single-phase three-level inverter circuit according to claim 5, characterized in that, The AC filter circuit is an inductive filter, a capacitive filter, or an inductive-capacitive combination filter.

7. A single-phase three-level inverter circuit according to claim 4, characterized in that, The first power diode (D1) is a Schottky diode or a silicon power switching diode.

8. A single-phase three-level inverter circuit according to claim 4, characterized in that, The first power diode (D1), the second power switch (S2), the third power switch (S3), and the fourth power switch (S4) are metal-oxide-semiconductor field-effect transistors.

9. A single-phase three-level inverter circuit according to any one of claims 4-8, characterized in that, Swap the connections between the first power switch (S1) and the first capacitor (C1), and the second power switch (S2), respectively. Also swap the drain of the first power switch (S1) and the DC-side photovoltaic DC power supply (U). pv Connect the positive terminal of the first power diode (D1) to the positive terminal of the second capacitor (C2) and the second power switch (S2), and swap the connection terminals of the first power diode (D1) and the second capacitor (C2) respectively. Connect the cathode of the first power diode (D1) to the photovoltaic DC power supply (U). pv The negative terminal of ) is connected.

Images