Image sensing device

Abstract

The present disclosure relates to an image sensing device, which may include: a substrate including a front side and a back side opposite to each other, wherein the image sensing device is configured to operate by receiving incident light passing through the back side of the substrate; a depletion region, which is arranged in the substrate to contact the back side of the substrate; an epitaxial layer, which is arranged in the substrate to contact the front side of the substrate or to be near the front side of the substrate; and a plurality of detection structures, which are arranged in the epitaxial layer, each of which is configured to capture photocharges generated by the incident light and moved by a current flowing in the epitaxial layer.

Description

Technical Field

[0001] The technologies and implementations disclosed in this patent document generally relate to an image sensing device for sensing a distance to a target object. Background Art

[0002] Image sensing devices are devices for capturing optical images by converting light into electrical signals using photosensitive semiconductor materials that react to light. With the development of the automotive, medical, computer, and communication industries, the demand for high-performance image sensing devices is increasing in various fields such as smart phones, digital cameras, game consoles, the Internet of Things (IOT), robots, security cameras, and medical micro cameras.

[0003] Image sensing devices can be roughly divided into charge coupled device (CCD) image sensing devices and complementary metal oxide semiconductor (CMOS) image sensing devices. CCD image sensing devices provide better image quality, but compared with CMOS image sensing devices, CCD image sensing devices tend to consume more power and are larger. CMOS image sensing devices are smaller in size and consume less power than CCD image sensing devices. In addition, CMOS sensors are manufactured using CMOS manufacturing technology, so that photosensitive elements and other signal processing circuits can be integrated into a single chip, thereby enabling miniaturized image sensing devices to be produced at a lower cost. For these reasons, CMOS image sensing devices are being developed for many applications including mobile devices. Summary of the invention

[0004] Various embodiments of the disclosed technology are directed to an image sensing device provided with a time-of-flight (TOF) pixel having improved performance.

[0005] According to one embodiment of the disclosed technology, an image sensing device may include: a substrate including a front side and a back side opposite to each other, wherein the image sensing device is configured to operate by receiving incident light through the back side of the substrate; a depletion region arranged in the substrate to be in contact with the back side of the substrate; an epitaxial layer arranged in the substrate to be in contact with the front side of the substrate or near the front side of the substrate; and a plurality of detection structures arranged in the epitaxial layer, each of the plurality of detection structures being configured to capture photocharges generated by the incident light and moved by a current flowing in the epitaxial layer.

[0006] According to one embodiment of the disclosed technology, an image sensing device may include: a depletion layer having a first side and a second side opposite to each other, wherein light is incident on the first side of the depletion layer; and an epitaxial layer arranged to contact the second side of the depletion layer. The epitaxial layer includes: a control node configured to receive different control signals and generate a signal due to a difference between the different control signals; and a detection node arranged to correspond to the control node, each of the detection nodes being configured to capture photocharges generated by incident light and moved by current.

[0007] It is to be understood that both the foregoing general description and the following detailed description of the disclosed technology are exemplary and explanatory and are intended to provide further explanation of the disclosure as claimed. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] The above and other features and advantageous aspects of the disclosed technology will become apparent with reference to the following detailed description when considered in conjunction with the accompanying drawings.

[0009] Figure 1 is a schematic diagram showing an example of an image sensing device based on some implementations of the disclosed technology.

[0010] Figure 2 Some implementations based on the disclosed technology are shown Figure 1 A schematic diagram of an example of a layout structure of a pixel is shown.

[0011] Figure 3 Some implementations based on the disclosed technology are shown Figure 2 A circuit diagram of an example of a pixel is shown.

[0012] Figure 4 Some implementations based on the disclosed technology are shown Figure 3 Schematic diagram of an example of a photoelectric conversion region shown.

[0013] Figure 5 The invention is based on some implementation methods of the disclosed technology. Figure 4 Graph of an example of potential distribution according to depth in a photoelectric conversion region shown.

[0014] Figure 6 Some implementations based on the disclosed technology are shown Figure 4 Schematic diagram of a comparative example of a photoelectric conversion region shown.

[0015] Figure 7 The invention is based on some implementation methods of the disclosed technology. Figure 6 Graph of an example of potential distribution according to depth in a photoelectric conversion region shown.

[0016] FIG. 8A to FIG. 8F The invention shows the formation of some implementation methods based on the disclosed technology. Figure 4 A cross-sectional view of the process of the photoelectric conversion region shown. DETAILED DESCRIPTION

[0017] Hereinafter, various embodiments will be described with reference to the accompanying drawings. However, it should be understood that the present disclosure is not limited to specific embodiments, but includes various modifications, equivalents and / or alternatives of the embodiments. The embodiments of the present disclosure can provide various effects that can be directly or indirectly recognized by the present disclosure.

[0018] Through extensive research, technologies for measuring depth (e.g., distance to a target object) using image sensors have been developed, and the demand for technologies for measuring depth is increasing in various devices such as security devices, medical devices, vehicles, game consoles, virtual reality (VR) / augmented reality (AR) devices, and mobile devices. Examples of methods for measuring depth may include triangulation, time of flight (ToF), and interferometry. Among the above-mentioned depth measurement methods, the time of flight (ToF) method has become popular due to its wide range of applications, fast processing speed, and cost advantages. The TOF method measures distance using emitted light and reflected light. Depending on whether the distance is determined by round-trip time or phase difference, the ToF method can be roughly divided into a direct method and an indirect method. The direct method can measure the distance by calculating the round-trip time, and the indirect method can measure the distance using the phase difference. Since the direct method is suitable for measuring long distances, the direct method is widely used in automobiles. The indirect method is suitable for measuring short distances and is therefore widely used in various higher-speed devices designed to operate at higher speeds, such as game consoles or mobile cameras. Compared with the direct TOF system, the indirect method has several advantages, including: simpler circuits, low storage requirements, and relatively lower costs.

[0019] The current assisted photon demodulator (CAPD) method is a pixel circuit for an indirect TOF sensor. In CAPD, electrons are generated in a pixel circuit by a majority carrier current generated by applying a substrate voltage, and the generated electrons are detected by using a potential difference between electric fields. CAPD is able to detect electrons quickly due to the use of majority carrier current. In addition, CAPD has excellent efficiency by detecting some electrons formed at a deeper depth.

[0020] Figure 1 is a block diagram illustrating an example of an image sensing device ISD based on some implementations of the disclosed technology.

[0021] Reference Figure 1, the image sensing device ISD can use the time-of-flight (TOF) principle to measure the distance to the target object 1. The TOF method can be mainly divided into a direct TOF method and an indirect TOF method. The direct TOF method can measure the duration of light reflected from the target object 1 and returned to the image sensing device ISD after the light has been emitted from the light source to the target object 1, so that the direct TOF method can calculate the distance to the target object 1 using the measured duration. The indirect TOF method can emit modulated light to the target object 1, can sense the light reflected from the target object 1, can calculate the phase difference between the modulated light and the reflected light, and thus can indirectly measure the distance between the image sensing device ISD and the target object 1. Although an image sensing device ISD using an indirect TOF method is described in this patent document, other implementations are also possible.

[0022] The image sensing device ISD may include a light source 10 , a lens module 20 , a pixel array 30 , and a control block 40 .

[0023] The light source 10 emits light onto the target object 1 in response to a light modulation signal MLS received as a control signal from the control block 40, and the control signal is fed into the light source 10 to achieve light modulation in the light emitted by the light source for illuminating the target object 1. The light source 10 can be a laser diode (LD) or a light emitting diode (LED) that emits light in a specific wavelength range (for example, near-infrared light, infrared light, or visible light), a near-infrared laser (NIR), a point light source, a white light lamp, a monochromatic light source combined with a monochromator, or a combination of other laser light sources. For example, the light source 10 can emit infrared light with a wavelength of 800nm ​​to 1000nm. The light emitted from the light source 10 can be modulated at a predetermined frequency in response to the light modulation signal MLS. For ease of description, Figure 1 Only one light source 10 is shown. However, a plurality of light sources may be arranged around the lens module 20.

[0024] The lens module 20 may collect light reflected from the target object 1 and focus the collected light on the pixel PX of the pixel array 30. For example, the lens module 20 may include a focusing lens or a cylindrical optical element having a glass surface or a plastic surface. The lens module 20 may include a plurality of lenses aligned with the optical axis.

[0025] The pixel array 30 may include a plurality of unit pixels PX arranged continuously in a 2D matrix, for example, a plurality of unit pixels PX arranged continuously in a column direction and a row direction. The unit pixels PX may be formed on a semiconductor substrate, and each unit pixel PX may convert light incident through the lens module 20 into an electrical signal corresponding to the light intensity, and output the electrical signal as a pixel signal. In this case, the pixel signal may be a signal indicating the distance to the target object 1. For example, each unit pixel (PX) may be a current-assisted photon demodulator (CAPD) pixel or a quantum efficiency modulation (QEM) pixel. Although CAPD pixels are described as examples, other implementations are possible. Therefore, the disclosed technology can also be applied to QEM pixels or any other pixels. The following will refer to Figure 2 Describe the structure and operation of each unit pixel (PX).

[0026] The control block 40 can emit light to the target object 1 by controlling the light source 10, can process each pixel signal corresponding to the light reflected from the target object 1 by driving the unit pixel (PX) of the pixel array 30, and can use the processed result to measure the distance to the surface of the target object 1.

[0027] The control block 40 may include a row driver 41 , a demodulation driver 42 , a light source driver 43 , a timing controller (T / C) 44 , and a readout circuit 45 .

[0028] For ease of description, the row driver 41 and the demodulation driver 42 may be collectively referred to as a control circuit.

[0029] The control circuit may drive the unit pixel (PX) of the pixel array 30 in response to a timing signal generated from the timing controller 44 .

[0030] The control circuit may generate a control signal capable of selecting and controlling at least one row line from a plurality of row lines. The control signal may include a demodulation control signal for generating a hole current in the substrate, a reset signal for controlling a reset transistor, a transmission (Tx) signal for controlling the transmission of photocharges accumulated in a detection node, a floating diffusion (FD) signal for providing additional electrostatic capacitance at a high illumination level, a selection signal for controlling a selection transistor, and / or others. The pixel current may refer to a current for moving the photocharges generated by the substrate to the detection node.

[0031] In some implementations, the row driver 41 may generate a reset signal, a transmission (Tx) signal, a floating diffusion (FD) signal, and a selection signal, and the demodulation driver 42 may generate a demodulation control signal. Although the row driver 41 and the demodulation driver 42 based on some implementations of the disclosed technology are configured independently of each other, the row driver 41 and the demodulation driver 42 based on some other implementations may be implemented as one component element that can be disposed on one side of the pixel array 30 as needed.

[0032] Under the control of the timing controller 44, the light source driver 43 may generate a light modulation signal MLS capable of driving the light source 10. The light modulation signal MLS may be a signal modulated at a predetermined frequency.

[0033] The timing controller 44 may generate timing signals for controlling operations of the row driver 41 , the demodulation driver 42 , the light source driver 43 , and the readout circuit 45 .

[0034] Under the control of the timing controller 44, the readout circuit 45 can generate pixel data in the form of a digital signal by processing the pixel signal output from the pixel array 30. For this operation, the readout circuit 45 may include a correlated double sampler (CDS) for performing correlated double sampling on the pixel signal output from the pixel array 30. The readout circuit 45 may include an analog-to-digital converter for converting the output signal from the CDS into a digital signal. In addition, the readout circuit 45 may include a buffer circuit for temporarily storing the pixel data output from the analog-to-digital converter and outputting the pixel data to the outside under the control of the timing controller 44. Since the pixel array 30 is composed of CAPD pixels, each column of the pixel array 30 may include two column lines for transmitting pixel signals, and components for processing pixel signals output from the column lines may also be provided for the corresponding column lines.

[0035] The light source 10 may emit light modulated at a predetermined frequency to a scene captured by the image sensing device ISD, and the image sensing device ISD may sense the modulated light (i.e., incident light) reflected from the target object 1 within the scene, and generate depth information on each unit pixel PX. Due to the distance between the image sensing device ISD and the target object 1, there is a time delay between the modulated light and the incident light. This time delay is manifested as a phase difference between the signal generated by the image sensing device ISD and the light modulation signal MLS used to control the light source 10. An image processor (not shown) may generate a depth image containing depth information on each unit pixel PX by calculating the phase difference appearing in the signal output from the image sensing device ISD.

[0036] Figure 2 Some implementations based on the disclosed technology are shown Figure 1Schematic diagram of an example of a layout structure of a pixel PX is shown.

[0037] Reference Figure 2 , the pixel PX can be Figure 1 Any one of the multiple pixels (PX) shown. Although for ease of description, Figure 2 Only one pixel PX is exemplarily shown, but the scope or spirit of the disclosed technology is not limited thereto, and substantially the same structure and operation can be applied to a certain pixel included in the pixel array 30 as needed.

[0038] The pixel PX may include a detection structure for collecting and detecting photocharges generated by the pixel. Each detection structure is referred to as a tap and includes a control node configured to receive a control signal and a detection node disposed adjacent to the control node to collect and detect photocharges generated by the pixel in response to incident light. Figure 2 The example in shows two such taps: a first tap TA and a second tap TB. Although for ease of description, the disclosed technology has exemplarily disclosed two taps TA and TB included in one pixel PX, other implementations are possible. For example, at least three taps may be included in one pixel PX. In some implementations, multiple taps may receive the same demodulation control signal or different demodulation control signals. Different demodulation control signals may indicate demodulation control signals received at different time points.

[0039] Although for ease of description, Figure 2 It is shown that the first tap TA and the second tap TB are arranged in the horizontal direction (ie, the row direction), but other implementations are also possible. For example, the first tap TA and the second tap TB can also be arranged in the vertical direction (ie, the column direction) or the diagonal direction.

[0040] The first tap TA may include a first control node CNA and a first detection node DNA surrounding the first control node CNA. Figure 2 It is shown that the first control node CNA is formed in a circular shape and the first detection node DNA is formed in a ring shape, but other implementations are also possible. The ring-shaped structure of the first detection node DNA can be formed to surround the first control node CNA as large as possible. The first detection node DNA formed in a ring shape can more easily capture signal carriers moving with the pixel current formed by the first control node CNA.

[0041] The first control node CNA and the first detection node DNA may be arranged to be in contact with each other, and may be physically isolated from each other using only junction isolation by opposite doping.

[0042] In some other implementations of the disclosed technology, the first control node CNA and the first node DNA may be spaced apart from each other by a predetermined distance. In this case, the first control node CNA and the first detection node DNA may be physically isolated from each other by an insulating layer. In some implementations, the insulating layer may be formed by gap-filling a trench formed by a shallow trench isolation (STI) process with an insulating material.

[0043] The second tap TB may include a second control node CNB and second detection nodes DNB surrounding the second control node CNB. The second control node CNB and the second detection node DNB may correspond to the first control node CNA and the first detection node DNA, respectively, and thus redundant descriptions thereof will be omitted herein for brevity.

[0044] In the following, reference will be made to Figure 2 The structure and operation of the pixel PX are described with reference to a cross-sectional view of the pixel PX taken along line PP′ as shown.

[0045] Figure 3 Some implementations based on the disclosed technology are shown Figure 2 A circuit diagram of an example of a pixel PX is shown.

[0046] Reference Figure 3 , the pixel PX may include a photoelectric conversion region 100 and a circuit region 200 .

[0047] The photoelectric conversion region 100 may be shown along with Figure 2 The area of ​​the cross-sectional view of the pixel PX taken along the line PP' shown corresponds to the area of ​​the cross-sectional view of the pixel PX.

[0048] The photoelectric conversion region 100 may include a first control node CNA and a second control node CNB and a first detection node DNA and a second detection node DNB. The first control node CNA and the first detection node DNA may constitute a first tap (or a first demodulation point), and the second control node CNB and the second detection node DNB may constitute a second tap (or a second demodulation point).

[0049] The first control node CNA and the second control node CNB and the first detection node DNA and the second detection node DNB may be formed in the substrate. For example, each of the first control node CNA and the second control node CNB may be a P-type impurity region, and each of the first detection node DNA and the second detection node DNB may be an N-type impurity region.

[0050] The first control node CNA may receive a first demodulation control signal (CSa) from the demodulation driver 42, and the second control node CNB may receive a second demodulation control signal (CSb) from the demodulation driver 42. The potential difference between the first demodulation control signal (CSa) and the second demodulation control signal (CSb) may generate a pixel current (PC), which controls the flow of signal carriers generated in the substrate by incident light. When the first demodulation control signal (CSa) has a higher voltage than the second demodulation control signal (CSb), the pixel current (PC) may flow from the first control node CNA to the second control node CNB. When the first demodulation control signal (CSa) has a lower voltage than the second demodulation control signal (CSb), the pixel current (PC) may flow from the second control node CNB to the first control node CNA.

[0051] Each of the first detection node DNA and the second detection node DNB may capture signal carriers moving along with the flow of the pixel current PC and may accumulate the captured signal carriers.

[0052] In some implementations, the first control node CNA and the second control node CNB may each include a P-type impurity region with a different doping density. For example, a P-type impurity region (i.e., a P-region) with a relatively lower doping density may be injected into the substrate to a first depth, and a P+ type impurity region (i.e., a P+ region) with a relatively higher doping density may be injected into the substrate at the same position as the above-mentioned P-type impurity injection position to a second depth less than the first depth. In this case, the first depth may be greater than the second depth. On the other hand, the first detection node DNA and the second detection node DNB may each include an N-type impurity region with a different doping density. For example, an N-type impurity region (i.e., an N-region) with a relatively lower doping density may be injected into the substrate to a first depth, and an N+ type impurity region (i.e., an N+ region) with a relatively higher doping density may be injected into the substrate at the same position as the above-mentioned N-type impurity injection position to a second depth less than the first depth.

[0053] In some implementations, the depth of the P-type impurity region may be greater than the depth of the N-type impurity region, thereby facilitating the flow of the pixel current PC.

[0054] In some implementations, the operation of capturing photocharges of the photoelectric conversion region 100 can be performed in a first period and a second period after the first period.

[0055] In the first period, the light incident on the pixel PX can be processed by photoelectric conversion, so that electron-hole pairs can appear in the substrate according to the amount of incident light. In some implementations, the electrons generated in response to the amount of incident light can refer to photocharges. The demodulation driver 42 can output a first demodulation control signal to the first control node CNA, and can output a second demodulation control signal (CSb) to the second control node CNB. The first demodulation control signal (CSa) can have a higher voltage than the second demodulation control signal (CSb). The voltage of the first demodulation control signal (CSa) can be defined as an active voltage (active voltage) (also referred to as an activation voltage), and the voltage of the second demodulation control signal (CSb) can be defined as an inactive voltage (also referred to as a deactivation voltage). For example, the voltage of the first demodulation control signal (CSa) can be set to 1.2V, and the voltage of the second demodulation control signal (CSb) can be zero volts (-*0V).

[0056] Due to the voltage difference between the first demodulation control signal (CSa) and the second demodulation control signal (CSb), an electric field may occur between the first control node CNA and the second control node CNB, and the pixel current PC may flow from the first control node CNA to the second control node CNB. Holes in the substrate may move toward the second control node CNB, and electrons in the substrate may move toward the first control node CNA.

[0057] In response to the amount of incident light, electrons may be generated in the substrate and may move toward the first control node CNA so that the electrons may be captured by the first detection node DNA adjacent to the first control node CNA. Thus, the electrons in the substrate may be used as signal carriers for detecting the amount of incident light.

[0058] In the second period after the first period, the light incident on the pixel PX can be processed by photoelectric conversion, and electron-hole pairs can be generated in the substrate according to the amount of incident light (i.e., the intensity of the incident light). In this case, the demodulation driver 42 can output a first demodulation control signal (CSa) to the first control node CNA, and can output a second demodulation control signal (CSb) to the second control node CNB. Here, the first demodulation control signal (CSa) can have a lower voltage than the second demodulation control signal (CSb). In this case, the voltage of the first demodulation control signal (CSa) can be defined as an inactive voltage (i.e., a deactivation voltage) hereinafter, and the voltage of the second demodulation control signal (CSb) can be defined as an active voltage (i.e., an activation voltage) hereinafter. For example, the voltage of the first demodulation control signal (CSa) can be zero volts (0V), and the voltage of the second demodulation control signal (CSb) can be set to 1.2V.

[0059] Due to the voltage difference between the first demodulation control signal (CSa) and the second demodulation control signal (CSb), an electric field may occur between the first control node CNA and the second control node CNB, and the pixel current PC may flow from the second control node CNB to the first control node CNA. Holes in the substrate may move toward the first control node CNA, and electrons in the substrate may move toward the second control node CNB.

[0060] In response to the amount of incident light, electrons may be generated in the substrate and may move toward the second control node CNB so that the electrons may be captured by the second detection node DNB adjacent to the second control node CNB. Thus, the electrons in the substrate may be used as signal carriers for detecting the amount of incident light.

[0061] In some implementations, the order of the first time period and the second time period may also be changed as needed.

[0062] The circuit area 200 may include a plurality of elements for processing photocharges captured by the first detection node DNA and the second detection node DNB and converting the photocharges into electrical signals. The circuit area 200 may include a plurality of elements arranged in addition to Figure 2 The elements (eg, transistors) in the remaining region outside the first tap TA and the second tap TB shown in the pixel PX shown, and the interconnection lines for electrical connection between these elements. Figure 3 The circuit diagram shown gives a detailed description thereof. Control signals RST, TRG, FDG, and SEL applied to the plurality of elements may be provided from the row driver 41. In addition, the pixel voltage (Vpx) may be a power supply voltage (VDD).

[0063] Elements for processing photocharges captured by the first detection node DNA will be described below with reference to the accompanying drawings. The circuit area 200 may include a reset transistor RX_A, a transfer transistor TX_A, a first capacitor C1_A, a second capacitor C2_A, a floating diffusion (FD) transistor FDX_A, a drive transistor DX_A, and a select transistor SX_A.

[0064] The reset transistor RX_A can be activated in response to a logic high level of a reset signal RST supplied to its gate to enter an active state, so that the potential of the floating diffusion (FD) node FD_A and the potential of the first detection node DNA can be reset to a predetermined level (i.e., the pixel voltage Vpx). In addition, when the reset transistor RX_A is activated (i.e., the active state), the transfer transistor TX_A can also be activated (i.e., the active state) to reset the floating diffusion (FD) node FD_A.

[0065] The transfer transistor TX_A may be activated (ie, active state) in response to a logic high level of a transfer signal TRG supplied to a gate thereof so that charges accumulated in the first detection node DNA may be transferred to a floating diffusion (FD) node FD_A.

[0066] The first capacitor C1_A may be coupled to a floating diffusion (FD) node FD_A such that the first capacitor C1_A may provide a predetermined electrostatic capacitance.

[0067] According to the operation of the floating diffusion (FD) transistor FDX_A, the second capacitor C2_A may be selectively coupled to the floating diffusion (FD) node FD_A so that the second capacitor C2_A may provide an additional predetermined electrostatic capacitance.

[0068] Each of the first capacitor C1_A and the second capacitor C2_A may be composed of, for example, at least one of a metal-insulator-metal (MIM) capacitor, a metal-insulator-polysilicon (MIP) capacitor, a metal-oxide-semiconductor (MOS) capacitor, and a junction capacitor.

[0069] The floating diffusion (FD) transistor FDX_A may be activated (ie, active state) in response to a logic high level of a floating diffusion (FD) signal FDG supplied to a gate thereof so that the floating diffusion (FD) transistor FDX_A may couple the second capacitor C2_A to a floating diffusion (FD) node FD_A.

[0070] For example, when the amount of incident light corresponds to a relatively high illumination condition, the row driver 41 may activate the floating diffusion (FD) transistor FDX_A so that the floating diffusion (FD) transistor FDX_A enters an active state, and the floating diffusion (FD) node FD_A may be coupled to the second capacitor C2_A. As a result, when the amount of incident light corresponds to a high illumination level, the floating diffusion (FD) node FD_A can accumulate much more photocharge therein, thereby enabling high dynamic range (HDR).

[0071] When the amount of incident light is at a relatively low illumination level, the row driver 41 may control the floating diffusion (FD) transistor FDX_A to be deactivated (ie, inactive state) so that the floating diffusion (FD) node FD_A may be isolated from the second capacitor C2_A.

[0072] In some other implementations, the floating diffusion (FD) transistor FDX_A and the second capacitor C2_A may be omitted as desired.

[0073] The drain of the driving transistor DX_A is connected to the pixel voltage (Vpx), and the source of the driving transistor DX_A is connected to the vertical signal line SL_A through the selection transistor SX_A, so that a load (MOS) and a source follower circuit of the constant current source circuit CS_A connected to one end of the vertical signal line SL_A can be constructed. Therefore, the driving transistor DX_A can output a current corresponding to the potential of the floating diffusion (FD) node FD_A connected to its gate to the vertical signal line SL_A through the selection transistor SX_A.

[0074] The selection transistor SX_A may be activated (ie, active state) in response to a logic high level of a selection signal SEL supplied to a gate thereof, so that a pixel signal generated from the drive transistor DX_A may be output to the vertical signal line SL_A.

[0075] In order to process the photocharge captured by the second detection node DNB, the circuit area 200 may include a reset transistor RX_B, a transfer transistor TX_B, a first capacitor C1_B, a second capacitor C2_B, a floating diffusion (FD) transistor FDX_B, a drive transistor DX_B, and a selection transistor SX_B. Although the operation time point of the element for processing the photocharge captured by the second detection node DNB is different from the operation time point of other elements for processing the photocharge captured by the first detection node DNA, the element for processing the photocharge captured by the second detection node DNB may be substantially the same as the other elements for processing the photocharge captured by the first detection node DNA in structure and operation, and thus a detailed description thereof will be omitted herein for ease of description.

[0076] Pixel signals transmitted from the circuit area 200 to the vertical signal line SL_A and pixel signals transmitted from the circuit area 200 to the vertical signal line SL_B may be processed through noise removal and analog-to-digital (ADC) conversion processing so that each pixel signal may be converted into image data.

[0077] although Figure 3 Each of the reset signal RST, transfer signal TRG, floating diffusion (FD) signal FDG and selection signal SEL shown in the figure is represented by one signal line, but each of the reset signal RST, transfer signal TRG, floating diffusion (FD) signal FDG and selection signal SEL can also be provided through multiple signal lines (for example, two signal lines), so that the element for processing the photocharge captured by the first detection node DNA and other elements for processing the photocharge captured by the second detection node DNB can operate at different time points.

[0078] An image processor (not shown) may calculate image data obtained from photocharges captured by the first detection node DNA and other image data obtained from photocharges captured by the second detection node DNB, so that the image processor may calculate a phase difference using the calculated image data. The image processor may calculate depth information indicating a distance to the target object 1 based on the phase difference corresponding to each pixel, and may generate a depth image including the depth information corresponding to each pixel.

[0079] Figure 4 Some implementations based on the disclosed technology are shown Figure 3 Schematic diagram of an example of a photoelectric conversion region shown. Figure 5 The invention is based on some implementation methods of the disclosed technology. Figure 4 Graph of an example of potential distribution according to depth in a photoelectric conversion region shown.

[0080] Reference Figure 4 , the photoelectric conversion region 100 may include a substrate 110 and a microlens 140 .

[0081] The substrate 110 may be a semiconductor substrate and may be formed by growing an N-type epitaxial layer on a P-type substrate. Therefore, the substrate 110 may be formed using a combination of epitaxial layers and substrates having different conductivity types.

[0082] The substrate 110 may include a front side (FS) and a back side (BS) disposed opposite to each other. Light reflected from the target object 1 and then incident on the photoelectric conversion region 100 may be incident on the substrate 110 through the back side (BS) of the substrate 110 after passing through the microlens 140. The substrate 110 may mainly include an epitaxial layer (n-epi) disposed at or near the front side (FS) and a depletion region 130 disposed at or near the back side (BS).

[0083] A first tap TA including a first control node CNA and a first detection node DNA and a second tap TB including a second control node CNB and a second detection node DNB may be formed in the epitaxial layer 120. The first tap TA and the second tap TB are already formed in the epitaxial layer 120. Figure 2 and Figure 3 Therefore, for the sake of brevity, its redundant description will be omitted in this article.

[0084] The epitaxial layer 120 may be doped with impurities such as N-type impurities to generate electrons that can operate as charge carriers serving as majority carriers. The first tap TA and the second tap TB for generating the pixel current PC are disposed in the epitaxial layer 120 doped with N-type impurities instead of P-type impurities, thereby being able to reduce the power consumed in the entire pixel array 30.

[0085] Each of the first control node CNA of the first tap TA and the second control node CNB of the second tap TB is doped with P-type impurities, and a depletion region may be formed between the first control node CNA and the epitaxial layer 120, and a depletion region may also be formed between the second control node CNB and the epitaxial layer 120. Due to the above-mentioned depletion region, the resistance between the first control node CNA and the epitaxial layer 120 and the resistance between the second control node CNB and the epitaxial layer 120 may be relatively increased compared to other cases where the depletion region does not exist. Since the resistance between the first control node CNA and the second control node CNB may include the resistance between the first control node CNA and the epitaxial layer 120 and the resistance between the second control node CNB and the epitaxial layer 120, the resistance between the first control node CNA and the second control node CNB may also be increased due to the presence of such a depletion region.

[0086] The magnitude of the pixel current PC may be proportional to the voltage difference between the activation voltage (i.e., active voltage) and the deactivation voltage (i.e., inactive voltage), and may be inversely proportional to the resistance between the first control node CNA and the second control node CNB. Assuming that the voltage difference is fixed and there is a depletion region, the magnitude of the pixel current PC may be reduced due to the increased resistance between the first control node CNA and the second control node CNB. As a result, the power consumption corresponding to the product of the pixel current PC and the voltage difference may be reduced.

[0087] In order to reduce power consumption, an epitaxial layer having a relatively higher resistivity while being doped with P-type impurities may be used instead of using other epitaxial layers doped with P-type impurities. However, as the resistivity of the epitaxial layer in contact with the transistor included in each pixel increases, the characteristics of the transistor may change, and thus the transistor may need to be tuned again.

[0088] In the case where the epitaxial layer 120 is doped with N-type impurities instead of P-type impurities and has the same resistivity, power consumption can be reduced only by forming a depletion region without performing an additional adjustment operation on the transistor.

[0089] When an activation voltage is applied to the first control node CNA and a deactivation voltage is applied to the second control node CNB, or when a deactivation voltage is applied to the first control node CNA and an activation voltage is applied to the second control node CNB, an electric field may be formed between the first control node CNA and the second control node CNB so that a pixel current PC may flow in the pixel, the pixel current PC moving electrons that are majority carriers of the epitaxial layer 120. Although for ease of description, Figure 4 Only one path of the pixel current PC is shown, but the pixel current PC may flow between the first control node CNA and the second control node CNB through various paths formed in the epitaxial layer 120 .

[0090] The epitaxial layer 120 , the first tap TA, and the second tap TB may be disposed in contact with or near the front side (FS) of the substrate 110 .

[0091] The depletion region 130 may be formed by a PN junction between a P-type substrate and an N-type epitaxial layer. In this case, the P-type substrate and the N-type epitaxial layer may be conceptually different from the substrate 110 and the epitaxial layer 120. A substrate formed by removing a region having carriers from a P-type substrate on which an N-type epitaxial layer is grown may indicate the substrate 110. In addition, a region formed by removing the depletion region 130 from the N-type epitaxial layer may indicate the epitaxial layer 120. FIG. 8A to FIG. 8F A detailed description is given of a method for forming the substrate 110 .

[0092] When an N-type epitaxial layer is grown on a P-type substrate, carriers may disappear near a boundary between the P-type substrate and the N-type epitaxial layer through a PN junction. Here, the depletion region 130 may refer to a region in which such carriers disappear.

[0093] One side of the depletion region 130 may be in contact with or near the back side (BS) of the substrate 110, and the other side of the depletion region 130 may be in contact with the epitaxial layer 120. Therefore, the region having the P-type impurities may be disposed not only on the depletion region 130 but also between the depletion region 130 and the microlens 140.

[0094] The depletion region 130 may have a predetermined depth from the back side (BS) of the substrate 110. The depth of the depletion region 130 may be adjusted by the difference in impurity doping density between the P-type substrate and the N-type epitaxial layer. In other words, the depletion region 130 may be formed to a desired depth in the substrate 110 using the difference in impurity doping density between the P-type substrate and the N-type epitaxial layer. For example, the depth of the depletion region 130 may be about 4 μm or less.

[0095] Since carriers that can serve as charge carriers disappear from depletion region 130, depletion region 130 may not include such carriers. Therefore, although pixel current PC may flow through epitaxial layer 120, pixel current PC may not flow through depletion region 130. As a result, the amount of pixel current PC may be reduced compared to a case where depletion region 110 does not exist, and the amount of power consumed in pixel array 30 can also be reduced.

[0096] In the depletion region 130 and the epitaxial layer 120 , light reflected from the target object 1 may be incident on the depletion region 130 and the epitaxial layer 120 , thereby generating photo charges.

[0097] Figure 5is a diagram showing some implementations based on the disclosed technology. Figure 4 1 is a graph showing an example of potential distribution according to the depth from the front surface (FS) in the photoelectric conversion region 100, which is cut along the line AA'. Figure 5 , it is assumed that the second control node CNB receives an activation voltage as an input, the first control node CNA receives a deactivation voltage as an input, and the pixel current PC flows from the second control node CNB to the first control node CNA.

[0098] The first sensing node DNA, the epitaxial layer 120 , and the depletion region 130 may be sequentially disposed in a direction from a point (A) of the front side (FS) to another point (A′) of the back side (BS).

[0099] The first detection node DNA may have a lowest potential. In some implementations, the first detection node DNA may receive a predetermined detection voltage to maintain the lowest potential.

[0100] The epitaxial layer 120 may have a higher potential than the first detection node DNA. Due to the influence of the pixel current PC, as the distance to the first detection node DNA becomes shorter, the epitaxial layer 120 may have a lower potential. In some implementations, when the first detection node DNA receives a predetermined detection voltage as input, the potential gradient of the epitaxial layer 120 may increase.

[0101] The depletion region 130 may have a higher potential than the epitaxial layer 120. Due to the PN junction, the depletion region 130 may have a relatively stronger negative (-) polarity as the distance to the epitaxial layer 120 becomes shorter. As a result, the depletion region 130 may have a lower potential as the distance from the back side (BS) of the substrate 110 to the epitaxial layer 120 becomes shorter.

[0102] The potential gradient of depletion region 130 according to the depth in photoelectric conversion region 100 can be adjusted by the difference in impurity doping density between the P-type substrate and the N-type epitaxial layer. In some implementations, it is assumed that the potential gradient of depletion region 130 is higher than that of epitaxial layer 120.

[0103] The photocharges 500 generated in the depletion region 130 may be accelerated and moved in the direction of the epitaxial layer 120 by the potential gradient of the depletion region 130. The photocharges 500 that have reached the epitaxial layer 120 may move with the flow of the pixel current PC, so that the photocharges 500 may be captured by the first detection node DNA. The photocharges 500 generated in the epitaxial layer 120 may also move with the flow of the pixel current PC, so that the photocharges 500 may be captured by the first detection node DNA.

[0104] Return to reference Figure 4, the microlens 140 may be formed on the substrate 110, and may increase light gathering power for incident light, resulting in an increase in light receiving (Rx) efficiency of the substrate 110. Although not shown in the drawings, at least one of an anti-reflection layer for reducing the intensity of light reflected from the back side (BS) of the substrate 110 and a filter layer for selectively transmitting a specific wavelength band of light may be provided between the microlens 140 and the substrate 110.

[0105] Figure 6 Some implementations based on the disclosed technology are shown Figure 4 Schematic diagram of a comparative example of a photoelectric conversion region shown. Figure 7 The invention is based on some implementation methods of the disclosed technology. Figure 6 Graph of an example of potential distribution according to depth in a photoelectric conversion region shown.

[0106] Figure 6 is a cross-sectional view showing a photoelectric conversion region 300 having characteristics different from those of the photoelectric conversion region 100 .

[0107] The photoelectric conversion region 300 may include a substrate 310 and a microlens 340. Figure 4 Except for some structures of the photoelectric conversion region 100 shown in FIG. 1 , the remaining components of the photoelectric conversion region 300 can be similar in structure to those of FIG. Figure 4 The photoelectric conversion region 100 shown is substantially the same, so for the sake of brevity, its redundant description will be omitted herein. Figure 4 The characteristics of the photoelectric conversion region 100 are described in detail below. Figure 6 The photoelectric conversion region 300 is shown.

[0108] The substrate 310 may be formed by growing an N-type epitaxial layer on an N-type substrate. In other words, the substrate 310 may be formed using a combination of an epitaxial layer and a substrate having the same conductivity type.

[0109] The substrate 310 may include a front side (FS) and a back side (BS) disposed opposite to each other. The substrate 310 may include an epitaxial layer 320 disposed at or near the front side (FS), a P+ impurity region (P+) 335 disposed at or near the back side (BS), and a depletion region 330 disposed between the epitaxial layer 320 and the P+ impurity region (P+) 335.

[0110] A first tap TA including both the first control node CNA and the first detection node DNA and a second tap TB including both the second control node CNB and the second detection node DNB may be formed in the epitaxial layer 320. The first tap TA and the second tap TB are already formed in the epitaxial layer 320. Figure 2 and Figure 3 Therefore, for the sake of brevity, its redundant description will be omitted in this article.

[0111] The depletion region 330 may be formed by a PN junction between an N-type epitaxial layer and a P+ conductive ion implantation region. Here, the P+ conductive ion implantation region may be formed by implanting ions into the N-type epitaxial layer. In this case, the N-type epitaxial layer and the ion implantation region may have a different concept from that of the epitaxial layer 320 and the P+ impurity region 335. The region other than the depletion region 330 in the N-type epitaxial layer may correspond to the epitaxial layer 320. The region other than the depletion region 330 in the ion implantation region may correspond to the P+ impurity region 335.

[0112] The P+ impurity region 335 may be formed by implanting P-type impurities having a relatively higher density into the substrate 310 via ion implantation. The P+ impurity region 335 may prevent a dark current from occurring at or near the back side (BS) of the substrate 310, may adjust the potential of the back side (BS), and thus may implement a potential gradient in the direction of the detection nodes DNA and DNB.

[0113] Figure 7 is a diagram showing some implementations based on the disclosed technology. Figure 6 1 is a graph showing an example of potential distribution according to the depth from the front surface (FS) in the photoelectric conversion region 300, taken along line BB'. Figure 7 , it is assumed that the second control node CNB receives an activation voltage as an input, the first control node CNA receives a deactivation voltage as an input, and the pixel current PC flows from the second control node CNB to the first control node CNA.

[0114] The first sensing node DNA, the epitaxial layer 320 , the depletion region 330 , and the P+ impurity region 335 may be sequentially disposed in a direction from a point (B) of the front side (FS) to another point (B′) of the back side (BS).

[0115] The first sensing node DNA may have the lowest potential.

[0116] Due to the influence of the pixel current PC, as the distance to the first sensing node DNA becomes shorter, the epitaxial layer 320 may have a lower potential.

[0117] Due to the PN junction, the depletion region 330 may have a relatively stronger negative (-) polarity as the distance to the epitaxial layer 320 becomes shorter. As a result, the depletion region 330 may have a lower potential as the distance to the epitaxial layer 320 becomes shorter.

[0118] Meanwhile, the P+ impurity region 335 may have a potential higher than the depletion region 330 and may have a constant potential regardless of depth.

[0119] The photocharges 700 generated in the P+ impurity region 335 having a constant potential with respect to the depth may not be transferred to the depletion region 330. The photocharges 700 generated in the depletion region 330 may be accelerated and moved in the direction of the epitaxial layer 320 by the potential gradient of the depletion region 330. The photocharges 700 that have reached the epitaxial layer 320 may move with the flow of the pixel current PC, so that the photocharges 700 may be captured by the first detection node DNA. The photocharges 700 generated in the epitaxial layer 320 may also move with the flow of the pixel current PC, so that the photocharges 700 may be captured by the first detection node DNA.

[0120] Since the depletion region 330 is formed by the PN junction between the N-type epitaxial layer and the P+ conductive ion implantation region, the ion implantation region may be difficult to form in a vertically larger region at a position deeper from the back side (BS) due to the mechanical limitation of the ion implantation device. As a result, the ion implantation region can only be formed vertically in a smaller region at a position relatively shallower than the depletion region 130 formed by the PN junction between the N-type epitaxial layer and the P-type substrate.

[0121] Therefore, if Figure 6 As can be seen, the epitaxial layer 320 may have a Figure 4 The epitaxial layer shown has a relatively larger area, and the pixel current PC can flow through more paths. As a result, Figure 4 compared to, Figure 6 The amount of pixel current PC shown in may increase, and the amount of power consumed in the pixel array 30 may also increase.

[0122] As from Figure 7 As can be seen, the depletion region 330 configured to accelerate the photocharge 700 in the direction of the epitaxial layer 320 by the potential gradient may be formed in a relatively smaller area, so that the photocharge acceleration capability of each pixel may be reduced. On the contrary, in the photoelectric conversion region 100 where the depletion region 130 is formed in a relatively large area, the photocharge acceleration capability of each pixel can be increased.

[0123] The photocharge acceleration capability may refer to the ability to quickly move the photocharges generated in each pixel to the corresponding detection node. As the photocharge acceleration capability becomes higher, the demodulation contrast indicating the ability to capture photocharges within a corresponding period may also increase. As a result, the image sensing device may operate at a higher speed.

[0124] Since the ion implantation region for forming the depletion region 330 and the P+ impurity region 335 is formed by ion implantation, dangling bonds causing implantation damage may increase in the back side (BS) of the substrate 310, or may increase in the boundary between the ion implantation region and the N-type epitaxial layer (i.e., the PN junction surface). The dangling bonds may interfere with the normal movement of photocharges by increasing dark current. In order to reduce such implantation damage, an annealing process should be additionally performed, so that the entire manufacturing process may become complicated, resulting in an increase in production costs.

[0125] On the other hand, since it can be formed without using an ion implantation process Figure 4 The depletion region 130 shown may therefore not be implanted damaged and does not require an additional annealing process. Dangling bonds that may exist in or near the surface (ie, back side BS) of the depletion region 130 may be mostly solidified by an annealing process performed on the front side (FS).

[0126] In connection with the depletion region 330 and the P+ impurity region 335 formed by the ion implantation process, unexpected limitations may occur in the ion implantation process, so that a uniformity problem may occur in the depletion region 330 and the P+ impurity region 335, in which the characteristics of each region change according to the position in the wafer (i.e., the region in the wafer, such as the central position or the edge position). In connection with the other depletion region 130 formed by epitaxial growth on a P-type substrate in a wafer state, a uniformity problem in which the characteristics of each region change according to the position in the wafer will hardly occur in the depletion region 130.

[0127] Some of the photocharges (electrons) generated by the P+ impurity region 335 and the depletion region 330 may be coupled to holes, which are majority carriers of the P+ impurity region 335, so that the coupled photocharges (electrons) may disappear or be lost. Therefore, the photoelectric conversion efficiency of the photoelectric conversion region 300 may be reduced, resulting in deterioration of signal characteristics.

[0128] On the contrary, due to Figure 4 The substrate 110 shown in FIG. 1 does not include a region corresponding to the P-type region 335 , and thus the above-mentioned problem of loss of photocharges (electrons) generated by the depletion region 130 does not occur.

[0129] As described above, the photocharges (electrons) generated by the P+ impurity region 335 may be lost in the P+ impurity region 335, or may not be transferred to the detection node due to the absence of a potential gradient. Figure 4 In the embodiment, the depletion region 130 may be disposed at a specific position corresponding to the P+ impurity region 335 , and due to the potential gradient of the depletion region 130 , the photocharges (electrons) generated by the depletion region 130 may quickly move toward the detection node.

[0130] In other words, assuming Figure 4 The substrate 110 and Figure 6 The substrate 310 shown in FIG. 1 has the same depth (ie, the distance between the front side FS and the back side BS), then Figure 4 The size of the region in which photocharges (electrons) can be collected (i.e., the region generating photocharges that can be captured by the detection node) can be larger than Figure 6 The size of the area capable of collecting photocharges leads to an increase in the photoelectric conversion efficiency.

[0131] FIG. 8A to FIG. 8F It is a diagram showing some implementations based on the disclosed technology for forming Figure 4 A cross-sectional view of the process of the photoelectric conversion region shown.

[0132] FIG. 8A to FIG. 8F The process for forming the photoelectric conversion region included in one pixel is shown. Basically the same process can also be applied to other pixels included in the pixel array 30, and another pixel array belonging to the same wafer as the pixel array 30. FIG. 8A to FIG. 8F The process is shown as being performed in the wafer state, but other implementations are possible.

[0133] exist Fig. 8A In step S10 shown, a P-type substrate 150 may be provided.

[0134] exist Figure 8B In step S20 shown, an N-type epitaxial layer 112 may be grown on a P-type substrate 150. A boundary between the P-type substrate 150 and the N-type epitaxial layer 112 may be a PN junction surface 134, and an initial depletion region 132 may be formed by a PN junction between the P-type substrate 150 and the N-type epitaxial layer 112. The depth of the initial depletion region 132 may be determined by the impurity doping density of the P-type substrate 150 and the N-type epitaxial layer 112.

[0135] In the N-type epitaxial layer 112 , a region other than the initial depletion region 132 may be defined as the epitaxial layer 120 . In the P-type substrate 150 , a region other than the initial depletion region 132 may be defined as the P-type region 152 .

[0136] exist Figure 8C In step S30 , an ion implantation process and an annealing process may be performed to form a first tap TA and a second tap TB in the N-type epitaxial layer 112 .

[0137] exist Fig.8D In step S40 shown, the wafer including the P-type substrate 150 and the N-type epitaxial layer 112 may be turned over so as to prepare for a backside process. Figure 8B Step S20 and Figure 8CThe step S30 shown in FIG. 1 can be performed on the front side (FS) of the substrate 110, so each of the steps S20 and S30 can be regarded as a front side (FS) process. Since the manufacturing steps starting from step S50 can be performed on the back side (BS) of the substrate 110, the above manufacturing steps can be defined as a back side (BS) process.

[0138] exist Fig. 8E In step S50 shown, the P-type region 152 may be removed by an etching process (e.g., wet etching), and the surface on which the etching process is performed may be flattened by a chemical mechanical polishing (CMP) process, thereby forming the substrate 110. In this case, the etching process may be performed in a manner that the P-type region 152 is completely removed and the initial depletion region 132 is etched and CMP-processed to have a predetermined depth, thereby forming the depletion region 130. For example, although the back side (BS) of the substrate 110 and the PN junction surface 134 may be identical to each other after the etching process and the CMP process are performed on the PN junction surface 134, other implementations are also possible. Therefore, the distance between the back side (BS) of the substrate 110 and the front side (FS) of the substrate 110 may be longer than the distance between the PN junction surface 134 and the front side (FS) of the substrate 110.

[0139] Since the impurities of the P-type substrate are different from those of the N-type substrate, different types of etchants for removing the substrate need to be applied to the P-type substrate and the N-type substrate. Since the image sensing device based on some implementations of the disclosed technology is configured to use a combination of a P-type substrate and an N-type epitaxial layer, the etchant used in the combination of the P-type substrate and the P-type epitaxial layer can be used without any change, thereby increasing the convenience of manufacturing and reducing the cost associated with the etchant.

[0140] exist Fig.8F In step S60 , a deposition process and an etching process may be performed on the back side (BS) of the substrate 110 , so that the microlens 140 having a predetermined curvature may be formed.

[0141] As is apparent from the above description, an image sensing device based on some implementations of the disclosed technology can improve the performance of a time-of-flight (TOF) pixel while reducing the power consumption of the time-of-flight (TOF) pixel.

[0142] Implementations of the disclosed technology may provide a variety of effects or benefits, which may be achieved directly or indirectly in various implementations of the technology disclosed in this patent document.

[0143] Although a number of illustrative embodiments have been described, it should be understood that numerous variations or modifications to the disclosed embodiments, as well as other embodiments, could be devised based on what is described and / or illustrated in this patent document.

[0144] Priority claims and cross-references to related applications

[0145] This patent document claims priority to and the benefit of Korean Patent Application No. 10-2020-0159666, filed on November 25, 2020, the disclosure of which is incorporated herein by reference in its entirety as a part of the disclosure of this patent document.

Claims

1. An image sensing device, the image sensing device include: a substrate including a front surface and a back surface opposite to each other, wherein the image sensing device operates by receiving incident light through the back surface of the substrate; a depletion region disposed in the substrate in contact with the back surface of the substrate; an epitaxial layer disposed in the substrate in contact with or near the front side of the substrate; and a plurality of detection structures disposed in the epitaxial layer, each of the plurality of detection structures capturing photocharges generated by incident light and moved by current flowing in the epitaxial layer, Each of the plurality of detection structures comprises a control node and a detection node, the control node comprises a P-type impurity, the detection node comprises an N-type impurity, and Wherein, the epitaxial layer includes N-type impurities.

2. The image sensing device according to claim 1, in, The depletion region and the epitaxial layer are in contact with each other.

3. The image sensing device according to claim 1, in, As the distance from the back surface of the substrate to the epitaxial layer becomes shorter, the potential of the depletion region gradually decreases.

4. The image sensing device according to claim 3, in, Photo charges generated by the depletion region move to the epitaxial layer.

5. The image sensing device according to claim 1, in, The potential of the depletion region is higher than the potential of the epitaxial layer.

6. The image sensing device according to claim 1, in, The current flows only in the epitaxial layer and not in the depletion region.

7. The image sensing device according to claim 1, in, Each of the plurality of sensing structures is arranged in contact with the front surface of the substrate.

8. The image sensing device according to claim 1, in, The control node receives a demodulated control signal for generating the current; and The detection nodes for capturing the photo charges are disposed around the control node.

9. The image sensing device according to claim 1, further comprising: include: A microlens is disposed on the depletion region and converges the incident light and applies the converged light to the substrate.

10. An image sensing device, the image sensing device include: a depletion region having a first side and a second side opposite to each other, wherein light is incident on the first side of the depletion region; and an epitaxial layer disposed in contact with the second side of the depletion region and comprising: 1) a plurality of control nodes, each of which receives different control signals and generates current due to a difference between the different control signals; and 2) a plurality of detection nodes, each of the plurality of detection nodes being arranged to correspond to one of the plurality of control nodes, each of the plurality of detection nodes capturing photocharges generated by incident light and moved by the current, Wherein, the plurality of control nodes include P-type impurities, Wherein, the plurality of detection nodes include N-type impurities, and Wherein, the epitaxial layer is doped with N-type impurities.

11. The image sensing device according to claim 10, further comprising: include: A microlens is disposed on the first side of the depletion region and condenses the incident light and applies the condensed light to the depletion region.

12. The image sensing device according to claim 11, in, The region between the microlens and the depletion region does not contain P-type impurities.

13. The image sensing device according to claim 10, in, The current flows through the epitaxial layer.

14. The image sensing device according to claim 10, in, As the distance from the first side of the depletion region to the epitaxial layer becomes shorter, the potential of the depletion region gradually decreases.

15. The image sensing device according to claim 14, in, Photo charges move from the depletion region to the epitaxial layer.

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