Stabilize the voltage at the device under test

Abstract

An exemplary method for stabilizing the voltage at a device under test (DUT) includes identifying one or more characteristics of a first voltage deviation occurring at the DUT. This deviation may be caused by a digital signal and accompanying transient currents in the DUT. The digital signal may be part of a test stream to be sent to the DUT via one or more test channels of an automated test equipment (ATE). The one or more characteristics may be identified before sending the test stream to the DUT. The method also includes generating a second voltage applied to the DUT. This second voltage may be based on the one or more characteristics and shaped to reduce the deviation.

Description

Technical Field

[0001] This manual describes an example of a test system configured to stabilize the voltage at the device under test. Background Technology

[0002] The test system is configured to test the operation of electronic devices such as microprocessors and memory chips. Testing may include sending signals to the device and determining how the device responds to those signals based on its response. For example, testing may include applying voltage and current to a test channel and receiving signals from the device based on the applied voltage and current. The device's response will determine whether the device passes or fails the test. A voltage source can be used to power the device under test. Summary of the Invention

[0003] An exemplary method for stabilizing voltage at a device under test (DUT) includes identifying one or more characteristics of a first voltage deviation occurring at the DUT. This deviation may be caused by a digital signal and accompanying transient currents in the DUT. The digital signal may be part of a test stream to be sent to the DUT via one or more test channels of an automated test equipment (ATE). The one or more characteristics may be identified before sending the test stream to the DUT. The method also includes generating a second voltage applied to the DUT. This second voltage may be based on the one or more characteristics and may be shaped to reduce the deviation. Exemplary methods may include one or more of the following features (alone or in combination).

[0004] The transient current can be caused by a state change of the DUT induced by the digital signal. The deviation can include (i) a temporary drop in voltage followed by a temporary rise in voltage, or (ii) a temporary rise in voltage followed by a temporary drop in voltage. One or more characteristics can be based on (i) the magnitude of the temporary drop in voltage and the magnitude of the temporary rise in voltage, or (ii) the magnitude of the temporary rise in voltage and the magnitude of the temporary drop in voltage. One or more characteristics can include the duration between the digital signal and the voltage deviation.

[0005] Generating the second voltage may include modifying the test procedure that also generates the test stream. The method may include iterating through the identification and generation operations two or more times to further reduce the deviation during each iteration. The test stream may perform a scan test. The method may include sensing the first voltage at the DUT using a voltage sensor. Identifying the one or more characteristics may be based on the sensed voltage. The method may include performing a calibration operation to determine the second voltage. The second voltage may be based on an unspecified load between a voltage source and the DUT.

[0006] An exemplary test system includes a voltage source that supplies voltage to a device under test (DUT) and test instruments that send a test stream to the DUT via one or more test channels. The test system also includes one or more processing devices for identifying one or more characteristics of a first voltage deviation occurring at the DUT, wherein the first voltage is based on the voltage from the voltage source, wherein the deviation is caused by a digital signal and an accompanying transient current in the DUT, wherein the digital signal is part of the test stream, and wherein the one or more characteristics are identified before the test stream is sent to the DUT. The one or more processing devices are also configured to control the voltage source to output a second voltage. The second voltage may be based on the one or more characteristics and may be shaped to reduce the deviation. The exemplary test system may include one or more of the following features (alone or in combination).

[0007] The transient current can be caused by a state change of the DUT induced by the digital signal. The deviation can include (i) a temporary drop in voltage followed by a temporary rise in voltage, or (ii) a temporary rise in voltage followed by a temporary drop in voltage. One or more characteristics can be based on (i) the magnitude of the temporary drop in voltage and the magnitude of the temporary rise in voltage, or (ii) the magnitude of the temporary rise in voltage and the magnitude of the temporary drop in voltage. One or more characteristics can include the duration between the digital signal and the voltage deviation. The voltage source can be controlled by a test procedure that also generates the test current.

[0008] The one or more processing devices may be configured to control an operation that iterates two or more times through the identification operation and the control operation, in order to further reduce the deviation during each iteration. The test flow may perform a scan test. The test system may include a voltage sensor to sense the voltage at the DUT. The voltage sensor may be part of the voltage source or may be separate from the voltage source. Identification of the one or more characteristics may be based on the sensed voltage obtained from the voltage sensor.

[0009] The test system may include a device interface board (DIB) for connecting the test instrument to the DUT. The DIB may include points where the DUT is connected. The one or more characteristics of the deviation may be based on at least one of the inductance or capacitance of one or more conductors or components contained in the DIB. The test system may include one or more sensing lines located between the voltage source and the DUT. The one or more sensing lines may be configured to sense at least the voltage adjacent to the DUT. The one or more processing devices may be configured to perform a calibration operation to determine a second voltage. The second voltage may be based on an unspecified load between the voltage source and the DUT.

[0010] Any two or more of the features described in this specification (including the content section) may be combined to form specific embodiments not specifically described in this specification.

[0011] At least a portion of the test systems and processes described in this specification can be configured or controlled by executing instructions stored on one or more non-transitory machine-readable storage media on one or more processing devices. Examples of non-transitory machine-readable storage media include read-only memory, optical disk drives, memory disk drives, and random access memory. At least a portion of the test systems and processes described in this specification can be configured or controlled using a computing system consisting of one or more processing devices and a memory storing instructions that can be executed by the one or more processing devices to perform various control operations.

[0012] The accompanying drawings and the following detailed description illustrate one or more specific embodiments. Other features and advantages will become apparent from the details, the drawings, and the claims. Attached Figure Description

[0013] Figure 1 This is a component diagram of an exemplary test system that includes a controllable voltage power supply.

[0014] Figure 2 This is a graph of an exemplary voltage transient at the DUT.

[0015] Figure 3 This is a block diagram of components of an exemplary test system that includes instruments for sending digital signals to the device under test (DUT).

[0016] Similar reference numerals in different figures indicate similar elements. Detailed Implementation

[0017] This document describes an exemplary implementation of a system configured to supply voltage to a device under test (DUT) in a test system such as an automated test apparatus (ATE). The system includes a voltage source, such as a digital power supply (DPS) or other suitable voltage generator. The voltage source is configured and controlled to implement a feedforward method to address voltage deviations occurring at the DUT when the DUT changes state (e.g., when the DUT is initially powered on for testing). This feedforward method includes identifying one or more characteristics of the voltage at the DUT in response to receiving a digital signal, such as a digital burst as part of a test stream for the DUT. These one or more characteristics may include any deviation of the voltage from its expected value at the DUT. For example, these one or more characteristics may include a temporary drop in voltage followed by a temporary rise in voltage, or a temporary rise in voltage followed by a temporary drop in voltage.

[0018] Voltage deviation is a result of the DUT's response to a digital signal and the accompanying transient current generated within the DUT. This deviation, or one or more characteristics (referred to herein as "characteristics"), is known prior to testing the DUT, for example, before a test stream comprising a digital signal is sent to the DUT. In some implementations, the characteristics are determined based on pre-test calibration operations, the DUT's known response to a known digital signal, or a combination of these and other factors. Therefore, in some implementations, feedback, or ongoing feedback, is not used to generate data for reducing deviation.

[0019] A control system, consisting of hardware, software, or a combination of both, is configured to control the voltage output to the DUT based on the voltage characteristics at the DUT. In some implementations, these characteristics include the duration between the digital signal and the voltage deviation. Based on the characteristics of this duration and deviation, such as the magnitude and shape of the drop and rise, the control system controls a voltage source to generate an output voltage that is shaped to reduce the voltage deviation at the DUT.

[0020] Figure 1 This diagram illustrates an exemplary embodiment of a voltage source 10, including a compensator 13, for supplying power to a DUT 11 via one or more conduits. In this example, the voltage source 10 includes a forced digital-to-analog converter (DAC) 12 to generate a voltage signal. The forced DAC responds to digital commands from a control system 14, which may include a computing system comprising one or more processing devices as described herein. The control system is part of a test system 15, examples of which are described below. The signal generated by the forced DAC is modifiable to control the voltage output of the voltage source, thereby reducing voltage deviations at the DUT in response to digital signals from the test system. For example, a comparator 32 determines a voltage difference on a sensing line and outputs the voltage difference to combinational logic 34, which may be, for example, an adder or a subtractor. The signal generated by the forced DAC, such as a voltage signal, is used to control the voltage output of the combinational logic 34. For example, the signal generated by the forced DAC may be a single signal used to generate the voltage output of the combinational logic 34. In this case, the voltage output to the DUT may be based solely or primarily on the voltage signal generated by the forced DAC. In another example, the signal generated by the forced DAC can be used to adjust the voltage difference on the sensing line. In this case, the voltage output of combinational logic 34, and therefore the voltage supplied to the DUT by the voltage source, is based on the signal generated by the forced DAC and the voltage difference on the sensing line.

[0021] Voltage source 10 may also include voltage amplifier 16, such as an operational amplifier (“op-amp”), to provide a voltage to the DUT based on a voltage signal from the forced DAC and a reference voltage 18, such as electrical ground, applied to another input of the amplifier. Resistor 19 and capacitor 21 form an operational amplifier integrator circuit, wherein the output responds to changes in the input voltage over time, as the operational amplifier integrator produces an output voltage proportional to the integral of the input voltage. By controlling the input from the forced DAC based on the voltage characteristics at the DUT, deviations from the expected voltage at the DUT can be eliminated or reduced. For example, the control system may provide commands to the forced DAC to shape the voltage output generated by the amplifier, thereby reducing or eliminating deviations from the expected voltage at the DUT. In this way, the test system can stabilize the voltage at the DUT.

[0022] For example, the shape of the voltage output from voltage source 10 is configured to reduce voltage deviation at the DUT, such as the magnitude of voltage drop, voltage rise, or both. The voltage output from voltage source 10 can be timed such that voltage adjustments to address voltage deviation at the DUT arrive at the DUT at appropriate times, taking into account the type and characteristics of the conduits used to deliver the voltage. The characteristics of the conduits may be based at least in part on the distance between the voltage source and the DUT. A driver or amplifier 37 may be included along the voltage output line.

[0023] One or more capacitors 20 may be included adjacent to the DUT to reduce voltage deviations when a digital signal 17 is received at the DUT from the test system. The size, presence, or absence of capacitors adjacent to the DUT will affect how the output shape of the voltage source is configured to reduce voltage deviations at the DUT. In this respect, characteristics may also be based on the inductance, capacitance, and / or resistance on one or more conductors or components used to deliver voltage to the DUT. These inductances, capacitances, and / or resistances will also affect how the output shape of the voltage source is configured to reduce voltage deviations at the DUT. As described below, one or more of these conductors or components may be part of the device interface board (DIB) of the test system.

[0024] refer to Figure 2For example, the voltage output from voltage source 10 may be 3.3 volts (V). This may be the expected voltage at the DUT. However, digital signals such as digital bursts can cause a voltage deviation 22 at the DUT. This deviation can be caused by transient currents in the DUT resulting from the digital signals. In some examples, this voltage deviation occurs only during, for example, a state change 24 in the DUT or in response to that state change. This transient current is conceptually represented by a variable current source 25 in the DUT. Examples of state changes include, for example, powering on the DUT or changing its operation in some way, which can support transient currents that cause voltage deviations at the DUT. In this example, the voltage deviation includes a temporary drop in voltage followed by a temporary rise in voltage. In another example, the deviation includes a temporary rise in voltage followed by a temporary drop in voltage. As described above, the voltage output of the voltage source can be controlled to reduce or eliminate voltage deviations at the DUT, such that in this example, the DUT receives a stable 3.3V.

[0025] Figure 1 The circuitry includes voltage sensing lines 29 and 30. In some embodiments, the sensing lines include Kelvin connections. These voltage sensing lines can be used to sense the voltage at the DUT during calibration operations. For example, during calibration, voltage sensor 32 can monitor the sensing lines to determine the voltage across the DUT. The voltage sensed by the voltage sensor can be provided to the control system. The control system can use the sensed voltage or a digital version of the sensed voltage to determine, for example, the timing, shape, and / or magnitude of a voltage deviation at the DUT caused by a transient current. The control system can then adjust the voltage output of the voltage source during DUT testing based on, for example, the timing, shape, and / or magnitude of the voltage deviation to reduce or eliminate the voltage deviation. The control system can also adjust the voltage output of the voltage source during DUT testing based on an unspecified load between the voltage source and the DUT. In other words, the feedforward control process described herein is capable of adjusting the output voltage regardless of the load between the voltage source and the DUT. Therefore, calibration may take into account any capacitive, inductive, and / or resistive loads between the voltage source and the DUT, including the inherent properties of conductor 28, and take into account the effect of such loads on the voltage of the DUT as a factor in its voltage regulation.

[0026] A voltage sensor may be part of a voltage source, as shown, or it may be separate from the voltage source. For example, as shown, a voltage sensor may include a comparator. In some implementations, the voltage sensor may be part of a control system or otherwise located external to the voltage source. In some examples, the sensing line provides feedback even if the DAC value is forced to be known before testing.

[0027] In some implementations, the control system may iterate two or more times, including: identifying characteristics of voltage deviations at the DUT due to digital signals and accompanying transient currents in the DUT before sending the test stream to the DUT, shaping the voltage to reduce the deviation, and applying that voltage to the DUT. In some implementations, the iterations may be based on information obtained during subsequent calibration operations not performed during testing. In some implementations, the iterations may be based on information obtained during testing, which is fed back to the control system via sensing lines 29 and 30. That is, in some examples, subsequent iterations employ a separate feedforward approach, and in some implementations, subsequent iterations utilize feedback information.

[0028] Figure 3 Components of ATE 33 are shown, which can be used to implement the DUT voltage stabilization technique described herein. ATE 33 can be part of test system 15. Figure 3 In this context, dashed lines conceptually represent potential signal paths between system components. ATE can include... Figure 1 Voltage source 10, or Figure 1 Voltage source 10 can be connected to Figure 1 The ATE separation is shown.

[0029] ATE 10 includes a test head 35 and a control system 36, which can be connected to... Figure 1 The control system 14 is identical to the control system 14. The control system may include a computing system comprising one or more microprocessors or other suitable processing devices as described herein. The DIB 38 includes a printed circuit board (PCB) connected to the test head 11 and includes mechanical and electrical interfaces for connection to one or more DUTs, such as DUT 11, being tested or to be tested by the ATE. Voltage-containing power may be delivered to the DUTs connected to the DIB via one or more conduits in the DIB. Voltage-containing power may also be delivered via one or more passive electronic devices, such as capacitors, inductors, or resistors connected along the one or more conduits and / or on the DIB, or via one or more active electronic devices connected along the one or more conduits and / or on the DIB.

[0030] exist Figure 3 In the example, DIB 38 is electrically and mechanically connected to test head 35. The DIB includes points 41, which may include pins, conductive traces, or other electrical and mechanical connection points to which the DUT can be connected. Test signals, response signals, voltage signals, and other signals are transmitted between the DUT and the test instrument via test channels passing through the points. DIB 38 also includes connectors, conductive traces, and circuitry for routing signals between the test instrument, the DUT connected to point 41, and other circuitry.

[0031] Control system 36 and test head and voltage source 10 ( Figure 1 The control system 36 communicates with components to control testing. For example, the control system 36 can download test programs to test instruments 40A to 40N in the test head. Test instruments are hardware devices that may include one or more processing devices and other circuitry. Test instruments 40A to 40N can run the test programs to test the DUT communicating with the test instruments. The control system 36 can also send instructions, test data, and / or other information to the test instruments in the test head, which can be used by the test instruments to perform appropriate tests on the DUT connected to the DIB via an interface. In some embodiments, this information may be sent via a computer or other type of network or via a direct electrical path. In some embodiments, this information may be sent via a local area network (LAN) or a wide area network (WAN).

[0032] The test procedure generates a test stream to be provided to the DUT. For example, the test stream is written as an output digital signal to elicit a response from the DUT. The test stream can also be written as an output control signal to control a voltage source to apply an appropriate voltage to the DUT during testing. In some implementations, the control system may modify the test procedure that generates the test stream based on the characteristics of the voltage signal at the DUT determined during pre-test calibration operations. Doing so can reduce or eliminate deviations from the expected voltage at the DUT as previously described. For example, changes to the test procedure may include adding instructions to the test procedure or modifying existing instructions in the test procedure to adjust the voltage at the DUT to a specified amplitude and / or shape at a specified time, thereby reducing voltage deviations at the DUT.

[0033] exist Figure 3 In the example, ATE 10 includes multiple test instruments 40A to 40N, each of which can be appropriately configured to perform one or more tests and / or other functions. Although only four test instruments are depicted, the system may include any appropriate number of test instruments, including those located outside the test head 35. In some embodiments, each test instrument may be configured to output a digital signal to test the DUT based on data provided, for example, by a control system, and to receive a response signal from the DUT. Different test instruments may be configured to perform different types of tests and / or be configured to test different DUTs. The received signals may include response signals based on test signals and / or signals originating from the DUT that are not prompted (e.g., not in response to) test signals. In some embodiments, an electrical conductor, such as copper wire, may be present between the DUT, DIB, and the test instrument interface through which test and response signals are transmitted.

[0034] Signals, including voltages from a voltage source, can be transmitted to or received from the DUT via multiple test channels or other conductive media. In some examples, a test channel may include one or more physical transmission media through which signals are transmitted from the test instrument to the DUT and received from the DUT. Physical transmission media may include, but are not limited to, a single electrical conductor or a combination of an electrical conductor and an optical conductor, a wireless transmission medium, or both an optical conductor and a wireless transmission medium. In some examples, a test channel may include a frequency range through which signals are transmitted via one or more physical transmission media. A test channel may include conductive traces on the DIB and / or be electrically connected to conductive traces on the DIB.

[0035] In some examples, ATE 10 includes a connection interface 44 for connecting test instrument test channel 47 to DIB 38. Connection interface 44 may include connector 46 or other devices for routing signals between the test instrument and DIB 38. For example, the connection interface may include one or more circuit boards or other substrates on which such connectors are mounted. Conductors included in the test channel may be guided through the connection interface and the DIB.

[0036] The techniques described herein can be used during scan testing. In a scan testing system, memory elements within a device are interconnected to form a scan register or chain. The internal state of the device is controlled by shifting in or scanning in test data to be applied to the components of the device. The logical responses of these components can be obtained by shifting out or scanning out the data stored in the scan register. However, the techniques described herein are not limited to use in testing but can be used in any suitable technical environment.

[0037] All or part of the test systems and processes described in this specification, as well as various modifications thereof, may be configured or controlled at least in part by one or more computers, such as control system 36, using one or more computer programs tangibly embodied in one or more information carriers, such as one or more non-transitory machine-readable storage media. The computer programs may be written in any form of programming language, including compiled or interpreted languages, and may be deployed in any form, including as standalone programs or as modules, parts, subroutines, or other units suitable for a computing environment. The computer programs may be deployed to execute on a single computer, at a single site, or distributed across multiple sites interconnected via a network.

[0038] Actions associated with configuring or controlling the voltage source, test system, and processes described herein may be performed by one or more programmable processors executing one or more computer programs to control all or some of the previously described trap-forming operations. All or part of the test system and processes may be configured or controlled by dedicated logic circuitry, such as FPGAs (Field-Programmable Gate Arrays) and / or ASICs (Application-Specific Integrated Circuits).

[0039] Processors suitable for executing computer programs include, for example, both general-purpose and special-purpose microprocessors, and any one or more processors in any kind of digital computer. Typically, a processor receives instructions and data from read-only memory or random access memory, or both. The components of a computer include one or more processors for executing instructions and one or more memory devices for storing instructions and data. Typically, a computer will also include (or be operatively coupled to receive data from or transfer data to, or both) one or more machine-readable storage media, such as mass storage devices for storing data, such as magnetic disks, magneto-optical disks, or optical disks. Non-transitory machine-readable storage media suitable for embodying computer program instructions and data include all forms of non-volatile memory, including, for example, semiconductor memory devices such as EPROM (Erasable Programmable Read-Only Memory), EEPROM (Electrically Erasable Programmable Read-Only Memory), and flash memory devices; magnetic disks such as internal hard disks or removable disks; magneto-optical disks; and CD-ROM (Optical Disc Read-Only Memory) and DVD-ROM (Digital Universal Optical Disc Read-Only Memory).

[0040] The elements of the different embodiments described may be combined to form other embodiments not specifically described above. Elements may be omitted from the previously described system without generally adversely affecting its operation or the operation of the system. Furthermore, individual elements may be combined into one or more single elements to perform the functions described in this specification.

[0041] Other specific embodiments not specifically described in this specification are also within the scope of the following claims.

Claims

1. A test system comprising: a voltage source to provide a voltage to a device under test (DUT); a test instrument to send a test stream to the DUT through one or more test channels; and one or more processing devices to (i) identify one or more characteristics of a first voltage deviation occurring at the DUT, the first voltage to be based on the voltage from the voltage source, the deviation caused by a digital signal and a concomitant transient current in the DUT, the digital signal being part of the test stream, wherein the one or more characteristics are identified prior to sending the test stream to the DUT, and (ii) control the voltage source to output a second voltage, the second voltage being based on the one or more characteristics and shaped to reduce the deviation, wherein the test system further comprises: a device interface board (DIB) to connect the test instrument to the DUT, the DIB comprising a site to which the DUT is connected; wherein the one or more characteristics of the deviation are based on at least one of an inductance or a capacitance on one or more conductors or components contained in the DIB, wherein the deviation comprises a temporary drop in the voltage followed by a temporary rise in the voltage, or a temporary rise in the voltage followed by a temporary drop in the voltage.

2. The test system of claim 1, wherein the transient current is caused by a state change of the DUT caused by the digital signal.

3. The test system of claim 1, wherein the deviation comprises (i) a temporary drop in the voltage followed by a temporary rise in the voltage, or (ii) a temporary rise in the voltage followed by a temporary drop in the voltage; and wherein the one or more characteristics are based on (i) a magnitude of the temporary drop in the voltage and a magnitude of the temporary rise in the voltage, or (ii) a magnitude of the temporary rise in the voltage and a magnitude of the temporary drop in the voltage.

4. The test system of claim 1, wherein the one or more characteristics comprise a duration of time between the digital signal and the voltage deviation.

5. The test system of claim 1, wherein the voltage source is controlled by a test program that also generates the test stream.

6. The test system of claim 1, wherein the one or more processing devices are configured to perform operations comprising: iterating the identifying operation and the controlling operation two or more times so as to further reduce the deviation during each iteration.

7. The test system of claim 1, wherein the test stream implements a scan test.

8. The test system of claim 1, further comprising: a voltage sensor to sense the voltage at the DUT; wherein identifying the one or more characteristics is based on the sensed voltage.

9. The test system of claim 8, wherein the voltage sensor is part of the voltage source.

10. The test system of claim 8, wherein the voltage sensor is separate from the voltage source.

11. The test system of claim 1, further comprising: one or more sense lines between the voltage source and the DUT, the one or more sense lines sensing at least a voltage proximate to the DUT; wherein the one or more processing devices are configured to perform a calibration operation to determine the second voltage, the second voltage based on an unspecified load between the voltage source and the DUT.

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