Gap fill deposition process

Abstract

Methods for forming interconnect structures on a substrate in a cluster processing system and thermal processing the interconnect structures are provided. In one embodiment, a method for a device structure for a semiconductor device includes forming a barrier layer in an opening formed in a material layer disposed on a substrate, forming an interface layer on the barrier layer, forming a gap fill layer on the interface layer, and performing an anneal process on the substrate, wherein the anneal process is performed at a pressure greater than 5 bar.

Description

TECHNICAL FIELD

[0001] Embodiments of the present disclosure generally relate to methods for forming metal-containing materials. More specifically, embodiments of the present disclosure generally relate to methods for forming metal-containing materials in small-sized openings in device structures for semiconductor devices. BACKGROUND

[0002] Reliably fabricating sub-half micron and smaller features is one of the key technical challenges for next generation very large scale integration (VLSI) and ultra large-scale integration (ULSI) of semiconductor devices. However, as the limits of circuit technology are pushed, the shrinking size of VLSI and ULSI interconnect technology has placed additional demands on processing capabilities. Reliable formation of gate structures on substrates is important to VLSI and ULSI success and to the continuing effort to increase circuit density and quality of individual substrates and dies.

[0003] As integrated circuit components are scaled to smaller and smaller sizes (e.g., deep sub-micron sizes), the materials used to fabricate these components must be carefully selected to achieve satisfactory electrical performance. To enable the fabrication of next generation devices and structures, three-dimensional (3D) stacking of semiconductor chips is often utilized to improve transistor performance. By arranging transistors three-dimensionally rather than conventionally two-dimensionally, multiple transistors can be placed in close proximity to one another in an integrated circuit (IC). Three-dimensional (3D) stacking of semiconductor chips shortens wire lengths and keeps wire delays low. For stacked semiconductor chips, as the trench width continues to shrink, the aspect ratio (depth divided by width) continues to increase. One challenge with the fabrication of high aspect ratio trenches is avoiding void formation during deposition of the desired material in the trench.

[0004] To fill the trench, a layer of material, such as a dielectric layer or a metal layer, is deposited. The layer of material typically covers the field, as well as the walls and the bottom of the trench. If the trench is wide and shallow, it is relatively easy to completely fill the trench. However, as the trench aspect ratio increases, it is more likely that the opening of the trench will "pinch off," forming a void (e.g., a defect) within the trench.

[0005] To reduce the likelihood of void formation within the trench or seam formation within the trench, a number of different process techniques have been developed to fill the trench with the desired layer of material with minimal defects. However, poor process control during the deposition process will result in irregular structure profiles or early closure of the trench, causing voids, seams, or air gaps in the trench when filling the trench with a dielectric material.

[0006] Accordingly, there is a need for improving a deposition process for forming a material layer with minimal defects and with a desired profile in a trench. SUMMARY

[0007] Methods for forming an interconnect structure on a substrate in a cluster processing system and thermal processing the interconnect structure are provided. In one embodiment, a method for forming a device structure for a semiconductor device includes forming a barrier layer in an opening formed in a material layer disposed on a substrate, forming an interface layer on the barrier layer, forming a gap fill layer on the interface layer, and performing an anneal process on the substrate, wherein the anneal process is performed at a pressure greater than 5 bar.

[0008] In another embodiment, an interconnect structure includes a barrier layer formed in an opening defined in a material layer disposed on a substrate, an interface layer disposed on the barrier layer, and a gap fill layer disposed on the interface layer, wherein the gap fill layer has an average grain size greater than 10 nm.

[0009] In another embodiment, a method for forming an interconnect structure includes performing a gap fill layer formation process by repeatedly performing a deposition process and a plasma treatment process until a predetermined thickness of the gap fill layer is obtained, and performing an anneal process on the gap fill layer at a pressure greater than 5 bar while supplying a hydrogen or hydrogen isotope containing gas. BRIEF DESCRIPTION OF DRAWINGS

[0010] The above-described features of the present disclosure, together with other advantages, can be better understood by referring to the following detailed description in conjunction with the accompanying drawings. It should be noted that the drawings are not necessarily drawn to scale, and that the specific embodiments of the present disclosure are shown by way of example in the drawings and, thus, should not be construed as limiting the scope of the present disclosure.

[0011] Figure 1 A pre-clean process chamber that can be used to perform a pre-clean process on a substrate is depicted;

[0012] Figure 2 An apparatus that can be used to perform an atomic layer deposition (ALD) process according to one embodiment of the present disclosure is depicted;

[0013] Figure 3 An apparatus that can be used to perform a chemical vapor deposition (CVD) process according to one embodiment of the present disclosure is depicted;

[0014] Figure 4 An apparatus that can be used to perform a high pressure thermal anneal process according to one embodiment of the present disclosure is depicted;

[0015] Figure 5 One embodiment of a cluster processing system is depicted, which can have a processing chamber from Figures 1-4 incorporated therein to carry out one embodiment of the present disclosure;

[0016] Figure 6 A flow chart depicting an example of a method for forming a metal-containing material on a substrate is depicted;

[0017] Figures 7A-7D One embodiment of a sequence of forming a metal-containing material on a substrate during a manufacturing process according to the process depicted in Figure 6

[0018] A cross-sectional view of an interconnect structure fabricated by a method carrying out one embodiment of the present disclosure is depicted. Figure 8 To facilitate an understanding of this disclosure, like reference characters are used throughout the various figures to denote like features. It is intended that elements and features of one embodiment can be beneficially incorporated into other embodiments without further recitation.

[0019] It is to be noted, however, that the appended drawings illustrate only example embodiments of this disclosure and therefore are not to be considered limiting in scope, as the disclosure can admit to other equally functional embodiments.

[0020] DETAILED DESCRIPTION

[0021] Methods for forming metal-containing interconnect structures on a substrate with good gap fill performance in semiconductor devices are provided. In one example, a pre-clean process, a barrier layer deposition process, an interface layer deposition process, a gap fill layer deposition process, and a high pressure anneal process are performed to fill an opening disposed in a material layer on a substrate with good gap fill performance. Furthermore, the pre-clean process, the barrier layer deposition process, the interface layer deposition process, and the gap fill layer deposition process can be performed in a cluster processing system without breaking vacuum (e.g., without exposing the substrate to atmosphere while in the cluster processing system), such that the possibility of contamination from air or from the environment can be substantially eliminated. The high pressure anneal process performed after forming the barrier layer, the interface layer, and the gap fill layer can help to improve the grain structure of the gap fill layer, thus improving film quality and purity in the gap fill layer.

[0022] Figure 1 A cross-sectional view of an illustrative processing chamber 100 suitable for performing a substrate pre-clean process described further below. The processing chamber 100 can be configured to remove native oxides, or surface contaminants, from a substrate surface. The processing chamber 100 is particularly useful for performing a remote plasma surface cleaning process. The processing chamber 100 can be a Frontier® processing chamber available from Applied Materials, Inc., located in Santa Clara, California. The processing chamber 100 can include a chamber body 102, a substrate support 104, a gas distribution assembly 106, and a plasma generating assembly 108. The substrate support 104 can be configured to support a substrate 110 during processing. The substrate support 104 can be configured to rotate the substrate 110 about an axis 112. The substrate support 104 can be configured to rotate the substrate 110 about an axis 112 at a rotational speed of about 100 rpm to about 1000 rpm, or at a rotational speed of about 200 rpm to about 800 rpm, or at a rotational speed of about 300 rpm to about 600 rpm, or at a rotational speed of about 400 rpm to about 500 rpm, or at a rotational speed of about 450 rpm. The substrate support 104 can be configured to rotate the substrate 110 about an axis 112 at a rotational speed of about 100 rpm, or at a rotational speed of about 200 rpm, or at a rotational speed of about 300 rpm, or at a rotational speed of about 400 rpm, or at a rotational speed of about 450 rpm, or at a rotational speed of about 500 rpm, or at a rotational speed of about 600 rpm, or at a rotational speed of about 700 rpm, or at a rotational speed of about 800 rpm, or at a rotational speed of about 900 rpm, or at a rotational speed of about 1000 rpm. TM ​PCxT Reactive Preclean TM (RPC), AKTIV Pre-Clean TM , Siconi TM or Capa TM chamber, available from Applied Materials, Inc. of Santa Clara, California. It is noted that other vacuum processing chambers available from other manufacturers can also be adapted to carry out the present disclosure.

[0023] The processing chamber 100 includes a chamber body 112, a lid assembly 123, and a support assembly 180. The lid assembly 123 is disposed at an upper end of the chamber body 112, and the support assembly 180 is at least partially disposed within the chamber body 112.

[0024] The chamber body 112 includes a slit valve opening 114 formed in a sidewall thereof to provide access to an interior of the processing chamber 100. The slit valve opening 114 is selectively opened and closed to allow access to the interior of the chamber body 112 by a wafer transfer robot (not shown).

[0025] In one or more embodiments, the chamber body 112 includes a passage 115 formed therein for flowing a heat transfer fluid therethrough. The chamber body 112 can further include a liner 120 that surrounds the support assembly 180. The liner 120 is removable for servicing and cleaning. In one or more embodiments, the liner 120 includes one or more apertures 125 and pumping passages 129 formed therein in fluid communication with a vacuum system. The apertures 125 provide a flow path for gas into the pumping passages 129, which provide an outlet for gas within the processing chamber 100.

[0026] The vacuum system can include a vacuum pump 130 and a throttle valve 132 to regulate the flow of gas through the processing chamber 100. The vacuum pump 130 is coupled to a vacuum port 131 disposed in the chamber body 112 and is thus in fluid communication with the pumping passages 129 formed in the liner 120.

[0027] The remote plasma system 110 can process halogen containing precursors, such as fluorine containing precursors, which are then passed through the gas inlet assembly 111. Within the gas inlet assembly 111 two different gas supply passages can be seen (first passage 109 and second passage 113). The first passage 109 carries gas through the remote plasma system 110 (RPS) while the second passage 113 bypasses the remote plasma system 110. Either of the passages 109, 113 can be used for halogen containing precursors. On the other hand, the first passage 109 can be used for process gas and the second passage 113 can be used for a treatment gas. A cover assembly (or conductive top) 123 and a perforated baffle 153 (or showerhead) are shown with an insulating ring 124 therebetween which allows an AC potential to be applied to the cover assembly 123 relative to the perforated baffle 153. The AC potential triggers a plasma in the chamber plasma region 121. Process gas can be passed through the first passage 109 into the chamber plasma region 121 and can be excited by the plasma in the chamber plasma region 121 alone or in combination with the remote plasma system 110. If process gas flows through the second passage 113, only the chamber plasma region 121 is used for excitation. The combination of the chamber plasma region 121 and / or the remote plasma system 110 can be referred to as a remote plasma system herein. The perforated baffle (also referred to as a showerhead) 153 separates the chamber plasma region 121 from the substrate processing region 141 below the perforated baffle 153. The perforated baffle 153 allows a plasma to exist in the chamber plasma region 121 to avoid direct excitation of gas in the substrate processing region 141 while still allowing excited species to travel from the chamber plasma region 121 into the substrate processing region 141.

[0028] The perforated baffle 153 is disposed between the chamber plasma region 121 and the substrate processing region 141 and allows plasma effluent (excited derivatives of precursors or other gases) generated within the remote plasma system 110 and / or the chamber plasma region 121 to pass through a plurality of through-holes 156. The perforated baffle 153 also has one or more hollow volumes 151 which can be filled with a precursor in vapor or gas form and pass through the through-holes 156 into the substrate processing region 141 without directly entering the chamber plasma region 121. To maintain a significant concentration of excited species penetrating from the chamber plasma region 121 into the substrate processing region 141, the length 126 of the through-holes 156 can be limited and configured in different configurations as needed.

[0029] The perforated baffle 153 can be configured to function as a Figure 1Alternatively, a separate processing chamber element (not shown) can be included that suppresses the concentration of ions traveling into the substrate processing region 141. The lid assembly 123 and the perforated baffle 153 can function as first and second electrodes, respectively, such that the lid assembly 123 and the perforated baffle 153 can receive different voltages. In these configurations, electrical power (e.g., RF power) can be applied to the lid assembly 123, the perforated baffle 153, or both. For example, electrical power can be applied to the lid assembly 123 while the perforated baffle 153 (functioning as an ion suppressor) is grounded. The substrate processing chamber 100 can include an RF generator that provides electrical power to the lid assembly 123 and / or the perforated baffle 153 as desired. The voltage applied to the lid assembly 123 can promote uniform distribution of plasma within the chamber plasma region 121 (i.e., reduce localized plasma). To enable plasma formation in the chamber plasma region 121, the insulating ring 124 can electrically insulate the lid assembly 123 from the perforated baffle 153. The insulating ring 124 can be made of ceramic and can have a high breakdown voltage to avoid sparking. Portions of the substrate processing chamber 100 proximate to the capacitively coupled plasma components just described can further include a cooling unit (not shown) that includes one or more cooling fluid passages to cool surfaces exposed to plasma with circulating coolant (e.g., water).

[0030] In the illustrated embodiment, the perforated baffle 153 can distribute (via the through-holes 156) process gases containing hydrogen, fluorine, and / or plasma effluents of these process gases when excited by plasma in the chamber plasma region 121. In embodiments, the process gases introduced into the remote plasma system 110 and / or the chamber plasma region 121 can contain fluorine, such as F2or HF. The process gases can also include a carrier gas, such as helium, argon, hydrogen (H2), and the like. The plasma effluents can include ionized or neutral derivatives of the process gases and can also be referred to herein as radical fluorine, meaning the atomic constituents of the introduced process gases.

[0031] The through holes 156 are configured to inhibit the migration of ionically charged species out of the chamber plasma region 121 while allowing uncharged neutral or radical species to pass through the perforated baffle 153 into the substrate processing region 141. These uncharged species can include highly reactive species transported via the through holes 156 in a carrier gas that is less reactive. As noted previously, the migration of ion species through the through holes 156 can be reduced, and in some cases completely inhibited. Controlling the content of ion species that pass through the perforated baffle 153 provides increased control over the gas mixture in contact with the underlying wafer substrate, which in turn increases control over the deposition and / or etch characteristics of the gas mixture. For example, adjustment of the ion concentration of the gas mixture can significantly alter the etch selectivity (e.g., silicon nitride / silicon oxide: silicon etch ratio).

[0032] In embodiments, the number of through holes 156 can be between about 60 and about 2000. The through holes 156 can have a variety of shapes, but are most easily fabricated as circular. There is also freedom in selecting the cross-sectional shape of the through holes, which can be conical, cylindrical, or a combination of the two shapes. The through holes 156 can be configured to control the passage of plasma activated gases (i.e., ions, radicals, and / or neutral species) through the perforated baffle 153. For example, the aspect ratio (i.e., the diameter to length of the hole) and / or the geometry of the hole can be controlled such that the flow of ionically charged species in the activated gases that pass through the perforated baffle 153 is reduced. The through holes 156 in the perforated baffle 153 can include a conical portion facing the chamber plasma region 121 and a cylindrical portion facing the substrate processing region 141. The cylindrical portion can be proportioned and sized to control the flow of ion species into the substrate processing region 141. An adjustable electrical bias can also be applied to the perforated baffle 153 as an additional means to control the flow of ion species through the perforated baffle 153.

[0033] Alternatively, the through holes 156 can have a smaller inner diameter (ID) toward the top surface of the perforated baffle 153 and a larger ID toward the bottom surface. Further, the bottom edges of the through holes 156 can be chamfered to help evenly distribute the plasma effluents in the substrate processing region 141 as they exit the showerhead and to promote uniform distribution of the plasma effluents and precursor gases. The smaller ID can be placed in various locations along the through holes 156 and still allow the perforated baffle 153 to reduce ion density within the substrate processing region 141. The reduction in ion density is due to an increased number of collisions with the walls before entering the substrate processing region 141. Each collision increases the likelihood that an ion is neutralized by either gaining or losing an electron from the wall. Generally, the smaller ID of the through holes 156 can be between about 0.2 mm and about 20 mm. In other embodiments, the smaller ID can be between about 1 mm and 6 mm or between about 0.2 mm and about 5 mm. Further, the aspect ratio (i.e., the smaller ID relative to the length of the hole) of the through holes 156 can be about 1 to 20. The smaller ID of the through holes 156 can be the smallest ID found along the length of the through hole. The cross-sectional shape of the through holes 156 can generally be cylindrical, conical, or any combination thereof.

[0034] The support assembly 180 can include a support member 185 to support a substrate (not shown) for processing within the chamber body 112. The support member 185 can be coupled to a lift mechanism 183 via a shaft 187 that extends through a centrally located opening 116 formed in the bottom surface of the chamber body 112. The lift mechanism 183 can be flexibly sealed to the chamber body 112 by bellows 188 that prevent vacuum leakage from around the shaft 187. Figure 1

[0035] The support member 185 can include bores 192 formed therethrough to accommodate lift pins 193, one of which is shown in FIG. 1. Each lift pin 193 is composed of ceramic or ceramic-containing material and is used for substrate processing and transportation. The lift pins 193 are movably positioned within their respective bores 192 when engaged with an annular lift ring 195 disposed within the chamber body 112. The support assembly 180 can further include an edge ring 196 disposed about the support member 185. Figure 1

[0036] ​​The temperature of the support assembly 180 can be controlled by circulating a fluid through fluid passages 198 embedded in the body of the support member 185. In one or more embodiments, the fluid passages 198 are in fluid communication with heat transfer conduits 199 disposed through the shaft 187 of the support assembly 180. The fluid passages 198 are positioned around the support member 185 to provide uniform heat transfer to the substrate receiving surface of the support member 185. The fluid passages 198 and heat transfer conduits 199 can flow a heat transfer fluid to heat or cool the support member 185. Any suitable heat transfer fluid can be used, such as water, nitrogen, ethylene glycol, or mixtures thereof. The support assembly 180 can further include embedded thermocouples (not shown) for monitoring the temperature of the support surface of the support member 185. For example, signals from the thermocouples can be used in a feedback loop to control the temperature or flow rate of the fluid circulating through the fluid passages 198.

[0037] The support member 185 can be vertically movable within the chamber body 112 so that the distance between the support member 185 and the lid assembly 140 can be controlled. Sensors (not shown) can provide information about the position of the support member 185 within the processing chamber 100.

[0038] A system controller (not shown) can be used to regulate the operation of the processing chamber 100. The system controller can operate under the control of a computer program stored in the memory of the controller or other memory source. The computer program can include instructions that enable the pre-clean process described below to be performed in the processing chamber 100. For example, the computer program can dictate process sequences and times, gas mixtures, chamber pressures, RF power levels, pedestal positioning, slit valve opening and closing, wafer cooling, and other parameters specific to a particular process.

[0039] Figure 2 A schematic cross-sectional view of one embodiment of an atomic layer deposition processing chamber 200. The ALD processing chamber 200 includes a gas delivery apparatus 230 suitable for cyclic deposition such as ALD or chemical vapor deposition (CVD). The terms ALD and CVD as used herein mean sequential introduction of reactants to deposit a thin layer on a substrate structure. The sequential introduction of reactants can be repeated to deposit multiple thin layers to form a conformal layer to a desired thickness. The chamber 200 can also be suitable for other deposition techniques along with photolithography processes.

[0040] The chamber 200 includes a chamber body 229 having a bottom 234. A slit valve tunnel 233 formed through the chamber body 229 provides access for a robot (not shown) to transport and retrieve a substrate 201, such as a 200 mm, 300 mm, or 450 mm semiconductor substrate or a glass substrate, from the chamber 200.

[0041] A substrate support 292 is disposed in the chamber 200 and supports the substrate 201 during processing. The substrate support 292 is mounted to the lift 214 to raise and lower the substrate support 292 and the substrate 201 disposed thereon. A lift plate 216 is connected to a lift plate actuator 218 that controls the raising of the lift plate 216. The lift plate 216 can be raised and lowered to raise and lower a pin 220 that is movably disposed through the substrate support 292. The pin 220 is used to raise and lower the substrate 201 above the surface of the substrate support 292. The substrate support 292 can include a vacuum chuck, an electrostatic chuck, or a clamping ring to secure the substrate 201 to the surface of the substrate support 292 during processing.

[0042] The substrate support 292 can be heated to heat the substrate 201 disposed thereon. For example, the substrate support 292 can be heated using embedded heating elements such as resistive heaters, or the substrate support 292 can be heated using radiant heat such as a heating lamp disposed above the substrate support 292. A purge ring 222 can be disposed on the substrate support 292 to define a purge passage 224 that provides a purge gas to the peripheral portion of the substrate 201 to prevent deposition thereon.

[0043] A gas delivery apparatus 230 is disposed in an upper portion of the chamber body 229 to provide gases such as process and / or purge gases to the chamber 200. A pumping system 278 is in communication with a pumping passage 279 to exhaust any desired gases from the chamber 200 and to help maintain a desired pressure or a desired pressure range within a pumping region 266 of the chamber 200.

[0044] In one embodiment, the gas delivery apparatus 230 includes a chamber lid 232. The chamber lid 232 includes an expansion pipe 237 extending from a central portion of the chamber lid 232 and a bottom surface 260 extending from the expansion pipe 237 to a peripheral portion of the chamber lid 232. The bottom surface 260 is sized and shaped to substantially cover the substrate 201 disposed on the substrate support 292. At the peripheral portion of the chamber lid 232 adjacent the periphery of the substrate 201, the chamber lid 232 can have a choke 262. A cap portion 272 includes a portion of the expansion pipe 237 and gas inlets 236A, 236B. The expansion pipe 237 has the gas inlets 236A, 236B to provide gas flow from two similar valves 242A, 242B. The gas flow from the valves 242A, 242B can be provided together and / or separately.

[0045] In one configuration, valves 242A and 242B are coupled to separate reactant gas sources, but to the same purge gas source. For example, valve 242A is coupled to reactant gas source 238 and valve 242B is coupled to reactant gas source 239, both valves 242A, 242B are coupled to purge gas source 240. Each valve 242A, 242B includes a delivery line 243A, 243B having a valve seat assembly 244A, 244B and includes a purge line 245A, 245B having a valve seat assembly 246A, 246B. Delivery lines 243A, 243B are in communication with reactant gas sources 238, 239 and with gas inlets 237A, 237B of expansion tube 290. Valve seat assemblies 244A, 244B of delivery lines 243A, 243B control the flow of reactant gas from reactant gas sources 238, 239 to expansion tube 290. Purge lines 245A, 245B are in communication with purge gas source 240 and intersect delivery lines 243A, 243B downstream of valve seat assemblies 244A, 244B of delivery lines 243A, 243B. Valve seat assemblies 246A, 246B of purge lines 245A, 245B control the flow of purge gas from purge gas source 240 to delivery lines 243A, 243B. If a carrier gas is used to deliver the reactant gas from reactant gas sources 238, 239, the same gas can be used as the carrier gas and the purge gas (i.e., argon can be used as both the carrier gas and the purge gas).

[0046] Each valve 242A, 242B can be a zero dead volume valve to enable purging of reactant gas from delivery lines 243A, 243B when the valve seat assembly 244A, 244B of the valve is closed. For example, purge lines 245A, 245B can be positioned adjacent to valve seat assemblies 244A, 244B of delivery lines 243A, 243B. When valve seat assemblies 244A, 244B are closed, purge lines 245A, 245B can provide purge gas to purge delivery lines 243A, 243B. In the illustrated embodiment, purge lines 245A, 245B are positioned slightly spaced apart from valve seat assemblies 244A, 244B of delivery lines 243A, 243B so that, when open, purge gas is not delivered directly into valve seat assemblies 244A, 244B. As used herein, a zero dead volume valve is defined as a valve having a negligible dead volume (i.e., not necessarily zero dead volume). Each valve 242A, 242B can be adapted to provide a combined gas flow of reactant gas from source 238, 239 and purge gas from source 240 and / or separate gas flows. Pulsing of the purge gas can be provided by opening and closing the diaphragm of valve seat assembly 246A of purge line 245A. Pulsing of the reactant gas from reactant gas source 238 can be provided by opening and closing valve seat assembly 244A of delivery line 243A.

[0047] A control unit 280 can be coupled to the chamber 200 to control the processing conditions. The control unit 280 includes a central processing unit (CPU) 282, support circuits 284, and memory 286 which contains associated control software 283. The control unit 280 can be one of any form of general-purpose computer processors which can be used in an industrial setting for controlling various chambers and sub-processors. The CPU 282 can employ any suitable memory 286, such as random access memory, read only memory, floppy drives, CD-ROM drives, hard drives, or any other form of digital storage, local or remote. Various support circuits can be coupled to the CPU 282 for supporting the chamber 200. The control unit 280 can be coupled to additional controllers located adjacent to individual chamber components, such as the programmable logic controllers 248A, 248B of the valves 242A, 242B. Bi-directional communication between the control unit 280 and various other components of the chamber 200 is handled through a multitude of signal cables, some of which are shown in FIG. 1, collectively referred to as signal bus 288. In addition to control of process and purge gases from the gas sources 238, 239, 240 and the programmable logic controllers 248A, 248B of the valves 242A, 242B, the control unit 280 can be configured to be responsible for the automated control of other activities used in substrate processing, including, among others, substrate transport, temperature control, chamber evacuation, some of which are described elsewhere herein. Figure 2 In addition to control of process and purge gases from the gas sources 238, 239, 240 and the programmable logic controllers 248A, 248B of the valves 242A, 242B, the control unit 280 can be configured to be responsible for the automated control of other activities used in substrate processing, including, among others, substrate transport, temperature control, chamber evacuation, some of which are described elsewhere herein.

[0048] Figure 3 A cross-sectional view of a processing chamber 300 suitable for performing a plasma deposition process (e.g., plasma enhanced CVD or metal organic CVD) that can be used as a semiconductor interconnect structure for semiconductor device fabrication. The processing chamber 300 can be a Centura® processing chamber available from Applied Materials, Inc., of Santa Clara, California, suitably adapted for use in a plasma deposition process. SE or GT or XP processing system. Other processing systems, including those produced by other manufacturers, can benefit from the implementations described herein.

[0049] The processing chamber 300 includes a chamber body 351. The chamber body 351 includes a lid 325, a sidewall 303, and a bottom wall 322 that define an interior volume 326.

[0050] A substrate support pedestal 350 is provided within the interior volume 326 of the chamber body 351. The pedestal 350 can be made of aluminum, ceramic, aluminum nitride, and other suitable materials. In one embodiment, the pedestal 350 is made of a ceramic material such as aluminum nitride, which is a material suitable for use in high temperature environments such as plasma processing environments without causing thermal damage to the pedestal 350. The pedestal 350 is movable in a vertical direction using a lift mechanism (not shown) within the chamber body 351.

[0051] The pedestal 350 can include a buried heater element 370 suitable for controlling the temperature of a substrate 301 supported on the pedestal 350. In one embodiment, the pedestal 350 is resistively heated by applying current from a power source 306 to the heater element 370. In one embodiment, the heater element 370 can be made of a nickel-chromium wire encased in a nichrome sheath tube. The current supplied from the power source 306 is regulated by a controller 310 to control the heat generated by the heater element 370, thus maintaining the substrate 301 and the pedestal 350 at a substantially constant temperature within any suitable temperature range during film deposition. In another embodiment, the pedestal can be maintained at room temperature as desired. In another embodiment, the pedestal 350 can also include a cooler (not shown) as desired to cool the pedestal 350 in a range below room temperature as desired. The current supplied can be adjusted to selectively control the temperature of the pedestal 350 to be between about 20 degrees Celsius to about 700 degrees Celsius.

[0052] A temperature sensor 372, such as a thermocouple, can be buried in the substrate support pedestal 350 to monitor the temperature of the pedestal 350 in a conventional manner. The measured temperature is used by the controller 310 to control the power supplied to the heater element 370 to maintain the substrate at a desired temperature.

[0053] The pedestal 350 generally includes a plurality of lift pins (not shown) disposed therethrough configured to lift the substrate 301 from the pedestal 350 and facilitate exchange of the substrate 301 with a robot (not shown) in a conventional manner.

[0054] The pedestal 350 includes at least one electrode 392 for holding the substrate 301 on the pedestal 350. The electrode 392 is driven by a chucking power source 308 to generate an electrostatic force that holds the substrate 301 to the surface of the pedestal as is conventionally known. Alternatively, the substrate 301 can be held to the pedestal 350 by vacuum or gravity clamping.

[0055] In one embodiment, the pedestal 350 is configured as a pedestal having electrodes 392 buried therein coupled to at least one RF bias power source (at Figure 3 ​The cathodes of the two RF bias power supplies (384, 386) are shown in the diagram. Figure 3 The example depicted shows two RF bias power supplies 384 and 386; it should be noted that the number of RF bias power supplies can be any number as needed. RF bias power supplies 384 and 386 are coupled between electrodes 392 disposed in the base 350 and additional electrodes such as the gas distribution plate 342 or cover 325 of the processing chamber 300. RF bias power supplies 384 and 386 excite and maintain plasma discharges formed by the gas disposed in the processing region of the processing chamber 300.

[0056] exist Figure 3 In the embodiment depicted, dual RF bias power supplies 384, 386 are coupled to electrodes 392 disposed in a base 350 via a matching circuit 304. Signals generated by the RF bias power supplies 384, 386 are delivered to the base 350 via the matching circuit 304 through a single feed to ionize the gas mixture provided in the chamber 300, thereby providing the ion energy required to perform deposition or other plasma enhancement processes. The RF bias power supplies 384, 386 are typically capable of generating RF signals with frequencies from about 50 kHz to about 200 MHz and power between about 0 watts and about 5000 watts.

[0057] It should be noted that, in one example described in this article, plasma is turned on only as needed when a cleaning process is performed in the processing chamber 300.

[0058] Vacuum pump 302 is coupled to a port formed in the bottom 322 of chamber body 351. Vacuum pump 302 is used to maintain the desired gas pressure in chamber body 351. Vacuum pump 302 also expels process post-treatment gases and byproducts from chamber body 351.

[0059] The processing chamber 300 includes one or more gas delivery passages 344 coupled via a cover 325 of the processing chamber 300. The gas delivery passages 344 and the vacuum pump 302 are positioned at opposite ends of the processing chamber 300 to induce laminar flow within the internal volume 326 to minimize particulate contaminants.

[0060] A gas delivery passage 344 is coupled to a gas panel 393 via a remote plasma source (RPS) 348 to provide a gas mixture into the interior volume 326. In one embodiment, the gas mixture supplied via the gas delivery passage 344 can be further delivered via a gas distribution plate 342 disposed below the gas delivery passage 344. In one example, the gas distribution plate 342 having a plurality of holes 343 is coupled to the lid 325 of the chamber body 351 above the susceptor 350. The holes 343 of the gas distribution plate 342 are utilized to introduce process gases from the gas panel 393 into the chamber body 351. The holes 343 can have different sizes, numbers, distributions, shapes, designs, and diameters to facilitate the flow of various process gases for different process needs. A plasma is formed from the process gas mixture exiting the gas distribution plate 342 to enhance thermal decomposition of the process gas, resulting in material deposition on the surface 391 of the substrate 301.

[0061] The gas distribution plate 342 and the substrate support susceptor 350 can form a pair of spaced-apart electrodes in the interior volume 326. One or more RF sources 347 provide a bias potential to the gas distribution plate 342 via a matching network 345 to facilitate the creation of a plasma between the gas distribution plate 342 and the susceptor 350. Alternatively, the RF source 347 and the matching network 345 can be coupled to the gas distribution plate 342, the substrate support susceptor 350, or both the gas distribution plate 342 and the substrate support susceptor 350, or to an antenna (not shown) disposed outside of the chamber body 351. In one embodiment, the RF source 347 can provide a frequency of about 30 kHz to about 13.6 MHz between about 10 watts and about 3000 watts. Alternatively, the RF source 347 can be a microwave generator providing microwave power to the gas distribution plate 342 to facilitate the creation of a plasma in the interior volume 326.

[0062] In one embodiment, a remote plasma source (RPS) 348 can alternatively be coupled to the gas delivery passage 344 to assist in forming a plasma from the gas supplied from the gas panel 393 into the interior volume 326. The remote plasma source 348 provides a plasma to the processing chamber 300 from the gas mixture provided by the gas panel 393.

[0063] The controller 310 includes a central processing unit (CPU) 312, memory 316, and support circuits 314 for controlling the process sequence and regulating the gas flows from the gas panel 393. The CPU 312 can be any form of general purpose computer processor that can be used in an industrial setting. Software routines can be stored in the memory 316, such as random access memory, read only memory, floppy or hard disk drive, or other form of digital storage. The support circuits 314 are conventionally coupled to the CPU 312 and can comprise cache, clock circuits, input / output systems, power supplies, and the like. Bi-directional communications between the controller 310 and the various components of the processing chamber 300 are handled through numerous signal cables, some of which are shown in Figure 3 FIG. 1, collectively referred to as signal bus 318.

[0064] Figure 4 A simplified front cross-sectional view of a single substrate processing chamber 400 for a high pressure anneal process of a single substrate 401. The single substrate processing chamber 400 has a body 410 with an outer surface 412 and an inner surface 413 that encloses an interior volume 425. In some embodiments, such as Figure 4 FIG. 1, the body 410 has a circular cross-section, however in other embodiments the cross-section of the body 410 can be rectangular or any closed shape. The outer surface 412 of the body 410 can be made of corrosion resistant steel (CRS), such as but not limited to stainless steel. One or more heat shields 415 are disposed on the inner surface 413 of the body 410 to prevent heat loss from the single substrate processing chamber 400 to the outside environment. The inner surface 413 of the body 410 and the heat shields 415 can be formed of nickel-based steel alloys that exhibit high corrosion resistance, such as but not limited to Inconel® 600 and Inconel® 625.

[0065] A substrate support 430 is disposed within the interior volume 425. The substrate support 430 has a stem 434 and a substrate support member 432 held by the stem 434. The stem 434 passes through a passage 422 formed through the chamber body 410. A rod 439 connected to an actuator 438 passes through a second passage 423 formed through the chamber body 410. The rod 439 is coupled to a plate 435 having a hole 436 that receives the stem 434 of the substrate support 430. Lift pins 437 are connected to the substrate support member 432. The actuator 438 actuates the rod 439 so that the plate 435 moves up or down to connect and disconnect the lift pins 437. As the lift pins 437 are raised or lowered, the substrate support member 432 is raised or lowered within the interior volume 425 of the chamber 400. The substrate support member 432 has a resistive heating element 431 embedded in the center. A power supply 433 is configured to supply power to the resistive heating element 431. The operation of the power supply 433 and the actuator 438 are controlled by the controller 480.

[0066] The single substrate processing chamber 400 has an opening 411 in the body 410 through which one or more substrates 401 can be loaded to the substrate support 430 disposed in the interior volume 425 and unloaded from the substrate support 430. The opening 411 forms a tunnel 421 in the body 410. A slit valve 418 is configured to sealably close the tunnel 421 so that the opening 411 and the interior volume 425 are accessible only when the slit valve 418 is open. The slit valve 418 is sealed to the body 410 with a high pressure seal 427 to seal the interior volume 425 for processing. The high pressure seal 427 can be formed of a polymer such as, but not limited to, a fluoro-polymer such as, but not limited to, perfluoroelastomers and polytetrafluoroethylene (PTFE). The high pressure seal 427 can further include a spring member for biasing the seal to improve sealing performance. A cooling channel 424 is disposed on the tunnel 421 adjacent to the high pressure seal 427 to maintain the high pressure seal 427 below a maximum safe operating temperature of the high pressure seal 427 during processing. A coolant from a cooling fluid source 426, such as, but not limited to, an inert, dielectric, and high performance heat transfer fluid, can be circulated within the cooling channel 424. The flow of coolant from the fluid source 426 is controlled by the controller 480 through feedback received from a temperature sensor 416 or a flow sensor (not shown). An annular heat choke 419 is formed around the tunnel 421 to prevent the flow of heat from the interior volume 425 through the opening 411 when the slit valve 418 is open.

[0067] The single substrate processing chamber 400 has a port 417 through the body 410 that is fluidly connected to a fluid circuit 490 that connects the gas panel 450, the condenser 460, and the port 417. The fluid circuit 490 has a gas line 492, a source line 457, an inlet isolation valve 455, an exhaust line 463, and an outlet isolation valve 465. Some heaters 496, 458, 452, 454, 464, 466 are engaged with different portions of the fluid circuit 490. Some temperature sensors 451, 453, 459, 467, and 469 are also placed at different portions of the fluid circuit 490 to take temperature measurements and transmit information to the controller 480. The controller 480 uses the temperature measurement information to control the operation of the heaters 452, 454, 458, 496, 464, and 466 so that the temperature of the fluid circuit 490 is maintained above the condensation point of the processing fluid disposed in the fluid circuit 490 and the interior volume 425.

[0068] The gas panel 450 is configured to provide the processing fluid at the pressure of the interior volume 425. The pressure of the processing fluid introduced into the interior volume 425 is monitored by a pressure sensor 414 coupled to the body 410. The condenser 460 is fluidly coupled to a source of cooling fluid (not shown) and is configured to condense the gas phase processing fluid that exits the interior volume 425 through the gas line 492. The condensed processing fluid is then removed by the pump 476. One or more heaters 440 are disposed on the body 410 and are configured to heat the interior volume 425 within the single substrate processing chamber 400. The heaters 440, 452, 454, 458, 496, 464, and 466 maintain the processing fluid in the fluid circuit 490 as a gas phase while the outlet isolation valve 465 to the condenser 460 is open to prevent condensation within the fluid circuit.

[0069] The controller 480 controls the operation of the single substrate processing chamber 400. The controller 480 controls the operation of the gas panel 450, the condenser 460, the pump 470, the inlet isolation valve 455, the outlet isolation valve 465, and the power sources 433 and 445. The controller 480 is also communicatively connected to the temperature sensor 416, the pressure sensor 414, the actuator 438, the source of cooling fluid 426, and the temperature reading devices 456 and 462.

[0070] The processing fluid can include an oxygen and / or nitrogen containing gas, and / or a chalcogen or tellurium (such as S, Se, Te) gas or vapor, such as oxygen, dry steam, water, hydrogen peroxide, hydrogen, deuterium, tritium, ammonia, S vapor, Se vapor, H2S, H2Se, and the like. The processing fluid can react with the metallic material on the substrate to purify the metal or form a metal oxynitride, metal oxide, metal oxychalcogenide, or metal chalcogenide.

[0071] During processing of the substrate 401, the environment of the interior volume 425 is maintained at a temperature and pressure that maintains the processing fluid in the high pressure region in a vapor phase. This pressure and temperature are selected based on the composition of the processing fluid. In the case of a vapor, the temperature and pressure are maintained at conditions that maintain the vapor in a dry steam state. In one example, the interior volume 425 is pressurized to a pressure greater than atmospheric, for example greater than about 5 bar. In another example, the interior volume 425 is pressurized to a pressure between about 10 bar and about 100 bar, such as a pressure between about 20 bar and about 80 bar. In another example, the interior volume 425 is pressurized to a pressure up to about 100 bar. During processing, the interior volume 425 is also maintained at a high temperature, for example a temperature in excess of 425 degrees Celsius (limited by the thermal budget of the substrate 401 disposed on the substrate support member 432), such as a temperature between about 300 degrees Celsius and about 500 degrees Celsius.

[0072] Figure 5 For an illustrative cluster processing system 500, the cluster processing system 500 includes one or more of the processing chambers 100, 200, 300, 400 incorporated therein and integrated. In one embodiment, the cluster processing system 500 can be a CENTURA® cluster processing system available from Applied Materials, Inc. of Santa Clara, California. or integrated processing system. It is contemplated that other processing systems, including those available from other manufacturers, can be adapted to benefit from the present disclosure.

[0073] The cluster processing system 500 includes a vacuum-tight process platform 504, a factory interface 502, and a system controller 544. The platform 504 includes a plurality of processing chambers 100, 200, 300, 400 and at least one load lock chamber 522 coupled to a vacuum substrate transfer chamber 536. Figure 5 Two load lock chambers 522 are shown in the center. The factory interface 502 is coupled to the transfer chamber 536 by the load lock chambers 522.

[0074] In one embodiment, the factory interface 502 includes at least one docking station 508 and at least one factory interface robot 514 to facilitate the transfer of substrates. The docking station 508 is configured to receive one or more front opening unified pods (FOUPs). In Figure 5 Two FOUPs 506A-B are shown in the embodiment. The factory interface robot 514, which is provided with blades 516 on one end of the robot 514, is configured to transfer substrates from the factory interface 502 through the load lock chambers 522 to the processing platform 504 for processing. Optionally, one or more metrology stations 518 can be connected to the terminal end 526 of the factory interface 502 to facilitate the measurement of substrates from the FOUPs 506A-B.

[0075] Each load lock chamber 522 has a first port coupled to the factory interface 502 and a second port coupled to the transfer chamber 536. The load lock chambers 522 are coupled to a pressure control system (not shown) that evacuates and vents the load lock chambers 522 to facilitate the transfer of substrates between the vacuum environment of the transfer chamber 536 and the substantially ambient (e.g., atmospheric) environment of the factory interface 502.

[0076] The transfer chamber 536 has a vacuum robot 530 disposed therein. The vacuum robot 530 has blades 534 that are capable of transferring substrates 524 between the load lock chambers 522, the metrology system 510, and the processing chambers 100, 200, 300, 400.

[0077] In one embodiment of the cluster processing system 500, the cluster processing system 500 can include one or more processing chambers 100, 200, 300, 400, which can be a deposition chamber (e.g., a physical vapor deposition chamber, a chemical vapor deposition, an atomic layer deposition, or other deposition chamber), an anneal chamber (e.g., a high pressure anneal chamber, an RTP chamber, a laser anneal chamber), an etch chamber, a clean chamber, a pre-clean chamber, a cure chamber, a lithography exposure chamber, or other similar type of semiconductor processing chamber. In some embodiments of the cluster processing system 500, the cluster processing system 500 can include one or more processing chambers 100, 200, 300, 400, the transfer chamber 536, the factory interface 502, and / or at least one load lock chamber 522.

[0078] A system controller 544 is coupled to the cluster processing system 500. The system controller 544, which can be included with or included in the computing device 501, controls operation of the cluster processing system 500 using direct control of the processing chambers 100, 200, 300, 400 of the cluster processing system 500. Alternatively, the system controller 544 can control computers (or controllers) associated with the processing chambers 100, 200, 300, 400 and the cluster processing system 500. In operation, the system controller 544 is also capable of data collection and feedback from the respective chambers to optimize performance of the cluster processing system 500.

[0079] The system controller 544, like the computing device 501 described previously, typically includes a central processing unit (CPU) 538, a memory 540, and support circuits 542. The CPU 538 can be one of any form of general purpose computer processors that are used in an industrial setting. The support circuits 542 are conventionally coupled to the CPU 538 and can comprise cache, clock circuits, input / output subsystems, power supplies, and the like. Software programs transform the CPU 538 into a specific purpose computer (controller) 544. The software programs can also be stored and / or executed by a second controller (not shown) that is located remotely from the cluster processing system 500.

[0080] Figure 6 To form an example flow chart for forming an interconnect structure, such as a barrier layer (or liner layer), an interface layer, and a gap fill material formed in an opening formed in a material layer for a semiconductor structure. It is noted that the barrier layer referred to herein can be exchanged with the liner layer as desired. The structure can be any suitable structure formed on a semiconductor substrate, such as a device or channel structure having conductive and non-conductive regions, a fin structure, a gate structure, a contact structure, a front end structure, a back end structure, or any other suitable structure for manufacturing semiconductor devices and the like. Figures 7A-7D A schematic cross-sectional view of a portion of a substrate 702 corresponding to stages of the process 600. The process 600 can be used to form a contact or back end interconnect structure that requires a gap fill layer formed in an opening having a small dimension (e.g., width of a feature) of less than 20 nm.

[0081] The process 600 begins at operation 602 by providing a substrate for processing, such as the substrate 702 shown in FIG. 6A. In one embodiment, the substrate 702 can have an interconnect structure 750 to be formed on the substrate 702. The substrate 702 can have a substantially planar surface, a non-uniform surface, or a substantially planar surface having structures formed thereon. Figure 7A The process 600 begins at operation 602 by providing a substrate for processing, such as the substrate 702 shown in FIG. 6A. In one embodiment, the substrate 702 can have an interconnect structure 750 to be formed on the substrate 702. The substrate 702 can have a substantially planar surface, a non-uniform surface, or a substantially planar surface having structures formed thereon. Figures 7A-7DThe embodiments shown in FIG. 8 can be part of a surface, such as a bottom surface 822 of a substrate 702 exposed by an opening 850 formed in a material layer 802, as shown in Figure 8 The process 600 can facilitate forming multiple layers (e.g., more than one layer) in an opening 850 having a small size, such as less than 20 nm. Thus, the multiple layers provide a high gap fill capability that can be used to fill the opening 850 with minimal defects, such as minimal voids, seams, or gaps.

[0082] Figure 8 The substrate 702 shown in FIG. 8 includes a structure or material layer 802 formed on the substrate 702. An opening 850 is formed in the material layer 802. In one embodiment, the substrate 702 can be a material such as crystalline silicon (e.g., Si <100> or Si <111 >), silicon oxide, strained silicon, silicon germanium, doped or undoped polysilicon, doped or undoped silicon wafers, and patterned or unpatterned silicon on insulator (SOI) wafers, doped carbon silicon oxide, silicon nitride, doped silicon, germanium, gallium arsenide, glass, sapphire, and the like. The substrate 702 can have various dimensions, such as 200 mm, 300 mm, or 450 mm diameter wafers, as well as rectangular or square pads. Unless otherwise noted, the embodiments and examples described herein are performed on substrates having a 300 mm diameter or a 450 mm diameter.

[0083] In one embodiment, the material layer 802 can be a dielectric layer. The material layer 802 has an opening 850 that exposes a portion (e.g., a bottom surface) 822 of the substrate 702. The opening 850 described herein can include a trench, a via, a hole, a pore, and the like. In one embodiment, the material layer 802 can be a dielectric material, such as a silicon-containing material, a carbon-containing material, or other suitable material. Suitable silicon-containing materials include silicon, silicon oxide, silicon nitride, silicon oxynitride, and combinations thereof. Suitable carbon-containing materials include silicon carbide, silicon oxycarbide, amorphous carbon, or the like. In the exemplary embodiment described herein, the material layer 802 is a SiOC layer.

[0084] At operation 604, the substrate 702 is then transported to a processing chamber, such as a pre-clean chamber 100 depicted in FIG. 1, which can be incorporated in a cluster processing system 500 depicted in FIG. 5 to perform a pre-clean process on the substrate 702. It is noted that the pre-clean process at operation 604 is optional based on the substrate surface condition. In some embodiments, the pre-clean process performed at operation 604 can facilitate removing surface contaminants or surface native oxides from the substrate surface. In some embodiments, the pre-clean process can not be necessary. Figure 1 Figure 5 At operation 604, the substrate 702 is then transported to a processing chamber, such as a pre-clean chamber 100 depicted in FIG. 1, which can be incorporated in a cluster processing system 500 depicted in FIG. 5 to perform a pre-clean process on the substrate 702. It is noted that the pre-clean process at operation 604 is optional based on the substrate surface condition. In some embodiments, the pre-clean process performed at operation 604 can facilitate removing surface contaminants or surface native oxides from the substrate surface. In some embodiments, the pre-clean process can not be necessary.

[0085] ​In one example, a pre-clean process can be performed by supplying a pre-clean gas mixture including a hydrogen-containing gas, with or without an inert gas such as Ar or He gas. In one example, a hydrogen-containing gas can be supplied in the pre-clean gas mixture, with an inert gas also optionally supplied during the pre-clean process. Suitable examples of hydrogen-containing gases include H2, H2O, H2O2, NH3, and the like. Suitable examples of inert gases can also be supplied in the pre-clean gas mixture as desired. Examples of inert gases supplied in the gas mixture include Ar, He, Ne, Kr, Xe, and the like. In one specific example, the pre-clean gas mixture includes H2.

[0086] When the pre-clean gas mixture is supplied, the substrate support temperature can be controlled to maintain the substrate at a temperature greater than 250 degrees Celsius, such as greater than 300 degrees Celsius, for example between 300 degrees Celsius and about 600 degrees Celsius, such as 400 degrees Celsius. It is believed that a relatively high substrate temperature control during the pre-clean process can help remove surface contaminants and / or substrate surface native oxides from the substrate surface. The pre-clean gas mixture is supplied through the chamber plasma region 121 into the substrate processing region 141 to form a remote plasma source in the chamber plasma region 121 from the pre-clean gas mixture for removing surface contaminants and native oxides. The gas content introduced into the processing chamber 100 from the pre-clean gas mixture can be varied and adjusted to accommodate, for example, the thickness of the native oxides or the content of surface contaminants to be removed.

[0087] Remote plasma power is provided from a power source to form a plasma in the chamber plasma region 121 from the pre-clean gas mixture supplied at operation 604. The plasma generated remotely in the chamber plasma region 121 during the pre-clean process of operation 604 can dissociate the etchant to form a relatively mild and gentle etchant to slowly, gently, and gradually etch the surface contaminants and native oxides, e.g., an isotropic etching process. The remote plasma process provides good control for interface cleaning and promotes high etching selectivity.

[0088] At operation 606, a first deposition process is performed to form a barrier layer 704 (e.g., a liner layer) on the substrate 702, as shown in FIG. 7B. The deposition process can be an atomic layer deposition (ALD) process performed in the ALD processing chamber 200 depicted in FIG. 2, or a chemical vapor deposition (CVD) process performed in the CVD processing chamber 300 depicted in FIG. 3, or incorporated with a PVD Figure 7A Figure 2 Figure 3 ​​​Other suitable processing chambers in the cluster processing system 500 of the system. In one embodiment, the barrier layer 704 is formed to prevent diffusion of metal from a subsequently formed conductive layer thereon to a nearby surrounding dielectric layer, such as the material layer 802. Thus, the barrier layer 704 is selected to have good barrier properties to block ion diffusion therethrough during subsequent thermal cycles and processes. In another embodiment, the barrier layer 704 is formed to promote nucleation of a metal element subsequently formed on the material layer 802. Thus, the barrier layer 704 can be considered a liner. In one embodiment, the barrier layer (and / or liner layer) 704 is fabricated from a metal-containing layer, such as a Ta-containing layer, a Ti-containing layer, a Co-containing material, a Ru-containing material, a Mn-containing material, and the like. In the embodiments described herein, the barrier layer 704 is TaN, TiN, TaON, TiON, a Ti alloy, or a Ta alloy.

[0089] In one embodiment, the first deposition process can be performed by supplying a deposition gas mixture including a metal-containing precursor into the processing chamber 200. Suitable examples of the metal-containing precursor include a Ta-containing gas or a Ti-containing gas, and the like. Some reaction gas can also be supplied in the deposition gas mixture. Suitable examples of the reaction gas include N2, NH3, O2, N2O, NO2, and the like. Other purge gas, and / or dilution gas, such as Ar, He, N2, N2O, NO2, NH3, can also be supplied with the deposition gas mixture as desired.

[0090] In one embodiment, the barrier layer 704 is a TaN, TiN, TaO, TiO, TaON, or TiON layer.

[0091] At optional operation 607, a plasma treatment process can be performed to treat the barrier layer 704 (or the liner layer). It is believed that by reducing impurities and densifying the barrier layer 704, the plasma treatment process reduces the surface roughness of the deposited barrier layer 704. Exemplary plasma forming gases for the plasma treatment process of operation 607 include hydrogen (H2), nitrogen (N2), ammonia (NH3), and combinations thereof. During the plasma treatment process, several process parameters are also tuned. In one embodiment, the process pressure is controlled to be between about 0.1 Torr and about 100 Torr (e.g., between about 0.1 Torr and about 80 Torr; between about 1 Torr and about 20 Torr, or between about 7 Torr and about 30 Torr). In one embodiment, the process temperature is between about 100 degrees Celsius and about 900 degrees Celsius (e.g., between about 125 degrees Celsius and about 350 degrees Celsius, such as between about 200 degrees Celsius and about 300 degrees Celsius, or such as between about 250 degrees Celsius and about 340 degrees Celsius). The RF power can be controlled to be between about 100 Watts and about 800 Watts, such as about 400 Watts. The plasma forming gas, such as H2gas, can be supplied at between about 3000 seem and about 5000 seem, such as about 4000 seem. The H2gas supplied from the substrate edge / substrate bottom can be controlled to be between about 200 seem and about 1000 seem. Argon gas can be supplied from the substrate edge / substrate bottom at between about 200 seem and about 1000 seem.

[0092] At operation 608, a second deposition process is performed to form an interface layer 706 on the barrier layer 704, as shown in FIG. 6B. The interface layer 706 can also be a metal-containing layer formed by a CVD process, an ALD process, or a PVD process. The interface layer 706 provides good interface adhesion to bridge the gap fill layer 708 (as shown in FIG. 6C) to the barrier layer 704, which can enhance and facilitate the interface adhesion. Figure 7B Figure 7C At operation 608, a second deposition process is performed to form an interface layer 706 on the barrier layer 704, as shown in FIG. 6B. The interface layer 706 can also be a metal-containing layer formed by a CVD process, an ALD process, or a PVD process. The interface layer 706 provides good interface adhesion to bridge the gap fill layer 708 (as shown in FIG. 6C) to the barrier layer 704, which can enhance and facilitate the interface adhesion.

[0093] In one embodiment, the interface layer 706 can be a tungsten-containing material, a nickel-containing material, an aluminum-containing material, a ruthenium-containing material, or a manganese-containing material. In one embodiment, the interface layer 706 is a ruthenium-containing layer.

[0094] In one example, the interface layer 706 has a thickness between about 0.3 nm and about 3 nm and is deposited by a metal organic chemical vapor deposition (MOCVD) process in a CVD processing chamber 300, such as depicted in FIG. 3A. Figure 3

[0095] At operation 610, a gap fill deposition process is performed to form a gap fill layer 708, as shown in FIG. 6C. The gap fill layer 708 can be a metal-containing layer formed by a CVD process, an ALD process, or a PVD process. The gap fill layer 708 can be a tungsten-containing material, a nickel-containing material, an aluminum-containing material, a ruthenium-containing material, or a manganese-containing material. In one embodiment, the gap fill layer 708 is a tungsten-containing layer. Figure 7C Figure 8 ​​​As shown in the examples depicted herein, a gap-filling layer 708 is formed in an opening 850, filling the space defined by the opening 850 with minimal defects, such as minimal seams or voids. In one example, the gap-filling layer 708 is a Co layer or a Co alloy. In one example, the gap-filling layer 708 is formed by cyclic layer deposition (CLD), atomic layer deposition (ALD), chemical vapor deposition (CVD), or the like. In the examples described herein, the gap-filling layer 708 is formed by a CVD process.

[0096] The CVD process performed at operation 610 includes multiple sub-operations (e.g., different processes within a CVD process). For example, the CVD process at operation 610 for forming the interstitial filling layer 708 may include at least one cycle of deposition and plasma treatment. The number of cycles may be repeated as needed until an interstitial filling layer 708 of the desired thickness is obtained. Generally, each cycle of deposition and plasma treatment can form an interstitial filling layer 708 of approximately [missing information - likely a specific thickness]. With the agreement A gap-filling layer 708 of varying thickness (e.g., partial) is formed between the layers. In each cycle, the deposition process can be performed for a duration between approximately 60 seconds and approximately 600 seconds, followed by a plasma processing process for a duration between approximately 10 seconds and approximately 120 seconds.

[0097] In one example, a deposition process can be performed by supplying a deposition precursor gas mixture comprising a cobalt precursor. The deposition precursor gas mixture may be supplied together with a reaction gas mixture, if desired. The reaction gas mixture may be hydrogen (H2) or NH3 gas, if desired. Suitable cobalt precursors may include, but are not limited to, cobalt carbonyl complexes, amidinates compounds, cobalt dicene compounds, diene cobalt complexes, cobalt nitrosyl complexes, their derivatives, their complexes, their plasmas, or combinations thereof. In one embodiment, examples of cobalt precursors that may be used herein include butylacetylene hexacarbonyl dicobalt (CCTBA, (CO)6Co2(HC≡C)). t Bu), methylbutylacetylene hexacarbonyl dicobalt((CO)6Co2(MeC≡C) tphenylacetylene hexacarbonyl dicobalt ((CO)6Co2(HC≡CPh)), methylphenylacetylene hexacarbonyl dicobalt ((CO)6Co2(MeC≡CPh)), methylacetylene hexacarbonyl dicobalt ((CO)6Co2(HC≡CMe)), dimethylacetylene hexacarbonyl dicobalt ((CO)6Co2(MeC≡CMe)), derivatives thereof, complexes thereof, plasmas thereof, or combinations thereof. Other exemplary cobalt carbonyl complexes include dicarbonyl cyclopentadienyl cobalt (CpCo(CO)2), tri carbonyl allyl cobalt ((CO)3Co(CH2CH=CH2)), derivatives thereof, complexes thereof, plasmas thereof, or combinations thereof. One specific example of a cobalt precursor used herein is butylacetylene hexacarbonyl dicobalt (CCTBA, (CO)6Co2(HC≡CBu)). t Bu)).

[0098] After the deposition process, a plasma treatment process is performed in the same chamber. The plasma treatment process can help to densify portions of the gap fill layer 708 formed on the substrate 702 to drive out defects such as voids, air, and impurities from the gap fill layer 708. The plasma treatment process is performed in the same processing chamber in which the gap fill layer deposition is performed, such as Figure 3 the plasma treatment chamber 300 depicted in FIG. 1. Similarly, the plasma treatment process can be performed in other suitable plasma treatment chambers incorporated into the cluster processing system 500 depicted in FIG. 2, which also incorporates the plasma treatment chamber 300. Alternatively, the plasma treatment process can be performed in other standalone processing chambers not incorporated into the cluster processing system 500, while the plasma treatment chamber 300 is incorporated into the cluster processing system 500. In one example, the plasma treatment process is performed globally and uniformly to remove loose bonding structures, voids, or air from the gap fill layer 708 formed across the substrate 702. Figure 5 the plasma treatment chamber 300 depicted in FIG. 1. Similarly, the plasma treatment process can be performed in other suitable plasma treatment chambers incorporated into the cluster processing system 500 depicted in FIG. 2, which also incorporates the plasma treatment chamber 300. Alternatively, the plasma treatment process can be performed in other standalone processing chambers not incorporated into the cluster processing system 500, while the plasma treatment chamber 300 is incorporated into the cluster processing system 500. In one example, the plasma treatment process is performed globally and uniformly to remove loose bonding structures, voids, or air from the gap fill layer 708 formed across the substrate 702.

[0099] In one embodiment, the plasma treatment process is performed in the processing chamber 300 in which the gap fill layer 708 is formed. The plasma treatment process utilizes an RF source or a bias power supplied to the showerhead assembly or the substrate support assembly, or both, to generate a plasma. The RF source power, bias power, or remote plasma source is applied to generate a plasma in the presence of a processing gas mixture.

[0100] In one example, the process gas mixture can include at least a hydrogen-containing gas, such as H2, NH3, and the like. In some examples, an inert gas, such as Ar or He, can also be supplied in the process gas mixture. In one embodiment, the hydrogen-containing gas is H2at a volumetric flow rate between about 1000 seem and about 6000 seem. In one embodiment, the inert gas or carrier gas is Ar or He at a volumetric flow rate between about 3000 seem and about 5000 seem.

[0101] During the plasma processing process, several process parameters can also be adjusted to control the plasma processing process. In one exemplary embodiment, the process pressure in the processing chamber 100 is adjusted to be between about 10 mTorr to about 5000 mTorr, such as between about 300 mTorr and about 3000 mTorr. The substrate temperature can be maintained in a range between about 80 degrees Celsius and about 400 degrees Celsius, such as between about 150 degrees Celsius and about 250 degrees Celsius. The plasma processing process can be performed for between about 5 seconds and about 600 seconds, such as between about 20 seconds and about 120 seconds.

[0102] After the plasma processing process, a cycle of the deposition process and the plasma processing process is completed. The deposition process and the plasma processing process of each cycle can form a portion of the gap fill layer 708 having a thickness between about and about .

[0103] The number of cycles (e.g., alternating processes between the deposition process and the plasma processing process) for forming the gap fill layer 708 can be determined as desired. In the example depicted in Figure 7C , between about 2 and about 15 cycles of the deposition process and the plasma processing process can be performed to obtain a total thickness of the gap fill layer 708 in a range between about 10 nm and about 40 nm.

[0104] At operation 612, a post-anneal process is performed. The post-anneal process is an anneal process performed at a high process pressure, such as greater than 5 bar, such as greater than 5 bar but less than 70 bar. The high pressure anneal process can help repair vacancies and deposition byproducts and / or residues and smooth surface roughness of the gap fill layer 708, forming an annealed gap fill layer 712, as shown in Figure 7D . In some examples, the high process pressure can be as high as 70 bar. The high pressure anneal process can be performed in a processing chamber 400 or other suitable processing chamber, including those processing chambers that process one substrate at a time, such as depicted in Figure 4 .

[0105] The high pressure anneal process performed at operation 612 maintains the processing pressure of the high pressure region in a vapor phase, for example, in a dry vapor phase substantially free of liquid droplets. For example, in a superheated state. The processing pressure and temperature are controlled to densify the film structure, to repair film defects, to drive out impurities, and to smooth surface roughness. In one example, the pressurized interior volume 425 (as shown in FIG. 4B) is pressurized to a pressure greater than atmospheric pressure, for example, greater than about 2 bar. In a further example, the pressurized interior volume 425 is pressurized to a pressure from about 5 bar to about 70 bar, such as from about 5 bar to about 50 bar, such as between about 25 bar and about 55 bar. Figure 4

[0106] During processing, the interior volume 425 is maintained at a relatively low temperature, for example, a temperature greater than 250 degrees Celsius, such as between about 300 degrees Celsius and about 500 degrees Celsius, by the heater 440.

[0107] It is believed that the high pressure process can provide a driving force to drive out impurities and to tie up dangling bonds in the gap fill layer 708, thus reducing the likelihood of defects such as voids, improving film quality, and smoothing surface roughness. In one example, a hydrogen containing gas, hydrogen, and / or a hydrogen isotope containing gas, such as H2, D2, T2, H2O, H2O2, NH3, and dry steam, can be supplied during the anneal process. An inert gas, such as He and Ar, can also be supplied during the anneal process. In one example, hydrogen (H2) is supplied during the anneal process. In a further example, hydrogen (H2) or a hydrogen isotope containing gas is supplied during the anneal process.

[0108] In one example embodiment, the process pressure is adjusted to a pressure greater than 2 bar, such as greater than 5 bar, for example, between 5 bar and 70 bar, such as between about 20 bar and about 50 bar. The process temperature can be controlled to be greater than 250 degrees Celsius, such as between about 250 degrees Celsius and about 700 degrees Celsius, such as between about 300 degrees Celsius and about 500 degrees Celsius.

[0109] After the anneal process at high pressure, the gap fill layer 708 has an enhanced film structure of high purity, large grain structure, few grain boundaries, and smooth surface roughness, which provides a relatively robust film structure that provides a higher film density and achieves a low film resistivity. In examples where the gap fill layer 708 is a Co containing material, the film resistivity for the Co containing material can be reduced between about 10% and about 50% after the high pressure anneal process. The gap fill layer 708 formed in the opening 850 can be substantially void free, with a high gap fill capability. The gap fill layer 708 has an average grain size between about and about .

[0110] ​Accordingly, methods and apparatus for forming gap fill layers, such as metal-containing material, for device structures, such as trench structures, interconnect structures, or contact structures, are provided. The interconnect structures can include a barrier layer, an interface layer, and a gap fill layer in a cluster processing system without breaking vacuum to eliminate the possibility of surface contamination and to provide good interface control. Annealing processes improve the film quality of the interconnect structures so that device structures containing the interconnect structures can achieve desired electrical performance, where the annealing processes are performed in a hydrogen or hydrogen isotope containing environment at a pressure range greater than 5 bar.

[0111] While the foregoing is directed to implementations of the present disclosure, other and further implementations of the disclosure can be devised without departing from the basic scope thereof, and the scope thereof is determined by the claims that follow.

Claims

1. A method for forming a device structure for a semiconductor device, the method comprising the following steps: A barrier layer is formed in an opening in a material layer disposed on a substrate, wherein the width of the opening is less than 20 nm; A first plasma processing technique is performed on the barrier layer; After performing the first plasma processing, an interface layer is formed on the barrier layer, wherein the thickness of the interface layer is between about 0.3 nm and about 3 nm. A gap-filling layer is formed on the interface layer; and An annealing process is performed on the substrate, wherein the annealing process is performed at a pressure range greater than 5 bar.

2. The method of claim 1, wherein the interface layer is a metal-containing layer.

3. The method of claim 2, wherein the interface layer is at least one of a tungsten-containing material, a nickel-containing material, an aluminum-containing material, a ruthenium-containing material, or a manganese-containing material.

4. The method of claim 1, wherein the gap filling layer is a Co layer or a Co alloy.

5. The method of claim 1, wherein the step of forming the gap-filling layer further comprises the following steps: (a) Perform a deposition process to form a portion of the gap-filling layer; and (b) Perform a second plasma processing process on the portion of the gap-filling layer.

6. The method of claim 5, further comprising the following steps: Repeat (a) and (b).

7. The method of claim 5, wherein the second plasma processing further comprises the following steps: A processing gas mixture is supplied, the processing gas mixture comprising hydrogen-containing gas.

8. The method of claim 5, wherein the deposition process is a CVD process.

9. The method of claim 1, wherein performing the annealing process further comprises the following steps: Maintain the substrate temperature at a level greater than 250 degrees Celsius.

10. The method of claim 1, wherein performing the annealing process further comprises the following steps: An annealing gas mixture, comprising hydrogen-containing gas, is supplied during the annealing process.

11. The method of claim 1, wherein the barrier layer is a Ta-containing layer or a Ti-containing layer.

12. The method of claim 1, wherein the barrier layer, the interface layer, and the gap-filling layer are formed in the cluster system without disrupting the vacuum.

13. The method of claim 1, further comprising the following steps: A pre-cleaning process is performed before the barrier layer is formed.

14. The method of claim 13, wherein performing the pre-cleaning process further comprises the following steps: Maintain the substrate temperature at a level greater than 250 degrees Celsius.

15. The method of claim 1, wherein performing the annealing process further comprises the following steps: Increase the particle size of the gap-filling layer.

16. An interconnection structure, comprising: A barrier layer formed in an opening defined in a material layer disposed on a substrate, wherein the barrier layer is densified by plasma treatment, and wherein the width of the opening is less than 20 nm. An interface layer disposed on the barrier layer within the opening, wherein the thickness of the interface layer is between approximately 0.3 nm and approximately 3 nm; and A gap-filling layer disposed on the interface layer, wherein the gap-filling layer has an average particle size greater than 10 nm.

17. The interconnect structure of claim 16, wherein the gap-filling layer is a Co layer or a Co alloy.

18. The interconnect structure of claim 16, wherein the interface layer is a Ru-containing layer and the barrier layer is a Ta-containing layer or a Ti-containing layer.

19. A method for forming an interconnect structure, the method comprising the steps of: A barrier layer is formed in an opening in a material layer disposed on a substrate; A first plasma processing technique is performed on the barrier layer; A gap-filling layer formation process is performed on the barrier layer by repeatedly performing a deposition process and a second plasma processing process until a gap-filling layer of a predetermined thickness is obtained; and An annealing process is performed on the gap-filling layer by simultaneously supplying hydrogen-containing or hydrogen isotope gas at a pressure greater than 5 bar, wherein the annealing process is performed after the gap-filling layer formation process is completed and after the gap-filling layer fills the opening.

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