A BMC PHY device and method with built-in dynamic TTL level transition edge control to improve EMI

Abstract

The application discloses a BMC PHY device with built-in dynamic TTL level jump edge control and improved EMI, and relates to the field of digital IC design.The BMC PHY device with built-in dynamic TTL level jump edge control and improved EMI comprises a current mirror power supply module, which is used for controlling whether 8 currents are powered by a current mirror, and the current size of the 8 currents is different by one time, so that 256 power supply currents are obtained; and then 256 different output voltages with rising slopes are obtained; and the current mirror grounding module is used for controlling whether the 8 currents are grounded by a current mirror, and the current size of the 8 currents is different by one time, so that 256 grounding currents are obtained. Compared with the prior art, the application has the beneficial effect that the application is based on the purpose of optimizing the chip-level EMI output by changing the slope, and the chip-level EMI output is greatly optimized by combining a digital communication channel (CC line) of a BMC PHY chip, a built-in high-precision current mirror network and a frequency jitter algorithm in different working modes.

Description

Technical Field

[0001] This invention relates to the field of digital IC design, specifically to a BMC PHY device and method for improving EMI by incorporating dynamic TTL level transition edge control. Background Technology

[0002] In high-speed PCB design, an important and unavoidable issue is EMI (electromagnetic interference, referring to the interference phenomenon caused by the interaction of electromagnetic waves with electronic components). Existing system-level EMI improvement measures mainly include the following:

[0003] 1. Implement EMI control by adding filtering and attenuation techniques to the I / O ports of the circuit board or system.

[0004] 2. EMI shielding is achieved by enclosing the circuit in a Faraday box.

[0005] 3. Improve EMI by routing high-speed signals through multi-layer wiring and optimizing sharp angles to run them on intermediate layers.

[0006] These measures undoubtedly increase design complexity and cost, requiring improvement. The primary source of EMI energy on a PCB is integrated circuits, and the closer to the EMI source, the lower the cost of EMI control. Therefore, adding EMI improvement measures at the chip level is the most efficient and economical approach. Summary of the Invention

[0007] The purpose of this invention is to provide a BMC PHY device and method with built-in dynamic TTL level transition edge control to improve EMI, so as to solve the problems mentioned in the background art.

[0008] To achieve the above objectives, the present invention provides the following technical solution:

[0009] A BMC PHY device with built-in dynamic TTL level transition edge control to improve EMI includes:

[0010] The current mirror power supply module is used to control whether eight currents are supplied through a current mirror, and the magnitudes of the eight currents differ by a factor of two in each pair, thereby obtaining 256 supply currents; and thus obtaining 256 different output voltages with different ramp rates.

[0011] The current mirror grounding module is used to control whether eight currents are grounded through a current mirror, and the magnitudes of the eight currents differ by a factor of two in each pair, thereby obtaining 256 grounding currents; and thus obtaining 256 different output voltages with different slopes.

[0012] The current mirror power supply module is connected to the power supply terminal of amplifier U1. The inverting terminal of amplifier U1 is connected to the output terminal of amplifier U1 and switch SW1. The other end of switch SW1 is connected to the current mirror grounding module and the non-inverting terminal of amplifier U2. The inverting terminal of amplifier U2 is connected to the output terminal of amplifier U2.

[0013] As a further embodiment of the present invention: the non-inverting input of amplifier U1 is connected to a 1.2V voltage, and the grounding input of amplifier U1 is grounded.

[0014] As a further embodiment of the present invention: the power supply terminal of amplifier U2 is connected to a 2.5V voltage, and the ground terminal of amplifier U2 is grounded.

[0015] A BMC PHY method for improving EMI with built-in dynamic TTL voltage transition edge control includes:

[0016] Step 1: Configure the output slope internally within the chip;

[0017] Step 2: Read the output slope configuration and output voltages with slopes from low to high through the current mirror power supply module;

[0018] Step 3: Read the output slope configuration and output voltages with slopes from high to low through the current mirror grounding module;

[0019] As a further aspect of the present invention: In step 1: a custom SOP packet is transmitted to the chip's internal storage via the BMC PHY, and this value will correspond to the output slope configuration set by the customer.

[0020] As a further aspect of the present invention: In step 2: when it is necessary to drive the output voltage from low voltage to high voltage, the digital part will read the configuration from the OTP area inside the chip, turn off all current mirrors of the current mirror grounding module, set the current mirror network combination of the current mirror power supply module according to the configuration, and finally close switch SW1, and the output voltage will increase from low to high voltage with a set slope.

[0021] As a further aspect of the present invention: In step 3: when it is necessary to drive the output voltage from high voltage to low voltage, the digital part first disconnects switch SW1, then the digital part reads the configuration from the internal OTP area of ​​the chip, and opens the current mirror network combination of the corresponding current mirror grounding module according to the configuration, and the output voltage will be driven from high voltage to low voltage with a set slope.

[0022] As a further aspect of the present invention: the digital part uses an algorithm to dynamically change the slope through digital dithering, and the digital dithering algorithm includes random dithering mode and periodic dithering mode.

[0023] Compared with the prior art, the beneficial effects of the present invention are as follows: The present invention is based on the purpose of optimizing chip-level EMI output by changing the slope, and combined with the digital communication path (CC line) of the BMC PHY chip, it greatly optimizes the chip's EMI performance by using a built-in high-precision current mirror network and frequency dithering algorithms for different operating modes. Attached Figure Description

[0024] Figure 1 This is a schematic diagram of a BMC PHY device with built-in dynamic TTL level transition edge control to improve EMI.

[0025] Figure 2 This is a flowchart of an algorithm for dynamically changing the slope based on a digital dithering algorithm.

[0026] Figure 3 Voltage-time characteristic diagram of the current mirror power supply module. Detailed Implementation

[0027] The technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative effort are within the scope of protection of the present invention.

[0028] Please see Figure 1 A BMC PHY device with built-in dynamic TTL level transition edge control to improve EMI, comprising:

[0029] The current mirror power supply module is used to control whether eight currents are supplied through a current mirror, and the magnitudes of the eight currents differ by a factor of two in each pair, thereby obtaining 256 supply currents; and thus obtaining 256 different output voltages with different ramp rates.

[0030] The current mirror grounding module is used to control whether eight currents are grounded through a current mirror, and the magnitudes of the eight currents differ by a factor of two in each pair, thereby obtaining 256 grounding currents; and thus obtaining 256 different output voltages with different slopes.

[0031] The current mirror power supply module is connected to the power supply terminal of amplifier U1. The inverting terminal of amplifier U1 is connected to the output terminal of amplifier U1 and switch SW1. The other end of switch SW1 is connected to the current mirror grounding module and the non-inverting terminal of amplifier U2. The inverting terminal of amplifier U2 is connected to the output terminal of amplifier U2.

[0032] In a specific embodiment: The purpose of this invention is to greatly improve the EMI performance of the entire system by adding a circuit that supports dynamic configuration of the rising and falling edge slopes at the source (inside the digital chip).

[0033] In the TTL level signals generated by digital logic chips, the periodic square wave signal generated by the transition from high level to low level or from low level to high level is not the only frequency that causes EMI. This signal contains sinusoidal harmonic components with a very wide frequency range, and these harmonic components are the EMI frequency components that need to be addressed.

[0034] The highest EMI frequency, also known as the EMI emission bandwidth, is a function of the signal rise time. The formula for calculating the EMI emission bandwidth is:

[0035] F = 0.35 / Tr

[0036] Here, F is in GHz and Tr is in ns. This shows that the highest EMI frequency is inversely proportional to the rise time. In other words, increasing the Tr time reduces the EMI emission bandwidth. The Tr time depends on the combination switching settings of the current mirror.

[0037] In this embodiment: Please refer to Figure 1 and Figure 3 The non-inverting input of amplifier U1 is connected to a 1.2V voltage, and the grounding input of amplifier U1 is grounded.

[0038] In this embodiment: Please refer to Figure 1 and Figure 3 The power supply terminal of amplifier U2 is connected to a 2.5V voltage, and the ground terminal of amplifier U2 is grounded.

[0039] The current mirror power supply module supplies eight current mirrors in a pairwise multiple relationship. Therefore, the eight current mirrors can be 1, 2, 4, 6, 8, 16, 32, 64, and 128. Thus, any combination of these can produce current units of any integer value from 0 to 255. There are a total of 256 possible power supply current inputs. 0 means all eight current mirrors are open, and 255 means all eight current mirrors are closed. There are 256 selectable slopes to reach the set voltage (a slope of 0 will not reach the set voltage). Figure 3 The image shows two types of rising slopes.

[0040] Similar to the current mirror power supply module, the current mirror grounding module can also obtain 256 types of power supply current grounding. It can also obtain 256 types of output voltage with decreasing slopes.

[0041] The current mirror power supply module and the current mirror grounding module are interlocked and will not be turned on at the same time.

[0042] A BMC PHY method for improving EMI with built-in dynamic TTL voltage transition edge control includes:

[0043] Step 1: Configure the output slope internally within the chip;

[0044] Step 2: Read the output slope configuration and output voltages with slopes from low to high through the current mirror power supply module;

[0045] Step 3: Read the output slope configuration and output voltages with slopes from high to low through the current mirror grounding module;

[0046] In this embodiment: Please refer to Figure 1 In step 1: a custom SOP packet is transmitted to the chip's internal storage via the BMC PHY. This value will correspond to the output slope configuration set by the customer.

[0047] BMC PHY refers to the Biphasic Marking and Coding Hardware Unit, which is an important component of the PD protocol implementation. It can communicate with the host via SOP packets through a Type-C interface cc1 or cc2 cable.

[0048] In this embodiment: Please refer to Figure 1 In step 2: When it is necessary to drive the output voltage from low voltage to high voltage, the digital part will read the configuration from the OTP area inside the chip, turn off all current mirrors of the current mirror grounding module, set the conduction combination of the current mirror module according to the configuration, and finally close switch SW1. The output voltage will increase from low to high voltage with the set slope.

[0049] The digital section reads the configured current mirror combination switch settings from the OTP area, and then switches the corresponding bits of the MOSFET network to achieve different current capabilities, thereby determining the slope. At this point, by selecting the current input of the current mirror power supply module, the rising slope of the output voltage is determined, thus determining the rising slope of the power supply voltage at the power supply terminal of amplifier U1, which in turn determines the rising slope of the voltage at the non-inverting input of amplifier U2, and further determines the rising slope of the output voltage VOUT.

[0050] In this embodiment: Please refer to Figure 1 In step 3: When it is necessary to drive the output voltage from high voltage to low voltage, the digital part first disconnects switch SW1, then the digital part reads the configuration from the internal OTP area of ​​the chip, and opens the current mirror network combination of the corresponding current mirror grounding module according to the configuration. The output voltage will be driven from high voltage to low voltage with a set slope.

[0051] When the output voltage VOUT reaches its maximum, switch SW1 is disconnected. Since the voltage at the non-inverting input of the amplifier is equal to the voltage at the inverting input, and the inverting input of amplifier U2 is connected to the output, the voltage at the non-inverting input of amplifier U2 is the output voltage VOUT. The current mirror grounding module is activated. By controlling different current mirror grounding, the voltage at the non-inverting input of amplifier U2 is reduced, which in turn affects the magnitude of the output voltage VOUT, causing the output voltage VOUT to decrease from high to low.

[0052] In this embodiment: Please refer to Figure 2 The digital part uses an algorithm to dynamically change the slope through digital dithering. The digital dithering algorithm includes random dithering mode and periodic dithering mode.

[0053] The dynamic slope variation output disperses harmonic interference energy across various frequency points, thereby reducing peak energy. The digital section incorporates two frequency dithering modes: random dithering and periodic dithering. After selecting the desired operating mode from the configuration area, the dithering logic is implemented with the target slope as the center point, dispersing harmonic interference energy across various frequency points. This eliminates energy spikes in the frequency domain, improving EMI and achieving the goal of dynamic output slope for optimal EMI performance.

[0054] It will be apparent to those skilled in the art that the present invention is not limited to the details of the exemplary embodiments described above, and that the invention can be implemented in other specific forms without departing from its spirit or essential characteristics. Therefore, the embodiments should be considered in all respects as exemplary and non-limiting, and the scope of the invention is defined by the appended claims rather than the foregoing description. Thus, all variations falling within the meaning and scope of equivalents of the claims are intended to be included within the present invention. No reference numerals in the claims should be construed as limiting the scope of the claims.

[0055] Furthermore, it should be understood that although this specification describes embodiments, not every embodiment contains only one independent technical solution. This narrative style is merely for clarity. Those skilled in the art should consider the specification as a whole, and the technical solutions in each embodiment can also be appropriately combined to form other embodiments that can be understood by those skilled in the art.

Claims

1. A BMC PHY device with built-in dynamic TTL level transition edge control to improve EMI, characterized in that: This BMC PHY device, which features built-in dynamic TTL level-timing control to improve EMI, includes: The current mirror power supply module is used to control whether eight currents are supplied through a current mirror, and the magnitudes of the eight currents differ by a factor of two in each pair, thereby obtaining 256 supply currents; and thus obtaining 256 different output voltages with different ramp rates. The current mirror grounding module is used to control whether eight currents are grounded through a current mirror, and the magnitudes of the eight currents differ by a factor of two in each pair, thereby obtaining 256 grounding currents; and thus obtaining 256 different output voltages with different slopes. The current mirror power supply module is connected to the power supply terminal of amplifier U1. The inverting terminal of amplifier U1 is connected to the output terminal of amplifier U1 and switch SW1. The other end of switch SW1 is connected to the current mirror grounding module and the non-inverting terminal of amplifier U2. The inverting terminal of amplifier U2 is connected to the output terminal of amplifier U2. The non-inverting input of amplifier U1 is connected to a 1.2V voltage, and the grounding terminal of amplifier U1 is grounded. Amplifier U2's power supply terminal is connected to a 2.5V voltage, and amplifier U2's ground terminal is grounded; The method of this apparatus includes: Step 1: Configure the output slope internally within the chip; Step 2: Read the output slope configuration and output voltage from low to high using the current mirror power supply module at the output slope; Step 3: Read the output slope configuration and output a voltage from high to low through the current mirror grounding module with the output slope; the digital part dynamically changes the slope algorithm through digital dithering, which includes random dithering mode and periodic dithering mode; after reading the selected working mode from the configuration area, the dithering logic will be implemented with the target slope as the center point to disperse the harmonic interference energy to various frequency points.

2. The BMC PHY device for improving EMI with built-in dynamic TTL level transition edge control according to claim 1, characterized in that, In step 1: The custom SOP packet is transmitted to the chip's internal storage via the BMC PHY. The SOP packet corresponds to the output slope configuration set by the customer.

3. The BMC PHY device for improving EMI with built-in dynamic TTL level transition edge control according to claim 1, characterized in that, In step 2: When it is necessary to drive the output voltage from low voltage to high voltage, the digital part will read the configuration from the OTP area inside the chip, turn off all current mirrors of the current mirror grounding module, set the current mirror network combination of the current mirror power supply module according to the configuration, and finally close switch SW1. The output voltage will increase from low to high at the set slope.

4. A BMC PHY device for improving EMI with built-in dynamic TTL level transition edge control according to claim 1, characterized in that, In step 3: When it is necessary to drive the output voltage from high voltage to low voltage, the digital part first disconnects switch SW1, then the digital part reads the configuration from the internal OTP area of ​​the chip, and opens the current mirror network combination of the corresponding current mirror grounding module according to the configuration. The output voltage will decrease from high to low with a set slope.

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