A topology signal generating device detection apparatus

Abstract

The application discloses a kind of topological signal generating device detection devices, including host computer unit, central processor unit, temperature acquisition unit, topological signal acquisition unit, programmable digital power supply, EUT table position, the host computer unit is respectively with the central processor unit, programmable digital power supply, EUT table position communication connection, the central processor unit is respectively with topological signal acquisition unit, temperature acquisition unit electrical connection, programmable digital power supply is with EUT table position electrical connection.This device is simple, intelligent, easy to operate, high reliability, suitable for various topological signal generating device is carried out black box mode evaluation, judges the pros and cons of various topological signal generating device.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of power distribution network, and particularly relates to a kind of topological signal generating device detection device. BACKGROUND

[0002] At present, the low-voltage area topology identification technology based on power frequency injection characteristic current mode has been mature, and its technical implementation principle is that the topological signal generating device injects (modulates) a topological signal with a characteristic frequency and a characteristic code information into the power cable at the power frequency low voltage, and the topological signal identification device identifies (analyzes) the topological signal from the power cable through the current transformer, thereby realizing the identification of the topological relationship.

[0003] With the improvement of the topological signal generating device, the corresponding technical standards and specifications have also been gradually formed, which have unified requirements for the frequency, amplitude, duty cycle and temperature rise of the topological signal in the standards and specifications. However, there is currently a lack of devices for detecting the performance of the topological signal generating device. SUMMARY

[0004] The technical problem to be solved by the present application is to provide a device capable of detecting and evaluating the topological signal frequency, topological signal amplitude, topological signal duty cycle, device temperature rise and high-low voltage influence of the topological signal generating device.

[0005] To solve the above technical problems, the present application provides a topological signal generating device detection device, which comprises an upper computer unit, a central control processor unit, a temperature acquisition unit, a topological signal acquisition unit, a programmable digital power supply and an EUT table position. The upper computer unit is in communication connection with the central control processor unit, the programmable digital power supply and the EUT table position. The central control processor unit is in electrical connection with the topological signal acquisition unit and the temperature acquisition unit. The programmable digital power supply is in electrical connection with the EUT table position.

[0006] The upper computer unit is used for human-computer interaction, setting the power voltage, topological signal frequency and topological signal duty cycle, viewing the detection results and generating the detection report.

[0007] The central control processor unit is used for acquiring and processing the output signals of the topological signal acquisition unit and the temperature acquisition unit, and uploading the processing results to the upper computer unit.

[0008] The programmable digital power supply is used for outputting the power supply to the EUT table position according to the power voltage set by the upper computer unit.

[0009] The topological signal acquisition unit is used for acquiring the topological current signal in the power line and outputting the processed signal to the central control processor unit.

[0010] The temperature acquisition unit is used for acquiring the temperature of the measured topology signal sending device and the environmental temperature, and outputs to the central control processor unit.

[0011] The EUT epitope is used for placing the measured topology signal sending device, providing power supply for the measured topology signal sending device, communicating with the host computer unit, and configuring the topology signal of the measured topology signal sending device according to the host computer unit.

[0012] Further, the topology signal acquisition unit comprises a first operational amplifier, a second operational amplifier, a third operational amplifier, a fourth operational amplifier, a Hall sensor, a sampling resistor, a first feedback resistor, a second feedback resistor, a third feedback resistor and a fourth feedback resistor.

[0013] The Hall sensor signal output end is connected to the same direction input end of the first operational amplifier and the same direction input end of the third operational amplifier, and grounded through the sampling resistor; the reverse input end of the first operational amplifier is connected to the output end of the first operational amplifier; the output end of the first operational amplifier is connected to the reverse input end of the second operational amplifier through the first feedback resistor; the reverse input end of the second operational amplifier is connected to the output end of the second operational amplifier through the second feedback resistor; the same direction input end of the second operational amplifier is grounded; the reverse input end of the third operational amplifier is connected to the output end of the third operational amplifier; the output end of the third operational amplifier is connected to the same direction input end of the fourth operational amplifier; the reverse input end of the fourth operational amplifier is grounded through the third feedback resistor; and the reverse input end of the fourth operational amplifier is connected to the output end of the fourth operational amplifier through the fourth feedback resistor.

[0014] Further, the Hall sensor is a current output type, with a measurement range of 0A-1A, an accuracy of 0.8%, a response time of <1μs, and a variable ratio of 40.

[0015] Further, the first operational amplifier, the second operational amplifier, the third operational amplifier and the fourth operational amplifier are low-noise and high-precision operational amplifiers.

[0016] Further, the programmable digital power supply is a programmable digital direct current power supply, which is connected to the host computer unit through an RS232 communication line, and outputs a direct current power supply with an effective value equivalent to that of an alternating current power supply as a working power supply of the test topology signal generating device according to the received host computer unit instruction.

[0017] Further, the central control processor unit is an MCU system board, which comprises a UART interface, a GPIO interface, an ADC input interface and an interrupt input interface.

[0018] Further, the temperature acquisition unit comprises a temperature acquisition chip and a pull-up resistor, and the output of the temperature acquisition chip is connected to a pull-up power supply through the pull-up resistor.

[0019] Further, the upper computer unit is a PC or a mobile terminal.

[0020] Further, the MCU system board comprises an ARM Corex-M4 microcontroller.

[0021] Further, the temperature acquisition chip is a GX18B20.

[0022] The present application has the following advantages:

[0023] The technical scheme of the topological signal generating device detection device disclosed by the present application has the advantages of simple composition, intelligence, easy operation, high reliability, etc., is suitable for black box mode evaluation of various topological signal generating devices, and judges the advantages and disadvantages of various topological signal generating devices. In the technical scheme, a direct current equivalent to the effective value of an alternating power supply is used as the working power supply for testing the topological signal generating device, the topological signal is converted into a pulse direct current, and after passing through a sampling resistor and an operational amplifier, can be directly input to the interrupt input pin and ADC sampling of the processor. The technical scheme of the topological signal generating device detection device disclosed by the present application has the advantages of simple composition, intelligence, easy operation, high reliability, etc., is suitable for black box mode evaluation of various topological signal generating devices, and judges the advantages and disadvantages of various topological signal generating devices. In the technical scheme, a direct current equivalent to the effective value of an alternating power supply is used as the working power supply for testing the topological signal generating device, the topological signal is converted into a pulse direct current, and after passing through a sampling resistor and an operational amplifier, can be directly input to the interrupt input pin and ADC sampling of the processor. The technical scheme of the topological signal generating device detection device disclosed by the present application has the advantages of simple composition, intelligence, easy operation, high reliability, etc., is suitable for black box mode evaluation of various topological signal generating devices, and judges the advantages and disadvantages of various topological signal generating devices. In the technical scheme, a direct current equivalent to the effective value of an alternating power supply is used as the working power supply for testing the topological signal generating device, the topological signal is converted into a pulse direct current, and after passing through a sampling resistor and an operational amplifier, can be directly input to the interrupt input pin and ADC sampling of the processor. BRIEF DESCRIPTION OF DRAWINGS

[0024] Figure 1 is a structural diagram of the embodiment of the present application.

[0025] Figure 2 is an operation interface schematic diagram of the upper computer unit of the embodiment of the present application.

[0026] Figure 3 is Figure 1 MCU circuit diagram of the processor unit MCU in the MCU system board of the central control processor unit 102.

[0027] Figure 4 is Figure 1 TTL to RS232 circuit diagram in the MCU system board of the central control processor unit 102.

[0028] Figure 5 is Figure 1 circuit diagram of the topological signal acquisition unit 104. DETAILED DESCRIPTION

[0029] With reference to the drawings of the embodiments of the present application, the technical solutions in the embodiments of the present application will be described clearly and completely. Obviously, the described embodiments are some of the embodiments of the present application, but not all of the embodiments of the present application. Based on the embodiments of the present application, all other embodiments obtained by those of ordinary skill in the art without creative efforts are within the scope of the present application.

[0030] It should be understood that the terms "comprise" and "include" as used in the specification and the appended claims indicate the presence of the described features, integers, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof.

[0031] It should be further understood that the term "and / or" as used in the specification and the appended claims indicates any combination of one or more of the associated listed items and all possible combinations of the items.

[0032] As shown in Figure 1 A topological signal generation device detection apparatus includes a host computer unit 101, a central control processor unit 102, a temperature acquisition unit 105, a topological signal acquisition unit 104, a programmable digital power supply 103, and an EUT table position 106. The host computer unit 101 is communicatively connected to the central control processor unit 102, the programmable digital power supply 103, and the EUT table position 106. The communication connection can be an RS232 serial port connection, or a wired or wireless network connection. The central control processor unit 102 is electrically connected to the topological signal acquisition unit 104 and the temperature acquisition unit 105. The programmable digital power supply 103 is electrically connected to the EUT table position 106.

[0033] The host computer unit 101 is a PC or a mobile terminal. The host computer unit is used for human-computer interaction. An operator can set the power supply voltage, the topological signal frequency, and the topological signal duty cycle through the host computer unit, view the detection results, generate a detection report, and the like. The operation interface of the host computer unit is as shown in Figure 2 .

[0034] The central control processor unit 102 is an MCU system board. The function of the central control processor unit is to acquire and process the data of the topological signal acquisition unit and the temperature acquisition unit, and upload the results to the host computer.

[0035] The circuit diagram of the central control processor unit MCU is as shown in Figure 3As shown, the microcontroller D1 selects an ARM Corex-M4 microcontroller HC32F460, which has a main frequency of 168 MHz, 512 KB Flash, 192 KB SRAM, 4 UART interfaces, and a maximum of 83 GPIOs. Capacitors C1, C6 and crystal Y1 are the microcontroller crystal circuit, which provides an external clock source for the microcontroller; resistor R1 and capacitor C7 are the microcontroller power-on reset circuit, which is used to initialize the microcontroller when powered on; capacitors C2, C3, C4, C5, C8, C9, C10, C11 and C12 are filter capacitors, which are used to filter high-frequency noise of each power supply interface of the microcontroller to ensure stable power supply. The pin 1 and pin 2 of the microcontroller D1 are configured as a serial port for local maintenance of the microcontroller, printing system running logs and upgrading. The pin 39 and pin 43 of the microcontroller D1 are serial ports for interaction with the host computer. Since the microcontroller D1 serial port is TTL level, and the host computer interface is RS232 level, the two levels are not compatible, so a level conversion circuit is needed to realize the information interaction between the two. The level conversion circuit is shown in Figure 4 , wherein the dedicated level conversion chip D2 is model UM3221, capacitors C13, C14, C15 and C16 are external energy storage capacitors of the internal voltage doubling circuit of the level conversion chip, capacitors C17 and C18 are power supply filter capacitors of the level conversion chip, which filter high-frequency noise on the power supply to ensure clean and stable power supply, resistors R2, R3, R5 and R6 are current limiting resistors for protecting the pins of the level conversion chip and preventing them from being impacted by excessive current, and resistor R4 is a pull-down resistor that provides a stable low level when the level conversion chip is not in operation, which can prevent communication disturbance. The pin 10 of the microcontroller D1 is an ADC input interface connected to the output TP_ADC of the topology signal acquisition unit for acquiring processed topology signal data, and the microcontroller D1 can calculate the amplitude of the topology signal through this pin. Figure 5 The pin 25 of the microcontroller D1 is an interrupt input pin connected to the output TP_PULSE of the topology signal acquisition unit for calculating the frequency and duty cycle of the topology signal. Figure 5 The pin 34 of the microcontroller D1 is a GPIO pin connected to the output of the temperature acquisition unit 105 for measuring the ambient temperature and the temperature rise of the topology signal transmitting device. Figure 1

[0036] ​The programmable digital power supply 103 is used to output DC power to the EUT table position 106 according to the settings of the host computer unit 101. The normal topology signal is an AC signal, but in order to simplify the test equipment and improve the test accuracy, a DC power with the same effective value as the AC power is used as the working power of the test topology signal generating equipment. The programmable digital power supply 103 is connected to the host computer unit 101 through the RS232 communication line, and the host computer unit 101 can control the output of the programmable digital power supply 103 by issuing instructions. The positive output terminal of the programmable digital power supply 103 is connected to the positive input terminal of the EUT table position 106, and the negative output terminal of the programmable digital power supply 103 is connected to the negative input terminal of the EUT table position 106, thereby providing DC power to the EUT table position 106.

[0037] The topology signal acquisition unit 104 is used to acquire the topology current signal in the power line and process the signal and then send it to the central processor unit 102. As shown in Figure 5 , the topology signal acquisition unit 104 includes a Hall sensor, four low-noise high-precision operational amplifiers D3A, D3B, D3C, D3D, a sampling resistor R7, feedback resistors R8, R9, R10, R11, capacitors C19, C20, C21. The four operational amplifiers D3A, D3B, D3C, D3D are integrated in the SGM8270 operational amplifier D3. The Hall sensor is a threading type, and the positive power line of the programmable digital power supply 103 passes through the Hall sensor, and the Hall sensor acquires the current on the positive power line. The Hall sensor is of HCS-1E type, current output type, measurement range is 0-1A, accuracy is 0.8%, response time is <1μs, and variable ratio is 40. The output of the Hall sensor is sent to the same input terminal TP INPUT of the operational amplifiers D3A and D3C. The reverse input terminal of the operational amplifier D3A is connected to its output terminal, the output terminal of the operational amplifier D3A is connected to the reverse input terminal of the operational amplifier D3B through the feedback resistor R8, the reverse input terminal of the operational amplifier D3A is connected to the output terminal TP PULSE of the operational amplifier D3B through the feedback resistor R9, the same input terminal of the operational amplifier D3B is connected to the ground, the reverse input terminal of the operational amplifier D3C is connected to the output terminal of the operational amplifier D3B, the output terminal of the operational amplifier D3B is connected to the same input terminal of the operational amplifier D3D, the reverse input terminal of the operational amplifier D3D is connected to the ground through the feedback resistor R10, and the reverse input terminal of the operational amplifier D3D is connected to the output terminal TP ADC of the operational amplifier D3D through the feedback resistor R11. Figure 3 The output terminal TP PULSE is connected to the pin 25 of the microcontroller D1, and the output terminal TP ADC is connected to the pin 10 of the microcontroller D1. Figure 3 The output terminal TP PULSE is connected to the pin 25 of the microcontroller D1, and the output terminal TP ADC is connected to the pin 10 of the microcontroller D1.

[0038] The current signal output by the Hall sensor is converted into a voltage signal through a sampling resistor R7. The circuit in which the operational amplifiers D3A and D3C are located is a following circuit, which is used for impedance matching. The circuit in which the operational amplifier D3B is located is a reverse amplification circuit, which reversely amplifies the voltage signal converted by the sampling circuit by R9 / R8 times. The amplified signal is output to the pin 25 of the microcontroller D1, which is an interrupt input pin, and is used to calculate the frequency and duty cycle of the topology signal. The circuit in which the operational amplifier D3D is located is a same-phase amplification circuit, which amplifies the signal by (1+R11 / R10) times. The capacitor C19 is an operational amplifier D3 power supply filtering capacitor, which filters the noise on the power supply to ensure that the power supply is clean and stable. The capacitors C20 and C21 are filtering capacitors, which filter the high-frequency noise on the output terminal TP_ADC signal to avoid high-frequency noise input to the microcontroller D1 and improve the ADC sampling accuracy.

[0039] When the topology signal sending device being measured sends a topology signal, the Hall sensor can collect the topology signal in real time and output it to the topology signal collection unit 104. The signal is converted into a voltage signal through a sampling resistor R7. The signal is input to the pin 25 of the microcontroller D1 through the operational amplifiers D3A and D3B. The pin is an interrupt input pin PB12 and is configured to be double-edge triggered. When the signal rises, the interrupt is triggered, the internal timer is opened, and the current time t1 is recorded. When the signal falls, the time t2 is recorded. When the signal rises again, the time t3 is recorded. The microcontroller D1 runs the corresponding program to calculate the topology signal period Ts according to the formula Ts=t3-t1, the topology signal duty cycle D according to the formula D=(t2-t1) / Ts, and the topology signal frequency fs according to the formula fs=1 / Ts.

[0040] When the topology signal sending device being measured sends a topology signal, the Hall sensor can collect the topology signal in real time and output it to the topology signal collection unit 104. The signal is converted into a voltage signal through a sampling resistor R7. The signal is input to the pin 25 of the microcontroller D1 through the operational amplifiers D3A and D3B. The pin is an interrupt input pin PB12 and is configured to be double-edge triggered. When the signal rises, the interrupt is triggered, the internal timer is opened, and the current time t1 is recorded. When the signal falls, the time t2 is recorded. When the signal rises again, the time t3 is recorded. The microcontroller D1 runs the corresponding program to calculate the topology signal period Ts according to the formula Ts=t3-t1, the topology signal duty cycle D according to the formula D=(t2-t1) / Ts, and the topology signal frequency fs according to the formula fs=1 / Ts. Figure 5 When the topology signal sending device being measured sends a topology signal, the Hall sensor can collect the topology signal in real time and output it to the topology signal collection unit 104. The signal is converted into a voltage signal through a sampling resistor R7. The signal is input to the pin 25 of the microcontroller D1 through the operational amplifiers D3A and D3B. The pin is an interrupt input pin PB12 and is configured to be double-edge triggered. When the signal rises, the interrupt is triggered, the internal timer is opened, and the current time t1 is recorded. When the signal falls, the time t2 is recorded. When the signal rises again, the time t3 is recorded. The microcontroller D1 runs the corresponding program to calculate the topology signal period Ts according to the formula Ts=t3-t1, the topology signal duty cycle D according to the formula D=(t2-t1) / Ts, and the topology signal frequency fs according to the formula fs=1 / Ts. The topology signal amplitude is calculated according to the formula ADC , where Ts is the topology signal period, f n is the ADC sampling frequency, DAT ref represents the nth ADC sampling point value, D represents the topology signal duty cycle, V is the processor ADC reference voltage, and R is the sampling resistance (i.e. Figure 5 the resistance value of the sampling resistor R7 in the formula).

[0041] The temperature acquisition unit 105 is used to collect the temperature of the measured topology signal transmission setting and the environment temperature, and transmit the data to the central processor unit 102. The temperature acquisition unit 105 comprises a temperature acquisition chip and a pull-up resistor. The output of the temperature acquisition chip is connected to the pull-up power supply through the pull-up resistor. The temperature acquisition chip is of GX18B20 type, with a full range error of ±0.4℃, a wide measurement range of -55℃ to +125℃, and a low power consumption of less than 3mW. The output of the temperature acquisition unit is connected to the pin 34 of the microcontroller D1 of the central processor unit.

[0042] The EUT epitope 106 is used to place the measured topology signal transmission device, and provides power supply for the device, and can communicate with the host computer unit A01, and configure the measured topology signal transmission device to transmit the characteristic frequency topology signal.

[0043] The steps of using the above topology signal generation device detection device to evaluate the measured topology signal generation device are as follows:

[0044] Step S01: select the power supply voltage in the operation interface of the host computer unit 101 as shown in Figure 2 , select 154V for low voltage test, 220V for normal test, and 286V for high voltage test;

[0045] Step S02: set the topology signal frequency in the operation interface of the host computer unit 101 as shown in Figure 2 , input the topology signal frequency and the duty cycle value;

[0046] Step S03: click the setting button in the operation interface of the host computer unit 101 as shown in Figure 2 , and the log window prints "setting success". The host computer unit 101 configures the programmable digital power supply 103 to output the corresponding power supply voltage through the first RS232, and communicates with the EUT epitope 06 through the second RS232, and issues the topology signal frequency and the duty cycle information;

[0047] Step S04: click the start button in the operation interface of the host computer unit 101 as shown in Figure 2 , and the log window prints "start success". The host computer unit 101 communicates with the central processor unit 102 through the third RS232, and issues the instruction to read the environment temperature. After receiving the instruction, the central processor unit 102 communicates with the temperature acquisition unit 105, reads the temperature information, and uploads the temperature information to the host computer unit 101. The environment temperature window in the operation interface of the host computer unit 101 displays the temperature value, and the log window prints "environment temperature reading success, start sending topology signal";

[0048] Step S05: EUT epitope 106 controls the measured topological signal generating device to send a topological signal with a set frequency and duty cycle, and informs the host computer unit 101 that the topological signal has been sent through the second RS232, and after waiting for 10s, the host computer unit 101 logs the window to print "topological signal sending success";

[0049] Step S06: The host computer unit 101 communicates with the central control processor unit 102 through the third RS232, reads the topological signal frequency, duty cycle, information amplitude and the highest temperature rise in the process of sending topological information by the topological signal generating device measured by the central control processor unit 102, and displays in the corresponding window; after the operation is completed, the log window prints "test completed";

[0050] Step S07: In the operation interface of the host computer unit 101 as shown in Figure 2 , click production report, and the detection device generates a test report.

[0051] The embodiments of the present application can be adjusted, combined and deleted in sequence according to actual needs.

[0052] The embodiments have introduced the present scheme in detail, and the principles and implementation modes of the present application are described by applying specific examples; the above embodiments are only used to help understand the method and core idea of the present application; meanwhile, for those skilled in the art, according to the idea of the present application, the specific implementation mode and application range will be changed, and the above description should not be understood as the limitation of the present application.

Claims

1. A detection device for a topology signal generator, characterized in that, It includes a host computer unit, a central control processor unit, a temperature acquisition unit, a topology signal acquisition unit, a programmable digital power supply, and an EUT (Electronic Underground Test) mount. The host computer unit is communicatively connected to the central control processor unit, the programmable digital power supply, and the EUT mount. The central control processor unit is electrically connected to the topology signal acquisition unit and the temperature acquisition unit. The programmable digital power supply is electrically connected to the EUT mount. The host computer unit is used for human-computer interaction, setting power supply voltage, topology signal frequency, topology signal duty cycle, viewing detection results, and generating detection reports; The central control processor unit is used to collect and process the output signals of the topology signal acquisition unit and the temperature acquisition unit, and upload the processing results to the host computer unit. The programmable digital power supply is used to output power to the EUT position according to the power supply voltage set by the host computer unit; The topology signal acquisition unit is used to acquire the topology current signal in the power line, process the signal and output it to the central control processor unit; The temperature acquisition unit is used to acquire the temperature of the signal transmitting device under test and the ambient temperature, and output them to the central control processor unit; The EUT (Electronic Under Test) position is used to place the topology signal transmitting device under test, provide power to the topology signal transmitting device under test, communicate with the host computer unit, and configure the topology signal of the topology signal transmitting device under test according to the settings of the host computer unit. The programmable digital power supply is a programmable digital DC power supply. The programmable digital power supply is connected to the host computer unit via an RS232 communication line. According to the received instructions from the host computer unit, it outputs a DC power supply with an effective value equal to that of the AC power supply as the working power supply for the test topology signal generating device. The central control processor unit is an MCU system board, which includes a UART interface, a GPIO interface, an ADC input interface, and an interrupt input interface.

2. The detection device for the topology signal generator according to claim 1, characterized in that, The topology signal acquisition unit includes a first operational amplifier, a second operational amplifier, a third operational amplifier, a fourth operational amplifier, a Hall sensor, a sampling resistor, a first feedback resistor, a second feedback resistor, a third feedback resistor, and a fourth feedback resistor; The Hall sensor signal output terminal is simultaneously connected to the non-inverting input terminal of the first operational amplifier and the non-inverting input terminal of the third operational amplifier, and grounded through the sampling resistor. The inverting input terminal of the first operational amplifier is connected to the output terminal of the first operational amplifier. The output terminal of the first operational amplifier is connected to the inverting input terminal of the second operational amplifier through the first feedback resistor. The inverting input terminal of the second operational amplifier is connected to the output terminal of the second operational amplifier through the second feedback resistor. The non-inverting input terminal of the second operational amplifier is grounded. The inverting input terminal of the third operational amplifier is connected to the output terminal of the third operational amplifier. The output terminal of the third operational amplifier is connected to the non-inverting input terminal of the fourth operational amplifier. The inverting input terminal of the fourth operational amplifier is grounded through the third feedback resistor. The inverting input terminal of the fourth operational amplifier is connected to the output terminal of the fourth operational amplifier through the fourth feedback resistor.

3. The detection device for the topology signal generator according to claim 2, characterized in that, The Hall sensor is a current output type with a measurement range of 0A-1A, an accuracy of 0.8%, a response time of <1μs, and a transformation ratio of 40.

4. The detection device for the topology signal generator according to claim 2, characterized in that, The first operational amplifier, the second operational amplifier, the third operational amplifier, and the fourth operational amplifier are low-noise, high-precision operational amplifiers.

5. The detection device for the topology signal generator according to claim 1, characterized in that, The temperature acquisition unit includes a temperature acquisition chip and a pull-up resistor. The output of the temperature acquisition chip is connected to a pull-up power supply through the pull-up resistor.

6. The detection device for the topology signal generator according to claim 1, characterized in that, The host computer unit is a PC or a mobile terminal.

7. The detection device for the topology signal generator according to claim 1, characterized in that, The MCU system board includes an ARM Corex-M4 microcontroller.

8. The detection device for the topology signal generator according to claim 5, characterized in that, The temperature acquisition chip is model GX18B20.

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