Stretchable substrate and stretchable display device

Abstract

A stretchable substrate and a stretchable display device. The stretchable substrate includes a patterned insulating structure, a plurality of conductive lines, a plurality of display elements, and a plurality of cover layers. The patterned insulating structure includes a plurality of device portions and a plurality of line portions. A surface of each device portion has at least one first recess. At least two of the device portions are separated by a recess. Each line portion has a width that is less than a width of each device portion. Adjacent device portions are connected via corresponding line portions. The conductive lines are located in the line portions. The display elements are located on the device portions. The at least one first recess of each device portion at least partially surrounds a corresponding display element. Each cover layer is located on a corresponding one of the device portions and covers the corresponding display element.

Description

TECHNICAL FIELD

[0001] The present application relates to a stretchable substrate and a stretchable display device. BACKGROUND

[0002] With the high development of electronic technology, electronic products are constantly updated. In order to make electronic products applicable to various fields, the characteristics of stretchable, thin and unlimited appearance are gradually valued. That is, electronic products are gradually required to have different appearances according to different application methods and application environments, so electronic products need to have stretchability. For example, a stretchable display device can be integrated on a spherical surface, thereby obtaining a spherical display device. SUMMARY

[0003] The present application provides a stretchable substrate, which can improve the problem caused by overflow of the cover layer on the display element.

[0004] The present application provides a stretchable display device, which can improve the problem caused by overflow of the cover layer on the display element.

[0005] At least one embodiment of the present application provides a stretchable substrate, which includes a patterned insulating structure, a plurality of conductive lines, a plurality of display elements and a plurality of cover layers. The patterned insulating structure includes a plurality of device portions and a plurality of line portions. A surface of each device portion has at least one first recess. At least two of the device portions are separated by a recess. A width of each line portion is less than a width of each device portion. Adjacent device portions are connected via corresponding line portions. The conductive lines are located in the line portions. The display elements are located on the device portions. The at least one first recess of each device portion at least partially surrounds the corresponding display element. Each cover layer is located on a corresponding one of the device portions and covers the corresponding display element.

[0006] At least one embodiment of the present application provides a stretchable display device, which includes a patterned insulating structure, a plurality of display elements, a plurality of conductive lines and a plurality of cover layers. The patterned insulating structure includes a plurality of device portions and a plurality of line portions. The device portions are arranged in an array along a first direction and a second direction. A width of each line portion is less than a width of each device portion, and adjacent device portions are connected via corresponding line portions. The display elements are located on the device portions. A surface of each device portion has at least one first recess at least partially surrounding the corresponding display element. The conductive lines are electrically connected to the display elements. Each cover layer is located on a corresponding one of the device portions and covers the corresponding display element. BRIEF DESCRIPTION OF DRAWINGS

[0007] FIG. 1A FIG. 1 is a partial top view of a stretchable substrate according to an embodiment of the present application.

[0008] FIG. 1BFIG. 10 is a cross-sectional view of a stretchable substrate according to an embodiment of the present application.

[0009] FIG. 2 FIG. 11 is a partial plan view of a stretchable substrate according to an embodiment of the present application.

[0010] FIG. 3A FIG. 12 is a partial plan view of a stretchable substrate according to an embodiment of the present application.

[0011] FIG. 3B FIG. 13 is a cross-sectional view of a stretchable substrate according to an embodiment of the present application.

[0012] FIG. 3C FIG. 14 is a cross-sectional view of a stretchable substrate according to an embodiment of the present application.

[0013] FIG. 4A FIG. 15 is a partial plan view of a stretchable substrate according to an embodiment of the present application.

[0014] FIG. 4B FIG. 16 is a cross-sectional view of a stretchable substrate according to an embodiment of the present application.

[0015] FIG. 5 FIG. 17 is a partial plan view of a stretchable substrate according to an embodiment of the present application.

[0016] FIG. 6 FIG. 18 is a cross-sectional view of a stretchable substrate according to an embodiment of the present application.

[0017] BRIEF DESCRIPTION OF DRAWINGS

[0018] 10, 20, 30, 40, 50, 60: stretchable substrate

[0019] 100: patterned base

[0020] 110, 110a: patterned insulating structure

[0021] B: blue display element

[0022] BF: barrier layer

[0023] BP1: first buffer layer

[0024] BP2: second buffer layer

[0025] BP3: third buffer layer

[0026] BP4: fourth buffer layer

[0027] CC: conductive connection structure

[0028] CH: semiconductor channel

[0029] CS: carrier substrate

[0030] D: drain

[0031] E: electrode

[0032] E1: first direction

[0033] E2: second direction

[0034] F: arrow

[0035] G: green display element

[0036] GE: gate

[0037] GI: gate insulating layer

[0038] GV1: first groove

[0039] GV2: second groove

[0040] ILD: interlayer dielectric layer

[0041] LD: display element

[0042] M1: first conductive layer

[0043] M2: second conductive layer

[0044] M3: third conductive layer

[0045] M4: fourth metal layer

[0046] O: opening

[0047] OC: overcoat layer

[0048] PL1: first insulating layer

[0049] PL2: second insulating layer

[0050] PL3: third insulating layer

[0051] R: red display element

[0052] S: source

[0053] SL1: first wire

[0054] SL1a, SL2a: transmission portion

[0055] SL1b, SL2b: connection portion

[0056] SL2: second wire

[0057] SL3: wire

[0058] t1: thickness

[0059] TH1: recess

[0060] TH2: through hole

[0061] TFT: active element

[0062] TP: device portion

[0063] V1, V2: via hole

[0064] w1, w2: width

[0065] WP: wiring portion DETAILED DESCRIPTION

[0066] FIG. 1A is a partial top view of a stretchable substrate according to an embodiment of the present application, wherein FIG. 1A the patterned base and the patterned insulating structure are shown, and other components are omitted.

[0067] Reference is made to FIG. 1A , a stretchable substrate 10 (may also be referred to as a stretchable display device) includes a patterned base 100, a patterned insulating structure 110, a plurality of display elements (not shown), a plurality of conductive lines (not shown), and a plurality of cover layers (not shown). In FIG. 1A , the stretchable substrate 10 is stretched outwardly along the direction of arrow F. In other words, FIG. 1A is a schematic view of the stretchable substrate 10 after being stretched. FIG. 1A FIG. 1A The patterned base 100 is elastic and ductile. In other words, the patterned base 100 is stretchable. For example, in the present embodiment, the material of the patterned base 100 can include polyimide (PI), polyethylene naphthalate (PEN), polyethylene terephthalate (PET), polycarbonates (PC), polyether sulfone (PES) or polyarylate, other suitable materials, or a combination of at least two of the foregoing, but the present application is not limited thereto. FIG. 1A

[0068] The patterned base 100 is elastic and ductile. In other words, the patterned base 100 is stretchable. For example, in the present embodiment, the material of the patterned base 100 can include polyimide (PI), polyethylene naphthalate (PEN), polyethylene terephthalate (PET), polycarbonates (PC), polyether sulfone (PES) or polyarylate, other suitable materials, or a combination of at least two of the foregoing, but the present application is not limited thereto.

[0069] ​​The patterned substrate 100 has a plurality of through holes TH2. In this embodiment, each through hole TH2 is dumbbell-shaped. In this embodiment, some of the through holes TH2 extend along the first direction E1, and the other through holes TH2 extend along the second direction E2. The through holes TH2 extending along the first direction E1 and the other through holes TH2 extending along the second direction E2 are arranged alternately, thereby improving the stretchability of the stretchable substrate.

[0070] The patterned insulating structure 110 is on the patterned substrate 100. The patterned insulating structure 110 is, for example, a single-layer or multi-layer structure.

[0071] The patterned insulating structure 110 includes a plurality of device portions TP and a plurality of circuit portions CP. Each circuit portion WP has a width W1 smaller than a width W2 of each device portion TP. The device portions TP are arranged in an array along the first direction E1 and the second direction E2. Adjacent device portions TP are connected via a corresponding circuit portion WP. In other words, both ends of at least some of the circuit portions WP are connected to corresponding two device portions TP, respectively. At least two of the device portions TP are separated by a recess TH1. In this embodiment, the recess TH1 is an opening of the patterned insulating structure 110, and each recess TH1 is surrounded by four device portions TP and four circuit portions WP. In this embodiment, the recess TH1 of the patterned insulating structure 110 overlaps with a through hole TH2 of the patterned substrate 100. In this embodiment, each recess TH1 is dumbbell-shaped, some of the recesses TH1 extend along the first direction E1, and the other recesses TH1 extend along the second direction E2. The recesses TH1 extending along the first direction E1 and the other recesses TH1 extending along the second direction E2 are arranged alternately, thereby improving the stretchability of the stretchable substrate.

[0072] The surface of each device portion TP has at least a first groove GV1. In this embodiment, the surface of each device portion TP has a plurality of openings O, a first groove GV1 surrounding at least some of the openings O, and a second groove GV2 surrounding at least some of the first grooves GV1.

[0073] FIG. 1B is a schematic cross-sectional view of a stretchable substrate according to an embodiment of the present application, wherein FIG. 1B corresponds to FIG. 1A the position of line a-a’.

[0074] Please refer to FIG. 1A and FIG. 1B The stretchable substrate 10 is on a carrier substrate CS. The carrier substrate CS is, for example, a glass carrier substrate, a semiconductor carrier substrate, a metal carrier substrate, or other applicable carrier substrate.

[0075] The patterned insulation structure 110 of the stretchable substrate 10 is formed on the patterned base 100 and includes a first insulation layer PL1, a second insulation layer PL2, and a third insulation layer PL3.

[0076] The first insulation layer PL1 is formed above the patterned base 100. In some embodiments, a first buffer layer BP1 is selectively included between the first insulation layer PL1 and the patterned base 100.

[0077] The second insulation layer PL2 is formed above the first insulation layer PL1. In some embodiments, a second buffer layer BP2 is selectively included between the second insulation layer PL2 and the first insulation layer PL1.

[0078] The third insulation layer PL3 is formed above the second insulation layer PL2. In some embodiments, a third buffer layer BP3 is selectively included between the third insulation layer PL3 and the second insulation layer PL2. In the present embodiment, the third insulation layer PL3 has a plurality of openings O, a first groove GV1, and a second groove GV2. The openings O, the first groove GV1, and the second groove GV2 are formed on the surface of the device portion TP. In some embodiments, the thickness t1 of the third insulation layer PL3 is equal to 0.5 micrometers to 10 micrometers, and the depth d1 of the openings O, the first groove GV1, and the second groove GV2 is equal to 0.5 micrometers to 10 micrometers. In some embodiments, the width w1 of the first groove GV1 and the width w2 of the second groove GV2 are equal to 0.5 micrometers to 10 micrometers.

[0079] In some embodiments, the patterned insulation structure 110 includes organic and inorganic insulation materials, and the method of forming the patterned insulation structure 110 includes a photolithography process and an etching process. For example, the first insulation layer PL1, the second insulation layer PL2, and the third insulation layer PL3 all include a cured photoresist material, and the first buffer layer BP1, the second buffer layer BP2, and the third buffer layer BP3 include a cured photoresist material or an inorganic material etched to be patterned. In the present embodiment, the third insulation layer PL3 is formed after the third buffer layer BP3 and the second insulation layer PL2 are formed, and thus the openings O, the first groove GV1, and the second groove GV2 in the third insulation layer PL3 do not extend into the third buffer layer BP3 and the second insulation layer PL2. Specifically, when performing the photolithography process to form the third insulation layer PL3 including the openings O, the first groove GV1, and the second groove GV2, other photoresist layers below the third insulation layer PL3 have been cured, and thus a developing agent used in the aforementioned photolithography process does not remove the other photoresist layers below the third insulation layer PL3, so that the openings O, the first groove GV1, and the second groove GV2 do not extend into the other photoresist layers below the third insulation layer PL3.

[0080] In the present embodiment, the first insulating layer PL1, the first buffer layer BP, the second insulating layer PL2, the second buffer layer BP2, the third insulating layer PL3, and the third buffer layer BP3 of the patterned insulating structure 110 are located in the device portion TP, and the first insulating layer PL1, the first buffer layer BP, the second insulating layer PL2, the second buffer layer BP2, the third insulating layer PL3, and the third buffer layer BP3 selectively extend into the wiring portion WP. In some embodiments, the thickness of the wiring portion WP is less than the thickness of the device portion TP, thereby improving the stretchability of the stretchable substrate. For example, the device portion TP includes more layers of insulating layers and / or more layers of buffer layers than the wiring portion WP, but the present disclosure is not limited thereto.

[0081] In some embodiments, the wiring portion WP is offsetly disposed over the patterned substrate 100. Specifically, the distance L1 between one side of the wiring portion WP and the through-hole TH2 of the patterned substrate 100 is greater than the distance L2 between the other side of the wiring portion WP and the through-hole TH2 of the patterned substrate 100. By offsetly disposing the wiring portion WP over the patterned substrate 100, the problem of stress concentration causing the conductive lines in the wiring portion WP to break can be avoided. However, although in the present embodiment, the wiring portion WP is offsetly disposed over the patterned substrate 100, the present disclosure is not limited thereto. In other embodiments, the distance L1 can selectively be equal to the distance L2.

[0082] The first conductive layer M1, the second conductive layer M2, and the third conductive layer M3 are located in the patterned insulating structure 110. In the present embodiment, the first conductive layer M1 is located over the patterned substrate 100 and selectively over the first buffer layer BP1. The second conductive layer M2 is located over the first insulating layer PL1 and selectively over the second buffer layer BP2, and the second conductive layer M2 is selectively electrically connected to the first conductive layer M1. For example, part of the second conductive layer M2 is electrically connected to the first conductive layer M1 through the via hole V1 in the first insulating layer PL1. The second conductive layer M2 and the via hole V1 are formed together, for example. The third conductive layer M3 is located over the second insulating layer PL2 and selectively over the third buffer layer BP3, and the third conductive layer M3 is selectively electrically connected to the second conductive layer M2. For example, part of the third conductive layer M3 is electrically connected to the second conductive layer M2 through the via hole V2 in the second insulating layer PL2. The third conductive layer M3 and the via hole V2 are formed together, for example.

[0083] In the present embodiment, at least one of the first conductive layer M1, the second conductive layer M2, and the third conductive layer M3 includes a conductive line located in the wiring portion WP, and the conductive line extends from the wiring portion WP into the device portion TP.

[0084] In some embodiments, the material of the first conductive layer Ml, the second conductive layer M2, and the third conductive layer M3 includes a metal such as chromium, gold, silver, copper, tin, lead, hafnium, tungsten, molybdenum, neodymium, titanium, tantalum, aluminum, zinc, an alloy thereof, an oxide thereof, a nitride thereof, or a combination thereof, or other conductive material. In some embodiments, the first conductive layer Ml, the second conductive layer M2, and the third conductive layer M3 each includes a single layer or a multi-layer structure, for example, a titanium / aluminum / titanium stack, a molybdenum / aluminum / molybdenum stack, or other suitable stack of conductive materials.

[0085] In the present embodiment, the opening O of the third insulating layer PL3 overlaps the third conductive layer M3. In other words, the opening O exposes part of the third conductive layer M3. In the present embodiment, the first groove GV1 and the second groove GV2 do not overlap the third conductive layer M3, in other words, the third conductive layer M3 is not exposed by the first groove GV1 and the second groove GV2, but the present application is not limited thereto. In other embodiments, part of the top surface of the third conductive layer M3 is exposed by the first groove GV1 and / or the second groove GV2, but the side surface of the third conductive layer M3 is not exposed by the first groove GV1 and / or the second groove GV2. It is noted that in the present embodiment, the third conductive layer M3 is exposed by the opening O, but the present application is not limited thereto. In other embodiments, the third conductive layer M3 is not exposed by the opening O. FIG. 1A With reference to FIG. 1C, the third insulating layer PL3 is formed on the third conductive layer M3. In the present embodiment, the third insulating layer PL3 is formed on the entire surface of the third conductive layer M3, but the present application is not limited thereto. In other embodiments, the third insulating layer PL3 is formed on part of the surface of the third conductive layer M3. FIG. 1B In the present embodiment, the opening O of the third insulating layer PL3 overlaps the third conductive layer M3. In other words, the opening O exposes part of the third conductive layer M3. In the present embodiment, the first groove GV1 and the second groove GV2 do not overlap the third conductive layer M3, in other words, the third conductive layer M3 is not exposed by the first groove GV1 and the second groove GV2, but the present application is not limited thereto. In other embodiments, part of the top surface of the third conductive layer M3 is exposed by the first groove GV1 and / or the second groove GV2, but the side surface of the third conductive layer M3 is not exposed by the first groove GV1 and / or the second groove GV2. It is noted that in the present embodiment, the third conductive layer M3 is exposed by the opening O, but the present application is not limited thereto. In other embodiments, the third conductive layer M3 is not exposed by the opening O.

[0086] The plurality of electrodes E is formed in the opening O and covers the third conductive layer M3 at the bottom of the opening O. In some embodiments, the electrode E includes a metal oxide, for example, indium tin oxide, but the present application is not limited thereto. The electrode E can include other suitable conductive material for protecting the part of the third conductive layer M3 exposed by the opening O.

[0087] In the present embodiment, since the third conductive layer M3 is not exposed by the first groove GV1 and / or the second groove GV2, the etching solution used in forming the electrode E does not attack the third conductive layer M3, so that the third conductive layer M3 is not eroded to affect the conductive property. In some embodiments, the third conductive layer M3 comprises a multi-layer structure, such as a stack of a titanium layer, an aluminum layer and a titanium layer, wherein the aluminum layer between the two titanium layers is more susceptible to attack by the etching solution (e.g. oxalic acid) used in forming the electrode E, while the titanium layer on the top surface of the third conductive layer M3 is less susceptible to attack by the etching solution used in forming the electrode E. Therefore, even if the titanium layer on the top surface of the third conductive layer M3 is exposed by the first groove GV1 and / or the second groove GV2, the etching solution used in forming the electrode E is less likely to attack the third conductive layer M3. In other words, as long as the side surface of the third conductive layer M3 where the aluminum layer is likely to be exposed is covered, the third conductive layer M3 is prevented from being attacked by the etching solution used in forming the electrode E.

[0088] The display element LD is disposed on the device portion TP and is electrically connected to the electrode E. In some embodiments, the display element LD is placed on the electrode E by a mass transfer process. The display element LD is electrically connected to the third conductive layer M3 through the electrode E, and is further electrically connected to the conductive lines in the wiring portion WP of the third conductive layer M3, the second conductive layer M2 and / or the first conductive layer M1. In some embodiments, the display element LD comprises an organic light emitting diode, a micro light emitting diode or other light emitting elements. The display element LD is electrically connected to the electrode E, for example, by eutectic bonding, conductive adhesive bonding, soldering or other similar means. In the present embodiment, different color display elements LD are disposed above each device portion TP to form a color pixel. For example, a red display element R, a green display element G and a blue display element B are disposed above each device portion TP.

[0089] The first groove GV1 at least partially surrounds the corresponding display element LD. In the present embodiment, the first groove GV1 at least partially surrounds three display elements LD. The second groove GV2 at least partially surrounds the first groove GV1.

[0090] A plurality of overcoat layers OC are located on the plurality of device portions TP, each overcoat layer OC is located on a corresponding device portion TP. The overcoat layer OC covers the corresponding display element LD. The overcoat layer OC is, for example, a transparent optical adhesive (or transparent encapsulation adhesive), and is adapted to protect the display element LD. In some embodiments, the overcoat layer OC is formed by inkjet printing or other suitable means. In the present embodiment, the first groove GV1 and the second groove GV2 can serve as overflow trenches for the overcoat layer OC, thereby helping to confine the overcoat layer OC on the device portion TP, and preventing the overcoat layer OC from overflowing to other locations. In the present embodiment, each overcoat layer OC fills the corresponding first groove GV1, and each overcoat layer OC optionally fills the corresponding second groove GV2.

[0091] In some embodiments, after the patterned insulating structure 110, the first conductive layer M1, the second conductive layer M2, the third conductive layer M3, and the electrode E are formed on a substrate that has not yet been patterned, the aforementioned substrate is patterned (for example, by etching) to form the patterned substrate 100. Then, the display element LD is bonded to the electrode E, and the overcoat layer OC is formed on the display element LD. Finally, the patterned substrate 100 and other components located thereon are lifted off from the carrier substrate CS. Lifting the patterned substrate 100 and other components located thereon off from the carrier substrate CS includes, for example, laser lift off or other suitable means.

[0092] In the present embodiment, due to the provision of the first groove GV1 and the second groove GV2, the overcoat layer OC is less likely to overflow to the outside of the device portion TP, and thus, the overcoat layer OC can be prevented from flowing into the recess TH1 and the through-hole TH2 to contact the carrier substrate CS. Therefore, the overcoat layer OC can be prevented from sticking to the carrier substrate CS, and the process yield of lifting the patterned substrate 100 off from the carrier substrate CS can be improved.

[0093] FIG. 2 is a partial top view of a stretchable substrate according to an embodiment of the present application, wherein FIG. 2 The patterned substrate 100, the patterned insulating structure 110, the second conductive layer M2, the third conductive layer M3, and the display element LD are shown, and other components are omitted. It must be noted that, FIG. 2 Embodiments of FIG. 1A and FIG. 1B Embodiments of

[0094] Reference can be made to FIG. 2 , FIG. 2This is a schematic diagram of the stretchable substrate 20 before stretching. The stretchable substrate 20 (also referred to as a stretchable display device) includes a patterned substrate 100, a patterned insulating structure 110, multiple display elements LD, multiple conductive lines, and multiple cover layers. FIG. 2 (Not shown). In this embodiment, the second conductive layer M2 and the third conductive layer M3 include wires. In this embodiment, the wires include multiple first wires SL1 and multiple second wires SL2.

[0095] Multiple first conductors SL1 extend along a first direction E1 and are electrically connected to display elements LD on device portions TP arranged along the first direction E1. For example, in this embodiment, the first conductors SL1 include a transmission portion SL1a belonging to the second conductive layer M2 and a connection portion SL1b belonging to the third conductive layer M3. The transmission portion SL1a is located in the line portion WP of the patterned insulating structure 110 and extends into the device portion TP of the patterned insulating structure 110. The connection portion SL1b is located in the device portion TP of the patterned insulating structure 110 and is electrically connected to the transmission portion SL1a through a via V2.

[0096] In some embodiments, at least three corresponding display elements LD on each device portion TP are electrically connected to the same corresponding first conductor SL1. For example, the third insulating layer has three openings overlapping the connection portion SL1b. FIG. 2 (not shown), three electrodes ( FIG. 2 (Not shown) They are formed in the aforementioned three openings. The three display elements LD are electrically connected to the connection portion SL1b via the aforementioned three electrodes. The first conductor SL1 is suitable for transmitting, for example, a ground voltage signal or a common voltage signal.

[0097] Multiple second conductors SL2 extend along the second direction E2 and are electrically connected to display elements LD on device portions TP arranged in the second direction E2. For example, in this embodiment, the second conductors SL2 include a transmission portion SL2a belonging to the second conductive layer M2 and a connection portion SL2b belonging to the third conductive layer M3. The transmission portion SL2a is located in the line portion WP of the patterned insulating structure 110 and extends into the device portion TP of the patterned insulating structure 110. The connection portion SL2b is located in the device portion TP of the patterned insulating structure 110 and is electrically connected to the transmission portion SL2a through a conductive via V2. In this embodiment, the width of the first conductor SL1 is greater than the width of the second conductor SL2.

[0098] In some embodiments, at least three corresponding display elements LD on each device portion TP are electrically connected to at least three corresponding second conductors SL2. For example, the third insulating layer has three openings overlapping the connection portion SL2b. FIG. 2 (not shown), three electrodes (FIG. 2 (Not shown) They are formed in the aforementioned three openings. The three display elements LD are electrically connected to the connection portion SL2b through the aforementioned three electrodes. The plurality of first grooves GV1 portions on the surface of each device portion TP surround the corresponding display element LD.

[0099] In this embodiment, to avoid exposing the side surface of the third conductive layer M3 to the first groove GV1, multiple mutually separated first grooves GV1 are provided on the surface of each device part TP. Some of the first grooves GV1 overlap the third conductive layer M3 but do not extend to the side surface of the third conductive layer M3. For example, the first groove GV1 is located in the third insulating layer, wherein the third insulating layer (e.g., FIG. 1B The third insulating layer PL3 covers the side surface of the first conductor SL1 in the conductor, and the first groove GV1 exposes a portion of the top surface of the first conductor SL1 in the conductor. Specifically, the third insulating layer covers the side surface of the connection portion SL2b and exposes a portion of the top surface of the connection portion SL2b.

[0100] Based on the above, by setting multiple first grooves GV1, problems caused by cover layer overflow can be avoided.

[0101] It should be noted that, FIG. 2 The stretchable substrate 20 is a passive display device, and no active elements are provided in the patterned insulating structure 110, but the present invention is not limited thereto. In other embodiments, active elements are provided in the patterned insulating structure of the stretchable substrate, and the stretchable substrate is an active display device.

[0102] FIG. 3A This is a partial top view of a stretchable substrate according to an embodiment of the present invention, wherein... FIG. 3A The third conductive layer M3, the third insulating layer PL3, and the display element LD are shown, while other components are omitted. FIG. 3B and FIG. 3C This is a cross-sectional schematic diagram of a stretchable substrate according to an embodiment of the present invention, wherein... FIG. 3B and FIG. 3C They correspond to FIG. 3A The positions of the midlines a-a' and b-b'. It must be noted here that... FIG. 3A to FIG. 3C The embodiments follow FIG. 2 The component reference numerals and partial contents of the embodiments are described below, wherein the same or similar reference numerals are used to represent the same or similar components, and descriptions of the same technical content are omitted. For explanations of the omitted parts, please refer to the foregoing embodiments, and will not be repeated here.

[0103] Please refer to FIG. 3A to FIG. 3CThe stretchable substrate 30 (also referred to as a stretchable display device) includes a patterned substrate 100, a patterned insulating structure 110, multiple display elements LD, multiple conductive lines, and multiple cover layers. FIG. 3A (omitted).

[0104] The surface of each device portion of the stretchable substrate 30 has a plurality of openings O, a plurality of first grooves GV1 separated from each other, and a plurality of second grooves GV2 separated from each other. The second grooves GV2 are further away from the corresponding display element LD than the first grooves GV1. The plurality of second grooves GV2 partially surround the plurality of first grooves GV1, and the plurality of first grooves GV1 partially surround the plurality of openings O.

[0105] In this embodiment, a portion of the second conductor SL2' extends into the device portion. A third insulating layer PL3 between two adjacent second grooves GV2 covers the sides and top surface of the second conductor SL2'. In other words, in this embodiment, the sides and top surface of the second conductor SL2' are not exposed by the second grooves GV2.

[0106] In this embodiment, the second conductor SL2' extends from a position between two adjacent second grooves GV2 to a position between the second groove GV2 and the first groove GV1, and is laterally located between the second groove GV2 and the first groove GV1. In this embodiment, the second conductor SL2' is selectively electrically connected to the display element LD or other elements in the device section. For example, the transmission section SL2a' of the second conductor SL2' passes through a layer located in the second conductive layer ( FIG. 3A to FIG. 3C The conductive structure (not shown) is electrically connected to the connection part below the opening O, and is electrically connected to the display element LD through the connection part.

[0107] In this embodiment, the third insulating layer PL3 covers the side of the first conductor SL1, and a portion of the first groove GV1 and a portion of the second groove GV2 expose a portion of the top surface of the first conductor SL1.

[0108] FIG. 4A This is a partial top view of a stretchable substrate according to an embodiment of the present invention, wherein... FIG. 4A The conductor SL3 of the third conductive layer, the third insulating layer PL3, and the display element LD are shown, while other components are omitted. FIG. 4B This is a cross-sectional schematic diagram of a stretchable substrate according to an embodiment of the present invention, wherein... FIG. 4B Corresponding FIG. 4A The position of the midline a-a'. It must be noted here that... FIG. 4A and FIG. 4B The embodiments follow FIG. 3A to FIG. 3CThe component reference numerals and partial contents of the embodiments are described below, wherein the same or similar reference numerals are used to represent the same or similar components, and descriptions of the same technical content are omitted. For explanations of the omitted parts, please refer to the foregoing embodiments, and will not be repeated here.

[0109] Please refer to FIG. 4A and FIG. 4B In this embodiment, the stretchable substrate 40 (also referred to as a stretchable display device) includes a patterned substrate 100, a patterned insulating structure 110, a plurality of display elements LD, a plurality of conductive lines, and a plurality of cover layers. FIG. 4A (omitted).

[0110] The surface of each device portion of the stretchable substrate 40 has multiple openings O, a first groove GV1 surrounding the multiple openings O, and multiple second grooves GV2 separated from each other. The second grooves GV2 are further away from the corresponding display element LD than the first grooves GV1. The multiple second grooves GV2 partially surround the first grooves GV1.

[0111] In this embodiment, the conductor SL3 of the third conductive layer M3 extends from one side of the device portion TP to the other side adjacent to the aforementioned one side. For example, in FIG. 4A In this embodiment, one wire SL3 extends from the left side of the device portion TP to the lower side of the device portion TP, and the other wire SL3 extends from the upper side of the device portion TP to the right side of the device portion TP. In other words, in this embodiment, the wires are not restricted from extending from one side of the device portion TP to the opposite side of the aforementioned side. That is, the wires are not restricted from extending from the left side to the right side or from the upper side to the lower side of the device portion TP.

[0112] In this embodiment, to prevent the second grooves GV2 from exposing the sides of the conductor SL3, multiple mutually separated second grooves GV2 are provided on the surface of each device part TP. For example, the second grooves GV2 are located in the third insulating layer PL3, which covers the top and sides of the conductor SL3. In this embodiment, a portion of the conductor SL3 extends into the device part. The third insulating layer PL3 between two adjacent second grooves GV2 covers the sides and top of the conductor SL3. In other words, in this embodiment, the sides and top of the conductor SL3 are not exposed by the second grooves GV2.

[0113] In this embodiment, the cover layer OC is filled into the first groove GV1, and selectively filled into or not filled into the second groove GV2.

[0114] Based on the above, by setting multiple first grooves GV1 and second grooves GV2, problems caused by OC overflow of the cover layer can be avoided.

[0115] FIG. 5This is a partial top view of a stretchable substrate according to an embodiment of the present invention, wherein... FIG. 5 The conductor SL3 of the third conductive layer and the third insulating layer PL3 are shown, while other components are omitted. It must be noted here that... FIG. 5 The embodiments follow FIG. 4A and FIG. 4B The component reference numerals and partial contents of the embodiments are described below, wherein the same or similar reference numerals are used to represent the same or similar components, and descriptions of the same technical content are omitted. For explanations of the omitted parts, please refer to the foregoing embodiments, and will not be repeated here.

[0116] Please refer to FIG. 5 In this embodiment, the conductor SL3 of the stretchable substrate 50 (also referred to as a stretchable display device) has multiple bends in the device portion TP. In this embodiment, in addition to having bends at the four corners corresponding to the device portion TP, the first groove GV1 and the second groove GV2 may also include bends corresponding to the conductor SL3, thereby increasing the length of the first groove GV1 and the length of the second groove GV2.

[0117] In this embodiment, by increasing the length of the first groove GV1 and the length of the second groove GV2, the contact coverage layer of the first groove GV1 and the second groove GV2 can be further improved. FIG. 5 The area (not shown) helps to confine the covering layer to the device part TP and prevent the covering layer from overflowing outside the device part TP.

[0118] FIG. 6 This is a schematic cross-sectional view of a stretchable substrate according to an embodiment of the present invention. It should be noted that... FIG. 6 The embodiments follow FIG. 1A and FIG. 1B The component reference numerals and partial contents of the embodiments are described below, wherein the same or similar reference numerals are used to represent the same or similar components, and descriptions of the same technical content are omitted. For explanations of the omitted parts, please refer to the foregoing embodiments, and will not be repeated here.

[0119] Please refer to FIG. 6 In this embodiment, the stretchable substrate 60 (also referred to as a stretchable display device) further includes an active element TFT. The active element TFT is located in the patterned insulating structure 110a and is electrically connected to the display element LD.

[0120] In this embodiment, the patterned insulating structure 110a includes a barrier layer BF, a gate insulating layer GI, an interlayer dielectric layer ILD, a first insulating layer PL1, a second insulating layer PL2, and a third insulating layer PL3. In this embodiment, the patterned insulating structure 110a selectively includes a first buffer layer BP1, a second buffer layer BP2, a third buffer layer BP3, and a fourth buffer layer BP4.

[0121] In some embodiments, the barrier layer BF, the gate insulating layer GI, the interlayer dielectric layer ILD, the first buffer layer BP1, the first insulating layer PL1, the second buffer layer BP2, the second insulating layer PL2, the third buffer layer BP3, the third insulating layer PL3, and the fourth buffer layer BP4 comprise organic or inorganic insulating materials.

[0122] A barrier layer BF is located on a patterned substrate 100. A semiconductor channel layer CH is located on the barrier layer BF. A gate insulating layer GI is located on the semiconductor channel layer CH. The gate GE in the first conductive layer M1 is located on the gate insulating layer GI and overlaps the semiconductor channel layer CH. An interlayer dielectric layer ILD is located on the first conductive layer M1 and the gate insulating layer GI. The drain D and source S of the second conductive layer M2 are located on the interlayer dielectric layer ILD and are electrically connected to the semiconductor channel layer CH. In this embodiment, the active element TFT includes a gate GE, a semiconductor channel layer CH, a drain D, and a source S. In this embodiment, the active element TFT is a top-gate thin-film transistor, but the invention is not limited thereto. In other embodiments, the active element TFT is a bottom-gate thin-film transistor or other types of thin-film transistors.

[0123] A first buffer layer BP1, a first insulating layer PL1, and a second buffer layer BP2 are located on a second conductive layer M2 and an interlayer dielectric layer ILD. A third conductive layer M3 is located on the second buffer layer BP2, and at least a portion of the third conductive layer M3 is electrically connected to the active element TFT. A second insulating layer PL2 and a third buffer layer BP3 are located on the third conductive layer M3 and the second buffer layer BP2. A fourth conductive layer M4 is located on the third buffer layer BP3, and at least a portion of the fourth conductive layer M4 is electrically connected to the third conductive layer M3. A third insulating layer PL3 and a fourth buffer layer BP4 are located on the fourth conductive layer M4. An electrode E is located on the fourth buffer layer BP4, and at least a portion of the electrode E is electrically connected to the active element TFT through the third conductive layer M3 and the fourth conductive layer M4. The display element LD is electrically connected to the electrode E through a conductive connection structure CC. In some embodiments, the conductive connection structure CC includes, for example, indium, tin, bismuth, conductive adhesive, a combination of the above materials, or other suitable materials.

[0124] The surface of the device portion TP is provided with a first groove GV1 and a second groove GV2. In this embodiment, the first groove GV1 and the second groove GV2 are located in the third insulating layer PL3, and the fourth buffer layer BP4 covers the surfaces of the first groove GV1 and the second groove GV2, but the fourth buffer layer BP4 does not completely fill the first groove GV1 and the second groove GV2. The first groove GV1 at least partially surrounds the display element LD, and the second groove GV2 at least partially surrounds the first groove GV1. In this embodiment, the first groove GV1 and the second groove GV2 do not expose the top surface and side surface of the fourth conductive layer M4, thereby preventing the top surface and side surface of the fourth conductive layer M4 from being etched by the etchant used when forming the electrode E. In some embodiments, the first groove GV1 and the second groove GV2 expose part of the top surface of the fourth conductive layer M4, but the first groove GV1 and the second groove GV2 do not expose the side surface of the fourth conductive layer M4.

[0125] In summary, providing grooves on the surface of the device portion of the patterned insulating structure helps to prevent overlay overflow, thereby improving the production yield of the stretchable substrate.

Claims

1. A stretchable substrate, comprising: a patterned insulating structure, comprising a plurality of device portions, a plurality of line portions, wherein the patterned insulating structure comprises: a first insulating layer over a patterned base, the patterned base having a plurality of through-holes, each of the through-holes being dumbbell-shaped, a portion of the through-holes extending along a first direction, and another portion of the through-holes extending along a second direction different from the first direction, the portion of the through-holes extending along the first direction and the another portion of the through-holes extending along the second direction being alternately arranged; a second insulating layer over the first insulating layer; and a third insulating layer over the second insulating layer, wherein a surface of each of the device portions has at least one first recess in the third insulating layer, wherein at least two of the device portions are separated by a recess, wherein the recess is an opening of the patterned insulating structure and connects corresponding through-holes of the patterned base; a width of each of the line portions is smaller than a width of each of the device portions, and adjacent ones of the device portions are connected via corresponding ones of the line portions, wherein each of the recesses is surrounded by four of the device portions, four of the first recesses, and four of the line portions; a plurality of conductive lines in the line portions and on the patterned base; a plurality of display elements on the device portions and on the patterned base, wherein each of the device portions is provided with at least three of the display elements corresponding thereto, wherein the at least one first recess of each of the device portions surrounds corresponding ones of the display elements; a plurality of active elements on the patterned base and in the patterned insulating structure and electrically connected to corresponding ones of the display elements; and a plurality of cover layers, each of the cover layers being on a corresponding one of the device portions and covering corresponding ones of the display elements, wherein each of the cover layers fills in and covers corresponding ones of the at least one first recess and covers an upper surface of the patterned insulating structure adjacent to the at least one first recess but does not flow into the recess, wherein the recess not flowed into by the cover layer exposes a sidewall of the patterned base bearing the active elements and a sidewall of the first insulating layer of the corresponding device portion, a sidewall of the second insulating layer of the corresponding device portion, and a sidewall of the third insulating layer of the corresponding device portion, wherein the patterned base is on a carrier, the recess of the patterned insulating structure and the through-holes of the patterned base collectively expose a portion of an upper surface of the carrier, the carrier being a glass carrier or a metal carrier, a distance between one side of each of the line portions and a through-hole of the patterned base is greater than a distance between another side of each of the line portions and the through-hole of the patterned base. 2.The stretchable substrate of claim 1, wherein a surface of each of the device portions has a plurality of second recesses separated from each other, the second recesses being further away from corresponding ones of the display elements than the at least one first recess, and the second recesses partially surround the at least one first recess. 3.The stretchable substrate of claim 2, wherein at least one of the conductive lines extends from the line portions into the device portions and is laterally between the second recesses and the at least one first recess.

4. The stretchable substrate of claim 1, wherein the third insulating layer covers side surfaces of at least one of the conductive lines, and the at least one first recess exposes part of a top surface of the at least one of the conductive lines.

5. The stretchable substrate of claim 1, wherein the at least one first recess and a plurality of second recesses separated from each other are in the third insulating layer, wherein the second recesses surround the at least one first recess, and the third insulating layer between adjacent two of the second recesses covers side surfaces and a top surface of at least one of the conductive lines.

6. The stretchable substrate of claim 1, wherein the device portions are arranged in an array along a first direction and a second direction, and the conductive lines comprise: a plurality of first conductive lines extending along the first direction and electrically connected to the display elements on the device portions arranged in the first direction; and a plurality of second conductive lines extending along the second direction and electrically connected to the display elements on the device portions arranged in the second direction, wherein corresponding at least three of the display elements on each of the device portions are electrically connected to at least three corresponding of the second conductive lines, respectively, and corresponding at least three of the display elements on each of the device portions are electrically connected to a same corresponding of the first conductive lines.

7. A stretchable display device, comprising: a patterned insulating structure comprising a plurality of device portions and a plurality of circuit portions, wherein the patterned insulating structure comprises: a first insulating layer over a patterned substrate, the patterned substrate having a plurality of through-holes, each of the through-holes being dumbbell-shaped, part of the through-holes extending along a first direction, and another part of the through-holes extending along a second direction different from the first direction, the part of the through-holes extending along the first direction and the another part of the through-holes extending along the second direction being arranged alternately; a second insulating layer over the first insulating layer; and a third insulating layer over the second insulating layer, the plurality of device portions arranged in an array along a first direction and a second direction, wherein at least two of the device portions are separated by a recess, wherein the recess is an opening of the patterned insulating structure and connects corresponding through-holes of the patterned substrate, a width of each of the circuit portions is smaller than a width of each of the device portions, and adjacent of the device portions are connected via corresponding of the circuit portions, a plurality of display elements on the device portions and on the patterned substrate, wherein each of the device portions is provided with corresponding at least three of the display elements, wherein a surface of each of the device portions has at least one first recess surrounding corresponding of the display elements, the at least one first recess being in the third insulating layer, wherein each of the recesses is surrounded by four of the device portions, four of the first recesses, and four of the circuit portions, a plurality of conductive lines electrically connected to the display elements and on the patterned substrate, a plurality of active elements on the patterned substrate and in the patterned insulating structure and electrically connected to corresponding of the display elements. ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ a plurality of cover layers, each of the cover layers is located on a corresponding one of the device portions and covers the corresponding display elements, wherein each of the cover layers fills and covers the corresponding at least one first recess and covers an upper surface of the patterned insulating structure adjacent to the at least one first recess but does not flow to the recessed portion, wherein the recessed portion not flowed into by the cover layer exposes a sidewall of the patterned substrate carrying the active elements, a sidewall of the first insulating layer of the corresponding device portion, a sidewall of the second insulating layer of the corresponding device portion, and a sidewall of the third insulating layer of the corresponding device portion, wherein the patterned substrate is located on a carrier plate, the recessed portion of the patterned insulating structure and the plurality of through holes of the patterned substrate collectively expose a portion of an upper surface of the carrier plate, the carrier plate is a glass carrier plate or a metal carrier plate, a distance between one side of each of the circuit portions and the through hole of the patterned substrate is greater than a distance between another side of each of the circuit portions and the through hole of the patterned substrate.

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