Method for storing calibration data of a device interface in a test system, device interface, test system and computer program

Abstract

A test system for testing one or more devices under test is described, the test system comprising one or more channel modules and a device interface. At least a first portion of calibration data is stored in a non-volatile memory associated with the one or more channel modules, and at least a second portion of the calibration data is stored in a non-volatile memory associated with the device interface. A corresponding method and computer program are also described.

Description

Technical Field

[0001] An embodiment of the present invention relates to a method for storing calibration data of a device interface in a test system. The test system may also be referred to as automated test equipment.

[0002] Other embodiments according to the present invention relate to a test system including one or more channel modules and a device interface.

[0003] Other embodiments according to the present invention relate to a device interface for a test system.

[0004] Further exemplary embodiments according to the invention relate to corresponding computer programs.

[0005] An embodiment according to the present invention relates to storing calibration data for use with a test system in different parts. Background Art

[0006] The following is an introduction to some traditional solutions.

[0007] Automated test equipment (ATE) is any device that tests a device, called a device under test (DUT), using automation to quickly perform measurements and evaluate test results. ATE can range from a simple computer-controlled digital multimeter to a complex system containing dozens of sophisticated test instruments (real or simulated electronic test equipment) capable of automatically testing and diagnosing faults in complex electronic packages or wafers, including system-on-chips and integrated circuits. The DUT connects to the ATE via a DUT interface or a simple device interface.

[0008] Structural testing enables systematic test coverage of individual structures (so-called cells) that implement complex functionality of digital blocks within a system-on-chip (SOC). Structural testing encompasses a variety of test methods, including but not limited to memory built-in self-test (BIST), logic BIST (with patterns generated on the chip), and scan testing (with patterns provided externally). Individual tests are combined into test blocks: for example, scan testing is applied hierarchically to individual blocks (either serially or in parallel).

[0009] Advanced structural test methods use a combination of externally supplied test data (stimuli from automatic test equipment (ATE)) and on-chip devices under test (DFT) to expand the externally supplied test data (so-called seeds) into the scan chain. The test results are compacted and compressed into a smaller amount of test data and provided to the SoC's main input and output interfaces (IOs). This data is called received data and is compared with expected data by the ATE. The received data can also be masked by the ATE.

[0010] DFT, sometimes also called design for test or design for testability, typically consists of integrated circuit design techniques that add testability features to the hardware product design or device (DUT). The added features make it easier to develop tests and apply them to the DUT.

[0011] Scan testing will be described below as a general representation of the above-mentioned structural testing.

[0012] To obtain valid results from the device under test at the device interface, the device interface must be calibrated so that the separate transmission path from the signal generator SG to the device under test at the device interface does not cause additional, unnecessary changes in the test results of the device under test. In other words, the signal transmission path must be compensated to improve test results.

[0013] Figure 1 The figure shows the prior art details of the test system (particularly the transmission path), wherein the channel module 100 includes a signal generator SG 110 , which transmits a signal to the device under test on the DUT interface 130 via a transmission path, such as a cable 120 .

[0014] Although Figure 1 A test system is shown in which a channel module generates a signal to be sent to a device under test. Similarly, but not depicted, the transmission path from the device under test to the signal receiver on the channel module can be compensated in the test system in which the channel module receives data from the device under test.

[0015] Figure 2 The device interface 210, the test head 220 and the tester mainframe 230 are shown, which in an exemplary arrangement can constitute the entire test system. In the prior art, the complete calibration data is stored in, for example, the tester mainframe.

[0016] However, as the complexity of SoCs increases with new manufacturing processes, scaling scan test cost-effectively becomes challenging.

[0017] One challenge is the increasing amount of test data that needs to be stored on the ATE. Another challenge is the increasing test time required to feed test data through SoC IO. Furthermore, increasing on-chip complexity poses challenges in distributing test data to the blocks under test and creating the necessary clock signals.

[0018] Furthermore, quality and reliability expectations of complex SOCs require structural testing of the SOCs when they are deployed in end applications (eg, in automobiles or communication infrastructure systems).

[0019] Traditionally, calibration data only includes the propagation delay information of each transmission path. However, for recent high-speed interfaces, the transmission path frequency can exceed 5 GHz, and information about the frequency characteristics of the transmission path should also be included in the calibration information to compensate for losses along the transmission path.

[0020] In view of this situation, there is a need for a concept which provides an improved compromise between data to be stored, processing speed and quality and reliability of the test when testing a device under test with automated test equipment. Summary of the Invention

[0021] The present invention enables improved storage of calibration data, reduction of calibration time and enables improved testing of high-speed digital interfaces.

[0022] An embodiment of the present invention is a method for storing calibration data of a device interface in a test system. Such a system includes one or more channel modules and a device interface.

[0023] The method includes storing information of at least a first portion of calibration data on a nonvolatile memory associated with one or more channel modules and storing information of at least a second portion of calibration data on a nonvolatile memory associated with a device interface.

[0024] It has been found to be advantageous to separate the calibration data into two parts so that each of the components, channel modules, and device interfaces, which can be separated from one another, can be calibrated individually. Consequently, each component has its own calibration data that can be stored separately. Thus, for example, if a device interface is replaced, the resulting system does not need to be calibrated as a whole. Instead, the calibration data for each component is known in advance from factory calibration, and the calibration data for both components can be combined.

[0025] In a preferred embodiment, the method may further include storing information of at least a third portion of the calibration data on a non-volatile memory associated with an attachment positioned between the one or more channel modules and the device interface.

[0026] It has been found to be advantageous that in a test system where the attachment is located between the channel module and the device interface, which connects the device interface to the rest of the test system, the attachment is calibrated separately. Therefore, replacing the attachment does not require recalibrating the test system.

[0027] In a preferred embodiment of the method, the corresponding information of the first part, the second part and / or the third part of the calibration data can be the memory address and identification code of the associated one or more channel modules, devices and attachments, respectively, and the method also includes storing the calibration data in a storage device at the memory address.

[0028] It has been found to be advantageous that the non-volatile memory only stores the memory address as information of the calibration data, and the actual calibration data is stored in the storage device at this memory address. This allows the size of the non-volatile memory on each part to be reduced.

[0029] According to another embodiment of the present invention, a test system includes one or more channel modules and a device interface, wherein information of at least a first portion of calibration data is stored on a non-volatile memory associated with the one or more channel modules, and information of at least a second portion of the calibration data is stored on a non-volatile memory associated with the device interface.

[0030] According to another embodiment of the present invention, a device interface for a test system further includes one or more channel modules, wherein information of at least a first portion of calibration data is stored on a non-volatile memory associated with the one or more channel modules, and information of at least a second portion of the calibration data is stored on a non-volatile memory associated with the device interface.

[0031] In a preferred embodiment, the test system in the above two device embodiments may also include an attachment located between one or more channel modules and the device interface, wherein at least the information of the third part of the calibration data corresponding to the attachment is stored on a non-volatile memory associated with the attachment.

[0032] In a preferred embodiment, in the test system of the above two device embodiments, the corresponding information of the first part, the second part and / or the third part of the calibration data can be the memory address and identification code of the associated one or more channel modules, devices and attachments, and the calibration data can be stored in the storage device at the memory address.

[0033] As for these two apparatus embodiments, the same considerations apply to the method embodiments.

[0034] The following features apply to all of the above embodiments.

[0035] In a preferred embodiment, the first portion of the calibration data may be data corresponding to one or more channel modules, the second portion of the calibration data may be data corresponding to the device interface, and the third portion of the calibration data may be data corresponding to the attachment.

[0036] It has been found to be beneficial if each channel module and / or device interface and / or attachment is individually calibrated so that replacement does not require recalibration.

[0037] In a preferred embodiment, the device interface may be a high-speed digital interface.

[0038] As mentioned above, it has been found advantageous that the present invention is particularly useful for high speed interfaces, where the transmission path frequency can be well above 5 GHz.

[0039] In a preferred embodiment, the calibration data may contain information on the frequency characteristics of components used to transmit signals from one or more channel modules to the device.

[0040] It has been found to be beneficial to include frequency characteristics in the calibration data so that losses can be compensated.

[0041] In a preferred embodiment, the calibration data may comprise at least two filters, which filters describe the frequency characteristics.

[0042] It has been found to be advantageous if the frequency characteristic is contained in the calibration data in the form of a filter.

[0043] In a preferred embodiment, the first portion of the calibration data may be a first filter, the second portion of the calibration data may be a second filter, and the third portion of the calibration data may be a third filter.

[0044] It has been found to be advantageous that the filters may be different from one another so that the frequency characteristics can be stored more efficiently.

[0045] In a preferred embodiment, the filter may be a compensating filter.

[0046] It has been found useful that the filter is a compensation filter, thereby enabling the frequency characteristics to be more easily included in the calibration data.

[0047] In a preferred embodiment, the calibration data may comprise a transfer function describing the frequency characteristics.

[0048] It has been found that describing the frequency characteristics as a transfer function is beneficial for calibrating the efficiency of data storage.

[0049] In a preferred embodiment, the calibration data may include one or more of a tap coefficient of a digital filter, a Fourier series, and / or a two-port network model.

[0050] It has been found that the storage of the calibration data is beneficial if the calibration data comprises tap coefficients of a digital filter, a Fourier series and / or a two-port network model.

[0051] In a preferred embodiment, each calibration data may be unified by convolution for the time domain, multiplication for the frequency domain, and / or cascaded two-port networks for the two-port networks.

[0052] It has been found that storage efficiency of the calibration data is beneficial if the calibration data is unified, for example by convolution for the time domain, multiplication for the frequency domain and / or cascaded two-port networks for two-port networks.

[0053] In a preferred embodiment, the non-volatile memory associated with one or more channel modules may be located on the corresponding channel module. The non-volatile memory associated with the device interface may be located on the device interface. And / or, the non-volatile memory associated with the attachment may be located on the attachment.

[0054] It has been found to be advantageous if the non-volatile memory storing the calibration data of a part (ie a channel module, a device interface and / or an attachment) is located on the respective part.

[0055] In a preferred embodiment, any information may be stored in encrypted form.

[0056] It has been found to be beneficial to store the stored information in an encrypted form, thereby increasing security.

[0057] In a preferred embodiment, one or more channel modules may include a signal generator or a signal receiver.

[0058] It has been found to be advantageous if the signal generator and / or receiver for testing the test system is located on the channel module. The test can thereby be further optimized.

[0059] In a preferred embodiment, the device may be a calibration module for calibrating a test system.

[0060] It has been found to be beneficial to use a special calibration module (or calibration device) on the device interface. By such an arrangement, calibration of the channel module and the device interface can be facilitated.

[0061] All embodiments are based on the same considerations as the above-described method for storing calibration data. However, it should be noted that all embodiments can be supplemented by any of the features, functions, and details described herein, in particular the features described above. Furthermore, each embodiment can be supplemented by the features, functions, and details described herein, either individually or in combination.

[0062] Another embodiment according to the invention is a computer program for performing the method described herein when the computer program runs on a computer. BRIEF DESCRIPTION OF THE DRAWINGS

[0063] Hereinafter, embodiments according to the present invention will be described with reference to the accompanying drawings, in which:

[0064] Figure 1 A schematic diagram of an automated testing device according to the prior art is shown;

[0065] Figure 2 A schematic diagram of an automated testing device according to the prior art is shown;

[0066] Figure 3 A schematic block diagram showing an information structure according to an embodiment of the present invention;

[0067] Figure 4 A schematic block diagram of an automated testing device according to an embodiment of the present invention is shown;

[0068] Figure 5 A schematic block diagram showing an information structure according to another embodiment of the present invention;

[0069] Figure 6 A schematic block diagram of an automated testing device according to another embodiment of the present invention is shown;

[0070] Figure 7 A schematic block diagram showing an information structure according to another embodiment of the present invention;

[0071] Figure 8 shows a schematic block diagram of an automated testing device according to another embodiment of the present invention; and

[0072] Figure 9 A flow chart of a method according to an embodiment of the present invention is shown.

[0073] Throughout the drawings, like reference numbers represent like elements and features. DETAILED DESCRIPTION

[0074] In general, the automated test equipment or test system 400 , 600 , 800 according to embodiments of the present invention is used to test one or more devices under test (DUTs) connected to the test system via a device interface 420 .

[0075] For example, testing a device under test (DUT) involves providing test data to the DUT and receiving test results from it in various ways. Testing a device under test requires bidirectional data transfer between the test system and the DUT. Some of this data transfer occurs through the device interface.

[0076] Data can provide test data, test signals, or test programs for the DUT. Data can be data received by the test system, or a processed version thereof, meaning that the data provided to the DUT is based on that data. Alternatively, data can represent expected signals or expected results from the device under test, which are returned to the test system by the DUT after testing. Data can also be desired data or data that needs to be processed in the test system, meaning that the desired data is based on data received by the test system.

[0077] Any combination of the above is also possible, as the data provided to one or more DUTs can be a combination of the options detailed above.

[0078] Figure 3FIG. 3 is a schematic block diagram of an information structure 300 according to an embodiment of the present invention. It represents information of calibration data. Figure 3 In the embodiment, it consists of two parts, namely a first part 310 and a second part 320.

[0079] Figure 4 1 shows a schematic block diagram of an automated test device or test system 400 according to an embodiment of the present invention. Test system 400 includes one or more channel modules 410 and a device interface 420. Device interface 420 is used to connect to a device, which is a device under test being tested by test system 400. Alternatively, the device interface can be used to connect to a calibration module (not shown) for calibration.

[0080] The test system may include multiple channel modules 410, although only one is depicted in the figure. Those skilled in the art can also easily apply the present invention to other channel modules.

[0081] The first portion 310 of the calibration data 300 is stored on the non-volatile memory 430. As will be discussed later, the non-volatile memory may be located on different portions. Figure 4 4, it is located on the device interface. It may be conveniently located on one or more of the channel modules 410 and the later introduced attachment 470 (if present). Non-volatile memory 430 is associated with one or more channel modules 410. In addition, the second portion 320 of calibration data 300 is stored on non-volatile memory 430 associated with the device under test interface 420.

[0082] The first portion 310 of the calibration data may be data corresponding to one or more channel modules 410. This means that the first portion describes calibration information related to the corresponding channel modules. The second portion 320 of the calibration data may be data corresponding to the device under test interface 420. This means that the second portion describes calibration information related to the device interface.

[0083] The device under test interface 420 may be a high-speed digital interface for a device under test having high-speed capabilities.

[0084] The calibration data may also contain information on the frequency characteristics of the components used to transmit signals from one or more channel modules 410 to the device under test. Obviously, the present invention is similarly applicable in the other direction, i.e., to signals transmitted from the device under test to the channel module 410. In the first case, the channel module may include a signal generator 460, such as Figure 4 and 6 As can be seen, in the second case, the channel module 410 may include a signal receiver 465, such as Figure 8Although the various figures show different arrangements of embodiments of the present invention, the channel module 410 may include the signal generator 460 and / or the signal receiver 465 in any combination of features, ie, in any embodiment.

[0085] The calibration data may include at least two filters that describe frequency characteristics, where, for example, the first portion 310 of the calibration data is a first filter and the second portion 320 of the calibration data is a second filter, although the first and second portions may be the same filter, if applicable.

[0086] For example, the first filter only includes information related to channel modules, while the second filter only includes information about device interfaces. The required information, i.e., calibration data, can be measured at a factory where the channel modules, device interfaces, i.e., the test system, are manufactured and then shipped to the customer.

[0087] For example, each component can be measured by a device such as a network analyzer or an oscilloscope, and the obtained frequency response can be converted into appropriate parameters and stored in the corresponding non-volatile memory. This means that the calibration data is initially separate data belonging to each component.

[0088] As one possibility, the filter may be a so-called compensation filter. The calibration data may further include a transfer function that describes the frequency characteristics of the various components of test system 400. As a further example, the calibration data may include tap coefficients of a digital filter, a Fourier series, and / or a two-port network model. All of these are used to describe calibration information for the various components of test system 400.

[0089] The calibration data or parts thereof may also be unified. For example, the unification may be based on convolution in the time domain, multiplication in the frequency domain and / or cascaded two-port networks.

[0090] In summary, if Figure 3 As shown, the calibration data 300 is divided into two parts. The first part 310 of the calibration data may be, for example, a compensation filter corresponding to, for example, a channel module 410. This may also include Figure 4 、 6 and the cable shown in 8. The second portion 320 of the calibration data may be, for example, a compensation filter corresponding to, for example, the device interface 420.

[0091] Typically, part of the calibration data, ie, a filter for example, is a description of the frequency characteristics of components constituting one or more signal paths from the signal generator 460 to the device under test or from the device under test to the signal receiver 465, as shown below.

[0092] The frequency characteristics can be stored in the form of transfer functions rather than compensation filters because they are mathematically equivalent but reciprocal information.

[0093] This information may be in the form of tap coefficients of a digital filter, a Fourier series, and / or a two-port network model.

[0094] Each data part, such as a filter, can be unified by performing convolution if the filter is described in the time domain, multiplication if the filter is described in the frequency domain, or cascading two-port networks if the filter is described as a two-port network.

[0095] For example, information of the second part 320 of the calibration data, ie, for example, the filter, is stored in a non-volatile memory 430 on the device interface, e.g. Figure 4 shown.

[0096] Figure 6 FIG. 1 shows a schematic block diagram of an automated test device according to another embodiment of the present invention. Figure 6 In FIG, further non-volatile memories 430, 440 and 450 can be seen. What is described for test system 400 generally applies to test system 600. Figure 6 6. It is thus shown that each part of the test system 600, ie the channel module 410, the device interface 420 and the attachment 470, can respectively include its own non-volatile memory 430, 440 and 450. Thus, the corresponding calibration data can be stored on the actual part of the test system to which it belongs.

[0097] correspond Figure 5 A schematic block diagram showing an information structure according to another embodiment of the present invention is shown.

[0098] like Figure 5 As shown, the calibration data can be divided into more than two parts. For example, they can be divided into three parts, corresponding to the device interface 420, the attachment 470 and the channel module 410 respectively.

[0099] In this embodiment, it is shown that the non-volatile memory 440 associated with one or more channel modules 410 can be located on the corresponding channel module. The non-volatile memory 430 associated with the device under test interface 420 can be located on the device interface.

[0100] The test system 600 can further include an attachment 470 that can be located between one or more channel modules 410 and the device interface 420. The calibration data can then include a third portion 330 of calibration data that corresponds to the attachment. This third portion 330 can then be stored in the non-volatile memory 430, 440, 450 associated with the attachment. Again, this non-volatile memory can be located on the attachment 470 itself, but can also be located on one or more of the channel modules 410 or the device interface 420.

[0101] Figure 7 shows a schematic block diagram of an information structure according to another embodiment of the present invention, Figure 8 A schematic block diagram of an automated testing device according to another embodiment of the present invention is shown.

[0102] In this embodiment, it is shown that in the test system 800, one or more channel modules 410 may include not only a signal generator 460, such as Figure 4 and 6 As shown, a signal receiver (RX) 465 may also be included. As previously mentioned, in each embodiment of the present invention, a combination of these (ie, generator 460 and receiver 465) is possible.

[0103] Thus, the present invention is also applicable to receiver signal paths where one or more of the channel modules 410 include a signal receiver 465 .

[0104] Furthermore, not shown, the device may be a calibration module for calibrating the test systems 400, 600, 800. Therefore, the present invention is also applicable to the case where the device under test is replaced by a calibration module for calibrating the test system itself.

[0105] Note further that, similarly for all embodiments, the corresponding information of the first portion 310, the second portion 320, and / or the third portion 330 of the calibration data may also simply refer to the memory address and identification code of the associated device. Again, the associated device is one or more channel modules 410, device interfaces 420, or attachments 470.

[0106] The calibration data can then be stored in a memory device at the memory address. The memory device can be located in the tester mainframe, or any other accessible memory location. The memory location can be accessed via a wired or wireless connection using one of the known techniques.

[0107] The memory address describes the actual location of the calibration data. Since only the address is thus stored in the respective non-volatile memory (one of 430, 440 and 450), the memory size can be reduced.

[0108] The memory whose address is stored in the non-volatile memory (one of 430, 440 and 450) can be part of or connected to the test system or tester host. If it is connected to the test system or tester host, such connection can be achieved through any wired or wireless data connection.

[0109] In other words, the nonvolatile memory (one of 430 , 440 , and 450 ) may have only identification information (ID), and the information portion (eg, filter information) may be stored in other storage space such as an external server through a network.

[0110] One embodiment directly and solely relates to the device interface 420 described above, which is a separate part of the test system and thus can contain its own calibration data. However, it is noted that the device interface 420 can also be modified by the points and aspects described herein. These can also be used alone or in combination and can be incorporated into the device interface 420 described herein, alone or in combination.

[0111] Figure 9 A flow chart of a method according to an embodiment of the present invention is shown.

[0112] Method 900 is a method for storing calibration data for a device interface in the test systems 400, 600, and 800 described above. The method includes storing 910 at least a first portion of the calibration data in a non-volatile memory associated with one or more channel modules, and storing 920 at least a second portion of the calibration data in a non-volatile memory associated with the device interface.

[0113] A further optional step of method 900 is Figure 9 Indicated by dotted line.

[0114] If the test system 400 , 600 , 800 includes the attachment 470 , the method 900 may further include storing 930 information of at least a third portion of the calibration data corresponding to the attachment on a non-volatile memory associated with the attachment.

[0115] Furthermore, as with all possible embodiments, the stored information may be encrypted.

[0116] In addition, when the corresponding information of the first part, the second part and / or the third part of the calibration data is the memory address and identification code of the associated one or more channel modules, device interfaces and attachments, respectively, the method 900 may further include storing 940 the calibration data in a storage device at the memory address.

[0117] The method is based on the same considerations as the test system described above. However, it should be noted that the method can be supplemented by any of the features, functions, and details described herein that are also related to the test system. Furthermore, the method can be supplemented by the features, functions, and details of the test system, either individually or in combination.

[0118] According to an embodiment of the present invention, a computer program is created for performing the method described herein when the computer program runs on a computer.

[0119] Using the present invention, calibration data, i.e., filter information, can be contained within the components themselves. This feature improves the portability of calibration data. Furthermore, the overall data, i.e., filter data, can be generated with relatively little computational effort. Finally, the test system and any of its components do not need to be recalibrated when a component is changed.

[0120] in conclusion

[0121] In short, the embodiments described herein may optionally be supplemented by any key points or aspects described herein. However, it should be noted that the key points and aspects described herein may be used alone or in combination, and may be introduced into any embodiment described herein, both alone and in combination.

[0122] Implementing alternatives

[0123] Although some aspects have been described in the context of devices, it is clear that these aspects also represent descriptions of corresponding methods, where blocks or devices correspond to method steps or features of method steps. Similarly, aspects described in the context of method steps also represent descriptions of corresponding blocks or items or features of corresponding devices. Some or all of the method steps can be performed by (or using) hardware devices, such as microprocessors, programmable computers, or electronic circuits. In some embodiments, one or more of the most important method steps can be performed by such devices.

[0124] Depending on certain implementation requirements, embodiments of the present invention may be implemented in hardware or software. The implementation may be performed using a digital storage medium having electronically readable control signals stored thereon, such as a floppy disk, DVD, Blu-ray, CD, ROM, PROM, EPROM, EEPROM, or flash memory, which cooperates (or is capable of cooperating) with a programmable computer system to perform the corresponding method. Thus, the digital storage medium may be computer-readable.

[0125] Some embodiments according to the invention comprise a data carrier having electronically readable control signals, which are capable of cooperating with a programmable computer system, such that one of the methods described herein is performed.

[0126] Generally, embodiments of the present invention can be implemented as a computer program product with a program code, the program code being operative for performing one of the methods when the computer program product runs on a computer.The program code may, for example, be stored on a machine-readable carrier.

[0127] Other embodiments comprise the computer program for performing one of the methods described herein, stored on a machine readable carrier.

[0128] In other words, an embodiment of the inventive method is, therefore, a computer program having a program code for performing one of the methods described herein, when the computer program runs on a computer.

[0129] A further embodiment of the inventive method is therefore a data carrier (or a digital storage medium, or a computer-readable medium) comprising, recorded thereon, the computer program for performing one of the methods described herein. The data carrier, the digital storage medium, or the recorded medium is typically tangible and / or non-transitory.

[0130] A further embodiment of the inventive method is, therefore, a data stream or a sequence of signals representing the computer program for performing one of the methods described herein.The data stream or the sequence of signals may, for example, be configured to be transmitted via a data communication connection, for example via the Internet.

[0131] A further embodiment comprises a processing means, for example a computer or a programmable logic device, configured to or adapted to perform one of the methods described herein.

[0132] A further embodiment comprises a computer having installed thereon the computer program for performing one of the methods described herein.

[0133] Another embodiment according to the present invention includes an apparatus or system configured to transmit (e.g., electronically or optically) a computer program for performing one of the methods described herein to a receiver. For example, the receiver may be a computer, a mobile device, a storage device, etc. For example, the apparatus or system may include a file server for transmitting the computer program to the receiver.

[0134] In some embodiments, a programmable logic device (e.g., a field programmable gate array) can be used to perform some or all of the functions of the methods described herein. In some embodiments, the field programmable gate array can collaborate with a microprocessor to perform one of the methods described herein. Typically, these methods are preferably performed by any hardware device.

[0135] The apparatus described herein may be implemented using hardware devices, or using computers, or using a combination of hardware devices and computers.

[0136] The apparatus described herein or any component of an apparatus described herein may be implemented at least partially in hardware and / or software.

[0137] The methods described herein may be performed using hardware devices, or using computers, or using a combination of hardware devices and computers.

[0138] Any component of a method described herein or an apparatus described herein may be performed at least in part by hardware and / or software.

[0139] The above embodiments are intended to illustrate the principles of the present invention only. It should be understood that modifications and variations of the arrangements and details described herein will be apparent to those skilled in the art. Accordingly, it is intended that the present invention be limited only by the scope of the appended patent claims and not by the specific details presented in the description and explanation of the embodiments herein.

Claims

1. A method (900) for storing calibration data of a device interface in a test system, the test system comprising one or more channel modules and a device interface, the method comprising: storing (910) information of at least a first portion of the calibration data on a non-volatile memory associated with the one or more channel modules, and storing (920) information of at least a second portion of the calibration data on a non-volatile memory associated with the device interface, The calibration data includes at least two filters, and the filters describe frequency characteristics.

2. The method according to claim 1, wherein The first portion of the calibration data is data corresponding to the one or more channel modules.

3. The method according to any one of claims 1 to 2, wherein The second portion of the calibration data is data corresponding to the device interface.

4. The method according to any one of claims 1 to 2, wherein The device interface is a high-speed digital interface.

5. The method according to any one of claims 1 to 2, wherein The calibration data contains information about frequency characteristics of components used to transmit signals from the one or more channel modules to a device connected to the test system.

6. The method according to any one of claims 1 to 2, wherein The first portion of the calibration data is a first filter, and the second portion of the calibration data is a second filter.

7. The method according to any one of claims 1 to 2, wherein The filter is a compensating filter.

8. The method according to any one of claims 1 to 2, wherein The calibration data includes a transfer function, which describes the frequency characteristics.

9. The method according to any one of claims 1 to 2, wherein: The calibration data includes one or more of the following: The tap coefficients of the digital filter, Fourier series, and / or Two-port network model.

10. The method according to any one of claims 1 to 2, wherein: Each calibration data is unified in the following way: For convolution in the time domain, For frequency domain multiplication, and / or Cascaded two-port networks for two-port networks.

11. The method according to any one of claims 1 to 2, wherein: The non-volatile memory associated with the one or more channel modules is on the corresponding channel module.

12. The method according to any one of claims 1 to 2, wherein: The non-volatile memory associated with the device interface is on the device interface.

13. The method according to any one of claims 1 to 2, further comprising At least a third portion of the calibration data corresponding to the attachment is stored (930) in a non-volatile memory associated with the attachment, the attachment being located between the one or more channel modules and the device interface.

14. The method according to claim 13, wherein The non-volatile memory associated with the attachment is on the attachment.

15. The method according to any one of claims 1 to 2, wherein: Any information stored is encrypted information.

16. The method according to any one of claims 1 to 2, wherein: The one or more channel modules include a signal generator or a signal receiver.

17. The method according to claim 5, wherein The device is a calibration module for calibrating the test system.

18. The method according to claim 13, wherein The corresponding information of the first part, the second part and / or the third part of the calibration data are the memory addresses and identification codes of the associated one or more channel modules, the device interface and the attachment, respectively, and wherein the method further includes storing (940) the calibration data in a storage device at the memory address.

19. A computer program for a processing device, comprising software code portions for performing the steps of any one of claims 1 to 18 when said program is run on said processing device.

20. The computer program according to claim 19, comprising a computer readable medium having the software code portions stored thereon, wherein The program can be loaded directly into the internal memory of the processing device.

21. A test system (400, 600, 800), comprising one or more channel modules (410) and a device interface (420), wherein: Information of at least a first portion (310) of the calibration data (300) is stored on a non-volatile memory (440) associated with the one or more channel modules (410), and At least information of a second portion (320) of the calibration data (300) is stored on a non-volatile memory (430) associated with the device interface (420), The calibration data includes at least two filters, and the filters describe frequency characteristics.

22. The test system (400, 600, 800) according to claim 21, wherein: The first portion (310) of the calibration data is data corresponding to the one or more channel modules (410).

23. The test system (400, 600, 800) according to any one of claims 21 to 22, wherein: The second portion (320) of the calibration data is data corresponding to the device interface (420).

24. The test system (400, 600, 800) according to any one of claims 21 to 22, wherein: The device interface (420) is a high-speed digital interface.

25. The test system (400, 600, 800) according to any one of claims 21 to 22, wherein: The calibration data contains information on frequency characteristics of components used to transmit signals from the one or more channel modules (410) to equipment connected to the test system.

26. The test system (400, 600, 800) according to any one of claims 21 to 22, wherein: The first portion (310) of the calibration data is a first filter, and the second portion (320) of the calibration data is a second filter.

27. The test system (400, 600, 800) according to any one of claims 21 to 22, wherein: The filter is a compensating filter.

28. The test system (400, 600, 800) according to any one of claims 21 to 22, wherein: The calibration data includes a transfer function, which describes the frequency characteristics.

29. The test system (400, 600, 800) according to any one of claims 21 to 22, wherein: The calibration data includes one or more of the following: The tap coefficients of the digital filter, Fourier series, and / or Two-port network model.

30. The test system (400, 600, 800) according to any one of claims 21 to 22, wherein each calibration data is unified by: For convolution in the time domain, Multiplication in the frequency domain, and / or Cascaded two-port networks for two-port networks.

31. The test system (400, 600, 800) according to any one of claims 21 to 22, wherein: The non-volatile memory (440) associated with the one or more channel modules (410) is on the corresponding channel module (410).

32. The test system (400, 600, 800) according to any one of claims 21 to 22, wherein: The non-volatile memory (430) associated with the device interface (420) is on the device interface (420).

33. The test system (400, 600, 800) according to any one of claims 21 to 22, further comprising an attachment (470) between the one or more channel modules (410) and the device interface (420), wherein At least information of a third portion (330) of the calibration data corresponding to the attachment is stored on a non-volatile memory (430, 440, 450) associated with the attachment (470).

34. The test system (400, 600, 800) according to claim 33, wherein: The non-volatile memory (450) associated with the attachment is on the attachment (470).

35. The test system (400, 600, 800) according to any one of claims 21 to 22, wherein Any information stored is encrypted.

36. The test system (400, 600, 800) according to any one of claims 21 to 22, wherein: The one or more channel modules (410) include a signal generator (460) or a signal receiver (465).

37. The test system (400, 600, 800) of claim 25, wherein: The device is a calibration module for calibrating the test system (400, 600, 800).

38. The test system (400, 600, 800) of claim 33, wherein: The corresponding information of the first part (310), the second part (320) and / or the third part (330) of the calibration data are the memory addresses and identification codes of the associated one or more channel modules (410), the device interface (420) and the attachment (470), respectively, and wherein the calibration data is stored in a storage device at the memory address.

39. A device interface (420) for a test system (400, 600, 800), the test system (400, 600, 800) further comprising one or more channel modules, wherein: Information of at least a first portion (310) of the calibration data (300) is stored on a non-volatile memory (440) associated with the one or more channel modules (410); At least information of a second portion (320) of the calibration data (300) is stored on a non-volatile memory (430) associated with the device interface (420), The calibration data includes at least two filters, and the filters describe frequency characteristics.

40. The device interface (420) of claim 39, wherein: The first portion (310) of the calibration data is data corresponding to the one or more channel modules (410).

41. The device interface (420) according to any one of claims 39 to 40, wherein The second portion (320) of the calibration data is data corresponding to the device interface (420).

42. The device interface (420) according to any one of claims 39 to 40, wherein The device interface (420) is a high-speed digital interface.

43. The device interface (420) according to any one of claims 39 to 40, wherein The calibration data contains information on frequency characteristics of components used to transmit signals from the one or more channel modules (410) to equipment connected to the test system.

44. The device interface (420) according to any one of claims 39 to 40, wherein The first portion (310) of the calibration data is a first filter, and the second portion (320) of the calibration data is a second filter.

45. The device interface (420) according to any one of claims 39 to 40, wherein The filter is a compensating filter.

46. The device interface (420) according to any one of claims 39 to 40, wherein The calibration data includes a transfer function, which describes the frequency characteristics.

47. The device interface (420) according to any one of claims 39 to 40, wherein The calibration data includes one or more of the following: The tap coefficients of the digital filter, Fourier series, and / or Two-port network model.

48. The device interface (420) according to any one of claims 39 to 40, wherein Each calibration data is unified in the following way: For convolution in the time domain, Multiplication in the frequency domain, and / or Cascaded two-port networks for two-port networks.

49. The device interface (420) according to any one of claims 39 to 40, wherein The non-volatile memory (430) associated with the device interface (420) is on the device interface (420).

50. The device interface (420) of any one of claims 39 to 40, the test system (400, 600, 800) further comprising an attachment (470) between the one or more channel modules (410) and the device interface (420), wherein At least information of a third portion (330) of the calibration data corresponding to the attachment is stored on a non-volatile memory (430, 450) associated with the attachment (470).

51. The device interface (420) of claim 50, wherein: The non-volatile memory (450) associated with the attachment is on the attachment (470).

52. The device interface (420) according to any one of claims 39 to 40, wherein Any information stored is encrypted.

53. The device interface (420) of claim 43, wherein: The device is a calibration module for calibrating the test system (400, 600, 800).

54. The device interface (420) of claim 50, wherein: The corresponding information of the first part (310), the second part (320) and / or the third part (330) of the calibration data are the memory addresses and identification codes of the associated one or more channel modules (410), the device interface (420) and the attachment (470), respectively, and wherein the calibration data is stored in a storage device at the memory address.

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