A wideband transimpedance amplifier based on double-loop capacitance positive feedback

Abstract

The application discloses a kind of wideband transimpedance amplifiers based on double loop capacitance positive feedback, including first input capacitor C in1 , second input capacitor C in2 , first fully differential amplifier A1, second fully differential amplifier A2, first feedback resistance R F1 , second feedback resistance R F2 , first feedback capacitor loop, second feedback capacitor loop.A kind of wideband transimpedance amplifiers based on double loop capacitance positive feedback provided by the application, only by introducing two feedback capacitor loop can improve the bandwidth of transimpedance amplifier and its core amplifier, also can increase transimpedance gain without changing the bandwidth of transimpedance amplifier, and reduce its noise.The application does not increase the static power consumption of circuit, also does not need to use inductance, is conducive to reduce the power consumption of wideband optical receiving circuit and save chip area.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of optical signal receiving circuit, more particularly, to a wideband transimpedance amplifier based on double-loop capacitance positive feedback. BACKGROUND

[0002] The optical receiver refers to a circuit for converting optical signal into electrical signal, and the front end of the optical receiver circuit is a photodiode. The photodiode converts the optical signal into current signal, and the transimpedance amplifier converts the current signal into output voltage. In the existing transimpedance amplifier, the transimpedance amplifier based on parallel negative feedback structure is widely used due to its good performance. Figure 1 The transimpedance amplifier based on parallel negative feedback structure is shown in the figure, A represents the core gain amplifier of the transimpedance amplifier, R F represents the feedback resistance of the transimpedance amplifier, and C in represents the equivalent input capacitance of the transimpedance amplifier (mainly from the parasitic capacitance of the photodiode). The bandwidth of the transimpedance amplifier based on parallel negative feedback structure is often limited by the parasitic capacitance of the photodiode. For a larger photodiode parasitic capacitance, there are several methods to realize a wideband transimpedance amplifier. First, the transimpedance gain of the transimpedance amplifier can be limited to achieve the required bandwidth. However, limiting the transimpedance gain will reduce the noise performance of the transimpedance amplifier. Second, various forms of inductive peaking technology can be introduced to offset the adverse effects of the larger photodiode parasitic capacitance. However, on-chip inductors will occupy a large chip area; if a bonding wire is used as an inductor, the inductance value is prone to large deviations, which is not conducive to practical application. Finally, a negative capacitance can be generated at the input end of the transimpedance amplifier to offset part of the parasitic capacitance of the photodiode, and one of the possible implementation methods is to introduce a positive feedback capacitor in the transimpedance amplifier. However, simply generating a negative capacitance to offset part of the input capacitance to improve the bandwidth of the transimpedance amplifier will deteriorate the stability of the transimpedance amplifier, because although the main pole of the transimpedance amplifier is improved, the secondary pole is not improved accordingly. SUMMARY

[0003] The present application provides a wideband transimpedance amplifier based on double-loop capacitance positive feedback to solve the problems of the prior art, which can improve the bandwidth of the transimpedance amplifier and its core amplifier, increase the transimpedance gain without changing the bandwidth of the transimpedance amplifier, and reduce the noise.

[0004] To achieve the above-mentioned purposes of the present application, the technical solutions adopted are as follows:

[0005] A kind of wideband transimpedance amplifier based on double-loop capacitance positive feedback, comprising first input capacitor, second input capacitor, first fully differential amplifier, second fully differential amplifier, first feedback resistance, second feedback resistance, first feedback capacitor loop, second feedback capacitor loop;

[0006] The positive output end of the first fully differential amplifier is electrically connected with the negative input end of the second fully differential amplifier;

[0007] The negative output end of the first fully differential amplifier is electrically connected with the positive input end of the second fully differential amplifier;

[0008] One end of the first input capacitor is electrically connected with the positive input end of the first fully differential amplifier, and the other end of the first input capacitor is connected with alternating current ground;

[0009] The second input capacitor is electrically connected with the negative input end of the first fully differential amplifier, and the other end of the second input capacitor is connected with alternating current ground;

[0010] One end of the first feedback resistance is electrically connected with the positive input end of the first fully differential amplifier, and the other end of the first feedback resistance is electrically connected with the positive output end of the second fully differential amplifier;

[0011] One end of the second feedback resistance is electrically connected with the negative input end of the first fully differential amplifier, and the other end of the first feedback resistance is electrically connected with the negative output end of the second fully differential amplifier;

[0012] One end of the first feedback capacitor loop is electrically connected with one electrode input end of the first fully differential amplifier;The other end of the first feedback capacitor loop and the opposite electrode output end of the second fully differential amplifier and first fully differential amplifier one electrode input end are electrically connected, and the first feedback capacitor loop comprises first feedback capacitor, fourth feedback capacitor;

[0013] Wherein one end of the first feedback capacitor is electrically connected with the positive input end of the first fully differential amplifier, and the other end of the first feedback capacitor is electrically connected with the negative output end of the second fully differential amplifier;

[0014] One end of the fourth feedback capacitor is electrically connected with the negative input end of the first fully differential amplifier, and the other end of the fourth feedback capacitor is electrically connected with the positive output end of the second fully differential amplifier;

[0015] One end of the second feedback capacitor loop is electrically connected to an electrode input end of the second full differential amplifier; the other end of the second feedback capacitor loop is electrically connected to the same electrode output end as the electrode input end of the second full differential amplifier, and the second feedback capacitor loop comprises a second feedback capacitor and a third feedback capacitor;

[0016] One end of the second feedback capacitor is electrically connected to the positive electrode input end of the second full differential amplifier, and the other end of the second feedback capacitor is electrically connected to the positive electrode output end of the second full differential amplifier.

[0017] One end of the third feedback capacitor is electrically connected to the negative electrode input end of the second full differential amplifier, and the other end of the third feedback capacitor is electrically connected to the negative electrode output end of the second full differential amplifier.

[0018] Preferably, the capacitance value of the first input capacitor is equal to the capacitance value of the second input capacitor.

[0019] The resistance value of the first feedback resistor is equal to the resistance value of the second feedback resistor.

[0020] Further, the capacitance value of the first feedback capacitor is equal to the capacitance value of the fourth feedback capacitor.

[0021] Further, the capacitance value of the second feedback capacitor is equal to the capacitance value of the third feedback capacitor.

[0022] Preferably, the positive electrode input end of the first full differential amplifier serves as the positive input end of the current signal; and the negative electrode input end of the first full differential amplifier serves as the negative input end of the current signal.

[0023] Further, the positive electrode output end of the second full differential amplifier and the negative electrode output end of the second full differential amplifier A2 serve as output ends to output a voltage.

[0024] Still further, the feedback loops respectively formed by the first feedback capacitor and the fourth feedback capacitor are used to increase the frequency of the main pole of the transimpedance amplifier, so as to increase the bandwidth of the transimpedance amplifier.

[0025] The increased bandwidth of the transimpedance amplifier is calculated as follows:

[0026] (3)

[0027] In the formula, A1 represents the gain of the first full differential amplifier, A2 represents the gain of the second full differential amplifier, R F =R F1 =R F2 represents the resistance value of the first feedback resistor and the second feedback resistor, represents the equivalent capacitance before the input end is connected to the first feedback capacitance and the fourth feedback capacitance; represents the equivalent capacitance after the input end is connected to the first feedback capacitance and the fourth feedback capacitance, wherein ;

[0028] When A1A2>>1, the bandwidth of the transimpedance amplifier will increase under the action of the first feedback capacitance and the fourth feedback capacitance.

[0029] Further, the feedback loops formed by the second feedback capacitance and the third feedback capacitance are used to increase the frequency of the transimpedance amplifier secondary pole, thereby improving the stability of the transimpedance amplifier.

[0030] The secondary pole frequency of the transimpedance amplifier is calculated as follows:

[0031] (6)

[0032] wherein, is the equivalent resistance at node A or B; represents the equivalent capacitance of the transimpedance amplifier secondary pole before the second feedback capacitance and the third feedback capacitance are connected, and the equivalent capacitance of the transimpedance amplifier secondary pole after the second feedback capacitance and the third feedback capacitance are connected is:

[0033] (4)

[0034] Therefore, when A2>>1, the equivalent capacitance of the transimpedance amplifier secondary pole decreases, the secondary pole frequency increases, thereby improving the stability of the transimpedance amplifier.

[0035] The beneficial effects of the present application are as follows:

[0036] The wideband transimpedance amplifier based on double-loop capacitance positive feedback provided by the present application can improve the bandwidth of the transimpedance amplifier and its core amplifier by introducing only two feedback capacitance loops, can also increase the transimpedance gain without changing the bandwidth of the transimpedance amplifier, and can reduce the noise. The present application neither increases the static power consumption of the circuit nor needs to use inductance, which is conducive to reducing the power consumption of the wideband optical receiving circuit and saving chip area. BRIEF DESCRIPTION OF DRAWINGS

[0037] Figure 1 is a classical transimpedance amplifier based on parallel negative feedback structure in the prior art.

[0038] Figure 2 is a circuit diagram of the wideband transimpedance amplifier provided by embodiment 1.

[0039] Figure 3 is a comparison of the core amplifier gain amplitude frequency response curves of the wideband transimpedance amplifier provided by the present application.

[0040] Figure 4 Figure 1 is a gain versus frequency response curve comparison of a wideband transimpedance amplifier provided by the present application.

[0041] Figure 5 Figure 2 is a gain versus frequency response curve comparison 2 of a wideband transimpedance amplifier provided by the present application.

[0042] Figure 6 Figure 3 is a transient response curve comparison of a wideband transimpedance amplifier provided by the present application.

[0043] Figure 7 Figure 4 is an equivalent input current noise comparison of a wideband transimpedance amplifier provided by the present application.

[0044] Figure 8 Figure 5 is a circuit diagram of a wideband transimpedance amplifier provided by Example 2. DETAILED DESCRIPTION

[0045] The present application will be described in detail below with reference to the accompanying drawings and specific embodiments.

[0046] Example 1

[0047] The wideband transimpedance amplifier based on double-loop capacitance positive feedback provided by the present embodiment can be applied to the technical field of optical signal receiving circuits including but not limited to optical fiber communication, wireless optical communication, laser communication, visible light communication, laser radar, etc.

[0048] As shown in Figure 2 , a wideband transimpedance amplifier based on double-loop capacitance positive feedback includes a first input capacitor C in1 , a second input capacitor C in2 , a first fully differential amplifier A1, a second fully differential amplifier A2, a first feedback resistor R F1 , a second feedback resistor R F2 , a first feedback capacitance loop, and a second feedback capacitance loop.

[0049] The positive output end of the first fully differential amplifier A1 is electrically connected to the negative input end of the second fully differential amplifier A2.

[0050] The negative output end of the first fully differential amplifier A1 is electrically connected to the positive input end of the second fully differential amplifier A2.

[0051] One end of the first input capacitor C in1 is electrically connected to the positive input end of the first fully differential amplifier A1, and the other end of the first input capacitor C in1 is connected to an alternating current ground.

[0052] One end of the second input capacitor C in2The other end of the second input capacitor C in2 is connected to an alternating current ground.

[0053] One end of the first feedback resistor R F1 is connected to the positive input terminal of the first fully differential amplifier A1, and the other end of the first feedback resistor R F1 is connected to the positive output terminal of the second fully differential amplifier A2.

[0054] One end of the second feedback resistor R F2 is connected to the negative input terminal of the first fully differential amplifier A1, and the other end of the second feedback resistor R F1 is connected to the negative output terminal of the second fully differential amplifier A2.

[0055] One end of the first feedback capacitor loop is connected to an electrode input terminal of the first fully differential amplifier A1, and the other end of the first feedback capacitor loop is connected to an opposite electrode output terminal of the first fully differential amplifier A1 and the second fully differential amplifier A2.

[0056] One end of the second feedback capacitor loop is connected to an electrode input terminal of the second fully differential amplifier A2, and the other end of the second feedback capacitor loop is connected to the same electrode output terminal of the second fully differential amplifier A2.

[0057] In a specific embodiment, the positive input terminal of the first fully differential amplifier A1 serves as a positive input terminal of a current signal, and the negative input terminal of the first fully differential amplifier A1 serves as a negative input terminal of the current signal.

[0058] In a specific embodiment, the positive output terminal of the second fully differential amplifier A2 and the negative output terminal of the second fully differential amplifier A2 serve as output terminals to output a voltage.

[0059] In a specific embodiment, the first feedback capacitor loop includes a first feedback capacitor C F1 and a fourth feedback capacitor C F4 .

[0060] One end of the first feedback capacitor C F1 is connected to the positive input terminal of the first fully differential amplifier A1, and the other end of the first feedback capacitor C F1 is connected to the negative output terminal of the second fully differential amplifier A2.

[0061] The fourth feedback capacitor C F4one end of the fourth feedback capacitor C F4 is electrically connected to the positive output end of the second full differential amplifier A2.

[0062] In a specific embodiment, the second feedback capacitor loop comprises a second feedback capacitor C F2 , a third feedback capacitor C F3 ;

[0063] One end of the second feedback capacitor C F2 is electrically connected to the positive input end of the second full differential amplifier A2, and the other end of the second feedback capacitor C F2 is electrically connected to the positive output end of the second full differential amplifier A2.

[0064] One end of the third feedback capacitor C F3 is electrically connected to the negative input end of the second full differential amplifier A2, and the other end of the third feedback capacitor C F3 is electrically connected to the negative output end of the second full differential amplifier A2.

[0065] In a specific embodiment, the capacitance value of the first input capacitor C in1 is equal to the capacitance value of the second input capacitor C in2 ;

[0066] The resistance value of the first feedback resistor R F1 is equal to the resistance value of the second feedback resistor R F2 .

[0067] The capacitance value of the first feedback capacitor C F1 is equal to the capacitance value of the fourth feedback capacitor C F4 .

[0068] The capacitance value of the second feedback capacitor C F2 is equal to the capacitance value of the third feedback capacitor C F3 .

[0069] In a specific embodiment, the first feedback capacitor C F1 , the fourth feedback capacitor C F4 respectively constitute a feedback loop for increasing the frequency of the main pole of the transimpedance amplifier, thereby increasing the bandwidth of the transimpedance amplifier. The specific analysis is as follows.

[0070] In order to increase the bandwidth of the transimpedance amplifier, the first feedback capacitor C F1 and the fourth feedback capacitor C F4The feedback loops formed by the first feedback capacitor C becomes

[0071] (1)

[0072] wherein, represents the equivalent capacitance before the input terminal is connected to the first feedback capacitor C F1 and the fourth feedback capacitor C F4 ; represents the equivalent capacitance after the input terminal is connected to the first feedback capacitor C F1 and the fourth feedback capacitor C F4 ;

[0073] The original bandwidth of the transimpedance amplifier is:

[0074] (2)

[0075] The bandwidth of the transimpedance amplifier after the first feedback capacitor C F1 and the fourth feedback capacitor C F4 is connected becomes:

[0076] (3)

[0077] wherein, A1 represents the gain of the first fully differential amplifier, A2 represents the gain of the second fully differential amplifier, R F = R F1 = R F2 represents the resistance of the first feedback resistor and the second feedback resistor;

[0078] When A1A2>>1, the bandwidth of the transimpedance amplifier will increase under the action of the first feedback capacitor C F1 and the fourth feedback capacitor C F4 . However, since the position of the secondary pole of the transimpedance amplifier does not change, the stability of the transimpedance amplifier will deteriorate. The fourth feedback capacitor and the first feedback capacitor are in a symmetrical relationship, CF1=CF4, and one of the capacitor values can be used to represent it.

[0079] In a specific embodiment, in order to improve the frequency of the secondary pole of the transimpedance amplifier, the feedback loops formed by the second feedback capacitor C F2 and the third feedback capacitor C F3 generate equivalent negative capacitances to offset a part of the parasitic capacitance of the secondary pole of the transimpedance amplifier, and by improving the frequency of the secondary pole of the transimpedance amplifier, the stability of the transimpedance amplifier is improved. C A represents the equivalent capacitance before the input terminal is connected to the first feedback capacitor C F1 and the fourth feedback capacitor C F4The equivalent capacitance of the trans-impedance amplifier's sub-pole (i.e. the parasitic capacitance at node A or B) before becomes

[0080]

[0081] wherein, represents the access to the second feedback capacitance C F2 , the third feedback capacitance C F3 after the equivalent capacitance of the trans-impedance amplifier's sub-pole;

[0082] The original sub-pole frequency of the trans-impedance amplifier is:

[0083] (5)

[0084] After the second feedback capacitance C F2 , the third feedback capacitance C F3 is added, the sub-pole frequency of the trans-impedance amplifier becomes:

[0085] (6)

[0086] wherein, is the equivalent resistance at node A or B;

[0087] Therefore, when A2>>1, the equivalent capacitance of the trans-impedance amplifier's sub-pole decreases, and the sub-pole frequency increases, thereby improving the stability of the trans-impedance amplifier. The second feedback capacitance C F2 and the third feedback capacitance C F3 are in a symmetrical relationship, CF2=CF3, and one of the capacitance values can be used.

[0088] As shown in Figure 3 , a comparison of the amplitude-frequency response curves of the trans-impedance amplifier core amplifier gain when the technology of the present embodiment is not used (i.e. without introducing feedback capacitances C F1 , C F2 , C F3 and C F4 ) and when the technology of the present embodiment is used (i.e. introducing feedback capacitances C F1 , C F2 , C F3 and C F4 ) is shown. When the technology of the present embodiment is not used, the trans-impedance core amplifier gain is 25 dBΩ, and the bandwidth is 2.7 GHz; when the technology of the present embodiment is used, the trans-impedance gain is 25 dBΩ, and the bandwidth is 4.7 GHz. It is shown that the wideband trans-impedance amplifier described in the present embodiment can improve the bandwidth while keeping the core amplifier gain of the trans-impedance amplifier unchanged.

[0089] As shown in Figure 4As shown, this indicates that the technology of this embodiment was not used (i.e., no feedback capacitor C was introduced). F1 C F2 C F3 and C F4 ) and the technology adopted in this embodiment (i.e., introducing a feedback capacitor C) F1 C F2 C F3 and C F4 A comparison of the amplitude-frequency response curves of the transimpedance amplifier gain is shown. Without the technique of this embodiment, the transimpedance gain is 79.2 dBΩ and the bandwidth is 0.6 GHz; with the technique of this embodiment, the transimpedance gain is 79.2 dBΩ and the bandwidth is 1.2 GHz. This demonstrates that the technique of this embodiment can improve the bandwidth while keeping the transimpedance amplifier gain constant.

[0090] like Figure 5 As shown, this indicates that the technology of this invention was not used (i.e., no feedback capacitor C was introduced). F1 C F2 C F3 and C F4 ) and the technology of this invention (i.e., introducing a feedback capacitor C) F1 C F2 C F3 and C F4 A comparison of the amplitude-frequency response curves of the transimpedance amplifier gain is shown. Without the present invention, the transimpedance gain is 73.2 dBΩ and the bandwidth is 1.2 GHz. With the present invention, the transimpedance gain is 79.2 dBΩ and the bandwidth is 1.2 GHz. This demonstrates that the present invention can improve the gain while maintaining the transimpedance amplifier bandwidth unchanged.

[0091] like Figure 6 The figure shows a comparison of the transient response of the transimpedance amplifier with and without the technology of this invention. The comparison results demonstrate that the proposed dual-loop capacitor positive feedback technology can increase the transimpedance gain, reduce its noise, and improve transient response overshoot without changing the bandwidth of the transimpedance amplifier.

[0092] like Figure 7 The figure shows a comparison of the equivalent input noise current of the transimpedance amplifier without and with the technology of this invention. Without the technology of this invention, the equivalent input noise current power spectral density at 10 MHz is 3.07 pA / √Hz; with the technology of this invention, the equivalent input noise current power spectral density at 10 MHz is 2.05 pA / √Hz. This demonstrates that the technology of this invention can reduce noise while maintaining the bandwidth of the transimpedance amplifier.

[0093] Example 2

[0094] Combination Figure 2 andFigure 8 As shown, a broadband transimpedance amplifier based on dual-loop capacitor positive feedback includes a first input capacitor C. in1 Second input capacitor C in2 First fully differential amplifier A1, second fully differential amplifier A2, first feedback resistor R F1 Second feedback resistor R F2 First feedback capacitor loop, second feedback capacitor loop;

[0095] Combination Figure 2 and Figure 8 As shown, in a specific embodiment, the first fully differential amplifier A1 includes a first fully differential transconductance module G. m1 First load capacitor C A1 Second load capacitor C A2 First load resistor R D1 Second load resistor R D2 ;

[0096] The second fully differential amplifier A2 includes a second fully differential transconductance module G. m2 Third load capacitor C out1 Fourth load capacitor C out2 Third load resistor R D3 Fourth load resistor R D4 .

[0097] like Figure 8 As shown, in one specific embodiment, the second feedback capacitor loop includes a second feedback capacitor C. F2 Third feedback capacitor C F3 ;

[0098] The second feedback capacitor C F2 One end is connected to the second fully differential transconductance module G. m2 The positive input terminal is electrically connected to the second feedback capacitor C. F2 The other end is connected to the second fully differential transconductance module G. m2 The positive output terminal is electrically connected;

[0099] The third feedback capacitor C F3 One end is connected to the second fully differential transconductance module G. m2 The negative input terminal is electrically connected to the third feedback capacitor C. F3 The other end is connected to the second fully differential transconductance module G. m2 The negative output terminal is electrically connected.

[0100] The first load capacitor C A1 One end is connected to the first fully differential transconductance module G m1a positive output terminal of the first fully differential transconductance module G A1 the other end of the first load capacitor C

[0101] a positive output terminal of the second fully differential transconductance module G A2 the other end of the first load capacitor C m1 a positive output terminal of the first fully differential transconductance module G A2 the other end of the first load capacitor C

[0102] a positive output terminal of the third fully differential transconductance module G out1 the other end of the first load capacitor C m2 a positive output terminal of the second fully differential transconductance module G out1 the other end of the first load capacitor C

[0103] a positive output terminal of the fourth fully differential transconductance module G out2 the other end of the first load capacitor C m2 a positive output terminal of the second fully differential transconductance module G out2 the other end of the first load capacitor C

[0104] a positive output terminal of the first fully differential transconductance module G D1 the other end of the first load capacitor R m1 a positive output terminal of the first fully differential transconductance module G D1 the other end of the first load capacitor R

[0105] a positive output terminal of the second fully differential transconductance module G D2 the other end of the first load capacitor R m1 a positive output terminal of the first fully differential transconductance module G D2 the other end of the first load capacitor R

[0106] a positive output terminal of the third fully differential transconductance module G D3 the other end of the first load capacitor R m2 a positive output terminal of the second fully differential transconductance module G D3 the other end of the first load capacitor R

[0107] a positive output terminal of the fourth fully differential transconductance module G D4 the other end of the first load capacitor R m2 a positive output terminal of the second fully differential transconductance module G D4 the other end of the first load capacitor R

[0108] the capacitance of the first input capacitor C in1 is equal to the capacitance of the second input capacitor C in2 ;

[0109] a positive output terminal of the first fully differential transconductance module G F1a resistance value of the second feedback resistor R F2 a resistance value of the second feedback resistor R

[0110] a capacitance value of the first feedback capacitor C F1 a capacitance value of the fourth feedback capacitor C F4 a capacitance value of the fourth feedback capacitor C

[0111] a capacitance value of the second feedback capacitor C F2 a capacitance value of the third feedback capacitor C F3 a capacitance value of the third feedback capacitor C

[0112] Embodiment 3

[0113] The embodiment is based on the basis of Embodiment 1 or Embodiment 2, and further provides an optical signal receiving circuit, the optical signal receiving circuit comprising the wideband transimpedance amplifier based on double-loop capacitance positive feedback as described in Embodiment 1 or Embodiment 2.

[0114] Obviously, the above embodiments of the present application are only examples for clearly illustrating the present application, and are not intended to limit the implementation manners of the present application. Any modification, equivalent replacement, improvement, etc. within the spirit and principle of the present application shall be included in the protection scope of the claims of the present application.

Claims

1. A broadband transimpedance amplifier based on dual-loop capacitor positive feedback, characterized in that: Including the first input capacitor (C) in1 ), second input capacitor (C) in2 ), First fully differential amplifier (A1), Second fully differential amplifier (A2), First feedback resistor (R) F1 ), second feedback resistor (R) F2 ), first feedback capacitor loop, second feedback capacitor loop; The positive output terminal of the first fully differential amplifier (A1) is electrically connected to the negative input terminal of the second fully differential amplifier (A2); The negative output terminal of the first fully differential amplifier (A1) is electrically connected to the positive input terminal of the second fully differential amplifier (A2); The first input capacitor (C) in1 One end of the capacitor is electrically connected to the positive input terminal of the first fully differential amplifier (A1), and the first input capacitor (C) is... in1 The other end connects to the communication point; The second input capacitor (C) in2 The second input capacitor (C) is electrically connected to the negative input terminal of the first fully differential amplifier (A1), and the second input capacitor (C) is electrically connected to the negative input terminal of the first fully differential amplifier (A1). in2 The other end connects to the communication point; The first feedback resistor (R) F1 One end of the first feedback resistor (R) is electrically connected to the positive input terminal of the first fully differential amplifier (A1), and the first feedback resistor (R) is electrically connected to the positive input terminal of the first fully differential amplifier (A1). F1 The other end of the amplifier is electrically connected to the positive output terminal of the second fully differential amplifier A2. The second feedback resistor (R) F2 One end of the first feedback resistor (R) is electrically connected to the negative input terminal of the first fully differential amplifier (A1), and the first feedback resistor (R) is electrically connected to the negative input terminal of the first fully differential amplifier (A1). F1 The other end of the amplifier is electrically connected to the negative output terminal of the second fully differential amplifier (A2). One end of the first feedback capacitor loop is electrically connected to one input terminal of the first fully differential amplifier (A1); the other end of the first feedback capacitor loop is electrically connected to the opposite output terminal of the second fully differential amplifier (A2) to one input terminal of the first fully differential amplifier (A1). The first feedback capacitor loop includes a first feedback capacitor (C). F1 ), fourth feedback capacitor (C) F4 ); The first feedback capacitor (C) mentioned above F1 One end of the first feedback capacitor (C) is electrically connected to the positive input terminal of the first fully differential amplifier (A1), and the first feedback capacitor (C) is electrically connected to the positive input terminal of the first fully differential amplifier (A1). F1 The other end of the amplifier is electrically connected to the negative output terminal of the second fully differential amplifier (A2). The fourth feedback capacitor (C) F4 One end of the fourth feedback capacitor (C) is electrically connected to the negative input terminal of the first fully differential amplifier (A1), and the fourth feedback capacitor (C) is electrically connected to the negative input terminal of the first fully differential amplifier (A1). F4 The other end of the amplifier is electrically connected to the positive output terminal of the second fully differential amplifier (A2). One end of the second feedback capacitor loop is electrically connected to one input terminal of the second fully differential amplifier (A2); the other end of the second feedback capacitor loop is electrically connected to the same output terminal as the one input terminal of the second fully differential amplifier (A2), and the second feedback capacitor loop includes a second feedback capacitor (C). F2 ), third feedback capacitor (C) F3 ); The second feedback capacitor (C) F2 One end of the second feedback capacitor (C) is electrically connected to the positive input terminal of the second fully differential amplifier (A2), and the second feedback capacitor (C) F2 The other end of the amplifier is electrically connected to the positive output terminal of the second fully differential amplifier (A2). The third feedback capacitor (C) F3 One end of the third feedback capacitor (C) is electrically connected to the negative input terminal of the second fully differential amplifier (A2), and the third feedback capacitor (C) is electrically connected to the negative input terminal of the second fully differential amplifier (A2). F3 The other end of the amplifier is electrically connected to the negative output terminal of the second fully differential amplifier (A2).

2. The broadband transimpedance amplifier based on dual-loop capacitor positive feedback according to claim 1, characterized in that: The first input capacitor (C) in1 The capacitance value of the second input capacitor (C) is equal to that of the second input capacitor (C). in2 The capacitance value; The first feedback resistor R F1 The resistance value is equal to that of the second feedback resistor (R). F2 The resistance value of ).

3. The broadband transimpedance amplifier based on dual-loop capacitor positive feedback according to claim 1, characterized in that: The first feedback capacitor (C) F1 The capacitance value of the fourth feedback capacitor (C) is equal to that of the fourth feedback capacitor (C). F4 The capacitance value.

4. The broadband transimpedance amplifier based on dual-loop capacitor positive feedback according to claim 3, characterized in that: The second feedback capacitor (C) F2 The capacitance value of the third feedback capacitor (C) is equal to that of the third feedback capacitor (C). F3 The capacitance value.

5. The broadband transimpedance amplifier based on dual-loop capacitor positive feedback according to claim 1, characterized in that: The positive input terminal of the first fully differential amplifier (A1) serves as the positive input terminal of the current signal; the negative input terminal of the first fully differential amplifier (A1) serves as the negative input terminal of the current signal.

6. The broadband transimpedance amplifier based on dual-loop capacitor positive feedback according to claim 5, characterized in that: The positive output terminal and the negative output terminal of the second fully differential amplifier (A2) are used as the output voltage.

7. The broadband transimpedance amplifier based on dual-loop capacitor positive feedback according to claim 5, characterized in that: The first feedback capacitor (C) F1 ), fourth feedback capacitor (C) F4 The feedback loops formed by these loops are used to increase the frequency of the main pole of the transimpedance amplifier, thereby increasing the bandwidth of the transimpedance amplifier. The improved bandwidth of the transimpedance amplifier is calculated as follows: （3） In the formula, A1 represents the gain of the first fully differential amplifier, A2 represents the gain of the second fully differential amplifier, and R... F =R F1 =R F2 This indicates the resistance values ​​of the first feedback resistor and the second feedback resistor. This indicates that the first feedback capacitor (C) is connected at the input terminal. F1 ), fourth feedback capacitor (C) F4 The equivalent capacitance before; This indicates that the first feedback capacitor (C) is connected at the input terminal. F1 ), fourth feedback capacitor (C) F4 The equivalent capacitance after that, where ; When A1A2>>1, the bandwidth of the transimpedance amplifier is at the first feedback capacitor (C). F1 ), fourth feedback capacitor (C) F4 It will increase under the influence of ).

8. The broadband transimpedance amplifier based on dual-loop capacitor positive feedback according to claim 7, characterized in that: The second feedback capacitor (C) F2 ), third feedback capacitor (C) F3 The feedback loops formed by these loops are used to increase the frequency of the secondary pole of the transimpedance amplifier, thereby improving the stability of the transimpedance amplifier. The secondary pole frequency of the transimpedance amplifier is calculated as follows: （6） in, Let be the equivalent resistance at node A or B; This indicates that a second feedback capacitor (C) is connected. F2 ), third feedback capacitor (C) F3 The equivalent capacitance of the secondary pole of the previous transimpedance amplifier is connected to the second feedback capacitor (C). F2 ), third feedback capacitor (C) F3 The equivalent capacitance of the secondary pole of the transimpedance amplifier after that is: （4） Therefore, when A2>>1, the equivalent capacitance of the secondary pole of the transimpedance amplifier decreases, the frequency of the secondary pole increases, thereby improving the stability of the transimpedance amplifier.

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