Focal plane chip, its preparation method, and refrigerated photon-type focal plane infrared detector

Abstract

Focal plane chip, its preparation method, and refrigerated photon type focal plane infrared detector. The present invention relates to an integrated polarization refrigerated photon type focal plane chip, which includes a readout circuit, a filling layer, a photosensitive layer, and a polarization grating. The filling layer includes an extending area extending to the side of the photosensitive layer, and a first alignment cursor is provided on the extending area. The alignment between the polarization grating and the photosensitive pixel structure is completed based on the alignment between the first alignment cursor and the second alignment cursor on the polarization grating. Correspondingly, a preparation method of the integrated polarization refrigerated photon type focal plane chip and a refrigerated photon type focal plane infrared detector configured with the above-mentioned focal plane chip are also provided. By aligning the first alignment cursor formed on the filling layer with the second alignment cursor on the polarization grating, the present invention can significantly improve the alignment accuracy between the polarization grating and the infrared focal plane. Compared with the traditional circuit-end cursor alignment method, it can avoid the accuracy error caused by the secondary alignment between the polarization grating and the circuit end, and can reduce the alignment error caused by the large height depth of field.

Description

Technical Field

[0001] The present invention belongs to the technical field of infrared detection, and particularly relates to an integrated polarization-cooled photon-type focal plane chip, a preparation method of the integrated polarization-cooled photon-type focal plane chip, and a cooled photon-type focal plane infrared detector configured with the above-mentioned integrated polarization-cooled photon-type focal plane chip. Background Art

[0002] Traditional cooled photon-type focal plane infrared detectors (such as mercury cadmium telluride, antimonide superlattice detectors, etc.) can detect the infrared radiation of a target and image it, and have advantages such as strong ability to penetrate smoke, and can work all-weather and all-day. However, with the development of countermeasure technologies such as infrared stealth and camouflage, even though the cooled photon-type focal plane infrared imager has high sensitivity, it is very difficult to identify the object to be measured. The introduction of polarization technology can solve the above problems. The polarization characteristics of the target can be multi-dimensional, and can provide much richer information than the infrared light intensity. Therefore, the cooled photon-type focal plane infrared polarization imaging technology has important application values in fields such as anti-interference target detection and artificial object recognition in complex environments.

[0003] The core of the integrated polarization infrared photon-type chip includes three parts: an infrared focal plane photosensitive pixel array, a readout circuit, and a polarization grating. The integration process of the polarization infrared photon-type chip requires high-precision alignment of the polarization grating with the infrared focal plane photosensitive chip, and requires high reliability without affecting the performance of the infrared focal plane. Currently, there are two commonly used integration methods. One is to directly prepare the polarization grating on the back of the infrared hybrid chip, and the other is to indirectly prepare the polarization grating on the back of the infrared hybrid chip; however, it is very difficult to achieve high-precision pixel alignment with these two schemes. Summary of the Invention

[0004] The present invention relates to an integrated polarization-cooled photon-type focal plane chip, a preparation method of the integrated polarization-cooled photon-type focal plane chip, and a cooled photon-type focal plane infrared detector configured with the above-mentioned integrated polarization-cooled photon-type focal plane chip, which can at least solve some defects of the prior art.

[0005] The present invention relates to an integrated polarization-cooled photon-type focal plane chip, including a readout circuit, a filling layer, a photosensitive layer, and a polarization grating arranged in layers. A circuit pixel structure is provided in the readout circuit, and a photosensitive pixel structure connected to the circuit pixel structure is provided in the photosensitive layer. The filling layer includes a filling area filling the gap between the photosensitive layer and the readout circuit and an extension area extending to the side of the photosensitive layer. A first alignment cursor is provided on the surface area of the extension area facing the polarization grating, and a second alignment cursor is provided on the surface area of the polarization grating facing the extension area. And the alignment connection between the polarization grating and the photosensitive pixel structure is completed based on the alignment of the first alignment cursor and the second alignment cursor.

[0006] As one of the embodiments, a third alignment cursor is provided in the photosensitive layer. The third alignment cursor is located on the side of the photosensitive pixel structure. A fourth alignment cursor is provided on the readout circuit. And the alignment between the photosensitive pixel structure and the circuit pixel structure is completed based on the alignment between the third alignment cursor and the fourth alignment cursor.

[0007] As one of the embodiments, the photosensitive layer includes a photosensitive material region and a passivation region. The photosensitive pixel structure is formed in the photosensitive material region. The passivation region grows on the photosensitive material region and faces the readout circuit.

[0008] The present invention also relates to a method for manufacturing an integrated polarization-cooled photon-type focal plane chip, including the following steps:

[0009] S1, preparing a photosensitive module, on the front surface of which a photosensitive pixel structure and a first alignment cursor are formed. Among them, the first alignment cursor is located on the side of the photosensitive pixel structure;

[0010] S2, connecting the photosensitive pixel structure to the circuit pixel structure of the readout circuit;

[0011] S3, preparing a filling layer to fill the gap between the photosensitive module and the readout circuit;

[0012] S4, removing the photosensitive material in the cursor area where the first alignment cursor is located to expose the first alignment cursor;

[0013] S5, completing the alignment connection between the polarization grating and the photosensitive pixel structure by aligning the second alignment cursor formed on the polarization grating with the first alignment cursor.

[0014] Further, in S1, after the photosensitive pixel structure is prepared, a passivation layer is grown on the front surface of the photosensitive module; the lithography operation of the first alignment cursor is completed in the cursor area, and after removing the passivation layer in the cursor area, the metal growth operation of the first alignment cursor is carried out.

[0015] Further, the metal growth operation of the first alignment cursor includes:

[0016] Growing a metal layer;

[0017] Soaking in an acetone solution to remove the photoresist at the photomask to strip the metal on the photoresist.

[0018] Further, the material of the passivation layer is ZnS / CdTe or SiO 2 , and the removal of the passivation layer adopts a wet etching method or a dry etching method.

[0019] Further, in S1, a third alignment cursor is further prepared in the photosensitive module, and the third alignment cursor is located on the side of the photosensitive pixel structure;

[0020] In S2, the connection between the photosensitive pixel structure and the circuit pixel structure is completed by aligning the third alignment cursor with a fourth alignment cursor formed on the readout circuit.

[0021] The present invention also relates to a refrigerated photon-type focal plane infrared detector, including an integrated polarization refrigerated photon-type focal plane chip,

[0022] The integrated polarization refrigerated photon-type focal plane chip adopts the integrated polarization refrigerated photon-type focal plane chip as described above;

[0023] Alternatively, the integrated polarization refrigerated photon-type focal plane chip is prepared by using the preparation method of the integrated polarization refrigerated photon-type focal plane chip as described above.

[0024] The present invention has at least the following beneficial effects:

[0025] By aligning the first alignment cursor formed on the filling layer with the second alignment cursor on the polarization grating, the present invention can significantly improve the alignment accuracy between the polarization grating and the infrared focal plane. Compared with the traditional alignment method of the circuit end cursor, it can avoid the accuracy error caused by the secondary alignment between the polarization grating and the circuit end, and can reduce the alignment error caused by the large height depth of field. In addition, compared with the traditional chip structure, the photosensitive material outside the infrared focal plane is removed, which can reduce the edge material stress after dicing the chip without affecting the performance of the infrared focal plane, reduce the negative impact during the chip processing, and improve the high and low temperature working reliability of the chip. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] In order to more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the following will briefly introduce the drawings required for the description of the embodiments or the prior art. Obviously, the following drawings are only some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can be obtained based on these drawings.

[0027] Figure 1 It is a schematic structural diagram of a polarization refrigerated photon-type focal plane chip provided by an embodiment of the present invention;

[0028] Figure 2 It is a schematic structural distribution diagram of a photosensitive module provided by an embodiment of the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0029] The technical solutions in the embodiments of the present invention will be clearly and completely described below. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the protection scope of the present invention.

[0030] Embodiment 1

[0031] As Figure 1 , an integrated polarization-cooled photon-type focal plane chip is provided in an embodiment of the present invention, which includes a readout circuit 1, a filling layer 3, a photosensitive layer 2, and a polarization grating 5 arranged in layers. A circuit pixel structure 11 is provided in the readout circuit 1, and a photosensitive pixel structure 21 connected to the circuit pixel structure 11 is provided in the photosensitive layer 2. The filling layer 3 includes a filling area filling the gap between the photosensitive layer 2 and the readout circuit 1 and an extension area extending to the side of the photosensitive layer 2. A first alignment cursor 4 is provided on the surface area of the extension area facing the polarization grating 5, and a second alignment cursor 51 is provided on the surface area of the polarization grating 5 facing the extension area. And the alignment between the polarization grating 5 and the photosensitive pixel structure 21 is completed based on the alignment of the first alignment cursor 4 and the second alignment cursor 51.

[0032] Among them, the circuit pixel structure 11 includes a plurality of circuit pixels distributed in an array, and the above-mentioned photosensitive pixel structure 21 includes a plurality of photosensitive pixels distributed in an array; the array distribution form of the circuit pixels matches the array distribution form of the photosensitive pixels in the photosensitive pixel structure 21. Preferably, the photosensitive pixel structure 21 and the circuit pixel structure 11 are connected by an indium column flip-chip interconnection method. Specifically, a circuit pixel indium column 12 is prepared on the circuit pixel, and a photosensitive pixel indium column 24 is prepared on the front surface (the surface of the photosensitive pixel facing the readout circuit 1) of the photosensitive pixel. The photosensitive pixel is connected to the circuit pixel by connecting the photosensitive pixel indium column 24 and the circuit pixel indium column 12. Generally, an indium column flip-chip bonder is used to complete the flip-chip connection between the photosensitive pixel indium column 24 and the circuit pixel indium column 12. The area of the above-mentioned circuit pixel structure 11 is smaller than the overall area of the readout circuit 1.

[0033] Furthermore, a pixel electrode 25 is also grown on the front surface of the photosensitive pixel. The pixel electrode 25 can be arranged around the photosensitive pixel indium column 24 or adopt other structures. In one embodiment, the pixel electrode metal is prepared by means of photolithography - development - opening - gold growth on the photosensitive pixel.

[0034] Preferably, the above-mentioned photosensitive layer 2 includes a photosensitive material region, and the above-mentioned photosensitive pixel structure 21 is formed in the photosensitive material region. Generally, a focal plane infrared photosensitive pixel array is prepared by chip processing technology. Among them, the thickness of the photosensitive material region is preferably greater than the thickness of the photosensitive pixel structure 21. There is also a layer of photosensitive material on the back of the photosensitive pixel structure 21, which can improve the working reliability of the photosensitive pixel structure 21.

[0035] In one embodiment, as Figure 1 and Figure 2 , the area of the photosensitive pixel structure 21 is smaller than the area of the photosensitive layer 2, that is, the area of the photosensitive pixel structure 21 is smaller than the area of the photosensitive material region. The side of the photosensitive pixel structure 21 is the edge photosensitive region. Further, as Figure 1 and Figure 2 , a third alignment cursor 23 is provided in the photosensitive layer 2. The third alignment cursor 23 is located on the side of the photosensitive pixel structure 21, that is, in the above-mentioned edge photosensitive region; a fourth alignment cursor 13 is provided on the readout circuit 1, and the alignment between the photosensitive pixel structure 21 and the circuit pixel structure 11 is completed based on the alignment of the third alignment cursor 23 and the fourth alignment cursor 13. Among them, the third alignment cursor 23 is generally prepared by photolithography and gold plating in the edge photosensitive region. Based on the above solution, high-precision alignment connection between the photosensitive pixel structure 21 and the circuit pixel structure 11 can be achieved, and the preparation quality of the above-mentioned focal plane chip can be improved.

[0036] Further, as Figure 1 , in addition to the photosensitive material region, the above-mentioned photosensitive layer 2 further includes a passivation region, and the passivation region grows on the photosensitive material region and faces the readout circuit 1. In one embodiment, the material of the passivation region is ZnS / CdTe or SiO 2 ; the thickness of the passivation region can be controlled within range. The filling region of the above-mentioned filling layer 3 fills the gap between the passivation region and the readout circuit 1.

[0037] In one embodiment, the above-mentioned first alignment cursor 4 is formed on the filling layer 3 in the following manner:

[0038] As Figure 1 and Figure 2, a photosensitive module is provided. On the front surface of the photosensitive module (corresponding to the front surface of the photosensitive pixel structure 21, that is, the side surface facing the readout circuit 1), a photosensitive pixel structure 21 and a first alignment cursor 4 are provided, wherein the first alignment cursor 4 is located on the side of the photosensitive pixel structure 21; after the photosensitive pixel structure 21 is connected to the circuit pixel structure 11 of the readout circuit 1, a filling layer 3 is prepared to fill the gap between the photosensitive module and the readout circuit 1; subsequently, the photosensitive material in the cursor area 26 where the first alignment cursor 4 is located is removed to expose the first alignment cursor 4, so that the first alignment cursor 4 is formed on the filling layer 3.

[0039] Further, in the solution where the photosensitive layer 2 further includes a passivation area, after the photosensitive pixel structure 21 is fabricated, a passivation area is grown on the front surface of the photosensitive module; the lithography operation of the first alignment cursor 4 is completed in the cursor area 26, and after the passivation material in the cursor area 26 is removed, the metal growth operation of the first alignment cursor 4 is performed. Among them, the lithography operation of the first alignment cursor 4 can be completed before the growth of the passivation area, or can be performed after the growth of the passivation area according to specific circumstances.

[0040] Further, the metal growth operation of the first alignment cursor 4 includes:

[0041] Growing a metal layer;

[0042] Soaking with an acetone solution to remove the photoresist at the photomask to strip the metal on the photoresist. This operation can prevent the first alignment cursor 4 from falling off when the photosensitive material in the cursor area 26 is removed subsequently. It can be understood that the above metal growth operation method also defines the structure of the first alignment cursor 4. Among them, preferably, when growing the metal layer, a chromium layer is grown first, and then a gold layer is grown; optionally, the thickness of the chromium layer is within the range, and the thickness of the gold layer is within the range.

[0043] The structures and manufacturing methods of the above second alignment cursor 51, third alignment cursor 23, and fourth alignment cursor 13 can refer to the structure and manufacturing method of the above first alignment cursor 4.

[0044] It can be understood that the extension area of the above filling layer 3 corresponds to the position of the above cursor area 26; for the case where the passivation material in the cursor area 26 is removed first and then the filling layer 3 is formed, the thickness of the filling material in the extension area is greater than the thickness of the filling area.

[0045] In one embodiment, the above filling layer 3 is filled with glue, and the filling layer 3 can be formed after the glue is cured.

[0046] The above-mentioned readout circuit 1, filling layer 3, and photosensitive layer 2 are combined to form an infrared focal plane hybrid chip. Preferably, the polarization grating 5 includes a plurality of polarization microstructures 52, and the number and array arrangement of the polarization microstructures 52 are the same as those of the photosensitive pixels in the photosensitive pixel structure 21. The polarization grating 5 aligns the polarization microstructures 52 with the photosensitive pixels in the photosensitive pixel structure 21 one by one through an integrated process. In one embodiment, the above-mentioned polarization microstructures 52 can be adjusted in angle to form a super-pixel structure. For example, for a super-pixel structure composed of 4 polarization microstructures 52, the angles of the 4 polarization microstructures 52 are 0°, 45°, 90°, and 135°.

[0047] In the integrated polarization refrigeration photon-type focal plane chip provided in this embodiment, by aligning the first alignment cursor 4 formed on the filling layer 3 with the second alignment cursor 51 on the polarization grating 5, the alignment accuracy between the polarization grating 5 and the infrared focal plane can be significantly improved. Compared with the traditional circuit-terminal cursor alignment method, it can avoid the accuracy error caused by the secondary alignment between the polarization grating 5 and the circuit terminal, and can reduce the alignment error caused by the large height depth of field. In addition, compared with the traditional chip structure, the photosensitive material on the periphery of the infrared focal plane is removed, which can reduce the edge material stress after dicing the chip without affecting the performance of the infrared focal plane, reduce the negative impact during the chip processing, and improve the high and low temperature working reliability of the chip.

[0048] Embodiment 2

[0049] The embodiment of the present invention provides a method for manufacturing an integrated polarization refrigeration photon-type focal plane chip, including the following steps:

[0050] S1, prepare a photosensitive module, on the front surface of which a photosensitive pixel structure 21 and a first alignment cursor 4 are formed, wherein the first alignment cursor 4 is located on the side of the photosensitive pixel structure 21;

[0051] S2, connect the photosensitive pixel structure 21 with the circuit pixel structure 11 of the readout circuit 1;

[0052] S3, prepare a filling layer 3 to fill the gap between the photosensitive module and the readout circuit 1;

[0053] S4, remove the photosensitive material in the cursor area 26 where the first alignment cursor 4 is located to expose the first alignment cursor 4;

[0054] S5, complete the alignment connection between the polarization grating 5 and the photosensitive pixel structure 21 by aligning the second alignment cursor 51 formed on the polarization grating 5 with the first alignment cursor 4.

[0055] Further, in S1, after the photosensitive pixel structure 21 is fabricated, a passivation layer 22 is grown on the front side of the photosensitive module; after the lithography operation of the first alignment cursor 4 is completed in the cursor area 26, the passivation layer 22 in the cursor area 26 is removed and then the metal growth operation of the first alignment cursor 4 is performed.

[0056] Further, the metal growth operation of the first alignment cursor 4 includes:

[0057] Growing a metal layer;

[0058] Soaking in an acetone solution to remove the photoresist at the photolithography mask to strip the metal on the photoresist.

[0059] Further, the material of the passivation layer 22 is ZnS / CdTe or SiO 2 , and the removal of the passivation layer 22 is performed by wet etching or dry etching.

[0060] Further, in S1, a third alignment cursor 23 is also fabricated in the photosensitive module, and the third alignment cursor 23 is located on the side of the photosensitive pixel structure 21;

[0061] In S2, by aligning the third alignment cursor 23 with the fourth alignment cursor 13 formed on the readout circuit 1, the flip-chip connection between the photosensitive pixel indium pillar 24 and the circuit pixel indium pillar 12 is completed.

[0062] It can be understood that the above fabrication method can fabricate the integrated polarization refrigeration photon-type focal plane chip in the first embodiment above; or rather, the integrated polarization refrigeration photon-type focal plane chip provided in the first embodiment above can be fabricated via the above fabrication method.

[0063] For the related technical content already described in the first embodiment above, it will not be elaborated here; for example, the structures of the photosensitive pixel structure 21, the first alignment cursor 4, the readout circuit 1, the filling layer 3, and the polarization grating 5 can all refer to the relevant content in the first embodiment above.

[0064] In this embodiment, by aligning the first alignment cursor 4 formed on the photosensitive module / filling layer 3 with the second alignment cursor 51 on the polarization grating 5, the alignment accuracy between the polarization grating 5 and the infrared focal plane can be significantly improved. Compared with the traditional circuit-end cursor alignment method, it can avoid the accuracy error caused by the secondary alignment between the polarization grating 5 and the circuit end, and can reduce the alignment error caused by the large height depth of field. In addition, compared with the traditional chip structure, the invalid photosensitive materials at the edge of the infrared focal plane are removed, which can reduce the influence of the edge material stress on the chip without affecting the performance of the infrared focal plane, and can balance the chip reliability under high and low temperature operations.

[0065] Embodiment Three

[0066] The following provides a specific embodiment to further illustrate the preparation method provided in the above-mentioned Embodiment 2 and the chip structure provided in the above-mentioned Embodiment 1.

[0067] This embodiment provides a preparation method for an integrated polarization refrigeration photon type focal plane chip, including the following steps:

[0068] Prepare the third alignment cursor 23 on the HgCdTe infrared photosensitive module by lithography and gold deposition, and its metal

[0069] Prepare the photosensitive pixel structure 21 by planar junction formation process, grow a Zns passivation layer 22 on the HgCdTe infrared photosensitive module, and the thickness of the passivation layer 22 is

[0070] Grow the pixel electrode metal on the photosensitive pixel by lithography - development - opening - gold deposition;

[0071] Complete the lithography operation of the first alignment cursor 4 in the cursor area 26, remove the passivation material in the cursor area 26 by HCl wet etching method, and complete the metal growth of the first alignment cursor 4, and its metal Soak in acetone solution for about 5 minutes to remove the photoresist at the lithography mask, and the metal on the lithography mask is also stripped off;

[0072] Complete the preparation of the photosensitive pixel indium column 24 of the photosensitive pixel structure 21;

[0073] On a high-precision flip bonder, complete the alignment flip bonding between the photosensitive pixel indium column 24 and the circuit pixel indium column 12 by aligning the third alignment cursor 23 and the fourth alignment cursor 13;

[0074] Complete glue filling and curing between the readout circuit 1 and the infrared photosensitive module, and perform operations such as substrate thinning and removing the substrate by chromic acid solution etching on the flip-bonded focal plane chip;

[0075] Remove the infrared photosensitive material in the cursor area 26 by lithography and / or Br-HBr solution etching to expose the first alignment cursor 4;

[0076] On the flip bonder, achieve high-precision alignment between the polarization microstructure 52 and the photosensitive pixel by aligning the first alignment cursor 4 and the second alignment cursor 51, and complete the bonding integration between the polarization grating 5 and the infrared focal plane hybrid chip.

[0077] The focal plane chip prepared by the above method has normal performance in 1000 liquid nitrogen impact tests.

[0078] Embodiment 4

[0079] An embodiment of the present invention provides a refrigerated photon-type focal plane infrared detector, including an integrated polarization refrigerated photon-type focal plane chip.

[0080] The integrated polarization refrigerated photon-type focal plane chip adopts the integrated polarization refrigerated photon-type focal plane chip provided in the first embodiment above.

[0081] Alternatively, the integrated polarization refrigerated photon-type focal plane chip is prepared by using the preparation method of the integrated polarization refrigerated photon-type focal plane chip provided in the second embodiment above.

[0082] The connection structure between the focal plane chip and other components of the infrared detector is a conventional technology in the art and will not be elaborated here.

[0083] The above are only the preferred embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

Claims

1. An integrated polarization-cooled photon-type focal plane chip, characterized in that: It includes a readout circuit, a filling layer, a photosensitive layer, and a polarization grating arranged in layers. A circuit pixel structure is provided in the readout circuit, and a photosensitive pixel structure connected to the circuit pixel structure is provided in the photosensitive layer. The filling layer includes a filling area for filling the gap between the photosensitive layer and the readout circuit and an extension area extending to the side of the photosensitive layer. A first alignment cursor is provided on the surface area of the extension area facing the polarization grating. The first alignment cursor is a metal cursor. A second alignment cursor is provided on the surface area of the polarization grating facing the extension area. And the alignment between the polarization grating and the photosensitive pixel structure is completed based on the alignment of the first alignment cursor and the second alignment cursor.

2. The integrated polarization-cooled photon-type focal plane chip according to claim 1, characterized in that: A third alignment cursor is provided in the photosensitive layer. The third alignment cursor is located on the side of the photosensitive pixel structure. A fourth alignment cursor is provided on the readout circuit. And the alignment between the photosensitive pixel structure and the circuit pixel structure is completed based on the alignment of the third alignment cursor and the fourth alignment cursor.

3. The integrated polarization-cooled photon-type focal plane chip according to claim 2, characterized in that: The photosensitive layer includes a photosensitive material area and a passivation area. The photosensitive pixel structure is formed in the photosensitive material area. The passivation area grows on the photosensitive material area and faces the readout circuit.

4. A preparation method of an integrated polarization-cooled photon-type focal plane chip, characterized in that, comprises the following steps: S1, preparing a photosensitive module, on the front surface of which a photosensitive pixel structure and a first alignment cursor are formed. Among them, the first alignment cursor is located on the side of the photosensitive pixel structure, and the first alignment cursor is a metal cursor; S2, completing the connection between the photosensitive pixel structure and the circuit pixel structure of the readout circuit; S3, preparing a filling layer to fill the gap between the photosensitive module and the readout circuit; S4, removing the photosensitive material in the cursor area where the first alignment cursor is located to expose the first alignment cursor; the remaining photosensitive material constitutes the photosensitive layer. The filling layer correspondingly includes a filling area for filling the gap between the photosensitive layer and the readout circuit and an extension area extending to the side of the photosensitive layer. The first alignment cursor is correspondingly formed on the extension area; S5, completing the alignment connection between the polarization grating and the photosensitive pixel structure by aligning the second alignment cursor formed on the polarization grating with the first alignment cursor.

5. The preparation method of the integrated polarization-cooled photon-type focal plane chip according to claim 4, characterized in that: In S1, after the photosensitive pixel structure is prepared, a passivation layer is grown on the front surface of the photosensitive module; after the lithography operation of the first alignment cursor is completed in the cursor area, the passivation layer in the cursor area is removed and then the metal growth operation of the first alignment cursor is carried out.

6. The preparation method of the integrated polarization-cooled photon-type focal plane chip according to claim 5, characterized in that, The metal growth operation of the first alignment cursor includes: Growing a metal layer; Soaking with an acetone solution to remove the photoresist at the photolithography mask, so as to strip the metal on the photoresist.

7. The method for preparing an integrated polarization refrigeration photon type focal plane chip according to claim 5, characterized in that: The material of the passivation layer is ZnS / CdTe or SiO 2 , and the removal of the passivation layer is carried out by wet etching or dry etching methods.

8. The method for preparing an integrated polarization refrigeration photon type focal plane chip according to claim 4, characterized in that: In S1, a third alignment cursor is further prepared in the photosensitive module, and the third alignment cursor is located on the side of the photosensitive pixel structure; In S2, the connection between the photosensitive pixel structure and the circuit pixel structure is completed by aligning the third alignment cursor with a fourth alignment cursor formed on the readout circuit.

9. A refrigeration photon type focal plane infrared detector, comprising an integrated polarization refrigeration photon type focal plane chip, characterized in that: The integrated polarization refrigeration photon type focal plane chip adopts the integrated polarization refrigeration photon type focal plane chip according to any one of claims 1 to 3; Alternatively, the integrated polarization refrigeration photon type focal plane chip is prepared by using the preparation method of the integrated polarization refrigeration photon type focal plane chip according to any one of claims 4 to 8.

Images