One-step electrolytic method for filling vias in printed circuit boards and other substrates

Abstract

The present invention discloses a method for copper electroplating in the manufacture of printed circuit boards. This method is used to fill vias and microvias with copper. The method comprises the following steps: (1) preparing an electronic substrate to receive copper electroplating thereon; (2) forming at least one of one or more vias and / or one or more microvias in the electronic substrate; and (3) electroplating copper in the one or more vias and / or one or more microvias by bringing the electronic substrate into contact with an acidic copper electroplating solution. The acidic copper plating solution contains a copper ion source; sulfuric acid; a chloride ion source; a brightener; a wetting agent; and a leveling agent. The acidic copper electroplating solution plates the one or more vias and / or the one or more microvias until metallization is complete.

Description

Technical Field

[0001] The present invention generally relates to a single-step electrolytic deposition method of copper, and more particularly to a single-step electrolytic deposition method for filling vias and micro-vias in printed circuit boards and other substrates. Background Art

[0002] Electroplated copper solutions are used in many industrial applications, including anti-corrosion and decorative coatings, and in the electronics industry to manufacture electronic devices. Copper sulfate baths are used to manufacture printed circuit boards (PCBs) and semiconductors. Copper has better electrical conductivity than most other metals and allows for applications to smaller features.

[0003] Interconnect feature structures are feature structures formed in a dual-electronic substrate such as blind micro-vias (BMVs), trenches, and vias. These feature structures are preferably metallized with copper to provide interconnect conductivity. During circuit manufacturing, copper is electroplated onto selected portions of the surface of a printed circuit board, electroplated into blind vias and trenches, and electroplated onto the walls of vias that pass through the surface of the circuit board substrate. The walls of the vias are metallized to provide conductivity between the circuit layers of the printed circuit board.

[0004] In addition, as electronic devices shrink and are packaged closer together on a circuit board, thermal management of the electronic devices becomes a problem. Many electronic devices are heat-sensitive, which can reduce their efficiency and shorten their lifespan. Therefore, it is necessary to manage heat dissipation and provide a means to draw heat from heat-generating components and direct it to other areas of the panel or other substrates for dissipation.

[0005] In circuit board modules and electronic devices, electronic components mounted on the circuit board include surface-mounted electronic components and insertion-mounted electronic components. Surface-mounted electronic components are typically mounted on the board by soldering terminals to copper foils provided on the front surface of the circuit board. Insertion-mounted electronic components are typically mounted on the board by inserting lead terminals into perforations provided in the circuit board and soldering the lead terminals.

[0006] Electronic components mounted on a circuit board generate heat when current flows through them. In addition, a large amount of heat can be generated in electronic components through which a large current flows. When the temperature of an electronic component or the circuit board rises excessively due to the heat generated by the electronic component, there is a problem that the circuit formed on the electronic component or the circuit board may malfunction.

[0007] Various methods have been developed to manage heat dissipation in electronic devices, including, for example, filling vias with an epoxy plugging material filled with a conductive metal, inserting a copper stamp under the device, inserting a heat pump in the circuit board, using a conductive adhesive, attaching a heat sink to the heat-generating device, and electroplating copper.

[0008] U.S. Patent No. 9,924,589 to Kasashima et al., the entire disclosure of which is incorporated herein by reference, describes a surface-mounted electronic component that is mounted on the front surface of a circuit board, and a metal heat transfer body is buried in the circuit board so as to overlap with the electronic component on the board in the board thickness direction of the circuit board. Heat generated in the electronic component is transferred to the back surface of the circuit board through the heat transfer body, and the heat is dissipated to the outside. A heat radiator is provided on the back surface side of the circuit board, and heat generated in the electronic component is transferred to the heat radiator through the heat transfer body to dissipate the heat to the outside.

[0009] JP2010-141279 describes forming through holes in a circuit board and mounting a surface-mounted electronic component on the front surface of the circuit board to cover the through holes. Protrusions are formed on the upper surface of a heat sink provided on the back surface side of the circuit board, and a heat transfer body is provided on the protrusions. The projected portions of the heat sink and the heat transfer body are inserted into the through holes from the back surface side of the circuit board so that the heat transfer body is thermally connected to the electronic component. Then, heat generated in the electronic component can be transferred to the heat sink through the heat transfer body to dissipate the heat to the outside.

[0010] In JP2010-141279 Figure 4 multiple through holes are formed in the circuit board, and by embedding solder in the multiple through holes, multiple penetrating conductors are provided in the circuit board. A surface-mounted electronic component is mounted on the surface of the circuit board to be thermally connected to the multiple penetrating conductors. Heat generated in the electronic component is transferred to a heat sink provided below the circuit board through the penetrating heat transfer body and dissipated to the outside from the heat sink.

[0011] In JP2015-104182, the main body of a surface-mounted electronic component mounted on the back surface of a circuit board is assembled into a recessed portion of a heat sink provided on the back surface side of the circuit board to be thermally connected to the bottom surface of the recessed portion. Heat generated in the electronic component is radiated to the outside from the heat sink.

[0012] U.S. Patent No. 9,345,176 to Sanae et al., the entire disclosure of which is incorporated herein by reference, describes a power supply device that dissipates heat using a smaller number of components. Electronic components, such as transformers, chokes, or inductors, are mounted so as to penetrate rectangular holes formed in a circuit board, and the upper surface or the lower surface of the electronic component is in thermal contact with a metal frame or a heat radiation plate so that heat generated in the electronic component is dissipated to the outside from the metal frame or the heat radiation plate.

[0013] JP2007 - 312502 describes mounting electronic components such as transformers or reactors on the upper surface of a circuit board, and fitting the cores of the electronic components to a heat sink provided on the upper surface side of the circuit board to thermally connect to the circuit board. Then, heat generated in the electronic components can be dissipated from the heat sink to the outside.

[0014] JP2015 - 106956 describes using heat dissipation fins to improve heat dissipation. In this case, the electronic components are mounted on the inner bottom surface of a housing, and the heat dissipation fins are integrally provided in the lower part of the housing, and heat generated in the electronic components is dissipated from the heat dissipation fins to the outside. A blower fan can be mounted on the side part of the housing to blow cooling air at the heat dissipation fins to improve the heat dissipation performance.

[0015] JP2014 - 045529 describes an opening for natural air cooling on the side surface of a housing that houses a circuit board. Cooling fins and a cooling fan for forced air cooling are provided in the lower part of the housing so that heat generated in the electronic components mounted on the circuit board can be dissipated.

[0016] U.S. 9,445,510 to Reents, the entire subject matter of which is incorporated herein by reference, describes an electroplating process for filling through - holes of a printed circuit board with copper. Reents' process is a two - step process in which a workpiece containing through - holes (i) is contacted with a metal deposition electrolyte, and a voltage is applied between the workpiece and at least one anode such that deposition preferentially occurs at the center of the through - holes and the through - holes are completely or almost completely closed, and thereafter, (ii) the workpiece is contacted with the metal deposition electrolyte, and a voltage is applied between the workpiece and at least one anode such that current is supplied to the workpiece and the through - holes that were completely or almost completely closed in step (i) and are now divided into halves filled with metal to the desired degree. These steps are shown in Reents et al. Figure 1 and Figure 2 are shown.

[0017] As described by Reents et al., the method of filling through - holes with copper is a viable method of drawing heat from devices mounted on the through - holes and transferring it to other levels of the panel. However, it would be desirable to develop a method for filling through - holes and / or micro - through - holes, such as for heat dissipation, that can be integrated into the printed circuit board manufacturing process in a more efficient manner. Summary of the Invention

[0018] An object of the present invention is to provide an improved method for dissipating heat from an electronic device.

[0019] Another object of the present invention is to provide a method for dissipating heat in an electronic device that can be incorporated during the printed circuit board (PCB) manufacturing process or that is already part of the printed circuit board (PCB) manufacturing process, which method is capable of filling vias and eliminating the need for other processes such as plugging and sanding, copper stamping, and other similar processes.

[0020] Another object of the present invention is to provide a process that provides a higher thermal conductivity than conductive plugs and adhesives.

[0021] Yet another object of the present invention is to provide a process that gains the benefits of electrical conductivity.

[0022] Yet another object of the present invention is to provide a reliable method for metallizing vias having a high aspect ratio and not having any voids or defects.

[0023] Yet another object of the present invention is to provide an improved method for dissipating heat in a circuit board by metallizing vias with copper, and wherein the resulting solid copper structure, when located beneath a heat-generating device, is capable of providing an effective means for transferring heat or thermal energy from these devices to areas of the circuit board, panel, or other electronic substrate where the heat can be harmlessly dissipated.

[0024] Yet another object of the present invention is to provide a one-step process for filling vias with copper in a copper plating bath, which reduces the number of tanks in the pipeline, thereby reducing the equipment cost, reducing the number of tanks to be analyzed and maintained, and reducing the number of rectifiers required for plating.

[0025] Yet another object of the present invention is to eliminate the potential separation problem between via fill plating and bridging plating achieved by other processes.

[0026] The present invention provides a method for electrolytically filling vias in an electronic substrate (such as a printed circuit board or printed wiring board) with copper in a single-step, single-solution plating process. The method described herein provides a method for thermal management of an electronic system where higher power heat-generating devices need to be more highly packaged. The resulting solid copper structure, when located beneath a heat-generating device, provides an effective means for transferring thermal energy from these devices to other areas of the panel where the heat can be harmlessly dissipated. As a result, the device operates more efficiently and exhibits a longer life.

[0027] To this end, in one embodiment, the present invention generally relates to a method of copper electroplating in the manufacture of a printed circuit board, the method comprising the steps of:

[0028] a) preparing an electronic substrate to receive copper electroplating thereon;

[0029] b) forming at least one of one or more vias and / or one or more microvias in the electronic substrate; and

[0030] c) By contacting the electronic substrate with an acidic copper plating solution, copper is plated in the one or more vias and / or one or more micro-vias, the acidic copper plating solution comprising:

[0031] a. A source of copper ions;

[0032] b. Sulfuric acid;

[0033] c. A source of chloride ions;

[0034] d. A brightener;

[0035] e. A wetting agent; and

[0036] f. A leveling agent;

[0037] wherein the acidic copper plating solution is configured for a single-step process, wherein the same acidic copper plating solution plates the one or more vias and / or the one or more micro-vias until metallization is complete. BRIEF DESCRIPTION OF THE DRAWINGS

[0038] Figure 1 Depicts the steps of plating vias with copper as a single chemical component according to the present invention.

[0039] Figure 2 Depicts a cross-sectional view of the vias of a plated test panel according to Comparative Example 1.

[0040] Figure 3 Depicts a cross-sectional view of the vias of a plated test panel according to Example 1.

[0041] Figure 4 Depicts a cross-sectional view of the vias of a plated test panel according to Comparative Example 2.

[0042] Figure 5 Depicts a cross-sectional view of the vias of a plated test panel according to Example 2.

[0043] Figure 6 Depicts a cross-sectional view of the vias of a plated test panel according to Example 3.

[0044] Figure 7 Depicts a cross-sectional view of the vias of a plated test panel according to Comparative Example 3.

[0045] Figure 8 Depicts a cross-sectional view of the vias of a plated test panel according to Example 4.

[0046] Figure 9 Depicts a photograph showing the appearance of the plating on the first and second sides of a plated test panel according to Example 5.

[0047] Figure 10 Depicts a cross-section of a via-fill plating according to Example 5.

[0048] Figure 11 Depicts a photograph showing the appearance of the plating on the first and second sides of a plating test panel according to Example 6.

[0049] Figure 12 Depicts a cross-section of a via-fill plating according to Example 6.

[0050] Figure 13 Depicts a cross-section of a via opening according to Example 7.

[0051] Figure 14 Also depicts a cross-section of a via opening according to Example 7. DETAILED DESCRIPTION

[0052] As used herein, unless the context clearly dictates otherwise, the terms "a," "an," and "the" are intended to refer to both the singular and the plural referents.

[0053] As used herein, the term "about" refers to measurable values such as parameters, amounts, durations, etc., and is intended to include variations of + / −15% or less, preferably + / −10% or less, more preferably + / −5% or less, even more preferably + / −1% or less, still more preferably + / −0.1% or less, relative to the specifically recited value, so long as such variations are suitable for performing in the invention described herein. Additionally, it should be understood that the value itself to which the modifier "about" refers is specifically disclosed herein.

[0054] As used herein, for ease of description, spatial relative terms such as "under," "below," "lower," "above," "upper," etc. are used to describe the relationship of one element or feature structure to another or more element or feature structures, as shown in the figures. It should also be understood that the terms "front" and "back" are not intended to be limiting and are intended to be interchangeable where appropriate.

[0055] As used herein, the term "comprising and / or containing" specifies the presence of the recited feature structures, integers, steps, operations, elements, and / or components, but does not preclude the presence or addition of one or more other feature structures, integers, steps, operations, elements, components, and / or groups thereof.

[0056] As used herein, unless otherwise defined for a particular element or compound, the terms "substantially free" or "essentially free" mean that a given element or compound cannot be detected by ordinary analytical means for bath analysis known to those skilled in the art of metal plating. Such methods typically include atomic absorption spectroscopy, titration, ultraviolet-visible light analysis, secondary ion mass spectrometry, and other commonly used analytical methods.

[0057] As used herein, the term "pit" refers to a depression in a bridging or conformal copper plating over a filled via and / or microvia.

[0058] One of the benefits of the invention described herein is that plating, particularly copper plating, is already part of the PCB manufacturing process, and thus copper plating can be used to fill vias, eliminating the need for other processes such as plugging and sanding, copper stamping, etc.

[0059] In addition, using pure copper provides a much higher thermal conductivity than conductive plugs and adhesives. Thus, there are additional benefits in conductivity if desired.

[0060] Finally, the process of the present invention allows for the complete filling of vias in a single-step single copper plating bath, thereby reducing the number of tanks in the line, and thus reducing the equipment cost, and reducing the number of tanks to be maintained and the number of rectifiers required for plating. Additionally, the process of the present invention also eliminates the potential separation problem between the via fill plating and the bridging plating provided in other methods.

[0061] The general steps for manufacturing a printed circuit board by the process of the present invention that provides improved heat dissipation include the following:

[0062] The initial step is to provide a PCB having an array of various drilled vias for thermal management. Thus, the printed circuit board includes a metallized panel having an array or arrangement of drilled vias. The vias, microvias, and the like can be formed by various methods, including, for example, mechanical drilling, laser drilling, plasma etching, single-excitation or double-excitation, and spark etching.

[0063] Next, the vias are made conductive using metallization techniques commonly known in the art. Various metallization techniques can be used, including, for example, sputter coating, electroless copper plating, carbon-based direct metallization, graphite-based direct metallization, conductive polymers, palladium-based direct metallization, etc. Other metallization techniques will be known to those skilled in the art and can be used in the process of the present invention. The primary metallization layer can be an electroless copper plating, an electrolytic copper flash plating, or a direct metallization layer formed by direct metallization based on carbon, graphite, or a conductive polymer.

[0064] The panel plating surface is preferably copper or a copper-coated substrate.

[0065] Next, the metallized panel is cleaned and activated using conventional pretreatment techniques, such as acidic or alkaline cleaning and acid dipping or micro-etching with rinsing between steps.

[0066] In one embodiment, a conductive seed layer (such as by chemical deposition of copper) is formed on the non-conductive surface, and electroplating of copper needs to be initiated. The seed metal layer is conductive, provides adhesion and allows the exposed portion of its upper surface to be electroplated.

[0067] Thereafter, the panel is contacted with the acidic copper plating bath of the present invention, which comprises a source of copper ions, sulfuric acid, halide ions and proprietary organic additives including wetting agents, brighteners and leveling agents. The acidic copper plating bath of the present invention, in combination with a proprietary rectification procedure, is capable of filling the vias in the panel in an efficient single-solution one-step process. In contrast, prior art copper electroplating processes for plating vias may require a two-step process, including a first copper plating solution and plating conditions to seal the holes and a second copper plating solution and plating conditions to fill the two vias thus formed.

[0068] In one embodiment, the plating cycle includes (a) pulse plating for a first period of time, where pulse plating uses two pulse forms on opposite sides of the electronic substrate, where these pulse forms exhibit a phase shift; then (b) DC plating with a forward current for a second period of time.

[0069] The source of copper ions in the acidic copper plating bath is preferably copper sulfate. When the concentration increases, the resistivity of the copper plating solution is greater. When the sulfuric acid concentration increases, the solubility of copper sulfate decreases. The concentration of copper sulfate in the acidic copper plating bath is typically maintained in the range of about 100 g / L to about 300 g / L, more preferably about 180 g / L to about 280 g / L, and most preferably about 200 g / L to about 250 g / L.

[0070] The principal function of sulfuric acid is to provide maximum solution conductivity. Due to the high conductivity of the solution, the anodic and cathodic polarizations are small, and likewise the voltage required to deposit copper is small. Additionally, when using a very high cathodic current density, a higher concentration of copper sulfate is required within the recommended limits. Changes in sulfuric acid concentration have a greater effect on anodic and cathodic polarizations and solution conductivity than changes in copper sulfate concentration. The concentration of sulfuric acid in the acidic copper plating bath is typically maintained in the range of about 10 g / L to about 150 g / L, more preferably about 70 g / L to about 100 g / L.

[0071] The acidic copper plating bath also contains halide ions, most preferably chloride ions. Chloride ions enhance the adsorption and inhibition of the wetting agent. A small amount of chloride ions serve as binding sites for polyethylene glycol to the electrode surface. Chloride is added in the form of sodium chloride or diluted hydrochloric acid. Chloride ions in the acidic copper plating bath are used to eliminate striated deposits in high current density regions. Chloride ions also affect the surface appearance, structure, microhardness, crystallographic orientation, and internal stress of the deposits. Chloride ions are consumed through electrochemical / chemical changes during electrolysis, partial incorporation into the deposits, loss in spent acid rinse solutions, bath dilution, and anode maintenance. The concentration of chloride ions in the acidic copper electroplating bath is typically maintained in the range of about 20 ppm to about 200 ppm, more preferably about 60 ppm to about 150 ppm, and most preferably about 70 ppm to about 100 ppm.

[0072] The characteristics of the copper deposit are affected by the concentration of copper sulfate, free acid, additives, temperature, cathode current density, and the nature and degree of agitation.

[0073] The filling behavior in the vias is affected at least in part by controlling the deposition kinetics within the vias and on the horizontal portions and edges. This can be achieved by introducing certain organic additives into the acidic copper electroplating bath to affect the rate at which copper ions are deposited at the corresponding locations. As described above, the organic additives include one or more brighteners, wetting agents, and leveling agents.

[0074] Brighteners incorporate organic compounds containing sulfur and other functional groups and are responsible for forming small grain-refined deposits. Brighteners also serve as leveling agents. Brighteners are consumed by incorporation into the electrolytic deposit at the cathode or by oxidation onto the anode surface (especially in the case of using an insoluble anode). Brighteners can also be consumed by decoupling in the presence of metallic copper, producing by-products, or by air oxidation, anode maintenance, or by loss in spent acid rinse solutions / bath dilution.

[0075] Examples of suitable brighteners include one or more of the following: 3-(benzothiazolyl-2-thio)-propylsulfonic acid, sodium salt; 3-thiopropanol-1-sulfonic acid, sodium salt; ethylenedithiodipropylsulfonic acid, sodium salt; bis-(p-sulfophenyl)-disulfide, disodium salt; bis-(ω-sulfobutyl)-disulfide, disodium salt; bis-(ω-sulfohydroxypropyl)-disulfide, disodium salt; bis-(ω-sulfopropyl)-disulfide, disodium salt; bis-(ω-sulfopropyl)-sulfide, disodium salt; methyl-(ω-sulfopropyl)-disulfide, disodium salt; methyl-(ω-sulfopropyl)-trisulfide, disodium salt; O-ethyl dithiocarbonic acid-S-(ω-sulfopropyl)-ester, potassium salt; mercaptoacetic acid; thiophosphoric acid-O-ethyl-bis-(ω-sulfopropyl)-ester, disodium salt; and thiophosphoric acid-(ω-sulfopropyl)-ester, trisodium salt. Other suitable sulfur-containing compounds and their salts will also be known to those skilled in the art and will be useful in the acidic copper electroplating bath described herein. In a preferred embodiment, the brightener comprises bis-(ω-sulfopropyl)-sulfide or 3-thiopropanol-1-sulfonic acid or a salt thereof.

[0076] The concentration of the brightener in the acidic copper plating bath is typically maintained in the range of about 0.1 ppm to about 30 ppm, more preferably about 0.5 ppm to about 20 ppm, and most preferably in the range of about 4 ppm to 10 ppm.

[0077] The wetting agent comprises high molecular weight organic compounds having low solubility and low diffusion coefficients in solution, such as polyethylene glycol. The inhibitor adsorbs on the cathode surface and uniformly forms a diffusion layer to limit the transfer of the brightener and the leveling agent. In the presence of chloride ions, the degree of adsorption and inhibition is further enhanced. In one embodiment, the wetting agent has a molecular weight of at least about 300. More preferably, the wetting agent has a molecular weight between about 500 and about 5,000.

[0078] The wetting agent can be consumed during electrolysis where a decrease in molecular weight occurs, or can be consumed by being partially incorporated into the deposit. Additionally, a black film can form on the anode, which is carrying a solution containing the wetting agent. Like the brightener, the wetting agent can be consumed by anode maintenance or by loss through spent acid rinse solutions / bath dilution.

[0079] Examples of suitable wetting agents include one or more of the following: carboxymethyl cellulose, nonylphenol polyethylene glycol ether, octylene glycol - bis - (polyalkylene glycol ether), octanol polyalkylene glycol ether, polyethylene glycol oleate, polyethylene glycol - polypropylene glycol copolymerization, polyethylene glycol, polyethylene glycol dimethyl ether, polypropylene glycol, polyvinyl alcohol, β - naphthyl polyethylene glycol ether, polyethylene glycol stearate, stearyl alcohol polyethylene glycol, and copolymers of propylene glycol and ethylene glycol. Other suitable polyethylene glycols and similar compounds will also be known to those skilled in the art and will be useful as wetting agents in the acidic copper electroplating bath of the present invention. In a preferred embodiment, the wetting agent comprises a copolymer of propylene glycol and ethylene glycol.

[0080] The concentration of the wetting agent in the acidic copper plating bath is generally maintained in the range of about 0.1 g / L to about 50 g / L, more preferably about 1 g / L to about 10 g / L.

[0081] Leveling agents are generally medium - molecular - weight organic compounds containing key functional groups. In one embodiment, the molecular weight of the leveling agent ranges between about 300 and about 10,000, more preferably between about 500 and about 5,000. The leveling agent has low solubility and low diffusion coefficient in solution and acts by selective adsorption on accessible surfaces (i.e., flat surfaces and protruding high points). Proper leveling is the result of diffusion control of the leveling substance. The leveling agent is consumed by electrochemical / chemical changes during electrolysis, by partial incorporation into the deposit, by anode maintenance, and by waste pickling solution loss / bath dilution.

[0082] Examples of suitable leveling agents include polyamines, ethoxylated polyamines, polypyridines, polyimidazoles, polyvinylpyridines, polyvinylimidazoles, ethoxylated polyvinylpyridines, and ethoxylated polyvinylimidazoles. In a preferred embodiment, the leveling agent comprises ethoxylated polyamines and / or polyvinylpyridine.

[0083] The concentration of the leveling agent in the acidic copper plating bath is generally maintained in the range of about 0.001 ppm to about 200 ppm, more preferably about 0.001 ppm to about 100 ppm, and most preferably about 0.001 ppm to about 50 ppm.

[0084] Table 1 summarizes the composition of the copper plating bath according to the present invention:

[0085] Table 1. Typical Composition and Concentration of Copper Plating Bath

[0086] <![CDATA Component > <![CDATA Concentration Range > Copper Sulfate 100 g / L - 300 g / L Sulfuric Acid 10 g / L - 150 g / L Chloride Ion 40 ppm - 200 ppm Brightener 4 ppm - 10 ppm Wetting Agent 1 g / L - 10 g / L Leveling Agent 0.001 ppm - 50 ppm

[0087] The substrate is brought into contact with the acidic copper plating bath aqueous solution by various methods known in the art, including, for example, immersing the substrate in the bath or using other plating equipment. By using specialized pulse rectification, initially in the form of a pulsed wave, which results in accelerated filling of the middle of the via while minimizing the amount of copper on the plated surface. When the center of the via is closed, the waveform is changed to a direct DC current in the same acidic copper plating solution. The result is continuous plating of the via until it is completely filled.

[0088] The acidic copper plating bath can be used in conventional vertical or horizontal plating equipment. The plating system can be designed as a vertical hoist VCP or a horizontal system with an inert or soluble anode.

[0089] Examples of suitable anode materials include iridium oxide coated on titanium mesh or anodes coated with mixed metal oxides. Other suitable anode materials will also be known to those skilled in the art. The anode is additionally optionally but preferably shielded to optimize macro distribution.

[0090] In one embodiment, the anode material is iridium oxide / tantalum oxide coated titanium. A suitable anode is available from DeNora S.p.A under the trade name De Nora DT. Other suitable anode materials will be known to those skilled in the art and can also be used in the practice of the present invention.

[0091] The substrate or at least a portion of its surface can be brought into contact with the acidic copper plating aqueous solution by various methods, including spraying, smearing, dipping, immersing or by other suitable means.

[0092] Preferably, the copper plating aqueous solution is stirred during the plating process. Stirring can be achieved, for example, by mechanical movement of the water bath, such as by oscillation, agitation or continuous pumping of the plating bath solution, or by ultrasonic treatment, elevated temperature or gas feeding, such as air purging with an inert gas (i.e., argon or nitrogen).

[0093] The methods described herein also preferably include cleaning, etching, reduction, rinsing and / or drying steps as commonly known in the art.

[0094] The acidic copper electroplating bath described herein is equipped with a solution manifold system, including an array of nozzles for providing direct solution impingement against the panel. The nozzles on either side of the panel are directly aligned with each other, and the pump is capable of flowing the solution at a rate of 0 to 3.0 L / min / nozzle.

[0095] Plating may be carried out in panel, pattern or button plating modes, as commonly known to those skilled in the art.

[0096] After plating, the panel can be used as is, or the panel can be run through typical processes such as planarization or copper reduction, or additional layers can be built where additional microvias can be stacked on the copper-filled vias.

[0097] Figure 1 Depicts the steps of through-hole plating with copper as a single chemical composition according to the present invention.

[0098] As Figure 1 shown, vias are drilled or otherwise formed in the circuit board. A primary metallization step such as electroless copper plating or direct metallization is performed after drilling to provide a laminated surface within the vias and / or microvias. Optionally, the primary metallization layer can be flash plated with a thin layer of copper to increase conductivity and improve robustness. Next, pulse plating is initiated to accelerate the filling of the middle of the via while minimizing the amount of surface copper plating. Next, as the pulse plating is completed, the center of the via closes. Finally, the waveform is converted to a DC current in the same acidic copper plating solution to plate the via until it is fully metallized.

[0099] The method described herein is used for metallizing a substrate having a thickness between 0.005 mm and about 3 mm, more preferably between about 0.01 mm and about 1.0 mm, and most preferably between about 0.05 mm and about 0.5 mm. The via diameter is generally in the range of about 0.005 mm to about 1 mm, preferably about 0.01 mm to about 0.8 mm, and most preferably about 0.075 mm to about 0.25 mm. Thus, the process described herein is applicable to metallizing vias having an aspect ratio between about 0.5:1 and about 6:1, more preferably between about 0.5:1 and about 4:1, and most preferably between about 0.5:1 and about 3:1.

[0100] The electrolytic plating of the vias described herein combines pulse plating and DC plating in a defined manner to achieve complete filling of the vias in a single-step, single-bath plating process.

[0101] Table 2 depicts the process parameters of DC and pulse plating currents according to the present invention.

[0102] Table 2. Process Parameters for DC and Pulse Plating

[0103]

[0104]

[0105] Table 3 describes examples of steps in the process of the present invention, including the current density and cycle time that have been determined to produce good results. Note that step 1 is an optional step in the process, and the present invention can be performed using only steps 2 and 3.

[0106] Table 3. Steps of the Plating Process

[0107] Step Number Current Mode Current Density (ASD) Cycle Time (minutes) 1 Direct Current 2.5 5 2 Pulse Current 2.5 45 3 Direct Current 2.0 30

[0108] Table 4 below illustrates an example of a pulse plating cycle according to the present invention. As illustrated in Table 4, the plating cycles can be different on opposite sides of the PCB being processed.

[0109] Table 4. Pulse Plating Cycle.

[0110] (4 ASD) Step 1 Step 2 Step 3 Step 4 Step 5 Step 6 Step 7 Step 8 First Side (Ampere) 2 4 2 -12 2 8 2 0 Second Side (Ampere) 2 0 2 8 2 -12 2 4 Time (ms) 120 120 140 120 120 120 140 120

[0111] As described herein, the process of the present invention uses a special type of metallization with pulse reverse current. This special technique is characterized by a phase shift of 10° to 280° between two pulse forms generated by two separate pulse rectifiers. With the two rectifiers, both sides of the printed circuit board can be metallized separately. Additional features include the use of periodically repeated pulse pauses for the two rectifiers.

[0112] The ratio of the duration of the at least one forward current pulse to the duration of the at least one reverse current pulse is adjusted to at least 4:1, more preferably 4:1 to 10:1, even more preferably 5:1 to 9:1.

[0113] The duration of the at least one forward current pulse can be adjusted to preferably at least 5 ms to 250 ms, more preferably 100 ms to 150 ms.

[0114] The duration of the at least one reverse current pulse is preferably adjusted to 5 to 250 ms, more preferably 100 ms to 150 ms.

[0115] In one embodiment, the duration of the forward current pulse and the duration of the reverse current pulse are the same or substantially the same.

[0116] The peak current density of the at least one forward current pulse at the workpiece is preferably adjusted to at most 15 A / dm 2 . Particularly preferably, the peak current density of the at least one forward current pulse at the workpiece is about 5 A / dm 2 .

[0117] The peak current density of the at least one reverse current pulse at the workpiece is preferably adjusted to a value not exceeding 60 A / dm 2 . Particularly preferably, the peak current density of the at least one reverse current pulse at the workpiece is about 20 A / dm 2 .

[0118] In a further progression of the metallization process, at least one parameter of the pulse reverse current can be varied, where the parameter is selected from the following: including the ratio of the duration of the forward current pulse to the duration of the reverse current pulse and the ratio of the peak current density of the forward current pulse to the peak current density of the reverse current pulse. It has been shown that increasing the ratio of the peak current density of the forward current pulse to the peak current density of the reverse current pulse is particularly advantageous when the metallization workpiece and / or reducing the ratio of the duration of the forward current pulse to the duration of the reverse current pulse.

[0119] In one embodiment, the apparatus used in the practice of the present invention includes:

[0120] A) A plating tank in which an acidic copper electroplating bath is maintained;

[0121] B) A solution delivery system that includes a dual-cartridge manifold or a vertical pipe manifold;

[0122] C) A series of injector nozzles or cone nozzles that are arranged to simultaneously impinge on both sides of a circuit board immersed in the plating tank;

[0123] D) A plating rack for holding the PCB; and

[0124] E) An electroplating power rectifier capable of performing DC plating and pulse reverse plating.

[0125] In one embodiment, the apparatus can include a standard vertical hoist or an automated plating apparatus. In another embodiment, the apparatus can include a horizontal plating apparatus. However, a vertical plating apparatus is preferred.

[0126] The plating tank preferably includes a temperature controller for regulating heating and cooling, which is connected to a heating and cooling system capable of maintaining the acidic copper electroplating bath at a desired bath temperature + / - 1.5 °C. In a preferred embodiment, the plating bath is maintained at a temperature between about 10 °C and about 50 °C, more preferably between about 20 °C and about 30 °C, and most preferably between about 22 °C and about 25 °C.

[0127] The acidic copper electroplating bath is optionally but preferably agitated. In one embodiment, agitation is performed by using a cathode track agitation with adjustable speed, which extends up to 12 cm to 15 cm side-to-side distance. A clean air agitation spray double tube can be aligned below the cathode. Other agitation methods are also known to those skilled in the art and can be applied to the present invention.

[0128] The anode-to-cathode ratio is preferably calibrated to be greater than 1:0.75 to 1:1. It is important to have sufficient surface area for uniform current distribution across the entire PCB.

[0129] The plating bath is also preferably equipped with an automatic copper oxide replenishment system to maintain the copper sulfate concentration within a desired level. Additionally, the apparatus preferably further includes a copper oxide mixing tank and a copper oxide feeder for introducing copper oxide into the replenishment system. The plating bath also includes means for replenishing other components of the acidic copper plating bath and means for monitoring the concentration of the components.

[0130] The plating rack can be coated stainless steel, or can be a partially coated or uncoated plating rack. Optionally, the plating rack can include a coated copper core.

[0131] The copper electroplating bath is also preferably equipped with a continuous solution filtration system capable of filtering particles of about 1 micron or larger and is designed to process at least 3 solution turnovers per hour, preferably at least 4 solution turnovers per hour, and more preferably at least 5 solution turnovers per hour.

[0132] The apparatus also preferably includes a controller capable of managing the heating, cooling, and chemical addition of the plating bath.

[0133] Finally, it is highly desirable that the copper electroplating apparatus be equipped with a ventilation system commonly known to those skilled in the art.

[0134] The electroplating power rectifier is configured to handle direct current and pulse reverse current. The rectifier can be water-cooled or air-cooled. The rectifier can be programmed with multi-step capabilities. In one embodiment, the rectifier can be programmed with multiple steps, including at least 4 steps or at least 6 steps. In a preferred embodiment, the rectifier can be programmed with 8 steps.

[0135] The rectifier is also capable of performing double-current output side-to-side rectification. Additionally, the rectifier can be configured for asynchronous pulse cycling with a phase shift of 0 degrees to 180 degrees. Preferably, in the direct current mode, the ripple is less than 5% at 100% output.

[0136] The cassette manifold / vertical pipe is designed to include an array of injector nozzles or cone nozzles. Opposing nozzles are designed from the front side to the rear side. The nozzles are preferably arranged in a staggered pattern and can be arranged to be spaced apart by about 2 cm to about 8 cm, more preferably about 3 cm to about 6 cm, and most preferably about 4 cm to about 5 cm in both the horizontal and vertical directions.

[0137] The present invention is further explained by the following examples:

[0138] Example :

[0139] Prepare an acidic copper plating bath according to the following parameters:

[0140] Component Composition Control Range Copper Sulfate 240 g / L 230 g / L - 245 g / L Sulfuric Acid 90 g / L 85 g / L - 90 g / L Chloride Ion 75 ppm 70 ppm - 100 ppm Brightener 7 ppm 4 ppm - 10 ppm Wetting Agent 5 g / L 1 g / L - 10 g / L Leveling Agent 10 ppm 0.001 ppm - 50 ppm Bath Temperature 23℃ 22℃-25℃

[0141] Based on the operation's ampere-hours and / or chemical titration analysis, maintain the concentration of copper sulfate by adding copper oxide on a manual or automatic basis.

[0142] Based on chemical titration analysis, supplement the concentrations of sulfuric acid and chloride ions.

[0143] Based on the operation's ampere-hours and / or cyclic voltammetric stripping (CVS) analysis, use an automatic dosing system to complete the supplementation of brighteners, wetting agents, and leveling agents.

[0144] Comparative Example 1 :

[0145] Use the above acidic copper plating bath for plating a test panel using a standard DC filling process.

[0146] Use a cycle time of 85 minutes to plate a test panel with a thickness of 0.075 mm and a 0.12 mm laser-drilled via hole.

[0147] The current density is 3 A / dm 2 And the plating is carried out for 85 minutes.

[0148] Figure 2 Depicts a cross-section of the plated circuit board, and shows a plated deposit of 28 to 40 microns and exhibits pits of 6 to 12 microns.

[0149] Example 1 :

[0150] Use the above acidic copper plating bath for plating a test panel using the plating cycle according to the present invention and the plating parameters outlined in Table 4.

[0151] Use a cycle time of 80 minutes to plate a test panel with a thickness of 0.075 mm and a 0.12 mm laser-drilled via hole.

[0152] The current density is 2.2 A / dm 2 And the plating is carried out for 80 minutes.

[0153] Figure 3 Depicts a cross-section of the plated circuit board, and shows a plated deposit of 23 to 25 microns and no pits.

[0154] Comparative Example 2 :

[0155] Use the above acidic copper plating bath for plating a test panel using a standard DC filling process.

[0156] Use a 70-minute cycle time to plate a test panel with a thickness of 0.07 mm and a 0.1 mm via hole formed therein using mechanical means.

[0157] The current density is 3 A / dm 2 and the plating is carried out for 70 minutes.

[0158] Figure 4 A cross-section of the plated circuit board is depicted and shows a plating deposit of 40 microns and exhibits a pit of 20 microns.

[0159] Example 2 :

[0160] Using the plating cycle according to the present invention and the plating parameters outlined in Table 4, the above acidic copper plating bath was used to plate a test panel.

[0161] A test panel with a thickness of 0.07 mm and having a 0.1 mm via formed therein by mechanical means was plated using a 60-minute cycle time.

[0162] The current density is 2.2 A / dm 2 and the plating is carried out for 60 minutes.

[0163] Figure 5 A cross-section of the plated circuit board is depicted and shows a plating deposit of 18 to 20 microns and no pits.

[0164] Example 3 :

[0165] Using the plating cycle according to the present invention and the plating parameters outlined in Table 4, the above acidic copper plating bath was used to plate a test panel.

[0166] A test panel with a thickness of 0.24 mm and having a 0.1 mm via drilled therein by mechanical means was plated using an 85-minute cycle time.

[0167] The current density is 2.8 A / dm 2 and the plating is carried out for 85 minutes.

[0168] Figure 6 A cross-section of the plated circuit board is depicted and shows a plating deposit of 23 to 25 microns and no pits.

[0169] Comparative Example 3 :

[0170] Using a standard DC filling process, the above acidic copper plating bath was used to plate a test panel.

[0171] A test panel with a thickness of 0.075 mm and having a 0.1 mm via formed therein by laser drilling was plated using a 50-minute cycle time.

[0172] The current density is 2.8 A / dm 2 and the plating is carried out for 50 minutes.

[0173] Figure 7 Depicts a cross-section of a plated circuit board, and shows a plating deposit of 25 to 27 microns and exhibits pits of 6 to 8 microns.

[0174] Example 4 :

[0175] The above acidic copper plating bath was used to plate a test panel using the plating cycle according to the present invention and the plating parameters outlined in Table 4.

[0176] A test panel having a thickness of 0.075 mm and having 0.1 mm vias formed therein using laser drilling was plated using a 38-minute cycle time.

[0177] The current density was 2.5 A / dm 2 and the plating was carried out for 38 minutes.

[0178] Figure 8 Depicts an SEM of a plated circuit board, and shows a plating deposit of 10 to 12 microns and no pits.

[0179] Example 5 :

[0180] A test panel was prepared to evaluate the through-hole filling plating.

[0181] The test panel had a thickness of 74 μm and via openings with diameters of 50 μm, 75 μm, and 100 μm.

[0182] An acidic copper plating bath was prepared according to the following parameters:

[0183] Component Composition Copper Sulfate 220 g / L Sulfuric Acid 80 g / L Chloride Ion 60 ppm Brightener 7 ppm Wetting Agent 5 g / L Leveling Agent 0.6 ppm Bath Temperature 22℃-23℃

[0184] First, the test panel was cleaned. The cleaning / conditioning solution included a 5% v / v AKTIPUR AS solution (available from MacDermid Enthone), and the test panel was contacted with the cleaning / conditioning solution at room temperature (i.e., 25 °C) for approximately 3 minutes. The test panel was contacted with the cleaning / conditioning solution by immersing the test panel in the solution.

[0185] Thereafter, the test panel was contacted with an acid treatment solution containing 3% v / v sulfuric acid at room temperature for 1 minute. The test panel was contacted with the acid treatment solution by immersing the test panel in the solution.

[0186] After contacting with the cleaning / conditioning solution and the acid treatment solution, the test panel was rinsed with water.

[0187] Next, the test panel was brought into contact with an acidic copper plating solution by immersing the test panel in the acidic copper plating solution. Electrolytic plating was carried out at a current density of 22 ASF for a period of up to 60 minutes. The plating conditions are outlined in Table 4.

[0188] Figure 9 Depicts the plating appearance after through-hole filling plating. As Figure 9 depicted, the test panel exhibited a uniform and bright copper plating on both sides of the test panel.

[0189] Figure 10 Depicts a cross-section of the through-hole filling plating in a 100 μm opening taken at various points on the test panel.

[0190] As Figure 10 shown, both surfaces of the test panel exhibited a uniform plating with a thickness of 17 μm to 18 μm, and no pits were observed in the vias filled with through-holes, and no cavities were present in the plating.

[0191] Example 6 :

[0192] A test panel was prepared to evaluate the through-hole filling plating.

[0193] The test panel was prepared with an electroless copper layer and a flash copper layer. The test panel was 460 mm × 610 mm and had a thickness of 250 μm. The through-holes had a diameter of 100 μm.

[0194] An acidic copper plating bath was prepared according to the following parameters:

[0195] Component Composition Copper Sulfate 220 g / L Sulfuric Acid 80 g / L Chloride Ion 60 ppm Brightener 7 ppm Wetting Agent 5 g / L Leveling Agent 0.6 ppm Bath Temperature 22℃-23℃

[0196] First, the test panel was cleaned. The cleaning / conditioning solution included 5% v / v AKTIPUR AS solution (available from MacDermid Enthone), and the test panel was brought into contact with the cleaning / conditioning solution at room temperature (i.e., 25 °C) for approximately 3 minutes. The test panel was brought into contact with the cleaning / conditioning solution by immersing the test panel in the solution.

[0197] Thereafter, the test panel was first brought into contact with a micro-etching solution and then with an acid treatment solution. The micro-etching solution contained 60 g / L of SPS and 4% v / v sulfuric acid, and the contact time was approximately 1 minute at room temperature. The test panel was contacted with the acid treatment solution containing 3% v / v sulfuric acid for 1 minute at room temperature. The test panel was brought into contact with the acid treatment solution by immersing the test panel in the solution.

[0198] After contact with the cleaning / conditioning solution and the micro-etching solution, the test panel was rinsed with water.

[0199] Next, the test panel was brought into contact with an acidic copper plating solution by immersing the test panel in the acidic copper plating solution. Electrolytic plating was carried out at a current density of 22 ASF for a period of up to 85 minutes. The plating conditions are outlined in Table 4.

[0200] Figure 11 Depicts the plating appearance after through-hole filling plating. As Figure 11 depicted, the test panel exhibited a uniform and bright copper plating on both sides of the test panel.

[0201] Figure 12 Depicts a cross-section of the through-hole filling plating in a 100 μm opening taken at various points on the test panel.

[0202] As Figure 12 shown, the two surfaces of the test panel exhibited a uniform plating with a thickness of 22 μm to 24 μm, and any pits had a thickness of less than 5 μm. The plating had no cavities.

[0203] Example 7 :

[0204] A test panel was prepared to evaluate the X-through-hole filling plating by through-hole filling plating.

[0205] The test panel was prepared with an electroless copper layer and a flash copper layer having a thickness of 0.02 mil to 0.3 mil. The test panel had dimensions of 510 mm × 610 mm and a thickness of 2.4 mil to 3 mil. The hole openings were 2.5 mil and 2.8 mil.

[0206] An acidic copper plating bath was prepared according to the following parameters:

[0207] Component Composition Copper Sulfate 220 g / L Sulfuric Acid 80 g / L Chloride Ion 60 ppm Brightener 7 ppm Wetting Agent 5 g / L Leveling Agent 0.6 ppm Bath Temperature 22℃-23℃

[0208] First, the test panel was cleaned. The cleaning / conditioning solution included 5% v / v AKTIPUR AS solution (available from MacDermid Enthone), and the test panel was brought into contact with the cleaning / conditioning solution at room temperature (i.e., 25 °C) for approximately 3 minutes. The test panel was brought into contact with the cleaning / conditioning solution by immersing the test panel in the solution.

[0209] Thereafter, the test panel was first brought into contact with a micro-etching solution and then with an acid treatment solution. The micro-etching solution contained 60 g / L of SPS and 4% v / v sulfuric acid, and the contact time was approximately 1 minute at room temperature. The test panel was contacted with the acid treatment solution containing 3% v / v sulfuric acid for 1 minute at room temperature. The test panel was brought into contact with the acid treatment solution by immersing the test panel in the solution.

[0210] After contact with the cleaning / conditioning solution and the micro-etching solution, the test panel was rinsed with water.

[0211] Next, the test panel was brought into contact with an acidic copper plating solution by immersing the test panel in the acidic copper plating solution. Electrolytic plating was carried out at a current density of 21 ASF for a period of up to 37 minutes. The plating conditions are outlined in Table 4.

[0212] Figure 13 A cross-section of a via opening having an opening of 2.4 mil to 2.5 mil and a neck of 2.0 mil to 2.2 mil is depicted. As shown, the test panel exhibited a uniform and bright copper plating of 9.3 μm to 10.7 μm on both sides of the test panel, and no pits or voids were observed in the through-hole fill plating.

[0213] Figure 14 A cross-section of a via opening having an opening of 2.8 mil and a neck of 2.5 mil to 2.8 mil is depicted. As shown, the test panel exhibited a uniform and bright copper plating of 10.8 μm to 11.8 μm on both sides of the test panel, and no pits or voids were observed in the through-hole fill plating.

[0214] Accordingly, it can be seen that the present invention described herein allows for the complete filling of through-holes in a single-step single copper plating bath, thereby reducing the number of tanks in the pipeline and thus reducing the equipment cost, and reducing the number of tanks to be maintained and the number of rectifiers required for plating. Additionally, the process of the present invention also eliminates the potential separation problem between the via fill plating and the bridging plating provided in other methods. Finally, the method of the present invention allows for the metallization of through-holes and / or micro-vias without exhibiting any defects such as unacceptable voids, cavities, or excessive pits.

[0215] Finally, it should also be understood that the following claims are intended to cover all the general and specific features of the present invention described herein and all statements that may fall within the scope of the present invention in language between them.

Claims

1. A method for copper electroplating in the manufacture of a printed circuit board, the method comprising the following steps: a) Preparing an electronic substrate to receive copper electroplating thereon, wherein the electronic substrate includes one or more feature structures, and wherein the one or more feature structures include one or more through-holes in the electronic substrate; and b) Electroplating copper in the one or more feature structures by bringing the electronic substrate into contact with an acidic copper electroplating solution, the acidic copper electroplating solution comprising: a. A source of copper ions; b. Sulfuric acid; c. A source of chloride ions; d. A brightener; e. A wetting agent or inhibitor; and f. A leveling agent; wherein the acidic copper electroplating solution is configured for a single-step process, wherein the same acidic copper electroplating solution is used to electroplate the one or more through-holes using a plating cycle until metallization is complete; wherein the plating cycle comprises the following steps: i) Performing pulse plating using a pulse plating cycle for a first time period to accelerate copper plating in the middle of the through-hole while minimizing the amount of surface copper plated, and thereafter, ii) Performing direct current plating using an uninterrupted forward current in the same acidic copper electroplating solution for a second time period to electroplate the one or more through-holes until the one or more through-holes are completely metallized, wherein when the centers of the one or more through-holes are closed, the waveform is changed to direct current in the same acidic copper electroplating solution, wherein the pulse plating cycle comprises a first pulse plating cycle having a first pulse plating waveform on a first side of the electronic substrate and a second pulse plating cycle having a second pulse plating waveform on a second side of the electronic substrate, wherein each of the first pulse plating cycle and the second pulse plating cycle comprises a series of repeated one or more forward current pulses, one or more reverse current pulses, and one or more rest periods, wherein the duration of the one or more forward current pulses is in the range of 120 ms to 150 ms, the duration of the one or more reverse current pulses is in the range of 120 ms to 150 ms, and the duration of the one or more forward current pulses is substantially the same as the duration of the one or more reverse current pulses, wherein the plating cycle comprises at least one of the following steps: applying a forward current pulse to a first side of the electronic substrate while applying a rest period to a second side of the electronic substrate.

2. The method according to claim 1, wherein the step of preparing the printed circuit board to receive electroplating thereon comprises the step of cleaning the printed circuit board before metallizing the one or more through-holes.

3. The method according to claim 2, further comprising the step of micro-etching the cleaned printed circuit board.

4. The method according to claim 1, wherein the one or more through-holes that are metallized do not exhibit any defects.

5. The method according to claim 4, wherein the metallized electroplated copper deposits completely fill the one or more through-holes and deposit conformal copper deposits on the electronic substrate.

6. The method according to claim 1, wherein the electronic substrate has a thickness between 0.005 mm and 3 mm.

7. The method according to claim 6, wherein the one or more through-holes have a diameter of 0.005 mm to 1 mm.

8. The method according to claim 7, wherein the one or more through-holes have a diameter of 0.01 mm to 0.25 mm.

9. The method according to claim 6, wherein the one or more through-holes have an aspect ratio between 0.5:1 and 6:

1.

10. The method according to claim 5, wherein the conformal copper deposit has a thickness between 5 µm and 100 µm.

11. The method according to claim 1, wherein the acidic copper plating solution is maintained at a temperature between 10 °C and 50 °C.

12. The method according to claim 1, wherein the acidic copper plating solution comprises: a) 100 g / L to 300 g / L copper sulfate; b) 10 g / L to 150 g / L sulfuric acid; c) 20 ppm to 200 ppm chloride ions; d) 0.1 ppm to 30 ppm brightener; e) 0.1 g / L to 50 g / L wetting agent or inhibitor; and f) 0.001 ppm to 200 ppm leveling agent.

13. The method according to claim 1, further comprising the step of performing DC plating with an uninterrupted forward current before step i).

14. The method according to claim 13, wherein the DC plating for the first period deposits a flash copper layer on the surface of the one or more through-holes.

15. The method according to claim 1, wherein the electronic substrate is brought into contact with the acidic copper plating solution by a method selected from: spraying, coating, dipping, and immersion.

16. The method according to claim 15, wherein the electronic substrate is brought into contact with the acidic copper plating solution by immersing the electronic substrate in the acidic copper plating solution.

17. The method according to claim 1, wherein the acidic copper plating solution comprises: a. 100 g / L to 300 g / L copper ion source; b. 10 g / L to 150 g / L acid; c. 20 ppm to 200 ppm chloride ion source; d. 0.1 ppm to 30 ppm brightener, wherein the brightener is selected from: 3-(benzothiazolyl-2-thio)-propylsulfonic acid, sodium salt; 3-thiopropanol-1-sulfonic acid, sodium salt; bis-(p-sulfophenyl)-disulfide, disodium salt; bis-(ω-sulfobutyl)-disulfide, disodium salt; bis-(ω-sulfohydroxypropyl)-disulfide, disodium salt; bis-(ω-sulfopropyl)-disulfide, disodium salt; bis-(ω-sulfopropyl)-sulfide, disodium salt; O-ethyl dithiocarbonate-S-(ω-sulfopropyl)-ester, potassium salt; mercaptoacetic acid; O-ethyl-bis-(ω-sulfopropyl)-thiol-phosphate, disodium salt; and (ω-sulfopropyl)-thiol-phosphate, trisodium salt; e. 0.1 g / L to 50 g / L of wetting agent or inhibitor, selected from: carboxymethyl cellulose, nonylphenol polyethylene glycol ether, octanediol-bis-(polyalkylene glycol ether), octanol polyalkylene glycol ether, polyethylene glycol oleate, polyethylene glycol-polypropylene glycol copolymer, polyethylene glycol, polyethylene glycol dimethyl ether, polypropylene glycol, polyvinyl alcohol, β-naphthyl polyethylene glycol ether, polyethylene glycol stearate, polyethylene glycol stearyl alcohol, and copolymer of propylene glycol and ethylene glycol; and f. 0.001 ppm to 200 ppm of leveling agent, selected from: polyamine, ethoxylated polyamine, polypyridine, polyimidazole, polyvinylpyridine, polyvinylimidazole, ethoxylated polyvinylpyridine, and ethoxylated polyvinylimidazole.

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