Semiconductor device

Abstract

A semiconductor device capable of improving heat dissipation characteristics is provided. A second member is joined in surface contact with a first surface of a first member including a semiconductor region composed of an elemental semiconductor system. The second member includes a high-frequency amplification circuit of a compound semiconductor system. A conductor protrusion protrudes from the second member to an opposite side of the first member side. The first member internally includes a temperature measuring element that detects a temperature.

Description

Technical Field

[0001] This invention relates to semiconductor devices. Background Technology

[0002] RF front-end modules, which integrate high-frequency signal transmission and reception functions, are assembled in electronic devices used for mobile communications, satellite communications, and other applications. An RF front-end module includes: a monolithic microwave integrated circuit (MMIC) component with high-frequency amplification capabilities, a control IC for controlling the high-frequency amplification circuit, a switching IC, a duplexer, etc.

[0003] Patent Document 1 discloses a miniaturized high-frequency module by stacking a control IC on an MMIC. The high-frequency module disclosed in Patent Document 1 includes an MMIC mounted on a module substrate and a control IC stacked on the MMIC. The electrodes of the MMIC, the electrodes of the control IC, and the electrodes on the module substrate are electrically connected by wire bonding.

[0004] Patent Document 1: U.S. Patent Application Publication No. 2015 / 0303971.

[0005] In high-frequency amplifier circuits, heterojunction bipolar transistors (HBTs) are used, for example. During operation, HBTs generate collector losses and thus heat. This heat causes a temperature rise in the HBT, which in turn increases the collector current. If this positive feedback condition is met, it can lead to thermal runaway of the HBT. To avoid thermal runaway of the HBT, the upper limit of its output power is limited.

[0006] To achieve high output in high-frequency amplifier circuits, it is preferable to improve the heat dissipation characteristics from semiconductor devices, including HBTs. However, the high-frequency module disclosed in Patent Document 1 does not meet the recent demands for high output in high-frequency amplifier circuits. Summary of the Invention

[0007] The purpose of this invention is to provide a semiconductor device that can improve heat dissipation characteristics.

[0008] According to one aspect of the present invention, a semiconductor device is provided, comprising:

[0009] The first component has a first surface and includes a semiconductor region composed of an elemental semiconductor system;

[0010] The second component, which is surface-contactly connected to the first surface of the first component, includes a high-frequency amplifier circuit based on a compound semiconductor system; and

[0011] The conductor protrusion extends from the second component to the opposite side of the first component.

[0012] The first component mentioned above contains a temperature sensing element for detecting temperature.

[0013] The system forms two heat transfer paths: one from the high-frequency amplifier circuit of the second component through the interface between the first and second components to the first component, and another from the second component through a conductor protrusion to the module substrate on which the semiconductor device is mounted. Therefore, the heat dissipation characteristics from the high-frequency amplifier circuit can be improved. Since a temperature sensing element is included inside the first component, and the second component is in surface contact with the first component, the temperature of the second component, in which the high-frequency amplifier circuit is located, can be easily reflected in the temperature detection value based on the temperature sensing element, resulting in an excellent effect. Attached Figure Description

[0014] Figure 1 This is a block diagram of the semiconductor device of the first embodiment.

[0015] Figure 2 This is a schematic cross-sectional view of the semiconductor device of the first embodiment.

[0016] Figure 3A This is an equivalent circuit diagram of each of the plurality of units constituting the power stage amplifier circuit of the semiconductor device of the first embodiment. Figure 3B It is a schematic cross-sectional view of a unit that constitutes a power stage amplifier circuit formed in the second component.

[0017] Figures 4A to 4F The accompanying drawing is a cross-sectional view of a semiconductor device during the manufacturing process.

[0018] Figures 5A-5C The attached figure is a cross-sectional view of a semiconductor device during the manufacturing process. Figure 5D This is a cross-sectional view of the completed semiconductor device.

[0019] Figure 6 This is a diagram showing the positional relationship of some components of the semiconductor device of the second embodiment when viewed from above.

[0020] Figure 7A This is a top view showing the positional relationship of some components of the semiconductor device according to the third embodiment. Figure 7B This is a top-view diagram showing the configuration of multiple transistors and temperature sensing elements.

[0021] Figure 8 This is a block diagram of the semiconductor device according to the fourth embodiment.

[0022] Figure 9 This is a graph showing the temperature dependence of the transistor output of the power stage amplifier circuit of the semiconductor device in the fourth embodiment and the magnitude of the bias current that varies with temperature.

[0023] Figure 10 This is a block diagram illustrating a portion of the functionality of the semiconductor device in the fifth embodiment.

[0024] Figure 11 It is a graph showing the relationship between the attenuation rate of the high-frequency signal from the input terminal of the semiconductor device in the fifth embodiment to the driver stage amplifier circuit and the detected temperature based on the temperature sensing element.

[0025] Figure 12 This is a block diagram illustrating a portion of the functionality of the semiconductor device in the sixth embodiment.

[0026] Figure 13 This is a block diagram of the semiconductor device according to the seventh embodiment.

[0027] Figure 14 This is a block diagram of the semiconductor device of the eighth embodiment.

[0028] Explanation of reference numerals in the attached figures

[0029] 20…Semiconductor device; 21…First component; 21A…First surface; 22…Second component; 31…Input switch circuit; 31A, 31B…Input contacts; 31C…Attenuation circuit; 32…Interstage matching circuit; 33…Output matching circuit; 34…Output switch circuit; 34A, 34B…Output contacts; 34C…Impedance adjustment circuit; 35…Antenna switch circuit; 40…Charge pump circuit; 41, 42…Bias control circuit; 43…Input switch control circuit; 44…Output… 45… Antenna switch control circuit; 46… Temperature sensing element; 47… Digital circuit (temperature detection circuit); 48… Interstage matching control circuit; 49… Output matching control circuit; 50… High-frequency amplifier circuit; 51… Driver stage amplifier circuit; 52… Power stage amplifier circuit; 55… Range with transistors; 56… Range extending the range with transistors; 57… Range with transistors; 61… Wiring; 62, 63… Pads; 67… Interlayer insulating film; 6 8…protective film; 82…conductor protrusion; 82A, 82B…conductor protrusion for emitter; 82P…Cu pillar; 82S…solder layer; 83…conductor protrusion; 90…duplexer; 91…receiving circuit; 92…antenna; 101…substrate semiconductor layer; 101A…conductive region; 101B…component separation region; 102B…base layer; 102C…collector layer; 102E…emitter layer; 103B…base electrode; 103C…collector; 103E…emitter electrode; 104B…Base wiring; 104BB…Base bias wiring; 104C…Collector wiring; 104E…Emitter wiring; 105E…Emitter wiring; 105RF…High-frequency signal input wiring; 111, 112…Interlayer insulating film; 200…Main substrate; 201…Release layer; 202…Component forming layer; 204…Connector; 210, 211…Substrate; 212…Multilayer wiring structure; 213…First component protective film; 215, 216, 217…Wiring. Detailed Implementation

[0030] [First Embodiment]

[0031] Reference Figures 1 to 5D The accompanying drawings illustrate the semiconductor device of the first embodiment.

[0032] Figure 1 This is a block diagram of a semiconductor device 20 according to a first embodiment. The semiconductor device 20 of the first embodiment includes a first component 21 and a second component 22. For example, the first component 21 is made of an elemental semiconductor system, and the second component 22 is made of a compound semiconductor. The semiconductor device 20 is flip-chip mounted on a module substrate. A plurality of duplexers 90 and receiving circuits 91 are mounted on the module substrate. The semiconductor device 20 of the first embodiment is used for frequency division duplex (FDD) communication.

[0033] The first component 21 includes an input switch circuit 31, an interstage matching circuit 32, an output matching circuit 33, an output switch circuit 34, an antenna switch circuit 35, a charge pump circuit 40, bias control circuits 41 and 42, an input switch control circuit 43, an output switch control circuit 44, an antenna switch control circuit 45, a temperature sensing element 46, and a digital circuit 47. Alternatively, as another structural example, the input switch circuit 31, interstage matching circuit 32, output matching circuit 33, output switch circuit 34, and antenna switch circuit 35 may be constructed from surface-mount components mounted on the module substrate or metal patterns within the module substrate. The second component 22 includes a high-frequency amplifier circuit 50 with a two-stage structure: a driver stage amplifier circuit 51 and a power stage amplifier circuit 52. Alternatively, the second component 22 may include an interstage matching circuit 32.

[0034] The two input contacts of the input switch circuit 31 are connected to the two input terminals IN1 and IN2 of the module substrate, respectively. The input switch control circuit 43 selects one input terminal from the two input contacts and inputs the high-frequency signal to the selected input terminal to the driver stage amplifier circuit 51. The input switch circuit 31 is controlled by the input switch control circuit 43.

[0035] The high-frequency signal amplified by the driver stage amplifier circuit 51 is input to the power stage amplifier circuit 52 via the interstage matching circuit 32. The high-frequency signal amplified by the power stage amplifier circuit 52 is input to the input contacts of the output switching circuit 34 via the output matching circuit 33. The bias control circuits 41 and 42 control the bias current or bias voltage supplied to the driver stage amplifier circuit 51 and the power stage amplifier circuit 52, respectively.

[0036] The output switch circuit 34 selects one output contact from multiple output contacts and transmits the high-frequency signal input to the input contact to the selected output contact. The multiple output contacts of the output switch circuit 34 are respectively connected to the transmit signal input ports of multiple duplexers 90. The output switch circuit 34 is controlled by the output switch control circuit 44.

[0037] Multiple circuit-side contacts of the antenna switch circuit 35 are connected to the transmit / receive shared ports of multiple duplexers 90. The antenna switch circuit 35 selects one circuit-side contact from the multiple circuit-side contacts and connects the selected circuit-side contact to the antenna-side contact. The antenna switch circuit 35 is controlled by the antenna switch control circuit 45. The antenna-side contact of the antenna switch circuit 35 is connected to the antenna terminal ANT of the module substrate. An antenna 92 ​​is connected to the antenna terminal ANT. Each receive signal output port of the multiple duplexers 90 is connected to the receiving circuit 91.

[0038] The high-frequency signal, amplified by the power stage amplifier circuit 52, is emitted from the antenna 92 ​​via the output matching circuit 33, the output switching circuit 34, and the duplexer 90. The received signal, received by the antenna 92, is input to the receiving circuit 91 via the antenna switching circuit 35 and the duplexer 90.

[0039] The charge pump circuit 40 is connected to the power supply terminal VDD of the module substrate. A voltage boosted to a predetermined voltage by the charge pump circuit 40 is applied to the input switch control circuit 43, the output switch control circuit 44, and the antenna switch control circuit 45. Furthermore, a power supply voltage is applied from the power supply terminal VDD to the bias control circuits 41 and 42.

[0040] Temperature sensing element 46 measures the temperature. The measurement result is input as an analog signal to digital circuit 47. Temperature sensing element 46 may be a semiconductor temperature sensor, such as a silicon diode. Digital circuit 47 converts the measured temperature value input from temperature sensing element 46 into a digital value and outputs it from the digital input / output terminal I / O. Digital circuit 47 functions as a temperature detection circuit that performs AD conversion on the analog measured temperature value and outputs it. Furthermore, digital circuit 47 decodes externally input commands and outputs control signals to the control circuits within the first component 21.

[0041] Figure 2 This is a schematic cross-sectional view of the semiconductor device 20 according to the first embodiment. The first component 21 includes a substrate 211, a multilayer wiring structure 212 disposed thereon, and a first component protective film 213 covering the surface of the multilayer wiring structure 212. The substrate 211 includes semiconductor regions of an elemental semiconductor system. For example, a silicon substrate or a silicon-on-insulator (SOI) substrate is used as the substrate 211. Figure 1The semiconductor elements and wiring of the input switch circuit 31 shown are composed of semiconductor elements formed on the surface layer of the substrate 211 and wiring within the multilayer wiring structure 212. The passive components constituting the interstage matching circuit 32 are composed of metal patterns within the multilayer wiring structure 212. The temperature sensing element 46 is composed of a diode formed on the surface layer of the substrate 211. Figure 2 In the middle, the area containing the bias control circuit 42, digital circuit 47, and temperature sensing element 46 is enclosed by dashed lines and shown.

[0042] The surface of the protective film 213 of the first component is referred to as the first surface 21A of the first component 21. The second component 22 is surface-contactly bonded to the first surface 21A of the first component 21. Figure 2 In the image, the area where the power stage amplifier circuit 52 formed on the second component 22 is arranged is surrounded by a dashed line and shown.

[0043] An interlayer insulating film 67 is disposed on the first surface 21A to cover the second component 22. Multiple openings are provided at predetermined locations on the interlayer insulating film 67. Pads 62 and 63, and wiring 61 are disposed on the interlayer insulating film 67. The wiring layer with pads 62 and 63 and wiring 61 is sometimes referred to as a rewiring layer. The wiring 61 within the rewiring layer is sometimes referred to as rewiring.

[0044] Wiring 61 is connected to the bias control circuit 42 via wiring 215 within the multilayer wiring structure 212 through an opening in the interlayer insulating film 67, and to the power stage amplifier circuit 52 through another opening in the interlayer insulating film 67. In addition to wiring 61, several other wirings are disposed within the rewiring layer. The wirings within the rewiring layer are used, for example, for... Figure 1 The connection of the input switch circuit 31 and the driver stage amplifier circuit 51 shown are illustrated.

[0045] Pad 62, when viewed from above, is included in the second component 22 and connected to the circuitry formed in the second component 22. Another pad 63, when viewed from above, is positioned outside the second component 22 and connected to the digital circuitry 47 formed in the first component 21 via wiring 216 within the multilayer wiring structure 212. Temperature sensing element 46 is connected to the digital circuitry 47 via wiring 217 within the multilayer wiring structure 212.

[0046] A protective film 68 is disposed on the interlayer insulating film 67 to cover the redistribution layer. The protective film 68 has openings that expose a portion of the upper surface of each of the pads 62 and 63. Conductor protrusions 82 and 83 are disposed on the pads 62 and 63, respectively. The conductor protrusion 82 includes a Cu pillar 82P connected to the pad 62 and a solder layer 82S disposed on the upper surface of the Cu pillar 82P. This type of conductor protrusion 82 is referred to as a Cu pillar bump.

[0047] Furthermore, to improve contact tightness, a bump under-metal layer can be disposed on the bottom surface of the Cu pillar 82P. The other conductor protrusion 83 also has the same stacked structure as conductor protrusion 82. Alternatively, Au bumps, solder ball bumps, or conductor pillars erected on pads can be used instead of Cu pillar bumps in conductor protrusions 82, 83, etc. Like Au bumps, bumps without a solder layer are also called pillars. Conductor pillars erected on pads are also called terminals.

[0048] Conductor protrusions 82 are used, for example, for connecting the grounding conductor within the second component 22 and the grounding conductor of the module substrate. When viewed from above, multiple conductor protrusions are arranged on the outer side of the second component 22 in addition to conductor protrusions 83. These conductor protrusions are used, for example, for... Figure 1 The connections shown are for the input switch circuit 31 and input terminals IN1 and IN2, and the output switch circuit 34 and duplexer 90.

[0049] Figure 3A It is the power stage amplifier circuit 52 constituting the semiconductor device 20 of the first embodiment. Figure 1 The equivalent circuit diagrams of each of the multiple units of the power stage amplifier circuit 52 are shown. The power stage amplifier circuit 52 is composed of multiple units connected in parallel. Furthermore, the driver stage amplifier circuit 51 ( Figure 1 It also has the same circuit structure as the power stage amplifier circuit 52. However, the number of units constituting the driver stage amplifier circuit 51 is less than the number of units constituting the power stage amplifier circuit 52.

[0050] Each unit includes a transistor Q, an input capacitor Cin, and a ballast resistor Rb. The base of transistor Q is connected to the high-frequency signal input wiring 105RF via the input capacitor Cin. Furthermore, the base of transistor Q is connected to the base bias wiring 104BB via the ballast resistor Rb. The emitter of transistor Q is grounded. The collector of transistor Q is connected to the collector wiring 104C. A power supply voltage is applied to the collector of transistor Q via the collector wiring 104C, and an amplified high-frequency signal is output from the collector.

[0051] Figure 3B It constitutes the power stage amplifier circuit 52 formed in the second component 22. Figure 1 This is a schematic cross-sectional view of one unit of the first component 21. The second component 22 includes a substrate semiconductor layer 101. The substrate semiconductor layer 101 is in surface contact with the first component 21, thereby bonding the second component 22 to the first component 21. The substrate semiconductor layer 101 is divided into a conductive region 101A and a device separation region 101B. GaAs is used, for example, in the substrate semiconductor layer 101. The conductive region 101A is formed of n-type GaAs, and the device separation region 101B is formed by implanting insulating impurity ions into the n-type GaAs layer.

[0052] A transistor Q is disposed on a conductive region 101A. The transistor Q includes a collector layer 102C, a base layer 102B, and an emitter layer 102E, sequentially stacked from the conductive region 101A. The emitter layer 102E is disposed on a portion of the base layer 102B. As an example, the collector layer 102C is formed of n-type GaAs, the base layer 102B is formed of p-type GaAs, and the emitter layer 102E is formed of n-type InGaP. That is, the transistor Q is a heterojunction bipolar transistor. Other compound semiconductor devices can also be used as the transistor Q.

[0053] A base electrode 103B is disposed on the base layer 102B and is electrically connected to the base layer 102B. An emitter electrode 103E is disposed on the emitter layer 102E and is electrically connected to the emitter layer 102E. A collector electrode 103C is disposed on the conductive region 101A. The collector electrode 103C is electrically connected to the collector layer 102C via the conductive region 101A.

[0054] An interlayer insulating film 111 is disposed on the substrate semiconductor layer 101 to cover the transistor Q, collector 103C, base electrode 103B, and emitter electrode 103E. The interlayer insulating film 111 is formed, for example, from an inorganic insulating material such as SiN. Openings are provided at various predetermined locations on the interlayer insulating film 111.

[0055] An emitter wiring 104E, a base wiring 104B, a collector wiring 104C, and a base bias wiring 104BB are disposed on the interlayer insulating film 111. A ballast resistor element Rb is also disposed on the interlayer insulating film 111. The emitter wiring 104E is connected to the emitter electrode 103E through an opening in the interlayer insulating film 111. The base wiring 104B is connected to the base electrode 103B through other openings in the interlayer insulating film 111. The collector wiring 104C is connected to the collector electrode 103C through other openings in the interlayer insulating film 111.

[0056] The base wiring 104B extends into the region where no transistor Q is configured, and its front end overlaps with one end of the ballast resistor element Rb. At the overlap, the base wiring 104B and the ballast resistor element Rb are electrically connected. The other end of the ballast resistor element Rb overlaps with the base bias wiring 104BB. At the overlap, the ballast resistor element Rb and the base bias wiring 104BB are electrically connected.

[0057] A second interlayer insulating film 112 is disposed on the interlayer insulating film 111 to cover the emitter wiring 104E, base wiring 104B, base bias wiring 104BB, and ballast resistor element Rb of the first layer. The second interlayer insulating film 112 is also formed of an inorganic insulating material such as SiN.

[0058] A second layer of emitter wiring 105E and a high-frequency signal input wiring 105RF are disposed on the interlayer insulating film 112. The second layer of emitter wiring 105E is connected to the first layer of emitter wiring 104E through an opening in the interlayer insulating film 112. A portion of the high-frequency signal input wiring 105RF overlaps with the first layer of base wiring 104B when viewed from above. An input capacitor Cin is formed in the overlapping area.

[0059] A third interlayer insulating film 67 is configured to cover the emitter wiring 105E and the high-frequency signal input wiring 105RF of the second layer. The third interlayer insulating film 67 is formed, for example, of an organic insulating material such as polyimide. Furthermore, the third interlayer insulating film 67... Figure 2 It extends to the first component 21 as shown.

[0060] Pads 62 are disposed on the interlayer insulating film 67 of the third layer. Pads 62 are connected to the emitter wiring 105E of the second layer through openings provided in the interlayer insulating film 67.

[0061] Next, refer to Figures 4A to 5D The accompanying drawings illustrate the manufacturing method of the semiconductor device 20 according to the first embodiment. Figures 4A to 5C The attached figure is a cross-sectional view of the semiconductor device 20 during the intermediate stage of manufacturing. Figure 5D This is a cross-sectional view of the completed semiconductor device 20.

[0062] like Figure 4A As shown, a release layer 201 is epitaxially grown on a single-crystal mother substrate 200 of a compound semiconductor such as GaAs, and a device forming layer 202 is formed on the release layer 201. A device forming layer 202 is formed on the device forming layer 202. Figure 3B The second component 22 shown includes a substrate semiconductor layer 101, transistor Q, a first wiring layer, a second wiring layer, etc. These circuit elements and wiring layers are formed using conventional semiconductor processes. Figure 4A The element structure formed on the element forming layer 202 is omitted from the description. At this stage, the element forming layer 202 is not separated into individual second components 22.

[0063] Next, as Figure 4B As shown, a resist pattern (not shown) is used as an etching mask to form the element forming layer 202. Figure 4A) and release layer 201. In this stage, element forming layer 202 ( Figure 4A It is separated into each second component 22.

[0064] Next, as Figure 4C As shown, a connecting support 204 is attached to the separated second component 22. Thus, multiple second components 22 are interconnected via the connecting support 204. Furthermore, it is also possible to... Figure 4B The resist pattern remaining in the pattern forming process, which is used as an etching mask, is located between the second component 22 and the connecting support 204.

[0065] Next, as Figure 4D As shown, the release layer 201 is selectively etched onto the mother substrate 200 and the second component 22. As a result, the second component 22 and the connecting support 204 are peeled off from the mother substrate 200. To selectively etch the release layer 201, a compound semiconductor with an etching resistance different from either the mother substrate 200 or the second component 22 is used as the release layer 201.

[0066] like Figure 4E As shown, a structure is prepared to be formed on the first component 21 ( Figure 2 The bias control circuit 42 ( Figure 2 ), temperature sensing element 46 ( Figure 2 ), Digital Circuits 47 ( Figure 2 ), and multi-layer wiring structure 212 ( Figure 2 The substrate 210, etc. At this stage, the substrate 210 is not separated into individual first components 21.

[0067] like Figure 4F As shown, the second component 22 is bonded to the substrate 210. The bonding between the second component 22 and the substrate 210 is formed by van der Waals bonds or hydrogen bonds. Alternatively, the second component 22 can be bonded to the substrate 210 by electrostatic force, covalent bonding, eutectic alloy bonding, etc. For example, if a portion of the surface of the substrate 210 is formed of Au, the second component 22 can be brought into close contact with the Au region and pressure applied to bond the two together.

[0068] Next, as Figure 5A As shown, the connecting support 204 is peeled off from the second component 22. After peeling off the connecting support 204, as... Figure 5B As shown, an interlayer insulating film 67 and a redistribution layer are formed on the substrate 210 and the second component 22. The redistribution layer includes wiring 61, pads 62, and 63. Figure 2 )wait.

[0069] Next, as Figure 5CAs shown, a protective film 68 is formed on the redistribution layer, and an opening is formed at a predetermined position on the protective film 68. Then, conductor protrusions 82 are formed within the openings and on the protective film 68. Simultaneously with the formation of the conductor protrusions 82, other conductor protrusions 83 are also formed. Figure 2 )wait.

[0070] Finally, as Figure 5D As shown, substrate 210 is cut. Thus, substrate 210 is separated into individual first components 21 to obtain semiconductor device 20.

[0071] Next, the superior effects of the first embodiment will be explained.

[0072] The semiconductor device 20 constituting the first embodiment ( Figure 1 The multiple transistors Q( ) formed in the power stage amplifier circuit 52 of the second component 22. Figure 3A , Figure 3B ) becomes a heat source. In the first embodiment, such as Figure 2 As shown, a heat transfer path is formed from the second component 22 toward the first component 21. The second component 22 is in surface contact with the first component 21, so the second component 22 and the first component 21 are thermally coupled by low thermal resistance.

[0073] Heat conducted from the second component 22 to the first component 21 diffuses within the first component 21. The heat diffused within the first component 21 radiates outwards from its surface. When the semiconductor device 20 is covered with molding resin in a mounted state on a module substrate, heat is conducted from the first component 21 to the molding resin.

[0074] Furthermore, the conductor protrusion 82 functions as a heat transfer path from the second component 22 to the module substrate. Thus, heat dissipation occurs through two paths: the heat transfer path from the second component 22 towards the module substrate and the heat transfer path from the second component 22 towards the first component 21. Therefore, the heat dissipation characteristics from the second component 22 can be improved. To achieve a sufficiently improved heat dissipation characteristic, it is preferable to use a semiconductor with a higher thermal conductivity than the compound semiconductor of the semiconductor element formed in the second component 22, such as an elemental semiconductor system like Si or Ge, in the semiconductor region of the substrate 211 of the first component 21. Additionally, as the semiconductor element formed in the second component 22, for amplifying high-frequency signals, it is preferable to use a compound semiconductor system semiconductor element with a higher electron mobility than the semiconductor portion of the substrate 211 of the first component 21.

[0075] To reduce the thermal resistance of the heat transfer path from the second component 22 to the first component 21, an opening can be provided in the protective film 213 of the first component, and a metal film can be filled within the opening. The second component 22 can then be bonded to this metal film. Furthermore, the metal pattern and vias included in the multilayer wiring structure 212 can be arranged in the area overlapping with the second component 22 when viewed from above. A heat transfer path with low thermal resistance is formed through the metal film within the opening of the protective film 213, the metal pattern within the multilayer wiring structure 212, and the vias.

[0076] In addition, in the first embodiment, the second component 22 is coupled to the first component 21, so that the module substrate can be miniaturized compared with the structure in which the first component 21 and the second component 22 are composed of individual semiconductor chips and respectively mounted on the module substrate.

[0077] In addition, in the first embodiment, the temperature sensing element 46 ( Figure 2 A second component 22, containing a heat source, is formed inside the first component 21 and is in surface contact with the first component 21. Therefore, the heat generated in the second component 22 is easily conducted to the temperature sensing element 46. Consequently, the heat generated in the second component 22 is easily reflected in the measured value of the temperature sensing element 46. From the digital input / output terminal I / O ( Figure 1 The temperature sensor 46 is read out, thereby enabling high-precision detection of the temperature of the second component 22. Furthermore, since the temperature sensor 46 is formed on the first component 21, the digital circuit 47 (temperature detection circuit) formed on the first component 21 and the temperature sensor 46 can be easily connected.

[0078] In order to accurately measure the temperature of the second component 22 in a structure in which the first component 21 and the second component 22 are composed of individual semiconductor chips and respectively mounted on a module substrate, a temperature sensing element 46 must be formed on the second component 22. In this structure, wiring within the module substrate is required to connect the temperature sensing element 46 of the second component 22 and the digital circuit 47 of the first component 21. Figure 1 Therefore, the wiring design of the module substrate becomes complex. In the first embodiment ( Figure 1 In this configuration, the temperature sensing element 46 and the digital circuit 47 can be closedly connected to the semiconductor device 20 without wiring within the module substrate. Therefore, the complexity of the wiring design of the module substrate can be reduced.

[0079] Next, a variation of the first embodiment will be described.

[0080] In the first embodiment, a temperature sensing element 46 is disposed in the first component 21. Figure 2 However, multiple temperature sensing elements 46 can also be configured. By configuring multiple temperature sensing elements 46, temperature distribution information within the first component 21 can be obtained.

[0081] In the first embodiment, the semiconductor device 20 is used for frequency division duplex (FDD) communication, but it can also be used for time division duplex (TDD) communication.

[0082] To enable the semiconductor device 20 for TDD communication, a transmit / receive switch can be used as the output switch circuit 34. The transmit / receive switch has two contacts and a common terminal. One of the two contacts is connected via an output matching circuit 33. Figure 1 One contact is connected to the power stage amplifier circuit 52, and the other contact is connected to the receiving circuit 91. Figure 1 (Connection). Additionally, in the case of TDD communication, a filter is mounted on the module substrate instead of the duplexer 90. The common terminal of the transmit / receive switch is connected to the antenna terminal ANT via the filter.

[0083] [Second Embodiment]

[0084] Next, refer to Figure 6 The semiconductor device 20 of the second embodiment will be described below. Hereinafter, the device will be described in relation to the referenced semiconductor device 20. Figures 1 to 5D The semiconductor device 20 of the first embodiment, which is described in the accompanying drawings, has the same structure, which is omitted from the description.

[0085] Figure 6 This is a top view showing the positional relationship of some components of the semiconductor device 20 according to the second embodiment. In the first embodiment, for the first component 21 ( Figure 2 Temperature sensing element 46 (in-plane) Figure 2 The location of the temperature sensing element 46 is not particularly limited, and it can be placed anywhere on the first component 21. In contrast, in the second embodiment, the temperature sensing element 46 is positioned where it overlaps with the second component 22 when viewed from above.

[0086] Next, the superior effects of the second embodiment will be explained.

[0087] In the second embodiment, the temperature sensing element 46 is positioned to overlap with the second component 22 when viewed from above, thus shortening the heat transfer path from the second component 22 to the temperature sensing element 46. As a result, the temperature of the second component 22 is more easily reflected in the detection value of the temperature sensing element 46. Therefore, the accuracy of temperature measurement of the second component 22 can be further improved.

[0088] [Third Embodiment]

[0089] Next, refer to Figure 7A and Figure 7B The semiconductor device 20 of the third embodiment will be described. Hereinafter, the device will be described in relation to the referenced semiconductor device 20. Figure 6 The semiconductor device 20 of the second embodiment described herein has the same structure and will not be described further. In the second embodiment (… Figure 6 In the first embodiment, the temperature sensing element 46 is positioned to overlap with the second component 22 when viewed from above. However, in the third embodiment, the position of the temperature sensing element 46 when viewed from above is further defined.

[0090] Figure 7A This is a top-view diagram showing the positional relationship of some components of the semiconductor device 20 according to the third embodiment. The second component 22 is included within the first component 21 when viewed from above. A driver stage amplifier circuit 51 and a power stage amplifier circuit 52 are disposed in the second component 22. The power stage amplifier circuit 52 includes a plurality of transistors Q. Similarly, the driver stage amplifier circuit 51 also includes a plurality of transistors.

[0091] Figure 7B This diagram shows the top-view configuration of multiple transistors Q and the temperature sensing element 46. The collector layer 102C and base layer 102B of each of the multiple transistors Q generally overlap when viewed from above, in one direction (in... Figure 7B Each transistor Q has an elongated shape in one direction when viewed from above. The transistors Q are arranged in a parallel orientation along their respective long sides in a direction orthogonal to the long side direction (in the vertical direction). Figure 7B The left-right direction (hereinafter referred to as the first direction D1) is defined as the direction of the long side of each transistor Q. The direction of the long side of each transistor Q is referred to as the second direction D2.

[0092] Next, the positional relationship between the plurality of transistors Q and the temperature sensing element 46 will be described. The plurality of transistors Q are arranged at equal intervals P in the first direction D1. Furthermore, a portion of the center-to-center distance between the plurality of transistors Q is formed to be wider than the equal interval P. For example, in… Figure 7B In this arrangement, the center-to-center distance of the central portion of a column of transistors Q arranged in the first direction D1 is formed to be slightly wider than the equal spacing P. Alternatively, all transistors Q can be arranged with an equal spacing P.

[0093] In the first direction D1, at least one temperature sensing element 46 is disposed within a range 56 formed by extending a length LE along the first direction D1 from one end of transistor Q to the other end of transistor Q 55. The length LE is 3 times or less, more preferably 2 times or less, the equal spacing P. In the second direction D2, the temperature sensing element 46 is disposed within a range 57 in which a plurality of transistors Q are disposed.

[0094] like Figure 7AAs shown, two conductor protrusions 82A and 82B for the emitter are arranged in a manner that includes multiple transistors Q when viewed from above. In the central portion of the column composed of multiple transistors Q, where the distance between the centers of the transistors Q is wider than the equal spacing P, the two conductor protrusions 82A and 82B are separated from each other. The conductor protrusions 82A and 82B are connected to the emitters of the multiple transistors Q. Alternatively, the two conductor protrusions 82A and 82B can be connected to form a single conductor protrusion.

[0095] Next, the superior effects of the third embodiment will be explained.

[0096] In the third embodiment, the temperature sensing element 46 is disposed near the transistor Q. Therefore, the accuracy of temperature measurement of the transistor Q can be further improved by means of the temperature sensing element 46.

[0097] Next, a variation of the third embodiment will be described.

[0098] In the third embodiment, the plurality of transistors Q are arranged at equal intervals P in the first direction D1, but it is not necessary for them to be arranged at equal intervals. If the plurality of transistors Q are not arranged at equal intervals, it is preferable that the distance LE extending from the transistors Q at both ends is equal to the distance between the center of each of the transistors Q at both ends and the center of its adjacent transistor Q.

[0099] In the third embodiment, multiple transistors Q( ) constitute the power stage amplifier circuit 52. Figure 7B Transistors can be arranged in a single column, but multiple columns of transistors Q can also be arranged in a direction orthogonal to the direction in which the transistors Q are arranged. In this case, each transistor column is defined. Figure 7B The configuration shown has transistors in the range of 55 and 56 for Q.

[0100] [Fourth Embodiment]

[0101] Next, refer to Figure 8 and Figure 9 The semiconductor device of the fourth embodiment will be described. Hereinafter, the device will be described in relation to the referenced semiconductor device. Figures 1 to 5D The semiconductor device of the first embodiment described in the accompanying drawings has the same structure, which is omitted from the description.

[0102] Figure 8 This is a block diagram of the semiconductor device 20 according to the fourth embodiment. In the semiconductor device of the fourth embodiment, the measured value of the temperature based on the temperature sensing element 46 is input to bias control circuits 41 and 42 in addition to the digital circuit 47. Bias control circuit 41, based on the detected value of the temperature sensing element 46, changes the bias current supplied to the transistor in the drive stage amplifier circuit 51. The other bias control circuit 42, based on the detected value of the temperature sensing element 46, changes the bias current supplied to the transistor Q(…) in the power stage amplifier circuit 52. Figure 3A The change in bias current.

[0103] Next, refer to Figure 9 An example of a method for controlling bias current is given.

[0104] Figure 9 This indicates the power stage amplifier circuit 52 ( Figure 1 This graph illustrates the temperature dependence of the output of transistor Q and the magnitude of the bias current varying with temperature. The horizontal axis represents the detected temperature based on the temperature sensing element 46, the left vertical axis represents the output level of transistor Q, and the right vertical axis represents the bias current. When transistor Q is operated with a constant bias current, if the temperature of transistor Q rises, then... Figure 9 As shown by the dashed line, even when the input signal level is constant, the output level decreases. The output of the transistor in the driver stage amplifier circuit 51 also exhibits the same temperature dependence as the transistor Q in the power stage amplifier circuit 52.

[0105] like Figure 9 As shown by the thick solid line, the bias control circuit 42 ( Figure 1 The bias current Ib supplied to transistor Q increases as the temperature measured by temperature sensing element 46 rises. If the bias current Ib increases, then... Figure 9 As shown by the thin solid line, the output level Po of transistor Q also increases. In this way, by increasing the bias current to compensate for the decrease in output level caused by the temperature rise, the output level Po of the transistor approaches a constant value independent of temperature.

[0106] If the temperature rises further beyond the allowable upper limit Tth, then the bias control circuit 42 ( Figure 1 ) so that the power stage amplifier circuit 52 ( Figure 1 The bias current of transistor Q stops. As a result, the output level Po of transistor Q also becomes approximately zero.

[0107] The control of the bias control circuit 41 used for the driver stage amplifier circuit 51 is the same as the control of the bias control circuit 42 used for the power stage amplifier circuit 52.

[0108] Next, the superior effects of the fourth embodiment will be explained.

[0109] In the fourth embodiment, the detected temperature value based on the temperature sensing element 46 is fed back to the bias control circuits 41 and 42, and the bias current supplied to transistor Q is varied according to the temperature. This reduces the temperature dependence of transistor Q's output, maintaining the output level Po at a relatively constant level when the input signal level is constant. Furthermore, if the temperature exceeds the allowable upper limit Tth, the supply of bias current is stopped, thereby suppressing damage to transistor Q due to excessive temperature rise.

[0110] Next, a variation of the fourth embodiment will be described.

[0111] In the fourth embodiment, the bias current supplied to all transistors Q constituting the power stage amplifier circuit 52 is uniformly varied. As a variation of the fourth embodiment, the multiple transistors Q arranged in the first direction D1 may also be... Figure 7B The transistors are divided into multiple groups, with temperature sensing elements 46 configured for each group. In this case, the bias current can be varied for each group based on the measured temperature of each of the multiple temperature sensing elements 46. For example, the bias current supplied to the transistor Q in the group with a relatively higher temperature can be increased compared to the bias current supplied to the transistor Q in the group with a relatively lower temperature. This reduces the deviation in the output level of all transistor Q constituting the power stage amplifier circuit 52.

[0112] [Fifth Embodiment]

[0113] Next, refer to Figure 10 and Figure 11 The semiconductor device of the fifth embodiment will be described. Hereinafter, the device will be described in relation to the referenced semiconductor device. Figures 1 to 5D The semiconductor device of the first embodiment described in the accompanying drawings has the same structure, which is omitted from the description.

[0114] Figure 10 This is a block diagram illustrating a portion of the functionality of the semiconductor device 20 in the fifth embodiment. In the first embodiment ( Figure 1 In the first embodiment, the input switch circuit 31 has one input contact for each of the two input terminals IN1 and IN2. In contrast, in the fifth embodiment, the input switch circuit 31 has two input contacts 31A and 31B for one input terminal IN1 and two input contacts 31A and 31B for the other input terminal IN2. One input contact 31A is directly connected to either input terminal IN1 or IN2, and the other input contact 31B is connected to either input terminal IN1 or IN2 via an attenuation circuit 31C.

[0115] The input switch control circuit 43 selects one input terminal from the two input terminals IN1 and IN2, and then selects either input contact 31A or 31B based on the temperature detected by the temperature sensing element 46. When input contact 31A is selected, the high-frequency signal input to input terminal IN1 or IN2 is not attenuated and is input to the driver stage amplifier circuit 51. When input contact 31B is selected, the high-frequency signal input to input terminal IN1 or IN2 is attenuated in the attenuation circuit 31C and is input to the driver stage amplifier circuit 51. Furthermore, the input switch control circuit 43 de-conducts the input switch circuit 31, thereby stopping the input of the high-frequency signal to the driver stage amplifier circuit 51.

[0116] Figure 11 This is a graph showing the relationship between the attenuation rate of the high-frequency signal from input terminal IN1 or IN2 to the driver stage amplifier circuit 51 and the detected temperature value based on the temperature sensing element 46. The horizontal axis represents the detected temperature value, and the vertical axis represents the attenuation rate. When the detected temperature value is less than a first threshold Tth1, the input switch control circuit 43 selects the input contact 31A where the attenuation circuit 31C is not inserted. Therefore, the attenuation rate of the high-frequency signal is approximately zero. When the detected temperature value is above the first threshold Tth1 and less than a second threshold Tth2, the input switch control circuit 43 selects the input contact 31B where the attenuation circuit 31C is inserted. Therefore, the attenuation rate of the high-frequency signal increases from zero.

[0117] When the detected temperature value is above the second threshold Tth2, the input switch control circuit 43 de-energizes the input switch circuit 31. This stops the input of the high-frequency signal to the driver amplifier circuit 51. That is, the attenuation rate of the high-frequency signal becomes infinitely large.

[0118] Next, the superior effects of the fifth embodiment will be explained.

[0119] In the fifth embodiment, the level of the high-frequency signal input to the driver stage amplifier circuit 51 is adjusted by feeding back the detected temperature value based on the temperature sensing element 46 to the input switch circuit 31. If the detected temperature value rises, further temperature rise can be suppressed by reducing or eliminating the level of the high-frequency signal input to the driver stage amplifier circuit 51. The input switch control circuit 43 and the input switch circuit 31 function as protection circuits to prevent damage to the transistor Q due to excessive temperature rise.

[0120] [Sixth Embodiment]

[0121] Next, refer to Figure 12 The semiconductor device of the sixth embodiment will be described. Hereinafter, the device will be described in relation to the referenced semiconductor device. Figures 1 to 5DThe semiconductor device of the first embodiment described in the accompanying drawings has the same structure, which is omitted from the description.

[0122] Figure 12 This is a block diagram illustrating a portion of the functionality of the semiconductor device 20 in the sixth embodiment. In the first embodiment ( Figure 1 In the first embodiment, the output switching circuit 34 has one output contact for each duplexer 90. In contrast, in the sixth embodiment, each duplexer 90 has two output contacts 34A and 34B. One output contact 34A is directly connected to the transmit signal input port of the duplexer 90, and the other output contact 34B is connected to the transmit signal input port of the duplexer 90 via the impedance adjustment circuit 34C.

[0123] If one output contact 34A is selected, the high-frequency signal output from the power amplifier circuit 52 is input to the transmit signal input port of the duplexer 90 via the output matching circuit 33. At this time, the load impedance observed from the power amplifier circuit 52 is approximately matched to the output impedance of the power amplifier circuit 52. If another output contact 34B is selected, the high-frequency signal output from the power amplifier circuit 52 is input to the transmit signal input port of the duplexer 90 via the output matching circuit 33 and the impedance adjustment circuit 34C. At this time, the impedance adjustment circuit 34C is configured such that the impedance observed from the power amplifier circuit 52 on the load side is higher than the output impedance of the power amplifier circuit 52.

[0124] The output switch control circuit 44 selects one duplexer 90 from a plurality of duplexers 90, and selects one output contact from output contacts 34A and 34B based on the temperature detection value based on the temperature sensing element 46.

[0125] Next, the superior effects of the sixth embodiment will be explained.

[0126] In the sixth embodiment, if the detected temperature value based on the temperature sensing element 46 exceeds a certain threshold, the output switch control circuit 44 switches the connection state of the output switch circuit 34 from a state where the input contact is connected to one output contact 34A to a state where it is connected to another output contact 34B. As a result, the impedance on the load side observed from the power stage amplifier circuit 52 increases, and the output current decreases. Because the output current decreases, damage caused by excessive temperature rise of the transistor Q in the power stage amplifier circuit 52 can be suppressed.

[0127] Furthermore, the signal level input to the duplexer 90 is reduced, thereby suppressing damage to the duplexer 90.

[0128] If the output of the power stage amplifier circuit 52 increases, the temperature of the power stage amplifier circuit 52 rises, and the power of the high-frequency signal input to the duplexer 90 also increases. As a result, the throughput loss (insertion loss) within the duplexer 90 increases, and the temperature of the duplexer 90 also rises. Furthermore, if the temperature of the power stage amplifier circuit 52 rises, this heat is conducted to the duplexer 90, and the temperature of the duplexer 90 also rises. That is, a correlation is considered to exist between the temperature of the power stage amplifier circuit 52 and the temperature of the duplexer 90. Therefore, it can be assumed that the temperature detected by the temperature sensing element 46 also reflects the temperature of the duplexer 90. Therefore, based on the temperature detected by the temperature sensing element 46, the shift in the bandwidth caused by the temperature change of the duplexer 90 can be calculated, and the impedance matching of the power stage amplifier circuit 52 and the duplexer 90 can be adjusted according to the shift.

[0129] [Seventh Embodiment]

[0130] Next, refer to Figure 13 The semiconductor device of the seventh embodiment will be described. Hereinafter, the device will be described in relation to the referenced semiconductor device. Figures 1 to 5D The semiconductor device of the first embodiment described in the accompanying drawings has the same structure, which is omitted from the description.

[0131] Figure 13 This is a block diagram of the semiconductor device 20 according to the seventh embodiment. In the first embodiment ( Figure 1 In the first embodiment, the impedance slew rate of the interstage matching circuit 32 is a fixed value. In contrast, in the seventh embodiment, the impedance slew rate of the interstage matching circuit 32 is variable. For example, a switching element is inserted in parallel or series among at least one passive component included in the interstage matching circuit 32. By turning the switching element on and off, the impedance slew rate can be changed. The interstage matching control circuit 48 included in the first component 21 changes the impedance slew rate of the interstage matching circuit 32 by controlling the on and off of the switching element of the interstage matching circuit 32.

[0132] For example, the interstage matching circuit 32 employs two states: a matching state in which the impedance on the load side observed from the driver stage amplifier circuit 51 is approximately matched with the output impedance of the driver stage amplifier circuit 51, and a high impedance state in which the impedance on the load side observed from the driver stage amplifier circuit 51 is higher than the output impedance of the driver stage amplifier circuit 51.

[0133] If the measured temperature based on the temperature sensing element 46 exceeds a certain threshold, the interstage matching control circuit 48 switches the state of the interstage matching circuit 32 from the matched state to the high impedance state.

[0134] Next, the superior effects of the seventh embodiment will be explained.

[0135] If the measured temperature of the temperature sensing element 46 exceeds a threshold and the interstage matching circuit 32 switches to a high-impedance state, the signal level of the high-frequency signal input to the power stage amplifier circuit 52 decreases. This suppresses damage caused by excessive temperature rise in the transistor Q of the power stage amplifier circuit 52.

[0136] [Eighth Embodiment]

[0137] Next, refer to Figure 14 The semiconductor device of the eighth embodiment will be described. Hereinafter, the device will be described in relation to the referenced... Figures 1 to 5D The semiconductor device of the first embodiment described in the accompanying drawings has the same structure, which is omitted from the description.

[0138] Figure 14 This is a block diagram of the semiconductor device 20 according to the eighth embodiment. In the first embodiment ( Figure 1 In the first embodiment, the impedance slew rate of the output matching circuit 33 is a fixed value. In contrast, in the eighth embodiment, the impedance slew rate of the output matching circuit 33 is variable. For example, a switching element is inserted in parallel or series with at least one passive component included in the output matching circuit 33. By turning the switching element on and off, the impedance slew rate can be changed. The output matching control circuit 49 changes the impedance slew rate of the output matching circuit 33 by controlling the on and off states of the switching element.

[0139] Next, the superior effects of the eighth embodiment will be explained.

[0140] When excessive heat is generated in transistor Q of power amplifier circuit 52 due to changes in the load impedance observed from antenna terminal ANT on the antenna 92 ​​side, output matching control circuit 49 controls output matching circuit 33 to increase the impedance observed from the load side of power amplifier circuit 52. This lowers the output level of power amplifier circuit 52, suppressing damage to transistor Q caused by excessive temperature rise.

[0141] It goes without saying that the above embodiments are illustrative, and partial substitutions or combinations of the structures shown in different embodiments are possible. The same effects caused by the same structures in multiple embodiments are not mentioned sequentially for each embodiment. Furthermore, the present invention is not limited to the above embodiments. For example, various changes, improvements, and combinations will be apparent to those skilled in the art.

Claims

1. A semiconductor device comprising: The first component has a first surface and includes a semiconductor region composed of an elemental semiconductor system; The second component, surface-contactly bonded to the first surface of the first component, and includes a high-frequency amplification circuit based on a compound semiconductor system; and The conductor protrusion extends from the second component to the opposite side of the first component. In the semiconductor device, The first component contains a temperature sensing element for detecting temperature. The conductor protrusion is configured to mount the semiconductor device onto the module substrate.

2. The semiconductor device according to claim 1, wherein, The temperature measuring element is positioned to overlap with the second component when viewed from above.

3. The semiconductor device according to claim 1, wherein, The first component also includes a temperature detection circuit, which converts the detected value of the temperature sensing element into a digital value and outputs it to the outside.

4. The semiconductor device according to claim 1, wherein, The first component further includes a bias control circuit that, based on the detection value of the temperature sensing element, causes a change in the bias current supplied to the transistor of the high-frequency amplifier circuit.

5. The semiconductor device according to claim 4, wherein, The bias control circuit controls the increase of bias current as the temperature detected by the temperature sensing element rises.

6. A semiconductor device comprising: The first component has a first surface and includes a semiconductor region composed of an elemental semiconductor system; The second component, surface-contactly bonded to the first surface of the first component, and includes a high-frequency amplification circuit based on a compound semiconductor system; and The conductor protrusion extends from the second component to the opposite side of the first component. The first component contains a temperature sensing element for detecting temperature. The high-frequency amplifier circuit includes multiple transistors connected in parallel. The plurality of transistors are arranged in a first direction when viewed from above. The temperature sensing element is disposed in a first range in the first direction and in a second range in a second direction orthogonal to the first direction when viewed from above. The first range is the range that extends from the transistor at one end to the transistor at the other end to the distance between the center of each of the transistors at both ends and the center of the adjacent transistors. The second range is the range in which the plurality of transistors are disposed.

7. A semiconductor device comprising: The first component has a first surface and includes a semiconductor region composed of an elemental semiconductor system; The second component, surface-contactly bonded to the first surface of the first component, and includes a high-frequency amplification circuit based on a compound semiconductor system; and The conductor protrusion extends from the second component to the opposite side of the first component. The first component internally includes a temperature sensing element for detecting temperature, and the first component also includes a bias control circuit, which, based on the detected value of the temperature sensing element, causes a change in the bias current supplied to the transistor of the high-frequency amplifier circuit. If the temperature detected by the temperature sensing element exceeds the preset upper limit, the bias control circuit stops the supply of bias current to the transistor of the high-frequency amplifier circuit.

8. A semiconductor device comprising: The first component has a first surface and includes a semiconductor region composed of an elemental semiconductor system; The second component, surface-contactly bonded to the first surface of the first component, and includes a high-frequency amplification circuit based on a compound semiconductor system; and The conductor protrusion extends from the second component to the opposite side of the first component. The first component contains a temperature sensing element for detecting temperature. The first component further includes: An output switching circuit that causes the high-frequency signal output from the high-frequency amplifier circuit to be output from one selected output contact among a plurality of output contacts; and The output switch control circuit controls the output switch circuit based on the detection value of the temperature sensing element. The output switching circuit includes an impedance adjustment circuit connected to a portion of the plurality of output contacts.

9. A semiconductor device comprising: The first component has a first surface and includes a semiconductor region composed of an elemental semiconductor system; The second component, surface-contactly bonded to the first surface of the first component, and includes a high-frequency amplification circuit based on a compound semiconductor system; and The conductor protrusion extends from the second component to the opposite side of the first component. The first component contains a temperature sensing element for detecting temperature. The high-frequency amplifier circuit has a multi-stage structure. The first component further includes: Interstage matching circuits with variable impedance slew rate inserted between stages of the high-frequency amplifier circuit; and The interstage matching control circuit changes the impedance slew rate of the interstage matching circuit based on the detection value of the temperature sensing element.

10. A semiconductor device comprising: The first component has a first surface and includes a semiconductor region composed of an elemental semiconductor system; The second component, surface-contactly bonded to the first surface of the first component, and includes a high-frequency amplification circuit based on a compound semiconductor system; and The conductor protrusion extends from the second component to the opposite side of the first component. The first component contains a temperature sensing element for detecting temperature. The first component further includes: An output matching circuit with variable impedance slew rate connected to the output port of the high-frequency amplifier circuit; and The output matching control circuit changes the impedance slew rate of the output matching circuit based on the detected value of the temperature sensing element.

11. The semiconductor device according to any one of claims 1 to 10, wherein, The first component further includes: An input switching circuit, by switching the switch, changes the attenuation rate of the high-frequency signal input to the high-frequency amplifier circuit; and The input switch control circuit controls the input switch circuit based on the detection value of the temperature sensing element.

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