converter

Abstract

Various embodiments of the present disclosure relate to a converter. A converter and a method for operating the converter. The converter includes a DC link capacitor, an upper arm and a lower arm connected in series with a switching unit, an upper switch, and a lower switch. The upper switch and the lower switch are connected together, and the connection point forms an output voltage terminal. The converter also includes an upper valve component and a lower valve component, which are arranged so that the upper valve component allows current to flow from the center point of the DC link capacitor to the upper arm, and the lower valve component allows current to flow from the lower arm to the center point of the DC link capacitor. The current path through the upper valve component or the lower valve component includes an inductor to form a resonant circuit.

Description

Technical Field

[0001] The present invention generally relates to converters, and in particular to a multi-level neutral point clamped converter. Background Art

[0002] Multilevel converters are often used with high voltages when converting power from one form to another. Typical conversions using converters include direct current (DC) to alternating current (AC), DC to DC, and AC to DC. When operating at high voltages, the converter topology is typically different from that used with lower voltages.

[0003] One converter topology for high voltage is the modular multilevel converter (MMC), in which the converter phase legs are formed by multiple series-connected switching cells in the upper and lower arms. Each switching cell includes a capacitor, and the voltage of the capacitor can be bypassed or set to a series connection to provide the desired phase output. The output voltage of the MMC can be gradually changed by changing the number of capacitors connected in series. The gradual change in the output voltage enables the generation of an output voltage that is approximately sinusoidal, resulting in low total harmonic distortion (THD). In other converter schemes, the output voltage is formed by modulating the pulse width of the DC voltage. Instead of gradually changing the output voltage, the pulse can have a constant amplitude and the pulse duration varies during the modulation period. The effective value of the voltage is determined by the relative length of the pulse. In a pulse-width modulated output voltage, THD can be improved by increasing the number of voltage levels used to generate the output voltage.

[0004] A disadvantage associated with modular multilevel converters is their bulkiness, due to the large capacitors included in each switching cell. Since this structure does not utilize a DC link, the capacitors in the MMC topology are used for energy storage. Furthermore, another disadvantage of this topology is its operation at low output frequencies. At low output frequencies, for example, if the MMC is used to drive a motor, the capacitors must be further increased in order to maintain operation. Summary of the Invention

[0005] The object of the present invention is to provide a converter circuit and a method of operating a converter circuit in which the above-mentioned disadvantages are alleviated. The object of the invention is achieved by a method and a converter circuit which are characterized by what is stated in the independent claims. Preferred embodiments of the invention are disclosed in the dependent claims.

[0006] The present invention is based on the concept of providing a converter circuit in which multiple switching cells are arranged in a converter arm. In the circuit, the output voltage level is selected by connecting the desired number of switching cell capacitors in series. The resulting output voltage level is maintained for nearly the entire switching period. At the end of each switching period, all switching cell capacitors of one arm are connected to the circuit, and a resonant condition is achieved. The resonance is interrupted by the diodes, allowing energy to be transferred from the switching cell capacitors to the DC link capacitor. The blanking time at the end of each switching period has a constant value and is small compared to the duration of the switching period, enabling good THD.

[0007] The capacitors in the switching units do not operate as energy storage devices, but rather are used to shape the output voltage. Therefore, the size of the capacitors is minimized when compared to the capacitors in an MMC converter. Furthermore, since the DC link capacitors function as energy storage devices, the converter can operate at low frequencies. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] The present invention will be described in more detail below with reference to the accompanying drawings, in which

[0009] Figure 1 shows the basic topology of a converter according to an embodiment;

[0010] Figure 2 An example of a switch unit is shown;

[0011] Figure 3 shows examples of switching periods; and

[0012] Figure 4 The current waveform and voltage waveform of the converter are shown. DETAILED DESCRIPTION

[0013] Figure 1 The basic structure of a converter topology according to an embodiment of the present invention is shown. Figure 1 One phase of the converter is shown, and the phase output is formed by point a.

[0014] The converter of this embodiment includes a DC link capacitor having a center point. Figure 1 In FIG, the DC link capacitor with a center point is shown as consisting of two capacitors connected in series, and both capacitors have a voltage U DC , so the center point of the DC link capacitor is formed by the point between the capacitors, and Figure 1 Indicated as b.

[0015] The converter further comprises an upper arm S1 and a lower arm S4. Each arm comprises switching cells connected in series. A switching cell is an independent control unit that includes a capacitor and a bridge circuit. The bridge circuit in each switching cell enables bypassing the capacitor of the switching cell or connecting the capacitors of the switching cell in series.

[0016] The converter also includes an upper switch S2 connected in series with the upper arm and a lower switch S3 connected in series with the lower arm. The upper and lower switches are composed of one or more switch components that can be connected in series. Hereinafter, the upper and lower switches are referred to as individual components, respectively, as the upper switch component and the lower switch component. The upper switch component S2 and the lower switch component S3 also have anti-parallel diodes to enable current flow in both directions.

[0017] The upper switching component S2 and the lower switching component S3 are connected together, and the connection point between the switching components forms the output voltage terminal a.

[0018] The series connection of the upper arm S1, the upper switching component S2, the lower switching component S3 and the lower arm S4 is connected in parallel with the DC link capacitor, as shown Figure 1 As mentioned, in Figure 1 In the example shown, the DC link capacitor is formed by two capacitors connected in series. Thus, a DC link is formed between points c and d, with the series connection of capacitors connected between these two points. Points c and d are also the input terminals of the converter.

[0019] Furthermore, the converter includes an upper valve component and a lower valve component. In their simplest form, the upper and lower valve components are diodes. However, the valve components may be formed from one or more controllable components, such as switching components including IGBT components and MOSFET components. Hereinafter, the upper and lower valve components are referred to as upper diode D+ and lower diode D−.

[0020] The upper diode D+ is connected between a point between the upper arm and the upper switching component and the center point of the DC link capacitor. The lower diode D- is connected between a point between the lower arm and the lower switching component and the center point of the DC link capacitor. The polarity of the upper diode allows current to flow from the center point of the DC link capacitor to the upper arm, and the polarity of the lower diode allows current to flow from the lower arm to the center point of the DC link capacitor. Further, according to the present invention, the current path through each of the upper diode and the lower diode includes an inductor to form a resonant circuit. Therefore, when the upper diode or the lower diode is forward biased, the current path formed includes an inductor to form a resonant circuit. Figure 1 Inductor L σ Shown as a discrete component, the discrete component is connected between the series connection of the upper diode D+ and the lower diode D- and the center point of the DC link capacitor.

[0021] The upper arm S1 and the lower arm S4 include a series connection of switching cells. Figure 2 An example of a switch unit is shown in FIG. The switch unit of this example includes two switch components S main,i and S aux,i . Main switch S main,i Located in the switch component for bypassing the capacitor in the switch unit. Therefore, when the main switch is on, the capacitor is not in the current path. Auxiliary switch S aux,i Used to connect capacitors in the current path. As mentioned, the arm includes a series connection of switching cells. Therefore, when multiple switching cells in the switching unit are connected in series, the number of capacitors connected in series can be selected together with the switches. Typically, the switches of the switching unit are controlled so that only one of the switches is conducting, so that the number of capacitors connected in series can be changed. Figure 2 The cell topology presented is a half-bridge topology, using two switching elements. The switching cell can also be implemented using a full-bridge topology. Other topologies can also be used in conjunction with the switching cell.

[0022] In the converter of the present invention, the DC voltage is switched to the output a through the upper arm and the upper switching element or through the lower arm and the lower switching element. The voltage at point a relative to the center point of the DC link depends on the number of active switching cells. An active switching cell refers to a switching cell in which a capacitor is connected to the current path, i.e., S aux,i is conducting and S main,i When the switching units are active, their voltages reduce the output voltage. For example, consider that the upper switch S2 is conducting and the lower switch S3 is blocking. If all capacitors in the upper arm are bypassed, the voltage between the center point of the DC link and the output a is U DC , U DC When the switching unit is active in the upper arm S1, the voltage at point a is reduced by the magnitude of the voltage of the active switching unit, i.e., Ua=U DC -Uc, where Ua is the voltage between the center point of the DC link and the output a, U DC is half the voltage of the DC link, and Uc is the voltage of the switching unit capacitor. When multiple switching units are active, the voltage at point a is further reduced. Therefore, for Figure 1 The output voltage level can be varied by using a topology. The number of switching units is not limited to any specific number. As the number increases, more voltage levels are available at output a.

[0023] During operation, a voltage reference is typically provided to the converter. The controller of the converter implements the voltage reference by selecting the desired number of switching cells. The switching cells are activated and a voltage level is generated. Since the converter is capable of generating different voltage levels, the converter does not operate based on a pulse width modulation scheme, where the average voltage level during a switching period is obtained by keeping a constant DC link voltage active for a calculated period. Instead, with the converter of the present invention, the selected voltage level is generated for almost the entire switching period, e.g. Figure 3 shown. Figure 3 shows the switching period T s , the switching period T s By the activation time or conduction time T on and blanking time t b composition. Figure 3 The end of the previous switching period and the start of the next switching period are also shown, and it can be seen that in this example the voltage level increases over successive switching periods.

[0024] Therefore, the topology of the converter allows to choose the voltage level and to switch on the on-time T as a fixed period. on Further, when the voltage becomes zero, the blanking time t b Also has a fixed length.

[0025] The operating principle of the converter is based on resonance. In the following example, the operation of the converter is explained in the case where current is flowing out (i.e., through connection point a) to the connected system, and the output voltage is positive. The lower arm is not operated, and in each of the switching cells of the lower arm, the main switch and the auxiliary switch are in the blocking state. During the on-time T on During this time, several switching units in the upper arm S1 are inserted in order to achieve a desired output voltage at terminal a. Further, the upper switch S2 is conducting and the lower switch S3 is blocking.

[0026] Once the switch cell is inserted or activated in the upper arm S1, the positive diode D+ is reverse biased. As current is flowing through the upper arm S1, the active cell is being charged. During the on-time T on At the end, all bypassed switching units are reinserted to make the upper arm S1 and the DC link voltage U DC Effective parallel connection.

[0027] When all switching units are inserted, the blanking time t b Start. The voltage of the switching unit in the upper arm exceeds the DC link U DC The voltage of the positive diode D+ is forward biased and starts to conduct. σThe voltage drop seen across it is equal to the DC link capacitor voltage U DC The difference between the voltage of the upper arm and the voltage of the upper arm is the same, and resonance occurs in the current path formed by the DC link capacitor, the capacitor of the upper arm, the positive diode D+, and the inductor. Because only the resistance of the switching components and the connection resistance are in the current path, the circuit is undamped.

[0028] At the start of resonance, current flows through the positive diode D+ and from the upper-arm capacitor to the DC link. Since the positive diode is reverse-biased, the resonant current cannot change direction. Therefore, resonance lasts for half the resonance period and ceases when current is blocked.

[0029] The resonant period is given by:

[0030]

[0031] Among them L σ is the inductance of the resonant path;

[0032] n is the number of units in the arm;

[0033] C cell is the capacitance of a switching unit;

[0034] C dc is half of the DC link capacitance.

[0035] Since Lσ is small and C cell Relative to C dc is small, so the resonance period is much shorter than the switching period, which results in t b / T on The ratio is small. Small ratio means high output voltage quality.

[0036] In operation, when the blanking time ends, new modulation is started and a new voltage level is selected.

[0037] In the case of positive output voltage and inflow current, the operation of the converter circuit is similar to the above, except that the lower switch S3 is used to conduct the LC resonance, while the upper switch S2 is blocking. on During this time, because the current is flowing toward the converter, the antiparallel diode of upper switch S2 is conducting, and lower switch S3 is in a blocking state. The output voltage is again selected by the number of active switching cells in upper arm S1. Because the current is flowing toward the converter—that is, through phase output a—the capacitors in the active switching cells are discharging.

[0038] During the blanking time t bDuring this period, all cells are plugged in, lower switch S3 is turned on, and arm S1 is connected in parallel with the DC link. Resonance occurs through upper arm S1, lower switch S3, negative diode D−, and the inductor. Furthermore, halfway through the resonance period, negative diode D− is reverse biased, and lower switch S3 can be turned off. This can occur without current flowing through the component. At the end of the blanking time, operation continues to the next switching period.

[0039] Figure 4 An example of a waveform obtained using the converter of the present invention is shown. Figure 4 The left plot shows the voltage and current waveforms for the complete output voltage period. The right plot shows the detailed waveforms of the left plot. In the right plot, the output voltage is positive and the output current is positive, i.e., it flows out of the converter. As can be seen, given a sinusoidal reference voltage, the voltage level of the pulse is changed to represent a sine wave. In the right plot, it can be seen that during the on-time T on The voltage decreases slightly during this period. This decrease in voltage level is due to the charging of the active switching cells. Furthermore, during the blanking time, the cell voltage is shown to increase. This increase in voltage is due to resonance and the fact that the voltage is seen across the inductor in the circuit.

[0040] exist Figure 1 In the example, the inductance required for resonance is shown as a discrete inductor component. However, the inductance can be achieved through the circuit layout or a combination of discrete components and layout. As is well known, every physical circuit has a certain inductance value. This value can be affected by layout considerations in a known manner. The resonance requirement sets a limit on the inductance.

[0041] It should also be noted that in the proposed converter topology, the balancing of the DC link capacitors can be achieved in a similar way as in a commonly used neutral point clamped (NPC) converter.

[0042] In the operating method of the converter of the present invention, a voltage reference is obtained. Then, the number of switching units required to implement the voltage reference is determined. The determined number of switching units is turned on for a determined conduction time T on When the conduction time T is determined, the current path is activated. on At the expiration of the period, all switching units of the arm in question are in the blanking period t b After the blanking time, a new switching period begins and the operation continues.

[0043] In a known manner, a sorting algorithm can be used to balance the cell voltages within an arm. Furthermore, the arm voltage (i.e., the sum of the capacitor voltages in an arm) is also maintained within a given tolerance. The capacitance of the switching cell capacitor can be calculated using the following equation:

[0044] Ccel l=I pk T s / (δV cell V DC / n)

[0045] in

[0046] I pk is the maximum peak current;

[0047] T s is the duration of the switching period;

[0048] δV cell is the nominal voltage deviation allowed for the unit;

[0049] V DC is half the DC link voltage; and

[0050] n is the number of switching cells in an arm.

[0051] As mentioned, the duration of the resonant period is known, so the peak current depends on V DC and the difference between the arm voltage.

[0052] In the converter, the resonant circuit is undamped, so there is no resistor added to the current path. Since the resistance is almost zero, almost all the energy delivered to the arm is transferred back to the DC link during the blanking time.

[0053] In operation, the DC link acts as an energy buffer while the arms are responsible for voltage shaping and do not need to act as, for example, energy storage devices like modular multilevel converters. on During this time, energy is mostly delivered from the DC link to the output terminals and only partially delivered to the capacitors in the arm.During the blanking time, energy is fed back from the arm to the DC link using resonance.

[0054] The switching function of the upper switch S2 and the lower switch S3 is related to the power factor. For example, if the power factor is 1, the switches operate at the fundamental frequency.

[0055] Further, since the switches are always turned off by the conduction of the anti-parallel diodes, the upper switch S2 and the lower switch S3 may have a zero voltage turn-off.

[0056] According to an embodiment of the present invention, the switching cells in an arm are activated one by one, with a short period between each activation. Without simultaneous activation of the cells, the output voltage does not change to the desired value in one step. By activating them sequentially, the rate of change of the output voltage can be controlled. The reduced dV / dt can reduce EMI frequencies and voltage reflections when using long output cables.

[0057] The fact of having a DC link as an energy buffer instead of the capacitors of the switching units enables the operation of the converter of the invention to drive the motor at low frequencies. In the converter of the invention, the fundamental frequency is completely decoupled from the converter capacitor energy since only the switching frequency and rating have an influence.

[0058] It is obvious to a person skilled in the art that as technology advances, the inventive concept can be implemented in various ways.The invention and its embodiments are not limited to the examples described above but may vary within the scope of the claims.

Claims

1. A converter having: a DC link capacitor having a center point (b); An upper arm (S1) and a lower arm (S4), the two arms including switching units connected in series, each switching unit having a capacitor and a bridge circuit to bypass the capacitor or set the capacitor in series connection; an upper switch (S2) connected in series with the upper arm; a lower switch (S3) connected in series with the lower arm; The upper switch (S2) and the lower switch (S3) are connected together, and a connection point of the upper switch (S2) and the lower switch (S3) forms an output voltage terminal (a); and the series connection of the upper arm, the upper switch, the lower switch, and the lower arm being connected in parallel with the DC link capacitor; The converter further comprises an upper valve member (D+) and a lower valve member (D-); the upper valve member being connected to a point between the upper arm and the upper switch, and to the center point of the DC link capacitor; and the lower valve member being connected to a point between the lower arm and the lower switch, and to the center point of the DC link capacitor; the valve members being arranged such that the upper valve member allows current to flow from the center point of the DC link capacitor to the upper arm, and the lower valve member allows current to flow from the lower arm to the center point of the DC link capacitor; wherein the current path through the upper valve member and / or the lower valve member includes an inductance to form a resonant circuit, The converter includes a controller configured to: Get voltage reference; determining the number of switching units required to obtain an output voltage corresponding to the voltage reference; During the determined on-time (T on ) period, connecting the determined number of capacitors of the switching unit to the current path; as well as During the determined on-time (T on ) after the blanking time (t b ), the capacitors of all switching units are connected to the current path. 2 . The converter of claim 1 , wherein the inductor is a discrete inductive element connected to the current path. 3 . The converter according to claim 1 , wherein the resonant circuit comprises the DC link capacitor and the capacitor of the switching unit.

4. The converter according to claim 1 or 2, wherein the inductance is a parasitic inductance due to the layout of the current path.

5. The converter according to any one of the preceding claims 1 to 2, wherein the upper valve member and the lower valve member are diodes.

6. The converter according to any one of the preceding claims 1 to 2, wherein the upper valve member and the lower valve member are controllable switching members.

7. The converter according to any one of the preceding claims 1 to 2, wherein each of the upper switch and the lower switch consists of a single switch component.

8. The converter according to any one of the preceding claims 1 to 2, wherein each of the upper and lower switches comprises a series connection of switching components.

9. The converter according to any one of the preceding claims 1 to 2, wherein the switching cells in the arms are adapted to be activated one after another with a short period of time between each activation.

10. A method of operating a converter according to claim 1, wherein the method comprises: Get voltage reference; determining the number of switching units required to obtain an output voltage corresponding to the voltage reference; During the determined on-time (T on ) period, connecting the determined number of capacitors of the switching unit to the current path; as well as During the determined on-time (T on ) after the blanking time (t b ), the capacitors of all switching units are connected to the current path.

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