Protection circuits, control circuits, power conversion circuits, and protection methods

Abstract

This invention provides a protection circuit, a control circuit, a power conversion circuit, and a protection method. The protection circuit includes: a fault detection circuit for receiving a detection signal and providing a fault occurrence signal; a first timing circuit that, when the fault occurs for a first duration, controls the power switch of the power conversion circuit to turn off through a control loop, and allows the power switch to turn on in the next operating cycle; and a second timing circuit that triggers fault protection when the fault occurs for a second duration. The protection circuit, control circuit, power conversion circuit, and protection method proposed in this invention can balance the sensitivity and anti-interference capabilities of fault protection, thereby improving the reliability of fault protection.

Description

Technical Field

[0001] This invention relates to the field of electronics, specifically but not limited to a protection circuit, a control circuit, a power conversion circuit, and a protection method. Background Technology

[0002] Power conversion circuits are used to convert an input power supply into an output power supply suitable for driving a load, and are indispensable components of electronic products. Reliability is a crucial consideration for power conversion circuits, requiring them to be able to promptly detect and respond to various potential faults, preventing damage to the load or disruption to its normal operation.

[0003] Figure 1 This paper illustrates a flyback isolated power converter circuit, including a rectifier circuit, a transformer, a control circuit chip 10, a power switch Q1, resistors, capacitors, and diodes. The control circuit chip 10, located on the primary side, controls the power switch Q1 of the power converter circuit. Power converter circuits operate in complex environments, and problems are inevitable with various components such as chip pins, transformers, and diodes. For example, poor soldering or short circuits can cause open circuits and short circuits. Any problem can lead to system failure, resulting in the output voltage Vo failing to effectively drive the load, damage to the power supply or load, or potential safety hazards. Single-point failure protection refers to the protection provided to eliminate faults caused by a single factor leading to system failure.

[0004] In view of this, there is a need to provide a reliable single-point failure protection to solve at least some of the above problems. Summary of the Invention

[0005] In response to at least one or more problems in the background art, the present invention provides a protection circuit, a control circuit, a power conversion circuit, and a protection method.

[0006] According to one aspect of the present invention, a protection circuit for a power conversion circuit includes: a fault detection circuit for receiving a detection signal and providing a fault occurrence signal; a first timing circuit for receiving the fault occurrence signal and providing a first fault signal when the fault occurrence signal indicates that the fault has lasted for a first time, the first fault signal controlling a power switch to turn off through a control loop, and allowing the power switch to be turned on when the next working cycle arrives; and a second timing circuit for receiving the fault occurrence signal and providing a second fault signal when the fault occurrence signal indicates that the fault has lasted for a second time, triggering fault protection, wherein the second time is greater than the first time, the power conversion circuit includes a power switch, and the control terminal of the power switch is controlled by the control loop.

[0007] In one embodiment, controlling the power switch to turn off via a control loop includes resetting the power switch by triggering a trigger circuit in the control loop.

[0008] In one embodiment, the fault detection circuit includes a comparison circuit for comparing a detection signal with a reference signal, wherein the detection signal is the voltage at the coupling point between the primary-side power switch and the detection resistor of the flyback voltage converter circuit, and the reference signal is equal to or less than zero. When the detection signal is less than the reference signal, the fault occurrence signal is an effective value, indicating that the primary-side ground terminal is open.

[0009] In one embodiment, when fault protection is triggered, the switching control signal provided to the power switch is shielded, and the control circuit does not allow the power switch to be turned on.

[0010] In one embodiment, the protection circuit further includes an OR gate, the first end of which receives a first control signal, the second end of which is coupled to the output of the first timing unit, the output of which is coupled to the first input of the trigger circuit, the second input of the trigger circuit receives a second control signal, and the output of the trigger circuit is coupled to the control terminal of the power switch tube through a drive module.

[0011] According to another aspect of the present invention, a control circuit for controlling a power switch in a power conversion circuit includes: a protection circuit as described in any of the preceding embodiments; a first control module providing a first control signal; a second control module providing a second control signal; an OR gate having a first input coupled to the output of the first control module and a second input coupled to the output of a first timing circuit; a trigger circuit having a first input coupled to the output of the OR gate and a second input coupled to the output of the second control module; and a drive circuit having an input coupled to the output of the trigger circuit and an output coupled to the control terminal of the power switch.

[0012] In one embodiment, the control circuit further includes a reset circuit. After the fault protection is triggered, when the voltage on the power supply voltage pin of the control circuit is lower than the threshold voltage or the fault protection lasts for a predetermined time, the reset circuit resets the control circuit, and the reset process eliminates the fault protection state.

[0013] In one embodiment, the first control module is a peak current protection module. When the current flowing through the power switch exceeds a predetermined threshold, the first control signal is used to turn off the power switch. The second control module is a frequency modulation module used to modulate the frequency of the power switch.

[0014] In one embodiment, the control circuitry is fabricated on a semiconductor wafer.

[0015] According to another aspect of the present invention, a power conversion circuit includes a power switching transistor and a control circuit as described above.

[0016] According to another aspect of the present invention, a control chip for a power conversion circuit includes a power switching transistor and a control circuit as described above.

[0017] According to another aspect of the present invention, a method for single-point failure protection of a power conversion circuit includes: detecting whether a fault has occurred in the power conversion circuit; when a fault is detected and continues for a first time, controlling the power switch of the power conversion circuit to turn off through the control loop of the control circuit, and allowing the power switch to be turned on again when the next working cycle arrives; and when the fault continues for a second time, triggering the fault protection of the power conversion circuit, stopping the switching control of the power switch, and the control circuit not allowing the power switch to be turned on, wherein the second time is longer than the first time.

[0018] The protection circuit, control circuit, power conversion circuit, and protection method proposed in this invention can balance the sensitivity and anti-interference of fault protection, thereby improving the reliability of fault protection. Attached Figure Description

[0019] The accompanying drawings are provided to further illustrate the invention and, together with the description, serve to explain embodiments of the invention, but do not constitute a limitation thereof. In the drawings:

[0020] Figure 1 A flyback isolated power converter circuit is shown.

[0021] Figure 2 A control circuit according to an embodiment of the present invention is shown;

[0022] Figure 3 A control circuit 300 including a protection circuit is shown according to an embodiment of the present invention;

[0023] Figure 4 A schematic diagram of control waveforms for single-point failure protection of a power conversion circuit according to an embodiment of the present invention is shown. Detailed Implementation

[0024] To further understand the present invention, preferred embodiments of the present invention are described below in conjunction with examples. However, it should be understood that these descriptions are only for further illustrating the features and advantages of the present invention, and not for limiting the scope of the claims of the present invention.

[0025] The description in this section pertains to only a few typical embodiments, and the present invention is not limited to the scope of the embodiments described. Combinations of different embodiments, substitution of some technical features in different embodiments, and substitution of similar or identical prior art with some technical features in the embodiments are also within the scope of the description and protection of the present invention.

[0026] The terms "coupled" or "connected" in this specification include both direct and indirect connections. An indirect connection is a connection made through an intermediate medium, such as a connection through an electrically conductive medium like a conductor, which may contain parasitic inductance or capacitance. It can also be a connection through an intermediate circuit or component described in the embodiments of this specification. Indirect connections may also include connections through other active or passive devices that can achieve the same or similar functions, such as connections through circuits or components like switches, signal amplification circuits, or follower circuits.

[0027] Figure 2A control circuit including a protection circuit 21 according to an embodiment of the present invention is shown for controlling a power switch in a power conversion circuit. In one embodiment, the power conversion circuit includes a flyback power conversion circuit. In other embodiments, the power conversion circuit may also be other types of power conversion circuits, such as a buck power conversion circuit, a boost power conversion circuit, etc. The control circuit includes a protection circuit 21 and a control loop 22, wherein the protection circuit 21 is used to influence the control loop 22 and provide fault protection. Preferably, the protection circuit 21 is used to provide single-point failure fault protection. The control terminal of the power switch is controlled by the control loop 22. The protection circuit 21 includes a fault detection circuit 211, a first timing circuit 212, a second timing circuit 213, a fault protection circuit 214, and a logic gate 215. The logic gate 215 can also be considered as part of the control loop 22. The fault detection circuit 211 is used to receive a detection signal, determine whether a fault has occurred based on the detection signal, and provide a fault occurrence signal. The detection signal can be any signal representing voltage, current, temperature, or other parameters obtained from the input, output, or other parts of the power conversion circuit, preferably a voltage signal. The first timing circuit 212 receives a fault occurrence signal. When the fault occurrence signal indicates that the fault has lasted for a first time T1, it provides a first fault signal (e.g., signal ERR1 shows a valid value). The first fault signal ERR1 controls the power switch to turn off through the control loop 22, causing the electrical transmission path between the input and output of the power conversion circuit to be cut off earlier in the loop control cycle. When the next working cycle arrives, the power switch is allowed to be turned on again. The second timing circuit 213 receives a fault occurrence signal. When the fault occurrence signal indicates that the fault has lasted for a second time T2, it provides a second fault signal (e.g., signal ERR2 shows a valid value), triggering the fault protection circuit 214 to perform fault protection, where the second time T2 is greater than the first time T1.

[0028] The control loop 22 can take any form suitable for power conversion circuits. The control loop 22 includes a first control module 221, a second control module 222, and a trigger circuit 223. The first control module 221 provides a first control signal CT1 to reset the trigger circuit 223 and switch the power switch from the on state to the off state. The second control module 222 provides a second control signal CT2 to set the trigger circuit 223 and switch the power switch from the off state to the on state.

[0029] exist Figure 2In this embodiment, the first control module 221 includes a peak current protection circuit, used to reset the trigger circuit 223 based on the current flowing through the power switch when the current detection signal reaches its peak value, thereby controlling the power switch to turn off. The second control module 222 includes a frequency modulation circuit, providing a second control signal CT2 to set the trigger circuit 223 and control the turn-on timing of the power switch in the power conversion circuit. The output of the trigger circuit 223 is a pulse width modulation (PWM) signal, used to control the turn-on and turn-off of the power switch.

[0030] In the illustrated embodiment, logic gate 215 includes an OR gate. The first terminal of OR gate 215 receives a first control signal CT1, the second terminal of OR gate 215 is coupled to the output terminal of the first timing unit 212, the output terminal of OR gate 215 is coupled to the first input terminal (reset input terminal R) of trigger circuit 223, the second input terminal (set input terminal S) of trigger circuit 223 receives a second control signal CT2, and the output terminal of trigger circuit 223 is coupled to the control terminal of power switch tube through a drive module.

[0031] Figure 2 The protection circuit 21 shown generates a fault occurrence signal after the fault detection circuit 211 detects a fault. After the fault occurrence signal lasts for a first timing period T1, it is used to reset the trigger circuit 223, immediately turning off the power switch of the power conversion circuit and allowing it to turn on again in the next operating cycle. If the fault is cleared at this time, the fault signal ERR1 returns to an invalid state, and the control loop operates normally. If the fault persists, the fault signal ERR1 remains valid, and the power switch remains off. After the fault occurrence signal lasts for a second timing period T2, it triggers the fault protection of the control circuit chip (IC). When the fault protection is triggered, the PWM signal is stopped from being applied to the power switch, meaning the control circuit does not allow the power switch to turn on until the IC is reset. The reset process eliminates the fault protection state. The IC reset can be triggered when the IC's supply voltage VDD falls below a preset value, or after the IC protection has lasted for a certain period. The IC reset clears all fault states and restarts sending PWM signals. In this way, the system can detect faults quickly and, upon a fault occurring, preemptively terminate power transmission in the current loop cycle before formally entering fault protection, ensuring timely response and improving fault protection sensitivity. Simultaneously, it can proceed to the next loop cycle even in the event of false triggering due to factors such as power input disturbances, power output disturbances, system ESD test disturbances, system lightning strike test disturbances, and system EMI test disturbances, avoiding entering fault protection and improving interference immunity. Therefore, the above two-stage fault protection technology can balance fault protection sensitivity and interference immunity.

[0032] Figure 3A control circuit 300 including protection circuitry according to an embodiment of the present invention is shown. The control circuit 300 can be fabricated on a semiconductor wafer. In one embodiment, the control circuit 300 wafer can be packaged together with a power switch Q1 in an electronic package to form an electronic chip. The power switch Q1 can be a metal-oxide-semiconductor field-effect transistor (MOSFET), a bipolar junction transistor (BJT), or other types of switching transistors. This specific embodiment uses reference ground open-circuit protection technology for an IC. Under normal circumstances, the voltage Vcs across the sampling resistor Rcs is positive. When the IC reference ground PGND is open, the voltage Vcs will be negative due to the ESD diode on the IC pin. When Vcs is less than the reference value Vref and remains so for a first timing time T1, the IC immediately turns off the power switch Q1 of the power conversion circuit. When the next operating cycle arrives, the power switch Q1 is allowed to be turned on again, and the power switch Q1 is turned on under the control of the control loop; when the voltage Vcs is less than the reference value Vref and remains so for a second timing time T2, IC protection is triggered, stopping the transmission of PWM until the IC is reset. The control circuit 300 includes a protection circuit 31, a control loop, and a reset circuit 37. The control loop may include a first control module, a second control module, an OR gate 34, a trigger circuit 35, and a drive circuit 36. The first input of the OR gate 34 is coupled to the output of the first control module, and the second input of the OR gate 34 is coupled to the output of the first timing circuit 311 in the protection circuit 31. The first input of the trigger circuit 35 is coupled to the output of the OR gate 34, the second input of the trigger circuit 35 is coupled to the output of the second control module, the output of the trigger circuit 35 is coupled to the input of the drive circuit 36, and the output of the drive circuit 36 ​​is coupled to the control terminal of the power switch Q1. The first control module is a peak current protection module 32. When the current flowing through the power switch exceeds a predetermined threshold, the first control signal changes from an invalid value to an valid value to turn off the power switch Q1. The second control module is a frequency modulation module 33, used to modulate the frequency of the power switch Q1 to control the conduction of the power switch Q1.

[0033] The protection circuit 31 includes a fault detection circuit, a first timing circuit 311, a second timing circuit 312, and a fault protection circuit 313. The fault detection circuit includes a comparator circuit COM1, used to compare the detection signal Vcs with a reference signal Vref. In the illustrated embodiment, the detection signal Vcs is the voltage at the coupling point between the primary-side power switch Q1 and the detection resistor Rcs of the flyback voltage converter circuit, representing the current flowing through the power switch Q1. The voltage Vcs is proportional to this current, Vcs = Rcs * I, where I is the current flowing through the power switch Q1. The reference signal Vref is equal to or less than zero. When the ground terminal PGND of the control circuit IC is open, the detection signal Vcs is less than the reference signal, and the fault occurrence signal (also called a single-point failure signal) is valid, triggering the first timing circuit 311 and the second timing circuit 312 to start timing. When the valid value of the fault occurrence signal lasts for a first time T1, the first timing circuit 311 outputs a valid signal, controlling the power switch Q1 to turn off. When the next working cycle arrives, the power switch Q1 is allowed to be turned on again. When the effective value of the fault signal lasts for a second time T2, the second timing circuit 312 outputs an effective value, and the protection circuit 31 triggers the fault protection circuit 313 to work, shielding the switching control signal PWM provided to the power switch Q1 and preventing the power switch Q1 from conducting. In one embodiment, when the fault condition lasts for a second time T2, the fault protection circuit 313 outputs a low-level signal and inputs it together with the PWM signal into an AND gate to achieve PWM signal shielding. The input terminal of the drive module 36 is coupled to the output terminal of the trigger circuit to receive the switching control signal PWM, and the output terminal of the drive module 36 is coupled to the control terminal of the power switch Q1. Because the PWM signal is shielded, there is no signal input at the input terminal of the drive module 36, and the power switch Q1 is also in the off state, causing the power conversion circuit to stop working. After the fault protection is triggered, the reset circuit 37 starts working. When the reset condition is met, the reset circuit 37 outputs a reset signal to reset the control circuit 300 and provide the PWM signal again. At this time, the fault signals provided by the first timing circuit 311 and the second timing circuit 312 also become ineffective. The reset condition can be that the voltage on the power supply voltage pin of the control circuit 300 is lower than the threshold voltage or the fault protection lasts for a predetermined time, etc.

[0034] Figure 4 A schematic diagram of control waveforms for single-point failure protection of a power conversion circuit according to an embodiment of the present invention is shown. The following will be combined with... Figure 3This single-point failure protection method is described. This method detects whether a fault has occurred in the power conversion circuit in real time. During time t1 to t3, the system operates normally, the current detection signal Vcs is greater than the reference voltage Vref, and the system outputs a normal PWM signal to control the power switch Q1. At time t3, an open circuit occurs at the system reference ground pin, and the voltage Vcs drops below the reference voltage Vref. The comparator circuit COM1 outputs a high-level effective value, indicating that a fault has been detected. The first timing circuit 311 and the second timing circuit 312 begin timing. At time t4, the high level at the output of the comparator circuit COM1 lasts for a first time T1, indicating that a fault has been detected and continues for a first time T1. The first timing circuit 311 outputs a first fault signal ERR1 (shown as a high-level pulse in the diagram), which, through the control loop of the control circuit, resets the PWM signal and turns off the power switch Q1. This disconnects the electrical transmission path between the power input and output of the power conversion circuit, providing timely initial protection against the fault. At this time, the first timing circuit 311 can be reset to zero and start counting again, or it can continuously output a high-level signal until the reset signal from the reset circuit 37 arrives and resets to zero. If the fault is caused by a false trigger, during t4 and t5, the comparator circuit COM1 outputs a low level, and the second timing circuit 312 will stop timing. In the next working cycle, the control circuit allows the power switch to be turned on, and the frequency modulation module 33 controls the power switch Q1 to be turned on again. If the fault is not caused by a false trigger, at time t5, the high level at the output of the comparator circuit COM1 lasts for a second time T2, that is, when the fault condition lasts for a longer time until the second time, the second timing circuit 312 outputs a second fault signal ERR2 (shown as a high-level pulse in the diagram) to trigger the fault protection of the power conversion circuit, stop outputting the PWM signal, stop controlling the switching of the power switch, and the control circuit does not allow the power switch to be turned on until the system is reset. Of course, single-point failure protection can also be applied to other types of detection signals and fault types, and the fault detection circuit can also include other types of circuits.

[0035] Those skilled in the art should know that the logic controls such as "high level" and "low level", "set" and "reset", "AND gate" and "OR gate", "non-inverting input" and "inverting input" in the logic control involved in the specification or drawings can be interchanged or changed, and the same function or purpose as the above embodiment can be achieved by adjusting the subsequent logic control.

[0036] The description and application of the present invention herein are illustrative and not intended to limit the scope of the invention to the embodiments described above. The effects or advantages described in the specification may not be apparent in actual experimental cases due to uncertainties in specific conditions or other factors, and such descriptions are not intended to limit the scope of the invention. Variations and modifications to the embodiments disclosed herein are possible, and various substitutions and equivalents of the components in the embodiments are well known to those skilled in the art. It should be understood by those skilled in the art that the invention can be implemented in other forms, structures, arrangements, proportions, and with other components, materials, and parts without departing from the spirit or essential characteristics of the invention. Other variations and modifications can be made to the embodiments disclosed herein without departing from the scope and spirit of the invention.

Claims

1. A protection circuit for a power conversion circuit, wherein the power conversion circuit includes a power switching transistor, the control terminal of which is controlled by a control loop, characterized in that, The protection circuit comprises: a fault detection circuit configured to receive a detection signal and provide a fault occurrence signal; a first timing circuit configured to receive the fault occurrence signal and provide a first fault signal when the fault occurrence signal indicates that the fault has occurred for a first time period, the first fault signal being configured to control the power switch tube to be turned off through a control loop, the power switch tube being allowed to be turned on when a next working cycle arrives, and if the fault is eliminated at this time, the first fault signal returns to an invalid state, then the control loop works normally, and if the fault continues to exist, the first fault signal remains in an effective state, then the power switch tube remains in an off state; and a second timing circuit configured to receive the fault occurrence signal and provide a second fault signal when the fault occurrence signal indicates that the fault has occurred for a second time period, the second fault signal being configured to trigger a fault protection and not allow the power switch tube to be turned on until the system is reset, wherein the second time period is greater than the first time period.

2. The protection circuit of claim 1, wherein, The control of the power switch tube to be turned off through the control loop comprises triggering a reset of a trigger circuit in the control loop to turn off the power switch tube.

3. The protection circuit of claim 1, wherein, The fault detection circuit comprises a comparison circuit configured to compare the detection signal with a reference signal, wherein the detection signal is a voltage at a coupling point of the primary side power switch tube and a detection resistor of the flyback voltage conversion circuit, and the reference signal is equal to or less than zero, and when the detection signal is less than the reference signal, the fault occurrence signal is an effective value, indicating that the primary side ground terminal is open.

4. The protection circuit of claim 1, wherein, The protection circuit further comprises an OR gate, a first input end of the OR gate being configured to receive a first control signal, the first control signal being configured to switch the power switch tube from an on state to an off state, a second input end of the OR gate being coupled to an output end of the first timing unit, and an output end of the OR gate being coupled to a first input end of a trigger circuit, a second input end of the trigger circuit being configured to receive a second control signal, the second control signal being configured to switch the power switch tube from the off state to the on state, and an output end of the trigger circuit being coupled to a control end of the power switch tube through a driving module.

5. A control circuit for controlling a power switch in a power conversion circuit, characterized by The control circuit comprises the protection circuit and a control loop, wherein the control loop comprises: a first control module configured to provide the first control signal, the first control signal being configured to switch the power switch tube from the on state to the off state; a second control module configured to provide the second control signal, the second control signal being configured to switch the power switch tube from the off state to the on state; an OR gate, a first input end of the OR gate being coupled to an output end of the first control module, and a second input end of the OR gate being coupled to an output end of the first timing circuit; a trigger circuit, a first input end of the trigger circuit being coupled to an output end of the OR gate, and a second input end of the trigger circuit being coupled to an output end of the second control module; and a driving circuit, an input end of the driving circuit being coupled to an output end of the trigger circuit, and an output end of the driving circuit being coupled to a control end of the power switch tube.

6. The control circuit of claim 5, wherein, The control circuit further comprises a reset circuit, the reset circuit being configured to reset the control circuit when a voltage on a power supply voltage pin of the control circuit is lower than a threshold voltage or the fault protection lasts for a predetermined time after the fault protection is triggered, and the reset process eliminates the fault protection state.

7. The control circuit of claim 5, wherein, The first control module is a peak current protection module, the first control signal being configured to turn off the power switch tube when it is detected that a current flowing through the power switch tube exceeds a predetermined threshold value, and the second control module is a frequency modulation module, the second control signal being configured to modulate a frequency of the power switch tube.

8. A power conversion circuit, characterized by comprising: The power switch tube and the control circuit as claimed in claim 5.

9. A protection method for single point failure protection of a power conversion circuit, characterized by, It comprises: detecting whether a failure condition occurs in the power conversion circuit; when the failure condition is detected and lasts for a first time, the power switch tube of the power conversion circuit is controlled to be turned off by a control loop of the control circuit, and when the next working cycle comes, the power switch tube is allowed to be turned on, if the failure is eliminated at this time, the first failure signal returns to the invalid state, then the control loop works normally, if the failure continues to exist, the first failure signal remains in the effective state, then the power switch tube remains in the off state; and when the failure condition lasts for a second time, the failure protection of the power conversion circuit is triggered, the control circuit does not allow the power switch tube to be turned on until the system is reset, wherein the second time is greater than the first time.

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