Semiconductor device and method of manufacturing the same

Abstract

The present invention relates to a semiconductor device and a manufacturing method thereof. The semiconductor device includes: a substrate, the substrate includes a functional region; a barrier layer disposed on the substrate, the barrier layer and the substrate enclose a first cavity and a second cavity, the first cavity exposes at least part of the functional region, the second cavity is located outside the first cavity, and the barrier layer is provided with a release channel communicating the first cavity and the second cavity; a release hole is formed on the barrier layer, the release hole is within the range of the second cavity, and the release hole communicates with the second cavity. By forming a second cavity outside the first cavity and connecting the first cavity and the second cavity through the release channel, the present invention facilitates removing the release layer material forming the second cavity and the first cavity through the release hole, so as to form the first cavity exposing at least part of the functional region. In addition, the release hole is disposed on the barrier layer of the second cavity to prevent the formed protective layer material from falling into the first cavity, thereby ensuring the cleanliness of the first cavity.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor device manufacturing, and in particular, to a semiconductor device and a manufacturing method thereof. Background Art

[0002] With the development of semiconductor integrated circuits, the semiconductor integrated circuit manufacturing industry has become the foundation and core of the electronics manufacturing industry, supporting and promoting the prosperity and development of related industries. The cavity formation process is an important part of semiconductor devices. With the continuous progress and development of various technical fields, the types and demands of various cavities have also increased explosively, and the demands for cavities of various forms and functions emerge in an endless stream.

[0003] Among the demands of various cavity processes, there is a special requirement for the formation of one kind of cavity, which requires the bottom of the cavity to maintain extremely high cleanliness to ensure device performance, such as CIS packaging, BAW device packaging, etc.

[0004] Currently, the formation process of high-cleanliness cavities mainly relies on dry film or bonding processes, or a combination of both. However, dry film materials and bonding materials are relatively expensive, and the manufacturing process is more complex than other cavity processes, and the cost will also increase significantly. Summary of the Invention

[0005] The purpose of the present invention is to provide a semiconductor device and a manufacturing method thereof, which can reduce production costs, have a simple process, and can ensure high cleanliness in the cavity area and avoid contamination of the cavity area.

[0006] To achieve the above purpose, the present invention provides a semiconductor device, including:

[0007] A substrate, the substrate including a functional area;

[0008] A barrier layer disposed on the substrate, the barrier layer and the substrate enclosing a first cavity and a second cavity, the first cavity exposing at least part of the functional area, the second cavity being located outside the first cavity, and the barrier layer being provided with a release channel communicating the first cavity and the second cavity;

[0009] A release hole is formed in the barrier layer, the release hole is located within the range of the second cavity, and the release hole communicates with the second cavity.

[0010] The present invention also provides a method for manufacturing a semiconductor device, including:

[0011] Providing a substrate, the substrate including a functional area;

[0012] Forming a release layer on the substrate;

[0013] Form a groove that penetrates part of the release layer or extends to a partial depth of the release layer, and the groove surrounds the periphery of the functional area;

[0014] Form a barrier layer that fills the groove and covers the outer surface of the release layer;

[0015] Form a release hole on the barrier layer outside the groove, and the release hole exposes part of the release layer;

[0016] Remove the release layer. A first cavity is formed inside the barrier layer within the groove, and a second cavity is formed outside the barrier layer within the groove. The barrier layer that isolates the first cavity and the second cavity forms a release channel, and the release channel connects the first cavity and the second cavity.

[0017] The beneficial effects of the semiconductor device of the present invention are as follows:

[0018] By forming a second cavity outside the first cavity and connecting the first cavity and the second cavity through a release channel, it is convenient to remove the release layer material for forming the second cavity and the first cavity through the release hole within the range of the second cavity when manufacturing the device structure, so as to form a first cavity exposing at least part of the functional area. The release hole is arranged in the second cavity outside the first cavity, avoiding the introduction of impurity materials into the first cavity during the release hole forming process or the residue of process materials in the first cavity, and improving the cleanliness of the first cavity.

[0019] In addition, by forming the release hole on the barrier layer above the second cavity, it is avoided that when forming a protective layer on the barrier layer subsequently, the protective layer material falls into the first cavity, further ensuring the cleanliness of the first cavity; furthermore, the use of special materials and processes is also avoided, reducing the cost.

[0020] Furthermore, the release channel is located on the barrier layer that isolates the first cavity and the second cavity, and is located between the surface adjacent to the substrate and the surface of the substrate adjacent to the barrier layer, so as to facilitate connecting the first cavity and the second cavity, and has a simple structure and is easy to manufacture.

[0021] Furthermore, cover the release hole with a protective layer to facilitate the formation of a sealed first cavity, thereby ensuring the airtightness and waterproofness of the first cavity and improving the reliability of the first cavity structure.

[0022] Furthermore, through the setting of the protective layer, the structural strength of the capping layer is protected, the compressive resistance of the first cavity is enhanced, thereby improving the pressure-bearing capacity of the capping layer, avoiding damage to the capping layer due to compression and thus destroying the first cavity structure, so as to further improve the airtightness and waterproof performance of the first cavity; in addition, the protective layer can also cover the barrier layer, thereby strengthening the sealing performance of the first cavity structure and avoiding the connection between the first cavity and the external air.

[0023] The beneficial effects of the method for manufacturing the semiconductor device of the present invention are as follows:

[0024] By forming a release layer on the substrate and forming a barrier layer, after the release layer is removed, the barrier layer and the substrate enclose a first cavity and a second cavity, the second cavity surrounds the first cavity. By forming a trench and forming a barrier layer in the trench, a release channel is formed between the barrier layers formed in adjacent trenches after the release layer is removed, so as to facilitate removing the release layer in the second cavity and the first cavity through the release holes located within the range of the second cavity to form a first cavity exposing at least part of the functional area; by forming release holes on the barrier layer outside the trench, it is avoided that the release hole forming process introduces impurity materials into the first cavity or process materials remain in the first cavity, improving the cleanliness of the first cavity; it is also convenient to avoid the protective layer material falling into the first cavity when forming the protective layer on the barrier layer subsequently, further ensuring the high cleanliness of the first cavity; the forming process is simple, without using special materials and special processes, greatly reducing the cost.

[0025] Furthermore, the barrier layer is formed by a deposition method to facilitate wrapping the entire structure of the release layer, thereby avoiding the subsequent formed second cavity from communicating with the outside, so as to damage the airtightness of the first cavity communicating with the second cavity; in addition, the barrier layer wraps the entire release layer structure, which can also increase the compressive resistance of the first cavity structure, thereby improving the reliability of the first cavity structure, avoiding the failure of the functional area of the first cavity, improving the product yield and avoiding product scrapping.

[0026] Furthermore, after removing the release layer, a protective layer covering the release holes is formed to facilitate forming a sealed first cavity, thereby ensuring the airtightness and waterproofness of the first cavity and improving the reliability of the first cavity structure.

[0027] Furthermore, by forming a protective layer on the barrier layer to protect the structural strength of the capping layer, enhancing the compressive resistance of the first cavity, thereby improving the pressure-bearing capacity of the capping layer, avoiding the capping layer from being damaged due to compression and thus damaging the first cavity structure, to further improve the airtightness and waterproof performance of the first cavity; in addition, the protective layer can also cover the barrier layer, thereby strengthening the sealing of the first cavity structure and avoiding the first cavity from communicating with the external air. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] In order to more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the following will briefly introduce the drawings required for the description of the embodiments or the prior art. Obviously, the following drawings are only some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.

[0029] Figure 1 The top view of a semiconductor device provided by an embodiment of the present invention is shown;

[0030] Figure 2 is Figure 1 The schematic cross-sectional structure diagram of a semiconductor device along A-A shown;

[0031] Figure 3 The schematic cross-sectional structure diagram of a semiconductor device provided by another embodiment of the present invention;

[0032] Figures 4 to 11 The schematic structure diagrams corresponding to different steps of the manufacturing method of the semiconductor device formed in the embodiment of the present invention are shown.

[0033] Explanation of reference numerals:

[0034] 1. Substrate; 2. Barrier layer; 21. Capping layer; 22. Support layer; 23. Groove; 3. First cavity; 4. Second cavity; 5. Release channel; 6. Release hole; 7. Protective layer; 8. Release layer. Detailed implementation manners

[0035] At present, the formation process of high-purity cavities mainly relies on dry film or bonding process, or a combination of both. However, dry film materials and bonding materials are relatively expensive, and the manufacturing process is more complex than other cavity processes, and its cost will also increase significantly.

[0036] The semiconductor device of the present invention and its manufacturing method will be further described in detail below with reference to the accompanying drawings and specific embodiments. According to the following description and drawings, the advantages and features of the present invention will be clearer. However, it should be noted that the concept of the technical solution of the present invention can be implemented in many different forms and is not limited to the specific embodiments described herein. The accompanying drawings are all in a very simplified form and use non-precise scales, only for the purpose of conveniently and clearly assisting in explaining the purpose of the embodiments of the present invention.

[0037] In the specification and claims, terms such as "first", "second", etc. are used to distinguish between similar elements and are not necessarily used to describe a specific order or chronological sequence. It is understood that, where appropriate, these terms so used may be interchanged, for example, so that embodiments of the present invention described herein can be operated in an order different from that described or shown herein. Similarly, if the methods described herein include a series of steps, and the order of these steps presented herein is not necessarily the only order in which these steps can be performed, and some of the described steps may be omitted and / or some other steps not described herein may be added to the method. If the components in a certain drawing are the same as those in other drawings, although these components can be easily recognized in all the drawings, for the sake of clearer illustration of the drawings, the present specification will not label the reference numerals of all the same components in each drawing.

[0038] Example 1

[0039] Figure 1 A top view of a semiconductor device provided for an embodiment of the present invention, Figure 2 is Figure 1 A schematic cross-sectional structure diagram of a semiconductor device along A-A, please refer to Figure 1 and Figure 2 , the semiconductor device includes:

[0040] A substrate 1, the substrate includes a functional region;

[0041] A barrier layer 2 disposed on the substrate 1, the barrier layer 2 and the substrate 1 enclose a first cavity 3 and a second cavity 4, the first cavity 3 exposes at least part of the functional region, the second cavity 4 is located outside the first cavity 3, and the barrier layer 2 is provided with a release channel 5 communicating the first cavity 3 and the second cavity 4;

[0042] A release hole 6 is formed in the barrier layer 2, the release hole 6 is within the range of the second cavity 4, and the release hole 6 communicates with the second cavity 4.

[0043] The barrier layer 2 includes a capping layer 21 and a support layer 22. The support layer 22 is disposed on the substrate 1. The support layer 22 has a first opening and a second opening. The first opening penetrates through the support layer 22 to expose at least a part of the functional area. The second opening extends at least to a partial thickness of the support layer 22 from the side of the support layer 22 adjacent to the capping layer 21. The second opening is located outside the first opening. The capping layer 21 is disposed on the support layer 22 to cover the first opening to form a first cavity 3 and cover the second opening to form a second cavity 4. In this embodiment, the capping layer 21 and the support layer 22 are of an integral structure and made of the same material. The material of the barrier layer 2 includes at least one of oxides, nitrides, and polyimides, where: the oxides include silicon dioxide, ZnO, CdO, SnO2, Fe2O3, Cr2O3, or Al2O3, etc.; the nitrides include silicon nitride, titanium nitride, aluminum nitride, or gallium nitride, etc.

[0044] In this embodiment, the release hole 6 is located on the capping layer 21 within the range of the second cavity 4 and penetrates through the capping layer 21 to communicate with the second cavity 4, so as to facilitate the removal of the release layer forming the first cavity 3 and the second cavity 4 through the release hole 6 and the release channel 5, thereby avoiding the introduction of impurity materials into the first cavity 3 during the formation process of the release hole 6 or the residue of process materials in the first cavity 3, and improving the cleanliness of the first cavity 3; this avoids the material of the protective layer 8 falling into the first cavity 3 when the protective layer 8 is formed on the barrier layer 2 subsequently, further ensuring the cleanliness of the first cavity 3. It should be noted that the steps for removing the release layer forming the first cavity 3 and the second cavity 4 can be referred to in Embodiment 2 and will not be elaborated here.

[0045] In a possible implementation manner, the number of release channels 5 is at least one, and the surface of the part of the barrier layer 2 between the first cavity 3 and the second cavity 4 adjacent to the substrate 1 is exposed in the release channel 5. Specifically, the projection of the release channel 5 on the surface of the substrate 1 is within the range of the projection of the support layer isolating the first cavity 3 and the second cavity 4 on the surface of the substrate 1. The release channels 5 are arranged at intervals so that the part of the support layer between the first cavity 3 and the second cavity 4 is in contact with the substrate and part of it is exposed in the release channel 5. Refer to Figure 2 .

[0046] In another possible implementation manner, the release channels 5 enclose a closed ring, and the surface of the barrier layer 2 between the first cavity 3 and the second cavity 4 adjacent to the substrate 1 is exposed in the release channel 5. Specifically, the surface of the support layer 22 between the first cavity 3 and the second cavity 4 adjacent to the substrate 1 is exposed in the release channel 5 to communicate the first cavity 3 and the second cavity 4. Refer to Figure 3 .

[0047] The second cavity 4 penetrates through the support layer 22, or the second cavity 4 extends to a partial depth of the support layer 22. It should be noted that when the second cavity 4 extends to a partial depth of the support layer 22, the distance from the release channel 5 to the surface of the substrate 1 is not less than the distance from the bottom of the second cavity 4 to the surface of the substrate 1. The second cavity 4 surrounds part or all of the periphery of the first cavity 3. When the second cavity 4 surrounds all of the periphery of the first cavity 3, the projection of the second cavity 4 on the surface of the substrate 1 forms a closed ring; when the second cavity 4 surrounds part of the periphery of the first cavity 3, the number of the second cavities 4 is at least two, and they are symmetrically arranged on both sides of the first cavity 3, which is beneficial to releasing the release layer used to form the first cavity 3 and the second cavity 4 to ensure that the release layer is removed completely. In this embodiment, the second cavity 4 can be a hole structure, a groove structure or an annular structure. It should be noted that the groove depth of the second cavity 4 is not limited. For the sake of simplicity of the process, it can be set to be equal to the height of the cavity. The second cavity 4 only needs to communicate with the first cavity 3 through the release channel 5 and communicate with the outside through the release hole 6. The specific structure, shape and number of the second cavity 4 can be set according to actual needs and are not further limited in this application.

[0048] In addition, in order to ensure the release effect, the size of the release channel 5 is greater than 1 micron. Generally, 1um to dozens of microns are acceptable. The release channel 5 can be flush with the height of the cavity to reduce the process complexity. The size of the release channel 5 can be determined according to the release material and the release process and is not further limited here. The number of the release holes 6 is at least two. Regarding the aperture of the release hole 6, in this embodiment, for the convenience of subsequent sealing of the release hole, that is, forming a protective layer 7 on the barrier layer 2, the protective layer covers the release hole 6, and the depth-width ratio of the release hole generally needs to be greater than 3:1 to further ensure the cleanliness of the second cavity 4. In other embodiments, if the release hole does not need to be sealed subsequently, the aperture of the release hole only needs to consider ensuring the complete release of the functional area, and the aperture of the release hole can be set to any size.

[0049] In order to further strengthen the structural strength of the capping layer 21 and thus enhance the compressive resistance of the first cavity 3, the protective layer 7 covers at least the outer surface of the barrier layer 2 within the range of the first cavity 3 and the second cavity 4. Specifically, the protective layer 7 is located on the upper surface of the capping layer 21; or the protective layer 7 is located on the upper surface and its peripheral sidewalls of the capping layer 21; or the protective layer 7 is located on the upper surface and its peripheral sidewalls of the capping layer 2 and the peripheral sidewalls of the support layer 22. By arranging the protective layer 7 on the upper surface of the capping layer 21 to protect the structures of the first cavity 3 and the second cavity 4, the compressive resistance of the first cavity 3 is increased, the first cavity 3 is prevented from being broken due to external force compression, and the reliability and sealing performance of the first cavity 3 are improved. It should be noted that when the protective layer 7 is located on the surface and its outer sidewalls of the capping layer 21 and the peripheral sidewalls of the support layer 22, the compressive resistance of the first cavity 3 is better.

[0050] In summary, in the embodiment of the present invention, a second cavity is formed around the first cavity, and the first cavity and the second cavity are connected through a release channel. Thus, when manufacturing the device structure, the release layer material for forming the second cavity and the first cavity can be removed through the release holes located within the range of the second cavity, so as to form the first cavity exposing at least part of the functional area. The release holes are arranged in the second cavity outside the first cavity, preventing impurity materials from being introduced into the first cavity during the formation process of the release holes or process materials from remaining in the first cavity, and improving the cleanliness of the first cavity.

[0051] In addition, by forming the release holes on the barrier layer above the second cavity, when forming the protective layer on the barrier layer subsequently, it is avoided that the protective layer material falls into the first cavity, further ensuring the cleanliness of the first cavity; moreover, the use of special materials and processes is also avoided, reducing the cost.

[0052] Furthermore, the release channel is located on the barrier layer isolating the first cavity and the second cavity, and is located between the surface of the barrier layer adjacent to the substrate and the surface of the substrate adjacent to the barrier layer, thus facilitating the connection between the first cavity and the second cavity, and having a simple structure and being easy to manufacture.

[0053] Furthermore, the release holes are covered by the protective layer to facilitate the formation of a sealed first cavity, thereby ensuring the airtightness and waterproofness of the first cavity and improving the reliability of the first cavity structure.

[0054] Furthermore, through the setting of the protective layer, the structural strength of the capping layer is protected, the compressive resistance of the first cavity is enhanced, thereby improving the pressure-bearing capacity of the capping layer, avoiding damage to the capping layer caused by compression and thus damaging the first cavity structure, so as to further improve the airtightness and waterproof performance of the first cavity; in addition, the protective layer can also cover the barrier layer, thereby strengthening the sealing performance of the first cavity structure and preventing the first cavity from communicating with the external air.

[0055] Example 2

[0056] The embodiment of the present invention provides a manufacturing method of a semiconductor device. The manufacturing method of the semiconductor device includes:

[0057] S01: Providing a substrate, the substrate including a functional area;

[0058] S02: Forming a release layer on the substrate;

[0059] S03: Forming a trench, the trench penetrating through part of the release layer or extending to a partial depth of the release layer, the trench surrounding the periphery of the functional area, such that the release layer inside the trench and the release layer outside the trench are at least partially connected;

[0060] S04: Forming a barrier layer, the barrier layer filling the trench and covering the outer surface of the release layer;

[0061] S05: Form a release hole in the barrier layer around the trench, and the release hole exposes a part of the release layer;

[0062] S06: Form a first cavity inside the barrier layer in the trench, form a second cavity outside the barrier layer in the trench, and the barrier layer isolating the first cavity and the second cavity forms a release channel, and the release channel communicates the first cavity and the second cavity..

[0063] Step S0N does not represent the order of sequence.

[0064] Figures 4 to 11 It is a schematic structural diagram corresponding to the corresponding steps of a manufacturing method of a semiconductor device in this embodiment. Refer to Figures 4 to 11 Describe in detail the manufacturing method of the semiconductor device provided in this embodiment.

[0065] Refer to Figure 4 , execute step S01 to provide a substrate 1, and the substrate 1 includes a functional area.

[0066] Generally, the material of the substrate 1 includes silicon (Si), germanium (Ge), silicon germanium (SiGe), silicon carbide (SiC), silicon germanium carbide (SiGeC), indium arsenide (InAs), gallium arsenide (GaAs), indium phosphide (InP) or other III / V compound semiconductors, and can also be a ceramic substrate such as alumina, a quartz or glass substrate, etc. It should be noted that the thickness of the provided first substrate wafer 1 is the standard thickness in the current production process or thicker, so as to ensure better support strength of the first substrate wafer 1, which is convenient for forming the chip 2, the support layer and the capping layer thereon subsequently. In addition, after forming the capping layer subsequently and before cutting, the first substrate wafer 1 can be thinned to improve the cutting rate when cutting the capping layer, the support layer and the first substrate wafer 1 subsequently.

[0067] In this embodiment, the substrate 1 includes a functional area. The substrate may also include a device area, and the functional area is located within the device area so that some devices are formed in the functional area. A resonator, a thermopile structure, a MEMS structure, a filter structure, a varistor or a photoresistor may be formed in the device area, and the formation method thereof may refer to the prior art and will not be further described here.

[0068] Continue to refer to Figure 4 , execute step S02 to form a release layer 8 on the substrate 1.

[0069] In this embodiment, a release layer 8 is formed on the substrate 1 by deposition, and the release layer 8 covers at least a part of the surface of the substrate 1. Specifically, the release layer 8 covers the central region of the substrate 1 to expose the outer edge of the substrate 1, so as to facilitate the subsequent formation of the barrier layer to cover the surface of the substrate 1 and the peripheral sidewalls of the release layer 8. Generally, under the conditions of normal pressure or low pressure at 100 degrees to 400 degrees, the release layer 8 is formed on the substrate 1 by chemical vapor deposition process. The material of the release layer 8 includes at least one of carbon, germanium, and phosphosilicate glass. Among them, the material of the release layer 8 can be α-C to facilitate the formation of a cavity structure with better performance.

[0070] Reference Figures 5 - 6 , perform step S03 to form a trench 23. The trench 23 penetrates through part of the release layer or extends to a partial depth of the release layer 8. The trench 23 surrounds the periphery of the functional area, so that the release layer inside the trench 23 is at least partially connected to the release layer outside the trench 23.

[0071] In this embodiment, the trench 23 includes a first trench that penetrates the release layer 8 and a second trench that extends to a partial depth of the release layer 8, so that the trench 23 penetrates through part of the release layer 8. The method for forming the trench 23 includes: etching the release layer to form a second trench that surrounds the periphery of the functional area, and the second trench extends to a partial depth of the release layer 8; etching the release layer within the range of the second trench to form a first trench, and the first trench exposes part of the substrate surface. It should be noted that the formed first trench and second trench are connected. By forming the first trench, it is convenient for the subsequent formed barrier layer to connect with the substrate surface along the first trench, so as to improve the support strength of the barrier layer while not affecting the formation of the release channel to connect the first cavity and the second cavity. Specifically, the number of the first trenches is multiple, and they are isolated from each other by the release layer to form independent first trenches, that is, the projections of the first trenches on the surface of the substrate 1 form an annular shape with gaps, the projections of the second trenches on the surface of the substrate 1 form a closed annular shape, the projections of the first trenches and the second trenches on the surface of the substrate 1 overlap, the interval length between adjacent first trenches can be set with reference to the width of the subsequent required release channel, and the distance from the bottom of the second trench to the surface of the substrate 1 can be set with reference to the height of the subsequent required release channel. Generally, the height of the release channel is 1 micron to dozens of microns.

[0072] Refer to Figure 6, in other embodiments, the trench 23 extends to a partial depth of the release layer 8. The method of forming the trench 23 includes: etching the release layer 8 to form a trench 23 surrounding the periphery of the functional area, and the trench 23 extends to a partial depth of the release layer 8. Specifically, the trench 23 is a closed annular trench, and the trench extends to a partial depth of the release layer 8. After the subsequent removal of the release layer 8, a release channel 5 is formed between the surface of the barrier layer 2 formed in the trench 23 adjacent to the substrate 1 and the surface of the substrate 1 adjacent to the barrier layer 2, so that the surface of the barrier layer 2 formed in the trench 23 adjacent to the substrate 1 is exposed in the release channel 5, and then it is convenient for the subsequently formed first cavity 3 and second cavity 4 to communicate through the release channel 5. It should be noted that the thickness of the release layer 8 can be set according to the depth of the first cavity required in practice. The thickness of the release layer 8 between the bottom of the trench 23 and the substrate 1 is between 1 micron and dozens of microns to ensure that the height of the subsequent formed release channel is maintained between 1 micron and dozens of microns, so as to facilitate the subsequent effective removal of the release layer 8 and avoid affecting its removal efficiency.

[0073] Reference Figures 7 - 8 , perform step S04 to form the barrier layer 2, and the barrier layer 2 fills the trench and covers the outer surface of the release layer 8. It should be noted that since the subsequently formed first cavity communicates with the second cavity, in order to protect the airtightness of the first cavity, the second cavity needs to be isolated from the outside. Therefore, the barrier layer 2 needs to cover the upper surface of the release layer 8 and the peripheral side walls of the release layer 8, so as to cover the entire outer surface of the release layer 8 to isolate the outside air from the release layer 8.

[0074] In this embodiment, the barrier layer 2 is formed by a deposition process, and the formed barrier layer 2 fills the trench and covers the release layer 8 and its peripheral side walls. The material of the barrier layer 2 includes at least one of oxides, nitrides, and polyimides, where: the oxides include silicon dioxide, ZnO, CdO, SnO2, Fe2O3, Cr2O3, or Al2O3, etc.; the nitrides include silicon nitride, titanium nitride, aluminum nitride, or gallium nitride, etc.

[0075] In addition, the formed barrier layer 2 includes a support layer 22 and a capping layer 21. The support layer 22 fills the trench and covers the peripheral side walls of the release layer 8, and the capping layer 21 covers the upper surfaces of the release layer 8 and the support layer 22, so that the formed capping layer 21 and support layer 22 have better rigidity, thereby improving the support strength of the support layer 22 and the structural strength of the capping layer 21, so as to improve the compressive resistance, airtightness, and waterproofness of the subsequently formed first cavity 3 and second cavity 4. In this embodiment, the support layer 22 formed in the first trench is in contact with the surface of the substrate 1 to facilitate improving the support strength of the support layer 22, reference Figure 7 . In other embodiments, the support layer 22 formed in the trench 23 is isolated from the substrate by the release layer 8 between the surface adjacent to the substrate 1 and the substrate, reference Figure 8。

[0076] When forming the barrier layer 2 by depositing a silica material, the deposition process parameters include: using a mixed gas containing SiH4 gas and N2O gas or a mixed gas of tetraethyl orthosilicate gas and N2O gas, where the flow rate of SiH4 gas or tetraethyl orthosilicate gas is 240 sccm to 300 sccm, the flow rate of N2O gas is 3000 sccm to 5000 sccm, the RF power is 250 W to 350 W, and the process temperature is 150 °C to 400 °C; when forming the barrier layer 2 by depositing a silicon nitride material, the deposition process parameters include: using a mixed gas containing SiH4 gas, NH3 gas, and N2 gas, where the flow rate of SiH4 gas is 500 sccm to 700 sccm, the flow rate of NH3 gas is 200 sccm to 350 sccm, the flow rate of N2 gas is 6000 sccm to 10000 sccm, the RF power is 600 W to 1000 W, and the process temperature range is 250 °C to 400 °C.

[0077] Reference Figure 9 , perform step S05 to form a release hole 6 in the barrier layer 2 around the trench 23, and the release hole 6 exposes a part of the release layer. The release hole 6 is formed by an etching process, and the etching process includes dry etching or wet etching.

[0078] Continue to refer to Figure 9 , perform step S06 to remove the release layer to form a first cavity 3, a second cavity 4, and a release channel. The first cavity 3 exposes at least part of the functional area, the second cavity 4 is located outside the first cavity 3 and is isolated by the barrier layer 2, and the release channel connects the first cavity 3 and the second cavity 4. The method for removing the release layer 2 includes: forming a release hole 6 in the barrier layer 2 within the range of the second cavity 4, and the release hole 6 communicates with the second cavity 4; injecting a release material through the release hole 6 to remove the release layer.

[0079] It should be noted that, according to the material of the release layer, a corresponding removal method needs to be adopted. For example, when the release layer is α-C, the release layer is removed by plasma gas ablation. Another example is that when the release layer material is polyimide or photoresist, it is removed by ashing. Another example is that when the release layer material is low-temperature silica, it reacts with hydrofluoric acid solvent to remove the low-temperature silica. After the release layer is removed, a first cavity 3 is formed after the release layer within the inner circumference of the support layer 22 is removed, and a second cavity 4 is formed after the release layer outside the support layer 22 is removed.

[0080] When the trench includes a first trench and a second trench, a release channel is formed after the release layer between adjacent first trenches is removed. When the trench extends to a partial depth of the release layer, a release channel is formed after the release layer between the bottom of the trench and the surface of the substrate 1 is removed. Refer to Figure 10 。

[0081] Reference Figure 11 , after removing the release layer, a protective layer 7 is formed on the barrier layer 2, and the protective layer 7 covers the release hole 6. The material of the protective layer 7 includes at least one of polyimide, dry film, nitride, and metal, where: the nitride includes silicon nitride, titanium nitride, aluminum nitride, gallium nitride, etc.; the metal includes commonly used metals in semiconductor device manufacturing such as Cu, Al, Ti, Sn, or Ag.

[0082] When the protective layer 7 includes at least one of polyimide and dry film, the method of forming the protective layer 7 includes: providing the protective layer 7; bonding the protective layer 2 to the outer surface of the barrier layer 2; curing the protective layer 7. It should be noted that the process parameters of curing include: the process temperature range is 150°C to 400°C, and the curing process time is 30 minutes to 10 hours, so as to improve the bonding ability between the protective layer 7 and the barrier layer 2, thereby further improving the airtightness of the first cavity 3 and the second cavity 4. If the protective layer is a liquid dry film, the liquid material can also be first coated on the outer surface of the barrier layer 2 and then cured. The outer surface of the barrier layer 2 includes at least part of the first surface of the barrier layer 2, or the outer surface of the barrier layer 2 includes at least part of the first surface of the barrier layer 2 and its peripheral sidewalls. The first surface is the surface away from the first cavity 3. The outer surface of the barrier layer 2 including at least part of the first surface of the barrier layer 2 specifically includes: the outer surface of the barrier layer 2 includes the first surface within the range of the first cavity 3 and the second cavity 4, or the outer surface of the barrier layer 2 includes the entire first surface.

[0083] When the protective layer 7 includes at least one of nitride and metal, the method of forming the protective layer 7 includes: providing the protective layer 7; bonding the protective layer 7 to the barrier layer 2. It should be noted that if the protective layer 7 covers part of the first surface of the barrier layer 2, after bonding the protective layer 7 to the barrier layer 2, the protective layer is etched to remove the protective layer outside the range of the first cavity 3 and the second cavity 4, so that the remaining protective layer covers the surface of the barrier layer within the range of the first cavity 3 and the second cavity 4. The process of etching the protective layer can adopt a dry etching process.

[0084] If the protective layer 7 covers at least part of the first surface of the barrier layer 2 and its peripheral sidewalls, the method of forming the protective layer 7 includes: providing a protective material layer; etching the protective material layer to form a groove capable of accommodating the barrier layer 2; bonding the protective layer 7 to the barrier layer 2 so that the barrier layer 2 is placed in the groove of the protective layer 7. If the protective layer 7 only covers part of the first surface of the barrier layer 2, after bonding the protective layer 7 to the barrier layer 2, the upper surface of the protective layer 7 is etched to remove the protective layer outside the range of the first cavity 3 and the second cavity 4, which is specifically referred to the above description and will not be elaborated here.

[0085] In summary, in the embodiments of the present invention, a release layer is formed on a substrate, and a barrier layer is formed to facilitate the formation of a first cavity and a second cavity surrounded by the barrier layer and the substrate after the release layer is removed, with the second cavity surrounding the first cavity. By forming a groove and forming a barrier layer in the groove, a release channel is formed between the barrier layers formed in adjacent grooves after the release layer is removed, thereby facilitating the removal of the release layer in the second cavity and the first cavity through a release hole within the range of the second cavity to form a first cavity exposing at least part of the functional area; by forming a release hole on the barrier layer outside the groove, it is possible to prevent impurity materials from being introduced into the first cavity during the release hole formation process or process materials from remaining in the first cavity, improving the cleanliness of the first cavity; it also facilitates preventing the protective layer material from falling into the first cavity when the protective layer is formed on the barrier layer subsequently, further ensuring the high cleanliness of the first cavity; the formation process is simple, without the need to use special materials and special processes, greatly reducing the cost.

[0086] Further, the barrier layer is formed by deposition to facilitate wrapping the entire structure of the release layer, thereby preventing the subsequently formed second cavity from communicating with the outside and damaging the airtightness of the first cavity communicating with the second cavity; in addition, wrapping the entire release layer structure with the barrier layer can also increase the compressive resistance of the first cavity structure, thereby improving the reliability of the first cavity structure, preventing the failure of the functional area of the first cavity, increasing the product yield, and avoiding product scrapping.

[0087] Further, after removing the release layer, a protective layer covering the release hole is formed to facilitate the formation of a sealed first cavity, thereby ensuring the airtightness and waterproofness of the first cavity and improving the reliability of the first cavity structure.

[0088] Further, a protective layer is formed on the barrier layer to protect the structural strength of the capping layer, enhance the compressive resistance of the first cavity, thereby improving the pressure-bearing capacity of the capping layer, preventing the capping layer from being damaged due to compression and destroying the first cavity structure, so as to further improve the airtightness and waterproof performance of the first cavity; in addition, the protective layer can also cover the barrier layer, thereby strengthening the sealing of the first cavity structure and preventing the first cavity from communicating with the outside air.

[0089] It should be noted that each embodiment in this specification is described in a related manner. The same or similar parts among the embodiments can be referred to each other, and each embodiment focuses on the differences from other embodiments. In particular, for the structural embodiments, since they are basically similar to the method embodiments, the description is relatively simple, and the related parts can be referred to the partial description of the method embodiments.

[0090] The above description is only a description of the preferred embodiments of the present invention and does not limit the scope of the present invention in any way. Any changes and modifications made by those of ordinary skill in the art based on the above disclosure fall within the scope of protection of the claims.

Claims

1. A semiconductor device, characterized in that, Comprising: A substrate, the substrate comprising a functional region; A barrier layer disposed on the substrate, the barrier layer and the substrate enclosing a first cavity and a second cavity, the first cavity exposing at least part of the functional region, the second cavity being located outside the first cavity, and the barrier layer being provided with a release channel communicating the first cavity and the second cavity; A release hole is formed in the barrier layer, the release hole is within the range of the second cavity, and the release hole communicates with the second cavity; The release channel forms a closed ring, and the surface of the barrier layer between the first cavity and the second cavity adjacent to the substrate is exposed in the release channel; or, the number of the release channels is at least one, and the surface of the part of the barrier layer between the first cavity and the second cavity adjacent to the substrate is exposed in the release channel; A protective layer is provided on the barrier layer, and the protective layer covers the release hole; The protective layer is located on the upper surface of the barrier layer; Or, The protective layer is located on the upper surface and the peripheral side wall of the barrier layer.

2. The semiconductor device according to claim 1, wherein The size of the release channel is greater than 1 um; The number of the release holes is at least two, and the depth-width ratio of the release holes is greater than 3:

1.

3. The semiconductor device according to claim 1, wherein The second cavity surrounds part or all of the periphery of the first cavity.

4. The semiconductor device according to claim 1, wherein The barrier layer includes a capping layer and a support layer, the support layer is disposed on the substrate, the support layer has a first opening and a second opening, the first opening penetrates through the support layer to expose at least part of the functional region, the second opening extends at least to a partial thickness of the support layer from a surface of the support layer adjacent to the capping layer, the second opening is located outside the first opening, and the capping layer is disposed on the support layer to cover the first opening to form a first cavity and cover the second opening to form a second cavity.

5. The semiconductor device according to claim 4, characterized in that, The capping layer and the support layer are of an integral structure and have the same material.

6. A method for fabricating a semiconductor device, characterized in that, Comprising: Providing a substrate, the substrate comprising a functional region; Forming a release layer on the substrate; Forming a trench, the trench penetrating through part of the release layer or extending to a partial depth of the release layer, the trench surrounding the periphery of the functional region, such that the release layer inside the trench and the release layer outside the trench are at least partially communicated; Forming a barrier layer, the barrier layer filling the trench and covering the outer surface of the release layer; Forming a release hole in the barrier layer outside the trench, the release hole exposing part of the release layer; Removing the release layer, a first cavity is formed inside the barrier layer within the trench, a second cavity is formed outside the barrier layer within the trench, and the barrier layer isolating the first cavity and the second cavity forms a release channel, the release channel communicating the first cavity and the second cavity; The trench includes a first trench penetrating through the release layer and a second trench extending to a partial depth of the release layer, and the method for forming the trench includes: Etching the release layer to form a second trench surrounding the periphery of the functional region, the second trench extending to a partial depth of the release layer; Etch the release layer within the range of the second trench to form a first trench, and the first trench exposes a part of the substrate surface; After removing the release layer, form a protective layer on the barrier layer, and the protective layer covers the release hole.

7. The method for manufacturing a semiconductor device according to claim 6, wherein, The trench extends to a partial depth of the release layer, and the method for forming the trench includes: Etch the release layer to form a trench surrounding the periphery of the functional area, and the trench extends to a partial depth of the release layer.

8. The method for fabricating a semiconductor device according to claim 7, wherein The thickness of the release layer between the bottom of the trench and the substrate is greater than 1 micron.

9. The method for manufacturing a semiconductor device according to claim 6, wherein When the barrier layer is formed by depositing a silicon dioxide material, the process parameters of the deposition include: using a mixed gas containing SiH4 gas and N2O gas or a mixed gas of tetraethyl orthosilicate gas and N2O gas, where the flow rate of SiH4 gas or tetraethyl orthosilicate gas is 240 sccm to 300 sccm, the flow rate of N2O gas is 3000 sccm to 5000 sccm, the radio frequency power is 250 W to 350 W, and the process temperature is 150 °C to 400 °C; When the barrier layer is formed by depositing a silicon nitride material, the process parameters of the deposition include: using a mixed gas containing SiH4 gas, NH3 gas and N2 gas, where the flow rate of SiH4 gas is 500 sccm to 700 sccm, the flow rate of NH3 gas is 200 sccm to 350 sccm, the flow rate of N2 gas is 6000 sccm to 10000 sccm, the radio frequency power is 600 W to 1000 W, and the process temperature range is 250 °C to 400 °C.

10. The method for fabricating a semiconductor device according to claim 6, wherein, The barrier layer is formed by a deposition process, and the formed barrier layer includes a support layer and a capping layer. The support layer fills the trench and covers the peripheral sidewalls of the release layer, and the capping layer covers the upper surfaces of the release layer and the support layer.

11. The method for manufacturing a semiconductor device according to claim 6, wherein, The barrier layer material includes at least one of an oxide, a nitride, and a polyimide, where: The oxide includes silicon dioxide, ZnO, CdO, SnO2, Fe2O3, Cr2O3 or Al2O3; The nitride includes silicon nitride, titanium nitride, aluminum nitride or gallium nitride.

12. The method for manufacturing a semiconductor device according to claim 6, wherein The material of the protective layer includes at least one of a polyimide, poly(p-phenylene benzobisoxazole), a dry film, a nitride, and a metal, where: The nitride includes silicon nitride, titanium nitride, aluminum nitride or gallium nitride; The metal includes Cu, Al, Ti, Sn or Ag.

13. The method for manufacturing a semiconductor device according to claim 12, wherein, When the protective layer includes at least one of a polyimide and a dry film, the method for forming the protective layer includes: Provide the protective layer; Bond the protective layer to the outer surface of the barrier layer; Cure the protective layer.

14. The method for manufacturing a semiconductor device according to claim 6, wherein, When the protective layer includes at least one of a nitride and a metal, the method for forming the protective layer includes: Provide the protective layer; Bond the protective layer to the barrier layer.

15. The method for manufacturing a semiconductor device according to claim 6, wherein, The material of the release layer includes at least one of carbon, germanium, and phosphosilicate glass.

Images