A method for identifying hotspots in lithography vias
By identifying the expansion zone in the layout data and judging the number of through holes, the problem of difficult to identify the hot spots of the lithographic through holes in the prior art is solved, and the rapid and accurate identification and analysis of the hot spots of the lithographic through holes is achieved, and the perfection of the lithographic process and design is improved.
Patent Information
- Application Number
- CN202110263882.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2020-12-30
- Filing Date
- 2021-03-11
- Publication Date
- 2025-06-17
- Estimated Expiration
- 2041-03-11
AI Technical Summary
The prior art is difficult to quickly and accurately identify lithography through-hole hot spots in a large amount of layout data, resulting in imperfection of lithography processes and designs.
By obtaining layout information, including the M0 layer, the M0 cut-off layer and the through hole layer, the sides of the through hole layer are moved until the cut-off layer or another through hole is touched, the expansion zone is identified, and whether the through hole is a photolithographic through hole hotspot is determined based on the number of expansion zones.
Automatic identification and analysis of the hot spots of lithographic through holes is realized, and the risk of manufacturing defects of the through holes is judged by obtaining distance information, and the repeated input of one-sided conditions is avoided, which improves the accuracy and efficiency of layout design.
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Figure CN114695155B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of semiconductor design and production, and in particular to a method for identifying photolithography through-hole hot spots in a layout. Background Art
[0002] As the technology nodes of integrated circuit production process continue to advance, the design of integrated circuits has become more and more complex. The wavelength of the mainstream photolithography process used in integrated circuit production today has been maintained at 193nm. When the wavelength of the exposure machine is not updated, the size of the exposure pattern continues to shrink, which will produce many photolithography patterns that meet the design rules but have poor actual process windows. These are called photolithography defect hotspot patterns, which generally refer to patterns or combinations of patterns in the layout that have certain geometric features and feature sizes within a certain range that are prone to photolithography defects.
[0003] Lithography through-hole hot spots are also a type of lithography defect hot spot pattern, such as through holes surrounded by metal cut-off layers in a U shape. Figure 1 Because of the optical proximity effect during the pattern lithography process, the corners of the pattern after exposure will become smoother than those on the layout, thus affecting the coverage area of the through-hole layer on the corresponding layer, which may cause connection failure.
[0004] In actual manufacturing production, due to different processing methods of different manufacturers, the lithography defect hotspot patterns may not actually cause lithography defects, that is, for different manufacturers, the lithography defect hotspot patterns that actually cause lithography defects may be different. The processing methods for lithography defect hotspot patterns include optimizing the original layout design before tape-out, and performing special process processing on the detected lithography process hotspots.
[0005] Therefore, if there is an effective method to quickly and accurately identify the hot spots of photolithography holes in a large amount of layout data in advance, it will be of great practical significance to guide manufacturers in design and production. On the contrary, if there is no such special method, it will be very unfavorable for the further improvement of photolithography process and design. Summary of the invention
[0006] The present invention is based on all or part of the problems of the above-mentioned prior art, and aims to provide a method for identifying hot spots of lithographic vias, which can be used to search and locate hot spots of lithographic vias in a large amount of layout data. All explanations or definitions of the terms and related technical principles involved in the following description of this application are only exemplary and not restrictive.
[0007] A method for identifying hot spots in lithography vias provided by the present invention includes step S1. Obtain layout information, including: M0 layer, M0 cut layer, and via layer for connecting the M0 layer; M0 in the M0 layer is used to connect the active region; the cut in the M0 cut layer is denoted as M0C; the vias in the via layer are rectangular, denoted as V0; step S2. Move the four side edges of V0 along the direction perpendicular to each side edge towards the outside of the rectangle until the movement stops when the conditions are met; the conditions include touching the M0C and the moving distance reaching a preset first distance; identify the rectangular area swept by the side edge that stops moving when touching the M0C as the extended area; step S3. Obtain the number of extended areas around V0, and identify whether V0 is a hot spot in lithography vias according to the number of extended areas around V0.
[0008] In practical applications, due to the smaller graphic sizes of the first metal layer, the first via layer, and the corresponding metal layer cut layer M0C, the problem of hot spots in lithography vias is more obvious. At this time, the connection layer M0 is the first metal layer; the cut layer M0C is the first metal layer cut layer; the via layer for connecting M0 is the first via layer. The specific implementation manner of this application will be described by taking the first metal layer, the first via layer, and the corresponding metal layer cut layer as examples. The preset distances for moving the four side edges outwards can be different from each other, or all or part of them can be the same. The condition for stopping the movement in step S2 further includes touching another via V0.
[0009] The distances for moving the four side edges outwards include: the distance moved along the extension direction of M0 and the distance moved perpendicular to the extension direction of M0; and the distance moved perpendicular to the extension direction of M0 is not greater than the distance between the midlines of two adjacent M0s, that is, the pitch value between adjacent M0s.
[0010] In step S3, determine the V0 with three extended areas around it as a hot spot in lithography vias; step S3 further includes obtaining the distance information between the identified hot spot in lithography vias and the three adjacent M0Cs, and evaluating the risk of manufacturing defects generated by this hot spot in lithography vias.
[0011] The distance information between the hot spot in lithography vias and the three adjacent M0Cs includes: the first direction pitch and the second direction pitch in two different directions.
[0012] The specific process of obtaining the first-direction spacing and the second-direction spacing includes: Denote the T-shaped pattern composed of the identified hotspots of the lithography vias and the extended areas they contact as the first target area; Expand the first target area into the smallest first rectangle that contains it; Denote each of the rectangles remaining after subtracting the first target area from the first rectangle as the second rectangle; And assume that in the extended area, the length of the extended edge that coincides with the hotspot of the lithography via is the width of the extended area, and the length of the extended edge perpendicular to the width is the length of the extended area; Among the three extended areas of the first target area, denote the extended area that contacts both of the two second rectangles as the first extended area, and denote the remaining two extended areas as the second extended areas respectively. The first-direction spacing is the length of the first extended area, and the second-direction spacing is the length of the second extended area.
[0013] The identified hotspots of the lithography vias are also screened. The screening steps include: Judge whether the first-direction spacing conforms to the first-direction range. If it conforms, determine that the first extended area is valid; Judge whether the second-direction spacing conforms to the second-direction range. If it conforms, determine that the second extended area is valid; When both the first extended area and the second extended area around a hotspot of the lithography via are valid, screen out the hotspot of the lithography via.
[0014] The present invention has the following beneficial effects: According to a method for identifying hotspots of lithography vias involved in the present invention, by constructing the extended area; it can automatically identify the vias surrounded by the M0 cut layer in a U shape according to the number of obtained extended areas; By obtaining the distance information, it is possible to judge the spacing of the vias in different directions and compare the spacing with the preset range, avoiding repeated input of unilateral conditions, and being able to conveniently, effectively and quickly search for and analyze the hotspots for layout design. BRIEF DESCRIPTION OF THE DRAWINGS
[0015] Figure 1 It is a schematic diagram of the deformation of the hotspots of the lithography vias in the prior art.
[0016] Figure 2 It is a schematic diagram of the process of the method for identifying hotspots of lithography vias in Embodiment 1 of the present invention.
[0017] Figure 3 It is a schematic diagram of identifying the hotspots of the lithography vias in Embodiment 1 of the present invention.
[0018] Figure 4 It is a schematic diagram of obtaining the distance information in Embodiment 2 of the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS
[0019] The above and / or additional aspects and advantages of the present invention will become apparent and be readily understood from the description of the embodiments in conjunction with the following drawings. In the following embodiments, the operations of the embodiments are depicted in a specific order. The description of these orders is for better understanding of the details in the embodiments to comprehensively understand the present invention. However, the description of these orders does not necessarily correspond one-to-one with a method for identifying hotspots in lithography vias of the present invention, nor can the scope of the present invention be limited thereby.
[0020] It should be noted that the flowcharts and block diagrams in the drawings illustrate the possible operation processes of the method according to the embodiments of the present invention. It should also be noted that in some alternative implementations, the functions marked in the boxes may also occur in a different order from that marked in the drawings. For example, two consecutively represented boxes can actually be executed substantially in parallel, and they can sometimes be executed in an interleaved manner, depending on the purpose to be achieved by the steps involved.
[0021] Embodiment 1
[0022] As Figure 2 shown, in combination with reference to Figure 3 , the method for identifying hotspots in lithography vias according to Embodiment 1 of the present invention includes: Step S1. Obtain layout information, including: M0 layer, M0 cut layer, and via layer for connecting the M0 layer; the M0 is used to connect the active region; the cut in the M0 cut layer is denoted as M0C; the vias in the via layer are rectangular, denoted as V0; Step S2. Move the four side edges of V0 along the direction perpendicular to each side edge towards the outside of the rectangle respectively until the movement stops when the conditions are met; the conditions include touching the M0C pattern, touching another via V0, and moving to the preset distance during the movement of the preset distance; identify the rectangular area swept by the side edge that moves to touch the adjacent M0C pattern as the expansion area; Step S3. Obtain the number of expansion areas around the V0, and identify whether the V0 is a hotspot in lithography vias based on whether the number of expansion areas is equal to three. If the number of expansion areas is equal to three, then the V0 is a hotspot in lithography vias.
[0023] In this embodiment, the via is denoted as V0 and is rectangular. Move the four side edges of V0 along the direction perpendicular to each side edge towards the outside of the rectangle, and stop moving when the side edge meets any one of the following conditions during the movement: touching M0C, touching another via, or the movement distance reaches the preset value. Among them, the movement distance includes: the movement distance along the extension direction of M0 and the movement distance perpendicular to the extension direction of M0, and the preset value of the movement distance perpendicular to the extension direction of M0 is not greater than the distance from the side edge to the midline (pitch) of the adjacent two Ms. Denote the rectangular area generated by the side edge that moves to touch M0C during the movement as VIA_expand, that is, the expansion area. As Figure 3As shown, when there are three expansion regions around a through - hole V0, the through - hole V0 is identified as a lithography through - hole hot spot, such as Figure 3 In the example of, 3 out of 6 through - holes V0 are identified lithography through - hole hot spots, denoted as target_via in this embodiment.
[0024] Embodiment 2
[0025] Based on Embodiment 1, in Embodiment 2 of the present invention, step S3 further includes: obtaining the distance information between the lithography through - hole hot spot and its adjacent three M0Cs, so as to evaluate the risk of manufacturing defects generated by the lithography through - hole hot spot. Such as Figure 4As shown, in this embodiment, the distance information includes a first-direction spacing and a second-direction spacing; the expansion area formed by the movement of the edge of the lithography through-hole hot spot along the M0 extension direction is the first expansion area, and the first-direction spacing is the expansion edge length of the first expansion area; the expansion area formed by the movement of the edge of the lithography through-hole hot spot along the direction perpendicular to the M0 extension direction is the second expansion area, and the second-direction spacing is the expansion edge length of the second expansion area. In this embodiment, the T-shaped pattern composed of the lithography through-hole hot spot target_via and the VIA_expand in contact with the target_via is denoted as the first target area TARGETVIA_expanded; the TARGETVIA_expand is expanded into the smallest rectangle containing the TARGETVIA_expand, i.e., the first rectangle, and the rectangles remaining after subtracting the TARGETVIA_expand from the first rectangle are each denoted as TARGETVIA_expanded_corner, i.e., the second rectangle; and in the VIA_expand of the rectangle, the length of the side coinciding with the target_via is defined as the width of the VIA_expand, and the length of the side perpendicular to the side coinciding with the target_via is defined as the length of the VIA_expand. Among the three VIA_expands of the TARGETVIA_expand, the VIA_expand in contact with two of the TARGETVIA_expanded_corner is denoted as space_web, i.e., the first expansion area. The remaining two VIA_expands are respectively denoted as space_flange, i.e., the second expansion area. The length of the rectangle space_web is denoted as distance_T, representing the first-direction spacing; the length of the rectangle space_flange is denoted as distance_S, representing the second-direction spacing. One distance_T and two distance_S of the target_via are the distance information between the target_via and its three adjacent M0Cs, and are used to characterize the risk level of the lithography through-hole hot spot. In this embodiment, the smaller these distance values are, the greater the risk of manufacturing defects generated by the lithography through-hole hot spot during lithography.
[0026] In this embodiment, the identified hotspots of the lithographic vias are also screened. In this embodiment, it is judged whether the distance_T of the lithographic via hotspot target_via conforms to the preset range M0C to V0 space web. If it conforms, this space_web is denoted as space_web_valid; it is judged whether the distance_S of the lithographic via hotspot target_via conforms to the preset range M0C to V0 space flange. If it conforms, this space_flange is denoted as space_flange_valid; if all three VIA_expands contacted by the target_via are space_web_valid or space_flange_valid, then this target_via is the finally screened lithographic via hotspot.
[0027] The above embodiments are preferred cases of the present invention and are not used to limit the protection scope of the present invention. It should be understood that the details in these embodiments should not be used to limit the present invention. In addition, for the sake of simplifying the drawings, some structures and components will be shown in a simple schematic manner in the drawings, and these are only schematic and do not limit the specific actual possible design situations.
[0028] In addition, in the present invention, descriptions such as "first" and "second" are only for descriptive purposes and do not particularly refer to the meaning of order or sequence, nor are they used to limit the present invention. They are only used to distinguish components or operations described with the same technical terms, and cannot be understood as indicating or implying their relative importance or implicitly indicating the quantity of the indicated technical features.
[0029] The technical solutions between various embodiments can be combined with each other, but it must be based on the ability of those of ordinary skill in the art to implement. When the combination of technical solutions results in contradictions or cannot be implemented, it should be considered that such a combination of technical solutions does not exist and is not within the protection scope required by the present invention.
Claims
1. A method for identifying hotspots in lithography vias, characterized in that, Including: Step S1. Obtain layout information, including: M0 layer, M0 cut layer, and via layer for connecting the M0 layer; M0 in the M0 layer is used to connect the active region; the cut in the M0 cut layer is denoted as M0C; the vias in the via layer are rectangular and denoted as V0; Step S2. Move the four side edges of V0 along the directions perpendicular to the respective side edges towards the outside of the rectangle until the movement stops when the conditions are met; the conditions include touching M0C and the moving distance reaching a preset first distance; identify the rectangular area swept by the side edge that stops moving when touching M0C as the extended area; Step S3. Obtain the number of extended areas around V0, and identify whether V0 is a lithography via hot spot based on the number of extended areas around V0, and determine V0 with three extended areas around it as a lithography via hot spot.
2. The method for identifying hotspots in lithography vias according to claim 1, characterized in that, The condition for stopping the movement in Step S2 further includes: touching another via V0.
3. The method for identifying hotspots in lithography vias according to claim 2, characterized in that, The distances by which the four side edges move outwards include: the distance moved along the extending direction of M0 and the distance moved perpendicular to the extending direction of M0; and the distance moved perpendicular to the extending direction of M0 is not greater than the distance between the mid-lines of two adjacent M0s.
4. The method for identifying hotspots in lithography vias according to claim 1, characterized in that, Step S3 further includes obtaining the distance information between the identified lithography via hot spot and its adjacent three M0Cs, and evaluating the risk of manufacturing defects generated by this lithography via hot spot.
5. The method for identifying hotspots in lithography vias according to claim 4, characterized in that, The distance information between the lithography via hot spot and its adjacent three M0Cs includes: the first direction pitch and the second direction pitch in two different directions.
6. The method for identifying hotspots in lithography vias according to claim 5, characterized in that, The specific process of obtaining the first direction pitch and the second direction pitch includes: Denote the T-shaped pattern formed by the identified lithography via hot spot and the extended area it contacts as the first target area; expand the first target area into the smallest first rectangle containing it; Denote the remaining rectangles after subtracting the first target area from the first rectangle as second rectangles; and in the extended area, the length of the extended edge that coincides with the lithography via hot spot is the width of the extended area, and the length of the extended edge perpendicular to the width is the length of the extended area; Among the three extended areas of the first target area, the extended area that contacts both of the two second rectangles is denoted as the first extended area, and the remaining two extended areas are respectively denoted as the second extended areas. The first direction pitch is the length of the first extended area, and the second direction pitch is the length of the second extended area.
7. The method for identifying hotspots in lithography vias according to claim 6, characterized in that, Also screen the identified lithography via hot spots. The screening steps include: Judge whether the first direction pitch meets the first direction range. If it meets, determine that the first extended area is valid; judge whether the second direction pitch meets the second direction range. If it meets, determine that the second extended area is valid; when both the first extended area and the second extended area around a lithography via hot spot are valid, screen out the lithography via hot spot.
Citation Information
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