A multi-threshold coupling device based on multi-gate modulation and its preparation method

Abstract

The present invention relates to a multi-threshold coupling device based on multi-gate modulation and a preparation method thereof, the method comprising: selecting a substrate layer; growing a buffer layer on the substrate layer; growing an i-GaN layer on the buffer layer; growing an AlGaN barrier layer on the i-GaN layer; depositing an ohmic metal on the AlGaN barrier layer; injecting ions from the periphery of the AlGaN barrier layer into the i-GaN layer; preparing a SiN layer on the AlGaN barrier layer; removing the SiN layer in the gate foot region; depositing a planar gate metal on the AlGaN barrier layer in the gate foot region to prepare a planar gate; removing the planar gate metal and part of the AlGaN barrier layer in the groove gate region at intervals so that the planar gate metal is arranged discontinuously at preset intervals; preparing an Al2O3 dielectric layer on the AlGaN barrier layer in the groove gate region and on the spaced-apart planar gate metal; and depositing a groove gate metal on the bottom and sidewalls of the Al2O3 dielectric layer in the groove gate region to prepare a groove gate. The present invention achieves multi-threshold coupling by applying different gate electrical biases to the groove gate region and the planar gate region, thereby improving the transconductance flatness of the device.

Description

Technical Field

[0001] The present invention belongs to the technical field of semiconductor devices, and in particular relates to a multi-threshold coupling device based on multi-gate modulation and a preparation method thereof. Background Art

[0002] GaN-based high electron mobility transistors have become candidates for next-generation high-power and high-speed device applications due to their material advantages such as large band gap, high breakdown electric field, high saturation electron velocity, and high 2DEG (Two-dimensional electron gas) density at the heterojunction caused by polarization.

[0003] GaN-based high electron mobility transistors are the most common power amplifier components in current telecommunications applications. This is mainly due to the high electron mobility and saturation velocity of GaN materials, which give them excellent power density.

[0004] However, existing AlGaN / GaN HEMT technology suffers from nonlinearity issues, which can lead to severe sidebands, output power saturation at high input power, and signal distortion. Therefore, as the demand for high data rates and spectral efficiency in modern wireless communications surges, improving the linearity of power amplifiers has become crucial. Summary of the Invention

[0005] In order to solve the above problems existing in the prior art, the present invention provides a multi-threshold coupling device based on multi-gate modulation and a method for manufacturing the same. The technical problem to be solved by the present invention is achieved through the following technical solutions:

[0006] One embodiment of the present invention provides a method for manufacturing a multi-threshold coupling device based on multi-gate modulation, the method comprising:

[0007] Select the substrate layer;

[0008] growing a buffer layer on the substrate layer;

[0009] growing an i-GaN layer on the buffer layer;

[0010] growing an AlGaN barrier layer on the i-GaN layer;

[0011] Depositing an ohmic metal on the AlGaN barrier layer to prepare a source electrode and a drain electrode;

[0012] Implanting ions from the periphery of the AlGaN barrier layer into the i-GaN layer to achieve device isolation;

[0013] preparing a SiN layer on the AlGaN barrier layer;

[0014] removing the SiN layer in the gate foot region to expose the AlGaN barrier layer in the gate foot region;

[0015] Depositing a planar gate metal on the AlGaN barrier layer in the gate foot region to prepare a planar gate;

[0016] removing the planar gate metal and part of the AlGaN barrier layer in the groove gate region so that the planar gate metal is arranged discontinuously at preset intervals;

[0017] Preparing an Al2O3 dielectric layer on the AlGaN barrier layer in the groove gate region and on the spaced-apart planar gate metals;

[0018] A recess gate metal is deposited on the bottom and sidewalls of the Al2O3 dielectric layer in the recess gate region to prepare a recess gate.

[0019] In one embodiment of the present invention, the material of the buffer layer includes GaN.

[0020] In one embodiment of the present invention, depositing an ohmic metal on the AlGaN barrier layer to prepare a source and a drain comprises:

[0021] Depositing an ohmic metal on the AlGaN barrier layer by an electron beam evaporation method, wherein the ohmic metal is an ohmic stacked metal, and the ohmic stacked metal includes Ti / Al / Ni / Au;

[0022] The device on which the ohmic metal is deposited is subjected to a rapid thermal annealing process in an N2 atmosphere to prepare the source and the drain.

[0023] In one embodiment of the present invention, ions are implanted from the periphery of the AlGaN barrier layer into the i-GaN layer to achieve device isolation, comprising:

[0024] Boron ions are implanted from the periphery of the AlGaN barrier layer into the i-GaN layer using an ion implantation method to achieve device isolation.

[0025] In one embodiment of the present invention, forming a SiN layer on the AlGaN barrier layer includes:

[0026] Depositing a SiN layer on the AlGaN barrier layer and the ohmic metal using a PECVD method;

[0027] The SiN layer on the ohmic metal is etched away by a dry etching method to expose the ohmic metal, and the SiN layer on the AlGaN barrier layer is retained.

[0028] In one embodiment of the present invention, removing the SiN layer in the gate foot region to expose the AlGaN barrier layer in the gate foot region includes:

[0029] The SiN layer in the gate foot region is removed by an F-based etching method to expose the AlGaN barrier layer in the gate foot region.

[0030] In one embodiment of the present invention, the step of removing the planar gate metal and a portion of the AlGaN barrier layer in the groove gate region includes:

[0031] Etching away the planar gate metal in the groove gate region using F-based spacers;

[0032] A portion of the AlGaN barrier layer in the groove gate region is etched away using a Cl-based spacer to cut off the channel.

[0033] In one embodiment of the present invention, after preparing the groove gate, the method further includes:

[0034] Interconnect metal is deposited on the source, the drain, the planar gate and the recessed gate.

[0035] In one embodiment of the present invention, the planar gate comprises planar tungsten, and the groove gate comprises Ni / Au.

[0036] An embodiment of the present invention provides a multi-threshold coupling device based on multi-gate modulation, which is manufactured using the manufacturing method described in any of the above embodiments. The multi-threshold coupling device includes:

[0037] substrate layer;

[0038] a buffer layer located on the substrate layer;

[0039] an i-GaN layer located on the buffer layer;

[0040] An AlGaN barrier layer having grooves arranged at intervals in the gate foot region;

[0041] a source electrode and a drain electrode located on the AlGaN barrier layer;

[0042] a planar gate located on the AlGaN barrier layer in the raised portion of the gate foot region;

[0043] The AlGaN barrier layer on the groove in the gate foot region and the Al2O3 dielectric layer on the planar gate;

[0044] A recessed gate is located on the bottom and sidewalls of the Al2O3 dielectric layer in the recessed gate region.

[0045] Compared with the prior art, the present invention has the following beneficial effects:

[0046] The present invention divides the HEMT device into multiple periodic arrays along the gate width, with each period consisting of a planar gate and a grooved gate. The grooved gates in the grooved gate region are closer to the channel, providing stronger gate control capability and a more positive threshold voltage. Furthermore, by applying different gate electrical biases to the grooved and planar gate regions, multi-threshold coupling is achieved, thereby improving the device's transconductance flatness. BRIEF DESCRIPTION OF THE DRAWINGS

[0047] Figure 1 A schematic flow chart of a method for preparing a multi-threshold coupling device based on multi-gate modulation provided by an embodiment of the present invention;

[0048] Figures 2a to 2e A schematic diagram of a process for preparing a multi-threshold coupling device based on multi-gate modulation provided by an embodiment of the present invention;

[0049] Figure 3 A top view of a multi-threshold coupling device based on multi-gate modulation provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0050] The present invention will be further described in detail below with reference to specific examples, but the embodiments of the present invention are not limited thereto.

[0051] It should be noted that the “up”, “down”, “left” and “right” mentioned in this embodiment are the positional relationships of the Schottky diode structure when it is in the illustrated state, “length” is the lateral dimension of the Schottky diode when it is in the illustrated state, and “depth” is the longitudinal dimension of the Schottky diode when it is in the illustrated state.

[0052] Example 1

[0053] See Figure 1 、 Figures 2a to 2e 、 Figure 3 , Figure 1 A schematic flow chart of a method for preparing a multi-threshold coupling device based on multi-gate modulation provided by an embodiment of the present invention is provided. Figures 2a to 2e A schematic diagram of a process for preparing a multi-threshold coupling device based on multi-gate modulation provided by an embodiment of the present invention. Figure 3 A top view of a multi-threshold coupling device based on multi-gate modulation provided in an embodiment of the present invention. A method for manufacturing a multi-threshold coupling device based on multi-gate modulation is provided in an embodiment of the present invention. The method for manufacturing a multi-threshold coupling device based on multi-gate modulation includes:

[0054] Step 1: Select the base layer.

[0055] Preferably, the substrate layer is a SiC substrate.

[0056] Step 2: A buffer layer is grown on the substrate layer using a MOCVD (Metal-organic Chemical Vapor Deposition) method.

[0057] Preferably, the material of the buffer layer includes GaN.

[0058] Step 3: growing an i-GaN (non-intentionally doped GaN) layer on the substrate layer.

[0059] Specifically, on the basis of step 2, an i-GaN layer is grown on the buffer layer above the substrate layer by using an MOCVD method.

[0060] Step 4: growing an AlGaN barrier layer on the i-GaN layer.

[0061] Specifically, an AlGaN barrier layer is grown on the i-GaN layer using the MOCVD method.

[0062] Preferably, the AlGaN barrier layer is Al 0.25 GaN, thickness is 20nm.

[0063] In this embodiment, an AlN layer may be grown on the i-GaN layer before growing the AlGaN barrier layer. The thickness of the AlN layer may be 1 nm.

[0064] In addition, a GaN cap layer may be grown on the AlGaN barrier layer, and the thickness may be 2.5 nm.

[0065] This embodiment uses AlGaN / GaN heterojunction material.

[0066] Step 5: This embodiment can also perform photolithography etching of alignment marks. After the marks are made, each subsequent photolithography step can be compared with the marks to prevent misalignment.

[0067] Step 6: Deposit ohmic metal on the AlGaN barrier layer to prepare source and drain electrodes.

[0068] Step 6.1: Deposit an ohmic metal on the AlGaN barrier layer using an electron beam evaporation method. The ohmic metal is an ohmic stacked metal. The ohmic stacked metal includes Ti / Al / Ni / Au, that is, Ti, Al, Ni, and Au from bottom to top.

[0069] Preferably, the thicknesses of Ti, Al, Ni and Au are 20 nm, 160 nm, 55 nm and 45 nm respectively.

[0070] Step 6.2: Perform a rapid thermal annealing treatment on the device with the deposited ohmic metal in an N2 atmosphere to prepare a source and a drain.

[0071] Preferably, the temperature of the rapid thermal annealing is 860° C., and the time of the rapid thermal annealing is 60 seconds.

[0072] Step 7: Ions are implanted from the periphery of the AlGaN barrier layer into the i-GaN layer to achieve device isolation.

[0073] Specifically, an ion implantation method is used to implant boron ions from the periphery of the AlGaN barrier layer into the i-GaN layer to achieve device isolation.

[0074] Step 8: Prepare a SiN layer on the AlGaN barrier layer.

[0075] Step 8.1: Deposit a SiN layer on the AlGaN barrier layer and the ohmic metal layer using a PECVD (Plasma Enhanced Chemical Vapor Deposition) method.

[0076] Preferably, the thickness of the SiN layer is 120 nm.

[0077] Among them, the SiN layer can react with the dangling bonds on the surface of the barrier, reduce the surface state, and reduce the current collapse.

[0078] Step 8.2: Use a dry etching method to etch away the SiN layer on the ohmic metal to expose the ohmic metal and retain the SiN layer on the AlGaN barrier layer.

[0079] Specifically, ICP (inductively coupled plasma) etching equipment is used to perform hole etching using a dry etching method to etch away the SiN layer on the ohmic metal.

[0080] Furthermore, the etching gas is CF4 / O2, with a flow rate of 25 / 5 sccm, a chamber pressure of 5 mTorr, an ICP upper electrode power of 80 W, and a lower electrode power of 10 W.

[0081] Step 9: Remove the SiN layer in the gate foot region to expose the AlGaN barrier layer in the gate foot region, wherein the gate foot region is located between the source and the drain.

[0082] Specifically, the SiN layer in the gate foot region is removed by using an ICP etching device and a F-based etching method to expose the AlGaN barrier layer in the gate foot region.

[0083] Furthermore, the etching gas is CF4 / O2, the flow rate is 25 / 5 sccm, the chamber pressure is 5 mTorr, the ICP upper electrode power is 80 W, the lower electrode power is 10 W, and the bias voltage is 46V.

[0084] Step 10, see Figure 2a , a planar gate metal is deposited on the AlGaN barrier layer in the gate foot region to prepare a planar gate.

[0085] Specifically, a planar gate metal is deposited on the AlGaN barrier layer in the gate foot region by using an electron beam evaporation method to prepare a planar gate.

[0086] Preferably, the planar gate comprises planar gate tungsten. Since tungsten can be etched using dry etching, the planar gate metal etching and the barrier layer etching can be performed using only one photolithography step, thus reducing the number of process steps.

[0087] Step 11: Remove the planar gate metal and part of the AlGaN barrier layer in the groove gate region so that the planar gate metal is arranged discontinuously at preset intervals.

[0088] Step 11.1, see Figure 2b First, electron beam lithography is used for photolithography. Then, F-based etching is used to remove the planar gate metal in the recessed gate area at intervals along the gate width. F-based plasma reacts with tungsten metal to generate WF6 gas, which enables dry etching of tungsten metal.

[0089] Step 11.2, see Figure 2c The AlGaN barrier layer in the recessed gate region is partially etched using a Cl-based spacer, leaving the planar gate metal at pre-set intervals. The etching depth reaches the AlGaN layer to preserve the entire channel plane.

[0090] The Cl-based plasma reacts with the GaN-based material to generate gases GaCl3 and N2, thereby achieving dry etching of AlGaN and GaN.

[0091] Step 12, see Figure 2d An Al2O3 dielectric layer is prepared on the AlGaN barrier layer in the groove gate area and on the spaced-apart planar gate metals.

[0092] Specifically, an Al2O3 dielectric layer is deposited using ALD (atomic layer deposition) on the AlGaN barrier layer in the recessed gate region and on the spaced-apart planar gate metal. This layer electrically isolates the planar and recessed gates. Because both the planar and recessed gates are metal, they must be connected separately and have different gate voltages applied. If the planar and recessed gates come into contact, a short circuit will occur.

[0093] Step 13, see Figure 2e , a recessed gate metal is deposited on the bottom and sidewalls of the Al2O3 dielectric layer in the recessed gate region to prepare a recessed gate of an MIS (Metal-oxide-Semiconductor) structure.

[0094] Specifically, the recessed gate metal is deposited on the bottom and sidewalls of the Al2O3 dielectric layer in the recessed gate region by using an electron beam evaporation method.

[0095] Preferably, the groove gate comprises Ni / Au, that is, Ni and Au from bottom to top. The groove gate adopts Ni / Au and is selectively deposited after photolithography.

[0096] Step 14: deposit interconnect metal on the source, drain, planar gate and recessed gate.

[0097] Specifically, electron beam evaporation equipment is used to deposit Interconnect Metal.

[0098] Through periodic etching, the device gate is periodically divided into a planar region and a barrier recessed region along the gate width. The planar region and recessed region have different threshold voltages, allowing for different gate overdrive voltages at the same gate voltage, leading to sequential conduction, compensation of multiple transconductances, and increased transconductance flatness. For planar HEMTs, increasing the gate bias to obtain more charge increases the surface charge density, slowing the saturation velocity, and thus decreasing the transconductance.

[0099] The present invention leads out the gates of the planar gate region and the groove gate region respectively, applies different gate biases to the planar gate and the groove gate, realizes sequential conduction of the planar Schottky gate and the groove MIS gate-controlled devices at different thresholds, realizes threshold coupling, compensates for the drop of transconductance, and thus realizes transconductance compensation within a wider gate voltage range, thereby improving the flatness of the transconductance and the linear performance of the device, and has great potential in high-linearity RF applications.

[0100] In summary, the present invention controls the sequential conduction of the Schottky gate and the grooved MIS gate by applying different gate biases, that is, the sequential conduction of the planar gate and the grooved gate devices in the gate width direction, thereby achieving transconductance compensation within a larger gate voltage range, improving the flatness of the transconductance, and solving serious linearity problems in the wireless communication field, such as sidebands, output power saturation at high input power, and signal distortion.

[0101] Example 2

[0102] See Figures 2a to 2e 、 Figure 3 The present invention further provides a multi-threshold coupling device based on multi-gate modulation based on the first embodiment. The multi-threshold coupling device based on multi-gate modulation is manufactured using the manufacturing method of the multi-threshold coupling device based on multi-gate modulation based on the first embodiment. The multi-threshold coupling device based on multi-gate modulation includes:

[0103] substrate layer;

[0104] a buffer layer located on the substrate layer;

[0105] an i-GaN layer on the buffer layer;

[0106] An AlGaN barrier layer having grooves arranged at intervals in the gate foot region;

[0107] a source and a drain located on the AlGaN barrier layer;

[0108] A planar gate located on an AlGaN barrier layer in a raised portion of a gate foot region;

[0109] An AlGaN barrier layer on the groove in the gate foot region and an Al2O3 dielectric layer on the planar gate;

[0110] The recessed gate is located on the bottom and sidewalls of the Al2O3 dielectric layer in the recessed gate area.

[0111] The present invention controls the sequential conduction of the Schottky gate and the grooved MIS gate by applying different gate biases, that is, the sequential conduction of the planar gate and the grooved gate devices in the gate width direction, thereby achieving transconductance compensation within a larger gate voltage range, improving the flatness of the transconductance, and solving serious linearity problems such as sidebands, output power saturation under high input power, and signal distortion in the field of wireless communications.

[0112] In the description of the present invention, the terms "first" and "second" are used for descriptive purposes only and should not be understood to indicate or imply relative importance or implicitly specify the number of the technical features indicated. Therefore, a feature specified as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, "plurality" means two or more, unless otherwise specifically defined.

[0113] In the description of this specification, reference to the terms "one embodiment," "some embodiments," "example," "specific example," or "some examples" means that the specific features, structures, materials, or special features described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or special features described can be combined in any suitable manner in any one or more embodiments or examples. In addition, those skilled in the art can combine and combine different embodiments or examples described in this specification.

[0114] The above is a further detailed description of the present invention in conjunction with specific preferred embodiments, and the specific implementation of the present invention should not be considered to be limited to these descriptions. For those skilled in the art of the present invention, without departing from the concept of the present invention, several simple deductions or substitutions can be made, which should be considered to fall within the scope of protection of the present invention.

Claims

1. A method for preparing a multi-threshold coupling device based on multi-gate modulation, characterized in that: The preparation method comprises: Select the substrate layer; growing a buffer layer on the substrate layer; growing an i-GaN layer on the buffer layer; growing an AlGaN barrier layer on the i-GaN layer; Depositing an ohmic metal on the AlGaN barrier layer to prepare a source electrode and a drain electrode; Implanting ions from the periphery of the AlGaN barrier layer into the i-GaN layer to achieve device isolation; preparing a SiN layer on the AlGaN barrier layer; removing the SiN layer in the gate foot region to expose the AlGaN barrier layer in the gate foot region; Depositing a planar gate metal on the AlGaN barrier layer in the gate foot region to prepare a planar gate; removing the planar gate metal and part of the AlGaN barrier layer in the groove gate region so that the planar gate metal is arranged discontinuously at preset intervals; Preparing an Al2O3 dielectric layer on the AlGaN barrier layer in the groove gate region and on the spaced-apart planar gate metals; A recess gate metal is deposited on the bottom and sidewalls of the Al2O3 dielectric layer in the recess gate region to prepare a recess gate.

2. The method for preparing a multi-threshold coupling device based on multi-gate modulation according to claim 1, characterized in that: The material of the buffer layer includes GaN.

3. The method for preparing a multi-threshold coupling device based on multi-gate modulation according to claim 1, characterized in that: Depositing an ohmic metal on the AlGaN barrier layer to prepare a source and a drain, comprising: Depositing an ohmic metal on the AlGaN barrier layer by an electron beam evaporation method, wherein the ohmic metal is an ohmic stacked metal comprising Ti / Al / Ni / Au; The device on which the ohmic metal is deposited is subjected to a rapid thermal annealing process in an N2 atmosphere to prepare the source and the drain.

4. The method for preparing a multi-threshold coupling device based on multi-gate modulation according to claim 1, characterized in that: Implanting ions from the periphery of the AlGaN barrier layer into the i-GaN layer to achieve device isolation, comprising: Boron ions are implanted from the periphery of the AlGaN barrier layer into the i-GaN layer using an ion implantation method to achieve device isolation.

5. The method for preparing a multi-threshold coupling device based on multi-gate modulation according to claim 1, characterized in that: Preparing a SiN layer on the AlGaN barrier layer, comprising: Depositing a SiN layer on the AlGaN barrier layer and the ohmic metal using a PECVD method; The SiN layer on the ohmic metal is etched away by a dry etching method to expose the ohmic metal, and the SiN layer on the AlGaN barrier layer is retained.

6. The method for preparing a multi-threshold coupling device based on multi-gate modulation according to claim 1, characterized in that: Removing the SiN layer in the gate foot region to expose the AlGaN barrier layer in the gate foot region, comprising: The SiN layer in the gate foot region is removed by using an F-based etching method to expose the AlGaN barrier layer in the gate foot region.

7. The method for preparing a multi-threshold coupling device based on multi-gate modulation according to claim 1, characterized in that: The planar gate metal and part of the AlGaN barrier layer in the groove gate region are removed by spacing, comprising: Etching away the planar gate metal in the groove gate region using F-based spacers; A portion of the AlGaN barrier layer in the groove gate region is etched away using a Cl-based spacer to cut off the channel.

8. The method for preparing a multi-threshold coupling device based on multi-gate modulation according to claim 1, characterized in that: After preparing the groove gate, the method further includes: Interconnect metal is deposited on the source, the drain, the planar gate and the recessed gate.

9. The method for preparing a multi-threshold coupling device based on multi-gate modulation according to claim 1, characterized in that: The planar gate comprises planar tungsten, and the groove gate comprises Ni / Au.

10. A multi-threshold coupling device based on multi-gate modulation, characterized in that: Prepared by the preparation method according to any one of claims 1 to 9, the multi-threshold coupling device based on multi-gate modulation comprises: substrate layer; a buffer layer located on the substrate layer; an i-GaN layer located on the buffer layer; An AlGaN barrier layer having grooves arranged at intervals in the gate foot region; a source electrode and a drain electrode located on the AlGaN barrier layer; a planar gate located on the AlGaN barrier layer in the raised portion of the gate foot region; The AlGaN barrier layer on the groove in the gate foot region and the Al2O3 dielectric layer on the planar gate; A recessed gate is located on the bottom and sidewalls of the Al2O3 dielectric layer in the recessed gate region.

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