Method, apparatus and computer program product for debugging a printed circuit board

Abstract

The present disclosure relates to a method of debugging a printed circuit board having at least one boundary-scan compliant device, the method using an electronic processing unit and comprising the steps of: retrieving boundary-scan properties of the at least one boundary-scan compliant device, the boundary-scan compliant device comprising a list of boundary-scan compliant circuit terminals of the at least one boundary-scan compliant device; selecting and displaying a circuit diagram of at least a portion of the device mounted on the printed circuit board, the circuit diagram comprising at least one device of a plurality of devices mounted on the printed circuit board and at least one other device of the plurality of devices, the other device comprising circuit terminals that are interconnected with circuit terminals of the device for visualizing at least the device, the other device and the interconnections. The present disclosure also relates to a corresponding debugging apparatus and to a corresponding computer program product.

Description

TECHNICAL FIELD

[0001] The present disclosure generally relates to debugging one or more printed circuit boards.

[0002] The present disclosure also relates to an apparatus for testing a printed circuit board, a debugging apparatus and a computer program product. BACKGROUND

[0003] A printed circuit board can comprise a large number of electronic components which are attached to the printed circuit board, for example by contact pads. The electronic components are connected by their conductive pads to conductive tracks.

[0004] Modern printed circuit boards have multiple layers of printing with trace layers or conductive tracks between the layers. Thus, only the tracks on the top and bottom layer of the printed circuit board are visible. Since modern printed circuit boards can comprise four to eight layers, although more layers are also common, most of the tracks are not visible. Testing and debugging such printed circuit boards is therefore challenging, since many of the pins of the electronic components are not visible and it is therefore difficult for a debugger to distinguish them. Many of the electronic components and tracks are also very small, which further complicates testing and debugging.

[0005] A malfunction of one of the electronic components or one of the tracks can have caused the entire printed circuit board to malfunction. It is therefore desirable that each electronic component and each track can be monitored and tested to ensure correct operation.

[0006] To this end, a boundary scan function can be implemented in the printed circuit board at the design stage of the circuit board. With boundary scan, an electronic serial interface is provided which allows access to embedded logic on many electronic components today, for example integrated circuits. With the aid of boundary scan components, a number of functions are added to the circuit board, such as logic testing, for example testing connections between devices without external test probes, programming logic, for example for programming FPGAs, and for debugging logic in integrated circuits and microcontrollers.

[0007] Many printed circuit boards today are equipped with boundary scan devices. These printed circuit boards can be tested by running a boundary scan test (BST). Boundary scan testing (BST) is a method developed to assist in testing printed circuit boards and is specified in a standard (IEEE Std. 1149.1 - 1990).

[0008] In order to detect malfunctions of a PCB, test patterns or test vectors must be developed, which preferably cover all malfunctions and make diagnosis as simple as possible. The use of such test vectors in boundary scan testing is very advantageous for testing several functional aspects of a printed circuit board and its individual components and tracks, and is also sufficient to check which components are connected to each other.

[0009] Boundary scans provide a tool for all stages of PCB design. This means that during the design phase, boundary scans offer PCB designers a tool for temporary debugging of certain aspects of the PCB, even before the PCB is released for production. If the design is finalized and corresponding test vectors have been developed, fault testing of the assembled board can be performed during the production testing phase. Later, similarity scans in the service phase provide a tool for temporary debugging.

[0010] At all stages of PCB design, designers, testers, and service engineers can run (provisional) boundary scan tests to determine if the test output meets expectations. Given thorough design and manufacturing, most outputs will meet expectations and the test will pass. However, as with all design and manufacturing, sometimes the results are not as expected. In such cases, designers and / or testers will have to debug and delve into the details of the test to pinpoint the error. This can be very challenging. Summary of the Invention

[0011] One object of this invention is to provide a simplified and efficient method for debugging printed circuit boards with one or more boundary scan compatible devices and test patterns of the printed circuit boards.

[0012] In a first aspect of this disclosure, this objective is achieved by a method for debugging a printed circuit board and / or at least one test pattern of the printed circuit board, the printed circuit board including a plurality of devices mounted on the printed circuit board, the printed circuit board having circuit terminals for interconnecting the devices, the devices including at least one boundary scan compatible device, the boundary scan compatible device having boundary scan compatible circuit terminals and a boundary scan register including boundary scan units of the boundary scan compatible circuit terminals, the method using an electronic processing unit and comprising the following steps:

[0013] The processing unit retrieves the boundary scan attributes of the at least one boundary scan compatible device, the boundary scan attributes including at least a list of boundary scan compatible circuit terminals of the at least one boundary scan compatible device;

[0014] The processing unit retrieves the connectivity attributes of the plurality of devices mounted on the printed circuit board, the connectivity attributes including at least a list of interconnections between the circuit terminals of the devices;

[0015] displaying, by the processing unit, a circuit diagram of at least a portion of the device mounted on the printed circuit board, the circuit diagram including at least one of the plurality of devices mounted on the printed circuit board and at least one other device of the plurality of devices, the other device including circuit terminals that are interconnected with the circuit terminals of the device, for visualizing at least the device, the other device and the interconnections between the device and the other device for debugging the printed circuit board; wherein the device receives a selection from the group of the printed circuit board, the device mounted on the printed circuit board and the circuit terminals of one of the devices mounted on the printed circuit board, through the processing unit.

[0016] With boundary scan, a low cost tool is provided to verify the correctness of components on a PCB and the interconnections between these components. It allows certain functional and structural testing of components and networks within a PCB for components and interconnections on the surface of the board, but also for components and interconnections in the middle layers of a multi-layer PCB.

[0017] With boundary scan, designers, testers and service engineers have a tool to debug certain aspects of a PCB. For example, during the design phase, it can help a designer to select boundary scan compatible components so that the PCB testing can be done in a more efficient way, i.e. with the help of boundary scan testing. During the testing phase, a tester can execute predefined boundary scan tests or test vectors to determine whether all components and interconnections are functioning as expected according to the test.

[0018] If a boundary scan test fails, meaning that the tested components and / or interconnections indicate a failure or the output data of the test does not match the expectations, debugging can be required for further investigation and to determine where the error is.

[0019] Typically, a tester or designer can receive or determine at least some details of the error from the output of the boundary scan test. For example, the test fails at a certain component or block of components on the PCB. The debugger then wants to investigate further into the components in or near the block, which is difficult to determine due to the small size of the components and the (hidden) interconnections.

[0020] Currently, the debugger can employ conventional debugging techniques, such as probing and inspecting the design details of the PCB, i.e. the circuit layout, the component list, the component positions and the netlist. However, the debugger does not always have access to or possession of such information.

[0021] Using the method according to the first aspect of the disclosure, a boundary scan test device or a processing unit such as a general purpose computer will obtain the properties of the boundary scan compatible devices on a printed circuit board. The processing unit will also obtain a list of interconnections between the devices on the PCB. Once this data is obtained, the processing unit knows the components and interconnections and will obtain a selection of components and / or interconnections from the user through a graphical user interface to provide a visual representation thereof through the graphical user interface.

[0022] Thus, during the development phase of a PCB, a PCB designer can develop a boundary scan test and determine that the test results are incorrect, e.g. that a component does not respond or responds differently than expected, or that due to some aspect of the design, or that he or she can find that such a test cannot be performed or can be performed in a smaller fraction than expected. In such a case, the designer can start debugging to determine whether the components of the PCB interact with other components for which the test failed or for which the test results were not as expected. This need arises not only in the case where the test results are unexpected during the design phase, but also in the case where the test fails during the test phase, in which case the PCB has been fully assembled, but the test of the PCB indicates that a component or a sub-block of components or an interconnection is faulty.

[0023] The insight of the inventor is that in order to debug the PCB and / or during the development of the test vectors for the PCB, and possibly during other phases of the test, it is required to visualize the (part of) the circuit layout. This helps the debugger to obtain the information needed to solve the problem and to rerun the test until its results are as expected. To this end, with the method according to the first aspect, the processing unit will generate and display a list of all components and their pins through a graphical user interface. The user can select one of the pins of one of the components and based on this selection and the obtained boundary scan properties and list of interconnections of the boundary scan compatible devices, the processing unit is enabled to determine which components are connected to it in the circuit diagram of the component for which the pin was selected. Then, the circuit diagram with these components, thus the components having the selected component, and any other components of the same circuit diagram are displayed to the user through the graphical user interface, thus providing the user with a simple and straightforward way of debugging.

[0024] In an example, the device is determined by receiving, by the processing unit, a selection of at least one printed circuit board.

[0025] In an example, the device is determined by receiving, by the processing unit, a selection of at least one device mounted on the selected printed circuit board of the at least one printed circuit board.

[0026] In an example, the device is determined by receiving, by the processing unit, a selection of a circuit terminal of one of the devices mounted on the printed circuit board.

[0027] The visualization method for debugging a PCB according to the first aspect enables to visualize all or part of a circuit diagram selected by a user through a graphical user interface. The selection can contain the whole PCB, which leads to the visualization of multiple circuit diagrams with all components. The selection can also contain a single device, which leads to the visualization of a circuit diagram with all components. Finally, the selection can also be a single pin or circuit terminal of a device, so that the device connected to it and thus in the circuit diagram is visualized.

[0028] In one example, the step of displaying by the processing unit comprises displaying a circuit diagram of at least a portion of the devices, and wherein for each of the displayed devices, a property corresponding to the device is displayed.

[0029] In one example, the property comprises one or more of the group consisting of: number of circuit terminals, number of boundary scan compliant circuit terminals, device type, consecutive number identification of the device type and interconnect circuit terminals.

[0030] In addition to the visualization of the devices, the displayed information can contain further information, for example the number of pins or contact pads of the device, or from which the user can observe that it is which component, for example a resistor, a microcontroller, etc.

[0031] In one example, the method further comprises determining a boundary scan transparent device from the boundary scan property list and the connection properties, wherein the transparent device is defined by a device through which data of a boundary scan test passes in an unadjusted manner.

[0032] For the purpose of boundary scan, a device or component on a PCB can be considered as a transparent device. One example of such a transparent device is a resistor, in some cases the resistor is considered as a track of a passive / non-active component. In this case, the circuit diagram of which this transparent device forms a part will contain the component or device on both pins of the transparent device. Thus, the circuit diagram shown will visualize the two pins as a graphic. In case of multiple transparent devices, it is possible to combine more than two circuit diagrams into one graphic, for example to combine two, three or even more graphics into one graphic to display to the user.

[0033] Preferably, the user or the debug person (developer, tester or service engineer) is able to select or modify which components are transparent, thus will have the combined circuit diagram visualized. If many of these transparent components are connected to each other, the visualized circuit diagram can become too large to be presented simply and directly through the graphical user interface. For this reason, the method preferably comprises the step of obtaining an input from the user of the maximum number of components in the circuit diagram.

[0034] In one example, the method further comprises performing, by the processing unit, boundary scan testing of at least one boundary scan compliant circuit terminal of the chain of boundary scan compliant devices mounted on the printed circuit board.

[0035] In one example, the boundary scan testing is for generating the connectivity properties of the devices mounted on the printed circuit board.

[0036] In one example, the boundary scan properties are retrieved from a boundary scan description language (BSDL) file of the at least one boundary scan compliant device.

[0037] In one example, the method further comprises a graphical interface device, wherein at least one of the displaying, receiving, operating and presenting steps is controlled by the graphical interface device.

[0038] In a second aspect of the present disclosure, there is provided a debugging device for debugging a printed circuit board and / or at least one test pattern of the printed circuit board, the printed circuit board comprising a plurality of devices mounted on the printed circuit board, the printed circuit board having circuit terminals for interconnecting the devices, the devices comprising at least one boundary scan compliant device, the boundary scan compliant device having boundary scan compliant circuit terminals and comprising boundary scan registers of a boundary scan unit of the boundary scan compliant circuit terminals, the debugging device comprising an electronic processing unit arranged for the steps of:

[0039] retrieving boundary scan properties of the at least one boundary scan compliant device, the boundary scan properties comprising at least a list of boundary scan compliant circuit terminals of the at least one boundary scan compliant device;

[0040] retrieving connectivity properties of the plurality of devices mounted on the printed circuit board, the connectivity properties comprising at least a list of interconnections between the circuit terminals of the devices;

[0041] displaying a circuit diagram of at least a portion of the devices mounted on the printed circuit board, the circuit diagram comprising at least one device of the plurality of devices mounted on the printed circuit board and at least one other device of the plurality of devices, the other device comprising circuit terminals that are interconnected with circuit terminals of the device for visualizing at least the device, the other device and the interconnections between the device and the other device for debugging the printed circuit board; wherein the device receives a selection from the group of the printed circuit board, the devices mounted on the printed circuit board and the circuit terminals of one of the devices mounted on the printed circuit board by the processing unit.

[0042] In a third aspect of the present disclosure, there is provided a computer program product comprising a data storage device having stored thereon computer program code data which, when said program code data is loaded into the memory of an electronic processing unit and executed by said electronic processing unit, is arranged to perform the method of any of the above aspects and examples.

[0043] These and other objects, advantages, and features of the application will become apparent to those persons skilled in the art upon reading the detailed description of the current embodiments and the appended claims. BRIEF DESCRIPTION OF DRAWINGS

[0044] Figure 1 Steps of a method according to one aspect of the present disclosure are illustrated in the form of a flow chart;

[0045] Figure 2 A graphical user interface for performing a method according to one aspect of the present disclosure is illustrated in an illustrative manner;

[0046] Figure 3 A circuit diagram representation in a graphical user interface according to one aspect of the present disclosure is illustrated in an illustrative manner;

[0047] Figure 4 Another circuit diagram representation in a graphical user interface according to one aspect of the present disclosure is illustrated in an illustrative manner. DETAILED DESCRIPTION

[0048] Figure 1 A flow chart 100 illustrating steps of a method for debugging a printed circuit board, PCB, is shown. Debugging is understood in a broad sense, meaning that debugging can take place at several stages of design, manufacturing, testing and performing measurements on the PCB. At the design stage, a PCB designer is defining which components (e.g. which types of devices from which suppliers) shall be located at which physical positions on the PCB. A computer can assist the designer in making such decisions. Preferably, the designer chooses devices that are compliant with boundary scan, if possible, so that a device or component, or more preferably a sub-block of components, or even more preferably a complete system of the entire PCB or even several PCBs, is arranged to perform boundary scan testing.

[0049] To this end, the PCB is provided with at least one boundary scan compliant device having at least one, but mostly two or more, circuit terminals or contact pads through which the electronic component is powered and / or connected with a power supply and other components on the PCB by interconnections or tracks.

[0050] In order to provide boundary scan capabilities, a boundary scan compliant device is equipped with additional logic, including a scan cell for each circuit terminal. These cells are interconnected to form a chain of boundary scan cells or a boundary scan shift register. The boundary scan compliant device is also equipped with a test access port as an interface to the registers and provides control circuitry, such as clock signals, reset, etc. The boundary scan cells that make up the boundary scan register are arranged to shift data from a test data input through the different boundary scan cells to a test data output. The test access port controls each of the different boundary scan cells to operate, for example, as a driver to output a logic signal to the respective circuit terminal of the boundary scan circuit. The cells can also be controlled to operate as sensors for capturing a logic signal at that circuit terminal.

[0051] Several boundary scan compliant devices can be concatenated together. This can be achieved by connecting the test data output of a boundary scan compliant device to the test data input of another boundary scan compliant device. In this way, a boundary scan chain is formed, which is controllable from a control interface or boundary scan controller, for example, by means of an electronic processing unit or an interface to a general purpose computer.

[0052] The boundary scan method of the present invention, as Figure 1 is shown, is used for debugging a PCB. The PCB comprises several components, at least one or several of which are boundary scan compliant devices, which are mounted on the PCB and have circuit terminals for interconnecting the devices. The circuit terminals are boundary scan compliant circuit terminals, which means that they comprise a boundary scan register of boundary scan cells. The method comprises several steps to enable a simplified and efficient debugging by a PCB designer, a test engineer or other user of the PCB.

[0053] In a first step 110, the processing unit retrieves boundary scan properties of those devices on the PCB that are boundary scan compliant. These properties can be retrieved from a boundary scan description language, BSDL, file of the boundary scan compliant devices mounted on the PCB. The information of the BSDL file is also used for a graphical user interface, GUI, as Figure 2 is shown.

[0054] In a next step 120, which can be performed after, before or in parallel with step 110, the processing unit retrieves connection properties of the plurality of devices mounted on the printed circuit board. The connection properties comprise at least a list of interconnections between the circuit terminals of the devices. These interconnection properties or trace data can be retrieved from a so-called netlist, which describes all the networks or circuits on the PCB and thus which pins or circuit terminals of which devices or components are interconnected.

[0055] Once the device and interconnect properties are retrieved, the processing unit can display the information to the user (debugger) through the GUI. Displayed are the list of components, the circuit terminals of these components and the netlist. Thus, the user can be presented 130 with a list of all circuit terminals (of all components), all components, all nets or the entire PCB. The user can then select one from the list through the GUI.

[0056] The processing unit receives 140 the selection of the list from the user to visualize the circuit diagrams 150, one of which is the selected component, or includes the selected circuit terminal, or, all circuit diagrams are visualized which form part of the PCB selected in step 130.

[0057] In Figure 2 the GUI 200 shows an example of a boundary scan application for developing and / or testing boundary scan tests. Through the GUI 200, the user can be able to control the processing unit to retrieve boundary scan properties of boundary scan compatible devices and to retrieve connectivity properties. The GUI 200 can be arranged to import circuit diagrams from a plurality of sources for extracting boundary scan properties of boundary scan compatible devices as well as connectivity properties.

[0058] Figure 2 The shown GUI 200 comprises several sections, 210, 220, 230, 240 and 250. In the first section 210, project details can be displayed, which include information such as the number of boards and details of the boards (PCBs). By selecting one of the boards, the details of the devices on the board are displayed in section 220. These include the boundary scan properties of the boundary scan compatible devices, such as shown in Figure 2 for devices Q1, R9, U12 and R8. Below the device properties, is section 230 for the net properties indicating which nets exist on the board. At the bottom, a separate log 250 section is provided for displaying all details or log of the selections and steps in the running application.

[0059] After a PCB, device or component, circuit terminal or net has been selected, the corresponding circuit diagram is presented in a separate circuit diagram viewer 240, which preferably overlays on sections 210, 220 and 230. In Figure 3 and Figure 4 a more detailed view of the circuit diagram viewer 240 is given.

[0060] In Figure 3In the middle, the circuit diagram browser 240 is shown with 4 devices, namely two integrated circuits 320, 330 and two resistors 310, 340. The icon 350 next to the resistor 350 indicates the selection of the list, namely in this case the devices. Between the devices, also the interconnections are shown to indicate how each device in the circuit is connected.

[0061] As some circuit diagrams can comprise a large number of components, the maximum number of components is preferably configurable. Preferably, the components of the visualization are arranged in an array of rows and columns, which allows the user to configure the maximum number of components per column and per row to increase the readability of the circuit diagram.

[0062] In Figure 4 In the middle, the circuit diagram browser 240 is shown with 4 devices, namely two integrated circuits 320, 330 and two resistors 310, 340. The icon 350 next to the resistor 350 indicates the selection of the list, namely in this case the devices. Between the devices, also the interconnections are shown to indicate how each device in the circuit is connected.

[0063] As Figure 4 shown, the resistor R3, 460 is partially transparent, which indicates that this device is considered or configured as a boundary scan transparent device.

[0064] Other variations to the disclosed examples can be understood and effected by those skilled in the art in practicing the claimed disclosure, from a study of the drawings, the disclosure, and the appended claims. In the claims, the word "comprising" does not exclude other elements or steps, and the indefinite articles "a" or "an" do not exclude a plurality. A single processor or other unit can fulfill the functions of several items recited in the claims. The mere fact that certain measures are recited in mutually different dependent claims does not indicate that a combination of these measures cannot be used to advantage. A computer program can be stored / distributed on a suitable medium, such as an optical storage medium or a solid-state storage medium supplied together with or as part of other hardware, but can also be distributed in other forms, such as via the Internet or other wired or wireless telecommunication systems. Any reference signs in the claims should not be construed as limiting the scope. Similar reference signs indicate similar or equivalent functions.

[0065] The disclosure is not limited to the examples disclosed above, and can be modified and enhanced by those skilled in the art outside the scope of the disclosure disclosed in the appended claims without necessarily applying inventive skill and for any data communication, data exchange and data processing environment.

Claims

1. A method for debugging a printed circuit board and / or at least one test pattern of the printed circuit board, the printed circuit board including a plurality of devices mounted on the printed circuit board, the printed circuit board having circuit terminals for interconnecting the devices, the devices including at least one boundary scan compatible device, the boundary scan compatible device having boundary scan compatible circuit terminals and a boundary scan register including boundary scan units of the boundary scan compatible circuit terminals, the method using an electronic processing unit and comprising the following steps: The processing unit retrieves the boundary scan attributes of the at least one boundary scan compatible device, the boundary scan attributes including at least a list of boundary scan compatible circuit terminals of the at least one boundary scan compatible device; The processing unit retrieves the connectivity attributes of the plurality of devices mounted on the printed circuit board, the connectivity attributes including at least a list of interconnections between the circuit terminals of the devices; The processing unit displays a circuit diagram of at least a portion of the device mounted on the printed circuit board. The circuit diagram includes at least one of the plurality of devices mounted on the printed circuit board, and at least one other device among the plurality of devices. The other device includes circuit terminals interconnected with the circuit terminals of the device, for visualizing the interconnections between at least the device, the other device, and the device, in order to debug the printed circuit board. The device is determined by receiving a selection from one of the following groups via the processing unit: the printed circuit board, the device mounted on the printed circuit board, and a circuit terminal of one of the devices mounted on the printed circuit board.

2. The method of claim 1, wherein the device is determined by receiving a selection of at least one printed circuit board by the processing unit.

3. The method of claim 2, wherein the device is determined by the processing unit receiving a selection of at least one device mounted on a selected printed circuit board from the at least one printed circuit board.

4. The method of claim 1, wherein the device is determined by receiving, by the processing unit, selection of a circuit terminal of one of the devices mounted on the printed circuit board.

5. The method according to claim 1, wherein the step of displaying by the processing unit includes displaying a circuit diagram of at least a portion of the device, and wherein for each of the displayed devices, an attribute corresponding to the device is displayed.

6. The method of claim 5, wherein the attribute comprises one or more of the following: the number of circuit terminals, the number of boundary scan compatible circuit terminals, the device type, the device type, and a sequential numbering identifier for interconnecting circuit terminals.

7. The method according to claim 1, wherein the method further comprises: A boundary scan transparency device is determined based on the list of boundary scan attributes and the connectivity attributes, wherein the transparency device is defined by the device and the boundary scan test data passes through the device in a non-adjusted manner.

8. The method according to claim 1, wherein the method further comprises: The processing unit performs a boundary scan test on at least one boundary scan compatible circuit terminal of the chain boundary scan compatible circuit terminal of the boundary scan compatible device mounted on the printed circuit board.

9. The method of claim 8, wherein the boundary scan test is used to generate the connectivity properties of the device mounted on the printed circuit board.

10. The method according to claim 1, wherein the boundary scan attributes are retrieved from a boundary scan description language (BSDL) file of the at least one boundary scan compatible device.

11. The method according to claim 1 further includes a graphical user interface device, wherein at least one of the steps of displaying, receiving, operating, and presenting is controlled by the graphical user interface device.

12. A debugging apparatus for debugging a printed circuit board and / or at least one test pattern of the printed circuit board, the printed circuit board including a plurality of devices mounted on the printed circuit board, the printed circuit board having circuit terminals for interconnecting the devices, the devices including at least one boundary scan compatible device, the boundary scan compatible device having boundary scan compatible circuit terminals and a boundary scan register including boundary scan units of the boundary scan compatible circuit terminals, the debugging apparatus including an electronic processing unit arranged for the following steps: Retrieve the boundary scan attributes of the at least one boundary scan compatible device, the boundary scan attributes including at least a list of boundary scan compatible circuit terminals of the at least one boundary scan compatible device; Retrieve the connectivity properties of the plurality of devices mounted on the printed circuit board, the connectivity properties including at least a list of interconnections between the circuit terminals of the devices; A circuit diagram showing at least a portion of the device mounted on the printed circuit board, the circuit diagram including at least one of the plurality of devices mounted on the printed circuit board, and at least one other device among the plurality of devices, the other device including circuit terminals interconnected with the circuit terminals of the device, for visualizing the interconnections between at least the device, the other device and the device, for debugging the printed circuit board; The device is determined by receiving a selection from one of the following groups via the processing unit: the printed circuit board, the device mounted on the printed circuit board, and a circuit terminal of one of the devices mounted on the printed circuit board.

13. A computer program product comprising a data storage device thereon storing computer program code data, wherein when the program code data is loaded into the memory of an electronic processing unit and executed by the electronic processing unit, the computer program code data is arranged to perform the method of any one of claims 1 to 11.

Images