A top-gate bottom-contact device based on deuterium plasma bombardment process, a manufacturing method thereof, and an organic field-effect transistor

Abstract

The present invention discloses a top-gate bottom-contact device structure based on a deuterium plasma bombardment process, comprising a substrate, a gate layer, an insulating layer, a semiconductor layer, and source / drain electrodes. The semiconductor layer is an organic polymer spin-coated onto the surfaces of the substrate and the source / drain electrodes. Deuterium plasma bombardment is then used to passivate the polymer on the surface of the semiconductor layer and convert it into an insulating layer, resulting in an integrated structure of the insulating layer and the semiconductor layer. The technical solution of the present invention eliminates the need to select new materials and separately prepare the insulating layer. Instead, the deuterium plasma bombardment technique produces an insulating layer with very low surface energy. When aluminum is vacuum-evaporated onto the insulating layer to form the gate layer, the gate layer is well bonded to the insulating layer, avoiding the technical problem of detachment.

Description

Technical Field

[0001] The present invention relates to the technical field of organic field effect transistors in semiconductor materials, and in particular to a top-gate bottom-contact device based on a deuterium plasma bombardment process, a manufacturing method thereof, and an organic field effect transistor. Background Art

[0002] Organic field effect transistors (FETs) are active devices that use electric fields to control the conductive properties of solid materials. Due to their advantages such as small size, light weight, low power consumption, good thermal stability, no secondary breakdown phenomenon, and wide safe operating area, they have become one of the important components in the microelectronics industry.

[0003] Organic field-effect transistors (OFETs), as the most basic building blocks of flexible electronics, have attracted widespread attention. Organic field-effect transistor structures include top-contact and bottom-contact structures. The latter is also known as a top-gate bottom-contact device structure. In this structural device, the source and drain electrodes are prepared first, and the gate acts as a package. The top is covered with an insulating layer, which effectively protects the organic semiconductor by blocking corrosion from water and oxygen in the air. This gives the top-gate bottom-contact device structure excellent device stability and therefore great market application prospects. However, during the production process of this structure, a dielectric layer and a gate layer must be prepared on the organic semiconductor layer, resulting in a significant technical limitation in the selection of materials for the semiconductor and insulating layers. To prevent solvent dissolution between the semiconductor and insulating layers, a deuterium gas annealing process is used to perform an addition reaction on the surface of the semiconductor layer to form the insulating layer, thus circumventing the problem of solvent dissolution between the semiconductor and insulating layers. However, in practice, it has been found that after the semiconductor layer is annealed with deuterium gas, not only the conductivity of the semiconductor layer surface is changed, but also the surface energy of the material is changed. The source and drain electrode layer evaporated on it is easily peeled off from the semiconductor layer, causing the source and drain electrode layer to fall off, affecting the service life of the organic field-effect transistor.

[0004] Plasma, also known as the fourth state of matter, is an ionized gas typically composed of positive and negative ions, electrons, and electrically neutral particles. Plasma has a wide range of applications, including plasma surface modification, plasma polymerization, and plasma-induced polymerization. Plasma surface modification involves treating a material surface with plasma to alter its surface groups and other properties. Plasma polymerization utilizes discharge technology to ionize organic gaseous monomers, forming reactive species such as free radicals, thereby initiating polymerization between the reactive species or monomers.

[0005] In the prior art, plasma cross-linking technology is used to treat the dielectric layer of an organic field-effect transistor. Chinese invention patent CN105280816A discloses a method for preparing the dielectric layer of an organic field-effect transistor using plasma cross-linking technology. The invention is aimed at a top contact structure. First, a gate or a gate and an insulating layer are prepared on a substrate; then, a plasma-enhanced chemical vapor deposition method (PECVD) is used to grow a dense, ultra-thin, cross-linked organic dielectric layer on the gate or the dielectric layer by plasma-activating monomers that can undergo polymerization reactions; then, a semiconductor layer is prepared on the film; and finally, a source and drain are made. This method is simple and convenient, and can realize flexible electronic devices made of all-organic materials, overcoming the inflexibility of inorganic materials. The highly cross-linked film has good insulating properties and can realize the preparation of ultra-thin dielectric layers required for flexible electronic devices; at the same time, it is insoluble in general organic solvents, and can realize the full solution method for preparing organic field-effect transistors. This invention is aimed at the dielectric layer preparation process of an organic field-effect transistor with a top contact structure, and solves the technical problem of mutual dissolution of solvents between the semiconductor layer and the insulating layer in the prior art. However, this method forms the dielectric layer by introducing a mixed gas and using methods such as inductive coupling to discharge and generate plasma, and then forms an ultra-thin insulating layer on the gate layer or the dielectric layer, and then spin-coating on the insulating layer. The process of growing a dense, ultra-thin, cross-linked layer on the gate or the dielectric layer using this process is slow and relatively difficult, and has the same problems as the conventional chemical vapor deposition method for preparing the insulating layer.

[0006] In view of this, the present invention adopts a new organic field-effect transistor based on deuterium plasma bombardment process. Summary of the Invention

[0007] The purpose of the present invention is to provide a top-gate bottom-contact device structure and an organic field-effect transistor based on a deuterium plasma bombardment process, in which a semiconductor layer is directly surface-treated by deuterium plasma, a portion of the surface of the semiconductor layer is passivated, and an insulating layer is formed, thereby making the semiconductor layer and the insulating layer an integrated structure. While solving the problem of mutual dissolution of solvents, it also avoids the technical problem of the source and drain electrode layer falling off from the semiconductor layer due to the high surface energy caused by the addition of deuterium gas; further, it also circumvents the problem of difficulty in growing an insulating layer film on a gate layer or a semiconductor layer by the chemical vapor deposition method in the prior art.

[0008] In order to achieve the above-mentioned object of the invention, the technical solution of the present invention is:

[0009] A top-gate bottom-contact device structure based on a deuterium gas annealing process comprises a substrate, a gate layer, an insulating layer, a semiconductor layer, and source-drain electrodes; the semiconductor layer is an organic polymer spin-coated on the surfaces of the substrate and the source-drain electrodes, and a deuterium gas-generated plasma bombardment process is used to passivate the organic polymer on the surface of the semiconductor layer and convert it into the insulating layer, so that the insulating layer and the semiconductor layer have an integrated structure.

[0010] Furthermore, the monomers of the organic polymer contain groups with carbon-carbon double bonds, including one or more of vinyl groups, styryl groups, and aromatic groups, and the carbon-carbon double bonds form a conjugated chain structure.

[0011] Furthermore, the monomer of the organic polymer is structural formula 1: Among them, R1, R2, R3, and R4 are at least one of hydrogen, a C1-C20 alkyl group, a C1-C20 alkyl group containing a perfluorinated substituent, and a C1-C20 alkyl group containing a siloxane bond substituent.

[0012] Furthermore, the deuterium plasma bombardment process is to bombard the surface of the semiconductor layer with an organic polymer that can be in contact with deuterium plasma to produce a passivation effect to obtain the insulating layer; the passivation effect means that the deuterium plasma bombards the surface of the organic polymer with deuterium plasma, so that the deuterium plasma and the organic polymer undergo an addition reaction, so that the unsaturated carbon-carbon double bonds of the organic polymer are added to deuterated carbon-carbon saturated bonds.

[0013] Preferably, taking structural formula 2 as an example: structural formula 2 is passivated by deuterium plasma bombardment process to obtain structural formula 3. Wherein, structural formula 2 is Structural formula 3 is That is, after the unsaturated carbon of C=C in structural formula 1 is treated by the deuterium plasma bombardment process, the unsaturated carbon-carbon double bond undergoes an addition reaction with the deuterium plasma, and the unsaturated carbon is converted into deuterated saturated carbon.

[0014] Preferably, the organic polymer includes but is not limited to the following structures:

[0015] Structural formula 4:

[0016] Structural Formula 5

[0017] Structural formula 6:

[0018] In the above structural formulas 2-6, n is greater than or equal to 10.

[0019] Obviously, the carbon-carbon double bonds of the above-mentioned monomer structure form a conjugated chain, which improves electron mobility and provides a basis for the two-stage transport of electrons in the drain electrode and source electrode of the organic semiconductor.

[0020] The above-mentioned top-gate bottom-contact device structure includes, from top to bottom, a gate layer-insulating layer-semiconductor layer-source-drain electrode layer-glass substrate. The insulating layer is coated with an organic polymer on the semiconductor layer by a spin coating process, and then a deuterium gas addition reaction is performed by a deuterium plasma bombardment process to form an insulating layer. The semiconductor layer and the insulating layer are an integral structure. The plasma bombardment process directly reacts the carbon-carbon double bonds of the organic polymer on the surface of the exposed semiconductor layer that can be contacted by deuterium gas to form an insulating layer. There is no need to spin-coat the insulating layer again, which reduces the process while avoiding the problem of solvent selection between the insulating layer and the semiconductor layer.

[0021] Most importantly, the deuterium plasma bombardment process reduces the surface energy of the interface of the organic polymer, preventing the source and drain electrodes from falling off during use.

[0022] On the other hand, in order to achieve the above-mentioned purpose of the invention, the present invention also provides another technical solution, that is, the manufacturing method of the above-mentioned top-gate bottom contact device structure, the specific process steps include: processing the base layer - forming a drain / source electrode layer on the base layer - spin-coating the organic polymer to form the semiconductor layer - treating the surface of the semiconductor layer by a deuterium plasma bombardment process to form the insulating layer - forming the gate layer on the insulating layer.

[0023] Furthermore, the deuterium plasma bombardment process includes maintaining a pressure of 10 Pa, generating deuterium plasma by inductively coupled discharge, a power of 50 to 200 W, and a processing time of 20 to 30 minutes.

[0024] Furthermore, the passivation treatment includes reacting the organic polymer spin-coated on the base layer and / or the drain / source electrode layer with deuterium plasma, so that unsaturated carbon in the organic polymer is converted into saturated carbon.

[0025] Furthermore, a photoresist coating-etching process is also included between the vacuum gold evaporation process and the spin coating process.

[0026] Furthermore, the process comprises the following steps: cleaning a glass substrate as the substrate - vacuum evaporating metal chromium - vacuum evaporating gold - spin coating - deuterium plasma bombardment process - vacuum evaporating aluminum;

[0027] The method comprises a spin coating process, wherein the organic polymer is spin-coated on the exposed glass substrate and the surface of the source and drain electrodes to prepare the semiconductor layer.

[0028] The deuterium plasma bombardment process is to bombard the surface of the semiconductor layer with an organic polymer that can be in contact with deuterium plasma to produce a passivation effect to obtain the insulating layer.

[0029] The vacuum-evaporated metal chromium and the vacuum-evaporated gold form the source-drain electrode layer;

[0030] The gate layer is formed by the vacuum aluminum evaporation process.

[0031] Furthermore, the following process steps are included:

[0032] (1) Cleaning of the glass substrate: cleaning with ammonia at 60°C for 1 hour, piranha solution at 100°C for 1 hour, electronic grade acetone for 1 hour, ultrapure water, drying, and oxygen plasma cleaning.

[0033] (2) Vacuum evaporation of metallic chromium with a thickness of 20 to 100 nm and a pressure of 10 -8 Pa;

[0034] (3) Vacuum evaporation of gold, thickness of 20 to 100 nm, pressure of 10 -8 Pa;

[0035] (4) Apply photoresist at 6000 r / min, then perform exposure and development processes, and wet-etch with etching solution;

[0036] (5) Spin coating with a thickness of 50 to 550 nm; the spin-coated organic polymer is coated on the exposed glass substrate layer and the surface of the source electrode / drain electrode, and the organic polymer is further defined as a conjugated chain formed by carbon-carbon double bonds contained in its monomers.

[0037] (6) Deuterium plasma bombardment process: the semi-finished product prepared above is placed in a vacuum chamber, deuterium gas is introduced, the pressure is maintained at 10Pa, and deuterium plasma is generated by inductively coupled discharge with a power of 50 to 200W. The treatment time is 20 to 30 minutes. After the surface of the organic semiconductor layer is treated, the organic polymer is passivated to form an ultra-thin insulating layer. The organic matter in the insulating layer is the product obtained by deuterium plasma addition of carbon-carbon double bonds in the organic polymer.

[0038] (7) Vacuum-deposited aluminum with a thickness of 30 to 120 nm.

[0039] The inventive principle of the present invention:

[0040] The semiconducting properties of the organic semiconductor layer are regulated by the material's energy level, which in turn is regulated by the material's structure. The double bond composition and number in the polymer structure greatly affect the material's energy level, further affecting the material's insulating properties. The semiconducting and insulating properties of the material can be mutually converted under certain conditions. On the other hand, the charge in the organic semiconductor is transmitted in a hopping manner, so the presence of traps at the interface between the organic semiconductor and the insulating layer will limit the effective transmission of carriers. However, in the present invention, since the insulating layer and the organic semiconductor are integrated into a single structure, the possibility of traps at the interface between the two is eliminated, which is conducive to the efficient transmission of electrons.

[0041] According to the formula Δn trap =CΔV / q, where Δn trap is the maximum trap density, C is the unit surface capacitance of the insulating layer, q is the elementary charge, and ΔV is the change in threshold voltage. This formula shows that an increase in traps increases the threshold voltage. Clearly, when the insulating layer is formed after surface treatment of the semiconductor layer, resulting in an integrated structure of the insulating and semiconductor layers, the interface traps between the two are greatly reduced, thereby correspondingly lowering the threshold voltage.

[0042] At the same time, the selection of semiconductor materials with conjugated chain structures further enables the carriers in the organic semiconductor to flow smoothly at the semiconductor layer / insulating layer interface without being captured by interface traps.

[0043] Furthermore, the present invention utilizes deuterium gas to perform deuterium plasma passivation treatment on the surface of the semiconductor layer, and undergoes addition reaction with the deuterium plasma to convert the surface semiconductor layer into an insulating material, thereby fundamentally solving the problem of selecting the material for the top insulating layer.

[0044] Specifically, deuterium is a stable isotope of hydrogen with a neutron number of 2. Compared to hydrogen, deuterium has a shorter depth and greater molecular kinetic energy. Therefore, using deuterium can effectively control the thickness of the insulating layer to meet the requirements of organic semiconductor devices. At the same time, because the semiconductor layer and the insulating layer are made of the same material, the interface between the insulating layer and the semiconductor layer is relatively smooth, forming an excellent carrier transmission channel.

[0045] At the same time, the contact between deuterium plasma and the semiconductor surface has the effect of reducing the surface energy. The surface energy of the surface after passivation treatment is lower than before. When aluminum is vacuum evaporated on the insulating layer again to form a gate layer, the gate layer can be well combined with the insulating layer, avoiding the technical problem of falling off.

[0046] Obviously, the organic field-effect transistor prepared by adopting the above technical solution avoids defects at the interface between the semiconductor and the dielectric layer, thereby reducing the threshold voltage and improving the performance of the transistor.

[0047] In summary, the present invention adopts the above technical solutions to achieve the following technical effects:

[0048] (1) By adopting the technical solution of the present invention, there is no need to reselect materials and prepare the insulating layer separately. Instead, the surface energy of the semiconductor layer is reduced by deuterium plasma bombardment technology, thereby avoiding the technical problem of source and drain electrode falling off.

[0049] (2) The technical solution of the present invention is adopted, and deuterium gas is used to perform passivation treatment on the surface of the semiconductor layer, so that the surface layer of the semiconductor layer is converted into an insulating layer. The semiconductor layer and the insulating layer are an integrated structure formed of the same material, which avoids defects between the interface of the semiconductor and the dielectric layer, fundamentally solves the solvent selection problem of the insulating layer and reduces the interface traps between the semiconductor layer and the insulating layer, thereby reducing the threshold voltage and improving the performance of the transistor.

[0050] (3) The technical solution of the present invention is adopted to reduce the process of preparing the insulating layer separately, overcome the problem of solvent selection in the preparation process of the insulating layer and the semiconductor layer, and thus fundamentally solve the problem of selecting the material of the top insulating layer. BRIEF DESCRIPTION OF THE DRAWINGS

[0051] Figure 1 Schematic diagram of the top-gate bottom-contact device structure in the prior art of the present invention.

[0052] Figure 2 Flowchart for preparing a top-gate bottom-contact device structure in an embodiment of the present invention.

[0053] Figure 3 Flow chart of the deuterium plasma bombardment process in an embodiment of the present invention.

[0054] Figure 4 Transfer characteristic curve of the organic field effect transistor prepared according to the embodiment of the present invention.

[0055] Figure 5 Output characteristic curve of the organic field-effect transistor prepared in an embodiment of the present invention.

[0056] Figure 6 Transfer characteristic curve of the organic field effect transistor prepared in the comparative example of the present invention.

[0057] Figure 7 Output characteristic curve of the organic field effect transistor prepared in the comparative example of the present invention. DETAILED DESCRIPTION

[0058] The following is a clear and complete description of the technical solutions in the embodiments of the present invention in conjunction with the specific content of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of the present invention.

[0059] See Figure 1 The top-gate bottom-contact device structure prepared in this embodiment includes, from top to bottom, a gate; an insulating layer; a semiconductor layer; a source-drain electrode; and a base layer, wherein the insulating layer and the semiconductor layer are an integrated structure.

[0060] Specifically, see Figure 2 The fabrication process for a top-gate, bottom-contact device structure includes: treating a semiconductor glass substrate; forming drain-source electrodes on the glass substrate; spin-coating an organic semiconductor material onto the drain-source electrodes and the glass substrate to form an organic semiconductor layer; treating the surface of the organic semiconductor layer via a deuterium plasma bombardment process to form an insulating layer; and forming a gate layer on the insulating layer. The organic semiconductor material is an organic polymer containing a conjugated chain structure formed by carbon-carbon double bonds, which can improve electron mobility.

[0061] Preferably, the monomer of the organic polymer is of structural formula 1: Wherein, R1, R2, R3, and R4 are at least one of hydrogen, a C1-C20 alkyl group, a C1-C20 alkyl group containing a perfluorinated substituent, or a C1-C20 alkyl group containing a siloxane bond substituent. In other words, the unsaturated carbon atoms at C=C in Structural Formula 1 are passivated by deuterium plasma bombardment, resulting in saturated carbon atoms.

[0062] After the spin coating process, the organic polymer is coated on the exposed glass substrate and the surface of the source / drain electrode to form a semiconductor layer. In the deuterium plasma atmosphere, the organic polymer exposed to the deuterium plasma is passivated by the deuterium plasma, and the original C=C unsaturated carbon is added to form saturated carbon. In this process, in addition to passivating the surface of the semiconductor layer that can be contacted by the deuterium gas, it can also penetrate the shallow surface to form an insulating layer with a thickness of 20 to 500 nm.

[0063] This embodiment takes structural formula 2 as an example.

[0064] After the addition reaction of the structural formula 2 through the deuterium annealing process, the structural formula 3 is obtained. Structural formula 3 is The carbon-carbon double bond in structure 3 undergoes a passivation reaction when bombarded with deuterium plasma, generating a deuterated saturated carbon-carbon structure, while other unsaturated bonds are not affected.

[0065] Preferably, the organic polymer includes but is not limited to the following structures:

[0066] Structural formula 4:

[0067] Structural Formula 5

[0068] Structural formula 6:

[0069] In the above structural formulas 2-6, n is greater than or equal to 10.

[0070] This embodiment provides a process for preparing a top-gate bottom-contact device structure.

[0071] See Figure 3 , specifically including the following steps:

[0072] (1) Cleaning the glass substrate to form a glass base layer (i.e., substrate);

[0073] The cleaning steps include:

[0074] a. Wash with 10% ammonia water at 60℃ for 1 hour, then rinse with ultrapure water;

[0075] b. Wash with piranha solution at 100°C for 1 hour, then rinse with ultrapure water;

[0076] c. Wash with electronic grade acetone for 1 hour and then rinse with ultrapure water;

[0077] d. 120℃, 1h drying;

[0078] e. Oxygen plasma cleaning for 30 minutes.

[0079] (2) Source electrode and drain electrode layer: Vacuum evaporation of metal chromium with a thickness of 20 to 100 nm and a pressure of 10 -8 Pa;

[0080] Vacuum evaporation of gold, thickness of 20 to 100 nm, pressure 10 -8 Pa, forming source and drain electrode layers.

[0081] (3) Etching process: Apply photoresist, 6000r / min, then undergo exposure and development process, exposure time is 10s, wet etching with etching solution, partially exposing the metal gold.

[0082] (4) Spin coating process, spin coating an organic polymer on the exposed metal gold surface to form a spin coating layer with a thickness of 50 to 550 nm; wherein the structure of the spin-coated organic polymer is structural formula 2.

[0083] (5) Deuterium plasma bombardment process: the semi-finished product prepared above is placed in a vacuum chamber, deuterium gas is introduced, the pressure is maintained at 10 Pa, and deuterium plasma is generated by inductively coupled discharge. The power is 50 to 200 W and the treatment time is 20 to 30 minutes. After the surface of the organic semiconductor layer is treated, the organic polymer undergoes a deuterium addition reaction to form an ultra-thin insulating layer with a thickness of 20 to 500 nm. The organic matter of the insulating layer is structure 3. The remaining organic polymer in the bottom layer that has not undergone the addition reaction is the semiconductor layer with a thickness of 10 to 50 nm.

[0084] (6) Vacuum-deposit aluminum to a thickness of 30 to 120 nm to form a gate layer.

[0085] At this point, the top-gate bottom-contact device structure is complete. Through the above preparation process, a bottom-contact device with a gate-insulating layer-semiconductor layer-source-drain electrode-glass substrate structure from top to bottom is obtained, and this device structure is used to prepare an organic field-effect transistor.

[0086] Control Example

[0087] This comparative example uses a deuterium annealing process to prepare a top-gate bottom-contact device structure, and uses this top-gate bottom-contact device structure to prepare an organic field-effect transistor. The preparation steps include:

[0088] (1) Cleaning the glass substrate to form a glass substrate layer.

[0089] (2) Source electrode and drain electrode layer: Vacuum evaporation of metal chromium, thickness 20nm, pressure 10 -8 Pa;

[0090] Vacuum evaporation of gold, thickness 60nm, pressure 10 -8 Pa, forming source and drain electrode layers.

[0091] (3) Etching process: Apply photoresist, 6000r / min, then go through exposure and development process, exposure time is 10s, wet etching with etching solution, partially exposing the metal gold.

[0092] (4) Spin coating process, spin coating an organic polymer on the surface treated in step (3) to a thickness of 50 to 550 nm; wherein the structure of the spin-coated organic polymer is as follows: Where y is greater than or equal to 10.

[0093] (5) Deuterium annealing process: expose the organic semiconductor layer to a deuterium atmosphere at 200-600°C for 10-30 minutes to form an insulating layer through a deuterium addition reaction. The organic matter forming the insulating layer has structure 8: wherein y is greater than or equal to 10. The thickness of the insulating layer is 20 to 500 nm.

[0094] (6) Vacuum-deposit aluminum to a thickness of 30 nm to form a gate layer.

[0095] The above-described fabrication process yielded a bottom-contact device with a gate-insulating layer-semiconductor layer-source / drain electrode-glass substrate structure from top to bottom. This structure was then used to fabricate an organic field-effect transistor. The device fabricated using the above-described steps was then subjected to performance testing.

[0096] The output and transfer characteristic curves of the embodiment are shown in Figure 4 and Figure 5 .

[0097] The output and transfer characteristic curves of the control example are shown in Figure 6 and Figure 7 .

[0098] Test Equipment: An Agilent B1500A tester was used to measure the device's operating output and transfer characteristics. The test was conducted in air, without an inert gas atmosphere, demonstrating the device's higher and more stable performance after packaging.

[0099] The mobility of the embodiment and the control example is 0.34cm 2 / (V·s) and 0.6cm 2 / (V·s).

[0100] Comparison between this embodiment and the control example reveals that, in addition to reducing the surface energy and preventing the gate layer from falling off the insulating layer, the threshold voltage of the present invention is also significantly reduced. The organic field-effect transistor prepared by this process has better performance than the organic field-effect transistor prepared by the deuterium gas annealing process.

[0101] The above description of the disclosed embodiments is intended to enable one skilled in the art to implement or use the present invention. Various modifications to these embodiments will be readily apparent to one skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention is not limited to the embodiments shown herein but is intended to conform to the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A top-gate bottom-contact device structure based on a deuterium plasma bombardment process, characterized in that: The device comprises a substrate, a gate layer, an insulating layer, a semiconductor layer, and a source-drain electrode; the semiconductor layer is an organic polymer spin-coated on the surface of the substrate and the source-drain electrode, and the polymer on the surface of the semiconductor layer is passivated and converted into an insulating layer through a deuterium plasma bombardment process, so that the insulating layer and the semiconductor layer have an integrated structure; The monomers of the organic polymer contain groups with carbon-carbon double bonds, including one or more of vinyl groups, styryl groups, and aromatic groups, and the carbon-carbon double bonds form a conjugated chain structure; The monomer of the organic polymer is structural formula 1: and / or and / or wherein R1, R2, R3, and R4 are at least one of hydrogen, a C1-C20 alkyl group, a C1-C20 alkyl group containing a perfluorinated substituent, and a C1-C20 alkyl group containing a silicon-oxygen bond substituent; The deuterium plasma bombardment process is to bombard the organic polymer on the surface of the semiconductor layer that can contact with deuterium plasma to produce a passivation effect to obtain the insulating layer; the passivation treatment refers to bombarding the surface of the organic polymer with deuterium plasma, so that the deuterium plasma and the organic polymer undergo an addition reaction, so that the unsaturated carbon-carbon double bonds of the organic polymer are added to deuterated carbon-carbon saturated bonds.

2. The method for manufacturing a top-gate bottom-contact device structure according to claim 1, wherein: The process includes the following steps: treating a base layer - forming a drain / source electrode layer on the base layer - spin coating the organic polymer to form the semiconductor layer - treating the surface of the semiconductor layer by a deuterium plasma bombardment process to form the insulating layer - forming the gate layer on the insulating layer.

3. The method for manufacturing a top-gate bottom-contact device structure according to claim 2, wherein: The deuterium plasma bombardment process includes maintaining a pressure of 10 Pa, generating deuterium plasma by inductively coupled discharge, a power of 50 to 200 W, and a processing time of 20 to 30 minutes.

4. The method for manufacturing a top-gate bottom-contact device structure according to claim 3, wherein: The passivation treatment includes reacting the organic polymer spin-coated on the base layer and / or the drain / source electrode layer with deuterium plasma, so that unsaturated carbon in the organic polymer is converted into saturated carbon.

5. The method for manufacturing a top-gate bottom-contact device structure according to claim 2, wherein: The method comprises the following process steps: cleaning a glass substrate as the substrate - vacuum evaporating metal chromium - vacuum evaporating gold - spin coating - deuterium plasma bombardment process - vacuum evaporating aluminum; The method comprises a spin coating process, wherein the organic polymer is spin-coated on the exposed glass substrate and the surface of the source and drain electrodes to prepare the semiconductor layer; The deuterium plasma bombardment process is to bombard the surface of the semiconductor layer with an organic polymer that can be in contact with deuterium plasma to produce a passivation effect to obtain the insulating layer; The vacuum-evaporated metal chromium and the vacuum-evaporated gold form the source-drain electrode layer; The gate layer is formed by the vacuum aluminum evaporation process.

6. The method for manufacturing a top-gate bottom-contact device structure according to any one of claims 2 to 5, wherein: The process steps include: (1) Cleaning of the glass substrate: The cleaning process includes: cleaning with ammonia water at 60°C for 1 hour, cleaning with piranha solution at 100°C for 1 hour, cleaning with electronic grade acetone for 1 hour, cleaning with ultrapure water, drying, and cleaning with oxygen plasma. The cleaned glass substrate is used as a substrate. (2) Vacuum evaporation of metallic chromium with a thickness of 20 nm and a pressure of 10 -8 Pa; (3) Vacuum evaporation of gold, thickness 60nm, pressure 10 -8 Pa; (4) Apply photoresist at 6000 r / min, then perform exposure and development processes, and wet-etch with etching solution; (5) Spin coating process, thickness of 30 to 70 nm; (6) Deuterium annealing, 200-600°C, hold for 10-30 min; (7) Vacuum-deposited aluminum with a thickness of 3 to 100 nm.

7. An organic field effect transistor, comprising the top-gate bottom-contact device structure according to claim 1 or the top-gate bottom-contact device structure manufactured by the method for manufacturing the top-gate bottom-contact device structure according to any one of claims 2 to 6.

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