Micro-led micro display chip and manufacturing method thereof
By setting protrusions on the substrate and thinning the bonding layer, the technical bottleneck of mass transfer of Micro-LED chips has been solved, realizing the manufacturing of Micro-LED microdisplay chips with high-efficiency electrical connection and low damage.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-02-24
- Publication Date
- 2026-03-20
AI Technical Summary
In existing technologies, it is difficult to achieve high efficiency and high yield in the batch transfer process of Micro-LED chips, especially when high positioning accuracy is required.
The design employs a monolithically integrated Micro-LED microdisplay chip. By setting protrusions on the substrate to facilitate contact electrical connection, and by bonding the LED epitaxial layer and the substrate through a bonding layer, the thickness of the bonding layer is reduced to decrease etching difficulty and device damage.
This achieves efficient electrical connection of Micro-LED chips, reduces process difficulty and device damage, and improves yield.
Smart Images

Figure CN114784034B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to a Micro-LED micro display chip and a manufacturing method thereof, and belongs to the technical field of micro display. BACKGROUND
[0002] In recent years, LEDs have become popular in lighting applications. As light sources, LEDs have many advantages, including higher light efficiency, lower energy consumption, longer service life, smaller size, and faster switching speed.
[0003] Displays with micro-sized LEDs are referred to as micro-LEDs. Micro-LED displays have an array of micro-LEDs that form individual pixel elements. Pixels can be small illuminated areas on a display screen that can make up an image from many pixels. In other words, pixels can be small discrete elements that together make up an image on a display. Pixels are usually arranged in a two-dimensional (2D) matrix and represented using dots, squares, rectangles, or other shapes. Pixels can be the basic unit of a display or digital image and have geometric coordinates.
[0004] Display devices in the micro display field are often used to produce high-brightness micro display images, which are projected through an optical system to be perceived by an observer, and the projection target can be a retina (virtual image) or a projection screen (real image). It can be applied to AR (augmented reality), VR (virtual reality), HUD (automobile head-up display), etc. Emerging technologies are mainly micro-LEDs, which have advantages such as high brightness, fast response, high color gamut, high PPI, low energy consumption, etc.
[0005] The general manufacturing process of Micro-LEDs in the prior art is as follows: first, form a single Micro-LED device or array, then batch transfer the Micro-LED device or array to a circuit substrate (such as a TFT board or COMS board, etc.), and finally encapsulate. However, due to the small size of Micro-LEDs, high positioning accuracy is required. How to efficiently and with high yield batch transfer Micro-LED chips to a circuit substrate has become a technical bottleneck that needs to be broken through for the application of Micro-LEDs in the micro display field. SUMMARY
[0006] The main purpose of the present application is to provide a monolithic integrated Micro-LED micro display chip and a manufacturing method thereof to overcome the shortcomings of the prior art and facilitate further expansion of the application of Micro-LEDs in the micro display field.
[0007] To achieve the foregoing application purposes, the technical solutions adopted by the present application include:
[0008] The embodiment of the present application provides a Micro-LED micro display chip, comprising:
[0009] a substrate, a surface of the substrate being provided with a plurality of convex parts arranged in an array, each convex part being provided with a contact point at a top end of the convex part, the contact point being electrically connected with a driving circuit included in the substrate;
[0010] an LED epitaxial layer, arranged on the substrate, the LED epitaxial layer comprising a first doped semiconductor layer, an active layer and a second doped semiconductor layer arranged in sequence on the substrate, the LED epitaxial layer being provided with a plurality of LED units arranged in an array;
[0011] a bonding layer, arranged between the LED epitaxial layer and the substrate, the bonding layer being electrically connected with the first doped semiconductor layer, the bonding layer covering the convex parts and exposing the contact points;
[0012] the convex parts are located between two adjacent LED units, the second doped semiconductor layer of each LED unit being electrically connected with the contact point on the convex part, so that each LED unit can be independently driven.
[0013] In some more specific embodiments, the surface of the substrate is provided with a first region and a second region, the first region being arranged at least around the second region, the convex parts being arranged in the second region, and the thickness of the bonding layer between the LED epitaxial layer and the first region is not less than the height of the convex parts.
[0014] In some more specific embodiments, the LED unit has a step structure, two adjacent LED units being electrically isolated through the step structure, so that the adjacent LED units can be independently driven, and the region of the LED epitaxial layer corresponding to the contact point is further provided with a first etching hole exposing the contact point, the second doped semiconductor layer of each LED unit being electrically connected with the contact point on the convex part through the electrode layer from the first etching hole.
[0015] In some more specific embodiments, the step structure is formed on the second doped semiconductor layer, and the height of the step structure is not less than the thickness of the second doped semiconductor layer and is less than the thickness of the LED epitaxial layer, the step structure electrically isolating at least the second doped semiconductor layers of adjacent LED units.
[0016] In some more specific embodiments, the step structure is formed on the second doped semiconductor layer, and the height of the step structure is equal to the thickness of the LED epitaxial layer, the step structure further electrically isolating the active layer and the first doped semiconductor layer of adjacent LED units.
[0017] In some specific embodiments, a passivation layer is further arranged on the second doped semiconductor layer, the passivation layer covers sidewalls of the step structure, the passivation layer has a first opening and a second opening, the first opening exposes the second doped semiconductor layer corresponding to each LED unit, the second opening exposes the contact, and the electrode layer is arranged on the passivation layer and covers the first opening and the second opening, the electrode layer is electrically connected with the second doped semiconductor layer at the first opening and is electrically connected with the contact at the second opening.
[0018] In some specific embodiments, an isolation material layer is arranged between two adjacent LED units, the two adjacent LED units are electrically isolated through the isolation material layer, so that the adjacent LED units can be independently driven, and the isolation material layer has a second etching hole exposing the contact in a region corresponding to the contact, and the second doped semiconductor layer of the LED unit is electrically connected with the contact on the protruding part through the electrode layer at the second etching hole.
[0019] In some specific embodiments, the isolation material layer is formed in the second doped semiconductor layer, and the thickness of the isolation material layer is not less than the thickness of the second doped semiconductor layer, and the isolation material layer at least electrically isolates the second doped semiconductor layers of adjacent LED units.
[0020] In some specific embodiments, a passivation layer is further arranged on the second doped semiconductor layer, the passivation layer covers sidewalls of the second etching hole, the passivation layer has a first opening and a second opening, the first opening exposes the second doped semiconductor layer corresponding to each LED unit, the second opening exposes the contact, and the electrode layer is arranged on the passivation layer and covers the first opening and the second opening, the electrode layer is electrically connected with the second doped semiconductor layer at the first opening and is electrically connected with the contact at the second opening.
[0021] In some specific embodiments, the material of the isolation material layer includes ion implantation material, the ion implantation material includes any one or a combination of two or more of hydrogen, helium, nitrogen, oxygen, fluorine, magnesium, silicon and argon, but is not limited thereto.
[0022] The embodiment of the present application further provides a manufacturing method of a Micro-LED micro display chip, which comprises the following steps:
[0023] A second substrate is provided, and an LED epitaxial layer is formed on the second substrate, the LED epitaxial layer comprises a second doped semiconductor layer, an active layer and a first doped semiconductor layer which are arranged in sequence on the second substrate,
[0024] A first substrate is provided, which comprises a driving circuit and a plurality of contacts electrically connected to the driving circuit, the plurality of contacts being arranged in an array;
[0025] A first region of the surface of the first substrate is thinned to form a protrusion with a height difference from the first region on the surface of the substrate at a second region of the surface of the substrate where the contacts are located, a top end of each of the protrusions having a contact;
[0026] A bonding layer is formed on the surface of the first doped semiconductor layer and / or the first substrate, and the first doped semiconductor layer is bonded to the first substrate by the bonding layer, and then the second substrate is removed, wherein the thickness of the bonding layer between the LED epitaxial layer and the first region of the first substrate is not less than the height of the protrusion;
[0027] The LED epitaxial layer is processed to form a plurality of LED units arranged in an array, each of the contacts is arranged in a region between two adjacent LED units, each LED unit is electrically connected to a contact, and each of the LED units can be independently driven.
[0028] In some more specific embodiments, the method for processing the LED epitaxial layer to form a plurality of LED units arranged in an array comprises:
[0029] A plurality of step structures are formed on the LED epitaxial layer, and the plurality of step structures separate the LED epitaxial layer to form a plurality of LED units arranged in an array.
[0030] In some more specific embodiments, the method comprises:
[0031] The LED epitaxial layer is etched from the surface of the second doped semiconductor layer, thereby forming a plurality of step structures, wherein the height of the step structure is not less than the thickness of the second doped semiconductor layer and less than the thickness of the LED epitaxial layer, and the step structure at least isolates the second doped semiconductor layers of adjacent LED units from each other;
[0032] The LED epitaxial layer and the bonding layer remaining in the region corresponding to the contact are etched to form a first etching hole exposing the contact.
[0033] An electrode layer is formed, and the second doped semiconductor layer of each of the LED units is electrically connected to the contact on the protrusion from the first etching hole through the electrode layer.
[0034] In some more specific embodiments, the method comprises:
[0035] etching the LED epitaxial layer from the surface of the second doped semiconductor layer to form a plurality of step structures, the height of the step structure being equal to the thickness of the LED epitaxial layer, the step structure separating at least the second doped semiconductor layer, the active layer and the first doped semiconductor layer of adjacent LED units from each other;
[0036] etching and removing the bonding layer in the region corresponding to the contact to form a first etching hole exposing the contact;
[0037] forming an electrode layer, the second doped semiconductor layer of each LED unit being electrically connected to the contact on the bump via the electrode layer from the first etching hole.
[0038] In some more specific embodiments, the method comprises:
[0039] forming a passivation layer on the second doped semiconductor layer after forming the plurality of step structures and before forming the electrode layer, the passivation layer covering the step structures and the contact;
[0040] forming a first opening on the passivation layer to expose a portion of the second doped semiconductor layer of the LED unit and a second opening to expose the contact.
[0041] In some more specific embodiments, the method comprises:
[0042] forming an isolation material layer in the second doped semiconductor layer by ion implantation, the thickness of the isolation material layer being not less than the thickness of the second doped semiconductor layer, the isolation material layer separating the LED epitaxial layer to form a plurality of arrayed LED units.
[0043] In some more specific embodiments, the method comprises:
[0044] etching and removing a portion of the isolation material layer and a portion of the bonding layer in the region corresponding to the contact to form a second etching hole exposing the contact;
[0045] forming an electrode layer, the second doped semiconductor layer of each LED unit being electrically connected to the contact on the bump via the electrode layer from the second etching hole.
[0046] In some more specific embodiments, the method comprises:
[0047] forming a passivation layer on the second doped semiconductor layer and the isolation material layer after forming the plurality of LED units and before forming the electrode layer, the passivation layer covering the second etching hole and the contact;
[0048] forming a first opening and a second opening on the passivation layer, the first opening exposing a portion of the second doped semiconductor layer of the LED unit, and the second opening exposing the contact.
[0049] Compared with the prior art, the present application has at least the following advantages:
[0050] The Micro-LED micro display chip provided by the embodiment of the present application has the following advantages: the contact on the substrate is arranged on the raised portion of the substrate, so that when the LED epitaxial layer and the substrate are combined by the bonding layer, the thickness of the bonding layer between the LED epitaxial layer and the raised portion of the substrate is smaller than the thickness of the bonding layer in the remaining area of the LED epitaxial layer and the substrate, and when the LED unit is electrically connected with the contact, the bonding layer that needs to be etched and removed is thinner, thereby reducing the process difficulty and minimizing the damage to the device caused by the etching process. BRIEF DESCRIPTION OF DRAWINGS
[0051] Figure 1a 、 Figure 1b are respectively a top view of a Micro-LED micro display chip provided in a typical embodiment of the present application;
[0052] Figure 2a is Figure 1a is a cross-sectional view of a Micro-LED micro display chip along line A-A in
[0053] Figure 2b is Figure 1a is a cross-sectional view of a Micro-LED micro display chip along line B-B in
[0054] Figure 2c is a cross-sectional view of a Micro-LED micro display chip provided in a typical embodiment of the present application;
[0055] Figures 3a-3j is a flowchart structure diagram of the manufacturing process of a Micro-LED micro display chip provided in a typical embodiment of the present application;
[0056] Figures 4a-4e is a flowchart structure diagram of part of the manufacturing process of a Micro-LED micro display chip provided in a typical embodiment of the present application. DETAILED DESCRIPTION
[0057] In view of the deficiencies in the prior art, the present inventors have obtained the technical solution of the present application through long-term research and a large number of practices. The technical solution, its implementation process and principles will be further explained as follows.
[0058] The present application aims to break the technical bottleneck of batch transfer of Micro-LED chips, and does not use the batch transfer mode, but provides a monolithic integrated Micro-LED micro display chip and a manufacturing method thereof.
[0059] The term "micro display chip" used in the embodiments of the present application refers to the descriptive size of certain devices or structures in the embodiments of the present application, and the "micro display chip" in the embodiments of the present application is intended to represent a scale of 0.1-100 μm, preferably 0.1-10 μm, for example, the size of a single LED unit in the embodiments of the present application can be 0.1-100 μm, preferably 0.1-10 μm. However, it should be understood that the specific embodiments of the present application are not necessarily limited thereto, and certain aspects of the embodiments can be applicable to larger and possibly smaller size scales.
[0060] The term "layer" used in the embodiments of the present application refers to a portion of material including a region having a certain thickness. The layer can extend over the entire underlying or overlying structure, or can have a degree of extent less than the underlying or overlying structure. In addition, the layer can be a region of a homogeneous or inhomogeneous continuous structure having a thickness less than the thickness of the continuous structure. For example, the layer can be between the top surface and the bottom surface of the continuous structure or between any pair of horizontal planes therebetween. The layer can extend horizontally, vertically, and / or along a tapered surface. The second substrate can be a layer, can include one or more layers therein, and / or can have one or more layers thereon, above, and / or below. A layer can include multiple layers. For example, a semiconductor layer can include one or more doped or undoped semiconductor layers and can have the same or different materials.
[0061] The term "second substrate" used in the embodiments of the present application refers to a material on which a subsequent layer of material is added, the second substrate itself can be patterned, the material added on top of the second substrate can be patterned or can remain unpatterned. In addition, the second substrate can include a wide variety of semiconductor materials, such as silicon, silicon carbide, gallium nitride, germanium, gallium arsenide, indium phosphide, etc., alternatively, the second substrate can be made of a non-conductive material, such as glass, plastic or sapphire wafer. The first substrate described has semiconductor devices or driving circuits formed therein, which driving circuits or semiconductor devices can be processed according to specific needs, and the etching process, formation process of structure layer, etc. in the embodiments of the present application can all use process methods known to those skilled in the art, which are not specifically limited herein.
[0062] Embodiment 1
[0063] Figure 1a 、 Figure 1bFig. 1 shows a top view of an exemplary Micro-LED micro-display chip according to some embodiments of the present application, Figure 2a Fig. 2 shows a cross-sectional view of an exemplary Micro-LED micro-display chip along line A-A in Fig. 1, Figure 1a Fig. 3 shows a cross-sectional view of an exemplary Micro-LED micro-display chip along line B-B in Fig. 1. Figure 2b Fig. 4 shows a top view of another exemplary Micro-LED micro-display chip according to some embodiments of the present application, Figure 1a Fig. 5 shows a cross-sectional view of another exemplary Micro-LED micro-display chip along line A-A in Fig. 4.
[0064] Fig. 6 shows a cross-sectional view of another exemplary Micro-LED micro-display chip along line B-B in Fig. 4. Figure 1a Fig. 7 shows a top view of another exemplary Micro-LED micro-display chip according to some embodiments of the present application, Figure 2a Fig. 8 shows a cross-sectional view of another exemplary Micro-LED micro-display chip along line A-A in Fig. 7. Fig. 9 shows a cross-sectional view of another exemplary Micro-LED micro-display chip along line B-B in Fig. 7.
[0065] In the present embodiment, the surface of the first substrate 110 has a first region and a second region, the first region at least surrounds the second region, the second region has a plurality of protruding portions 112, each of the contacts 111 is arranged at a corresponding protruding portion 112, at least a part of the protruding portion 112 and the contact 111 are arranged in a region between two adjacent LED units 100, and the thickness of the bonding layer 160 between the LED epitaxial layer and the first region is not less than the height of the protruding portion 112.
[0066] In the present embodiment, the contacts 111 and the protruding portions 112 are arranged one-to-one, the second doped semiconductor layer corresponding to each LED unit 100 is electrically connected to the contact 111 on the protruding portion 112.
[0067] In the present embodiment, the LED unit 100 also has a step structure 151, which electrically isolates two adjacent LED units 100, so that each LED unit 100 can be independently driven; and the bottom of the step structure 151 has a first etching hole corresponding to the contact 111, which exposes the contact 111, and each LED unit 100 is electrically connected to the contact 111 on the protruding portion 112 through the electrode layer 180.
[0068] For example, the LED epitaxial layer of one of the LED units 100 includes a first doped semiconductor layer 130, an active layer 140, and a second doped semiconductor layer 150, which are sequentially stacked on the first substrate 110. The first doped semiconductor layer 130 is fixedly combined to the first substrate 110 via a bonding layer 160, and the bonding layer 160 is electrically connected to the first doped semiconductor layer 130.
[0069] In the embodiment, the first substrate 110 can be made of a semiconductor material such as silicon, silicon carbide, gallium nitride, germanium, gallium arsenide, indium phosphide, or the like. Of course, the first substrate 110 can also be made of a non-conductive material such as glass, plastic, or a sapphire wafer. In the embodiment, the first substrate 110 can be a CMOS backplane or a TFT glass substrate, and the driving circuit is configured to provide an electrical signal to the LED unit 100 to control the brightness.
[0070] In the embodiment, the driving circuit can include an active matrix driving circuit, in which each individual LED unit 100 corresponds to an independent driver. In the embodiment, the driving circuit can include a passive matrix driving circuit, in which a plurality of LED units 100 are arranged in an array and connected to data lines and scan lines driven by the driving circuit.
[0071] In the embodiment, the thickness of the bonding layer 160 is comparable to the thickness of the second doped semiconductor layer 150 and is greater than or equal to the thickness of the protrusion 112 on the first substrate 110. The thickness of the bonding layer 160 is about 1 μm. If the bonding layer 160 corresponding to the region of the contact 111 is removed to expose the contact 111, and the second doped semiconductor layer 150 is connected to the contact 111 via the electrode layer 180, the height difference between the connection region of the second doped semiconductor layer 150 and the electrode layer 180 and the contact 111 is comparable to the total thickness of the LED epitaxial layer and the bonding layer 160.
[0072] In the embodiment, the bonding layer 160 can be an adhesive material layer formed on the first substrate 110 to bond the first substrate 110 and the LED epitaxial layer. In the embodiment, the bonding layer 160 can be disposed only on the first region of the surface of the first substrate 110, or the bonding layer 160 can be disposed on the first region and the second region of the surface of the first substrate 110. The thickness of the bonding layer 160 in the second region is less than the thickness of the bonding layer 160 in the first region, and the thickness of the bonding layer 160 in the first region is greater than the height of the protrusion 112. In the embodiment, the bonding layer 160 is made of the same material, which can be a conductive material such as a metal or a metal alloy. For example, the bonding layer 160 can be made of Au, Sn, In, Cu, Ti, or the like, but is not limited thereto.
[0073] It should be understood that the description of the material of the bonding layer 160 is only exemplary and not restrictive, and those skilled in the art can make changes according to requirements, and all these changes are within the scope of the present application.
[0074] In the embodiment, the first doped semiconductor layer 130, the active layer 140 and the second doped semiconductor layer 150 are sequentially stacked on the bonding layer 160, the bonding layer 160 is arranged on the first substrate 110, and the LED epitaxial layer is electrically connected to the contact 111 on the first substrate 110 through the electrode layer 180.
[0075] In the embodiment, the active layer 140 is arranged between the first doped semiconductor layer 130 and the second doped semiconductor layer 150 and provides light, the active layer 140 recombines holes and electrons provided from the first doped semiconductor layer 130 and the second doped semiconductor layer 150 respectively and outputs light of a specific wavelength, and the active layer 140 can have a single quantum well structure or a multi-quantum well (MQW) structure and a well layer and a barrier layer are alternately stacked.
[0076] In the embodiment, the step structure 151 is formed on the second doped semiconductor layer 150, the height of the step structure 151 is not less than the thickness of the second doped semiconductor layer 150 and is less than or equal to the thickness of the LED epitaxial layer, and the step structure 151 at least isolates the second doped semiconductor layers 150 of adjacent LED units from each other, that is, part of the step structure 151 penetrates and isolates the second doped semiconductor layer 150 in the thickness direction.
[0077] In the embodiment, the material of the first doped semiconductor layer 130 and the second doped semiconductor layer 150 can be one or more layers of II-VI material (such as ZnSe or ZnO) or III-V nitride material (such as GaN, AlN, InN, InGaN, GaP, AlInGaP, AlGaAs and alloys thereof).
[0078] In the embodiment, the first doped semiconductor layer 130 can be a P-type semiconductor layer extending across multiple LED units 100 and forming a common anode of the LED units 100, and in the embodiment, the first doped semiconductor layer 130 extending across the LED units (i.e., the part between two LED units) can be relatively thin; the thickness of the first doped semiconductor layer 130 is 0.05 μm-1 μm, preferably 0.05 μm-0.7 μm, and more preferably 0.05 μm-0.5 μm.
[0079] In the embodiment, the first doped semiconductor layer 130 can be P-type GaN, in the embodiment, the first doped semiconductor layer 130 can be formed by doping magnesium (Mg) in GaN, in other embodiments, the first doped semiconductor layer 130 can also be P-type InGaN or P-type AlInGaP, etc.
[0080] In the embodiment, each LED unit 100 has an anode and a cathode connected to the driving circuit, for example, the driving circuit is formed in the first substrate 110 (the driving circuit is not shown in the figure), for example, each LED unit 100 has an anode connected to a constant voltage source and has a cathode connected to the source / drain of the driving circuit; in other words, by forming a continuous first doped semiconductor layer 130 across the LED units 100, the plurality of LED units 100 can have a common anode formed by the first doped semiconductor layer 130.
[0081] In the embodiment, the second doped semiconductor layer 150 can be an N-type semiconductor layer and forms the cathode of the LED unit 100. In the embodiment, the second doped semiconductor layer 150 can be N-type GaN, N-type InGaN, N-type AlInGaP, etc.
[0082] In the embodiment, the second doped semiconductor layers 150 of different LED units 100 are electrically isolated, so that each LED unit 100 can have a cathode with a different voltage level from other LED units, as a result of the disclosed embodiment, a plurality of individually operable LED units 100 are formed, the first doped semiconductor layers 130 of which extend horizontally across adjacent LED units, and the second doped semiconductor layers 150 of which are electrically isolated between adjacent LED units.
[0083] In the embodiment, the active layer (i.e. the MQW layer) 140 is the active region of the LED epitaxial layer, in the embodiment, the thickness of the LED epitaxial layer (the first doped semiconductor layer 130, the active layer 140 and the second doped semiconductor layer 150) is 0.4-4 μm, preferably 0.5-3 μm.
[0084] It should be noted that the first doped semiconductor layer 130 can also be an N-type semiconductor layer, accordingly, when the first doped semiconductor layer 130 is an N-type semiconductor layer, the second doped semiconductor layer 150 is a P-type semiconductor layer.
[0085] In the embodiment, a step structure 151 is formed on the second doped semiconductor layer 150, and part of the step structure penetrates through and separates the second doped semiconductor layer 150 in the thickness direction, and the step surface of the step structure serves as a light emitting area of the LED epitaxial layer.
[0086] In the embodiment, the bottom of the step structure is further provided with a first etching hole, and the contact 111 on the first substrate 110 is exposed from the first etching hole.
[0087] In the embodiment, a passivation layer 170 is formed on at least the second doped semiconductor layer 150 and part of the exposed first doped semiconductor layer 130, the active layer 140 and the bonding layer 160, and the passivation layer 170 can be used to protect and separate the LED unit 100.
[0088] In the embodiment, the passivation layer 170 is arranged on the second doped semiconductor layer 150, and the passivation layer 170 also covers the sidewall of the step structure, the surface of the first etching hole and the etching groove, the electrode layer 180 is formed on part of the passivation layer 170, and the passivation layer 170 is provided with a first opening 171 and a second opening 172, the first opening 171 exposes the second doped semiconductor layer 150, and the second opening 172 exposes the contact 111, the electrode layer 180 is electrically connected with the second doped semiconductor layer 150 through the first opening 171 on the passivation layer 170 and is electrically connected with the contact 111 through the second opening 172 on the passivation layer 170.
[0089] In the embodiment, the first opening 171 is arranged as much as possible in the central area of each LED unit 100, and the shape of the first opening 171 can be circular or square, etc. Of course, the first opening 171 can also be other regular or irregular patterns.
[0090] In the embodiment, the material of the passivation layer 170 can be SiO2, Al2O3, SiN or other suitable materials, etc. In the embodiment, the material of the passivation layer 170 can also be polyimide, SU-8 photoresist or other photo-patternable polymers, etc.
[0091] In the embodiment, the material of the electrode layer 180 can be a transparent conductive material, for example, the material of the electrode layer 180 includes conductive metal oxides such as indium tin oxide (ITO) or zinc oxide (ZnO), or the material of the electrode layer 180 can be a conductive metal material such as Cr, Ti, Pt, Au, Al, Cu, Ge or Ni.
[0092] In the present embodiment, as described above, the second doped semiconductor layer 150 forms the cathode of each LED unit 100, and thus the contact 111 provides a driving voltage to the cathode of each LED unit 100 from the driving circuit through the electrode layer 180.
[0093] Figures 3a-3j A cross-sectional view of an illustrative Micro-LED microdisplay chip during a manufacturing process is shown in accordance with some embodiments of the present application.
[0094] Referring to Figures 3a-3j The method for manufacturing a Micro-LED microdisplay chip can include the following steps:
[0095] 1) Referring to Figure 3a A second doped semiconductor layer 150, an active layer 140, and a first doped semiconductor layer 130 are sequentially formed on a second substrate 120, and the second doped semiconductor layer 150, the active layer 140, and the first doped semiconductor layer 130 form an LED epitaxial layer; and a first substrate 110 is provided, which includes a driving circuit and a plurality of contacts 111 electrically connected to the driving circuit;
[0096] The second substrate 120 is made of a base material suitable for forming an LED epitaxial layer, for example, the second substrate 120 can be made of a non-conductive material such as glass, plastic, or sapphire wafer, but is not limited thereto; the first substrate 110 can be made of a semiconductor material such as silicon, silicon carbide, gallium nitride, germanium, gallium arsenide, indium phosphide, etc., of course, the first substrate 110 can also be made of a non-conductive material such as glass, plastic, or sapphire wafer, in the present embodiment, the first substrate 110 can be a CMOS backplane or a TFT glass substrate, etc., the driving circuit is used to provide an electrical signal to the LED unit 100 to control the brightness; in the present embodiment, the driving circuit can include an active matrix driving circuit, in which each individual LED unit 100 corresponds to an independent driver, in the present embodiment, the driving circuit can include a passive matrix driving circuit, in which a plurality of LED units 100 are arranged in an array and connected to data lines and scan lines driven by the driving circuit;
[0097] In some embodiments, the second doped semiconductor layer 150, the active layer 140, and the first doped semiconductor layer 130 can be formed by chemical vapor deposition (CVD), physical vapor deposition (PVD), atomic layer deposition (ALD), plasma-enhanced CVD (PECVD), plasma-enhanced ALD (PEALD), or the like. In the present embodiment, the first doped semiconductor layer 130 and the second doped semiconductor layer 150 can be II-VI materials (such as ZnSe or ZnO) or III-V nitride materials (such as GaN, AlN, InN, InGaN, GaP, AlInGaP, AlGaAs, and alloys thereof). The first doped semiconductor layer 130 can be a P-type semiconductor layer as an anode. In the present embodiment, the thickness of the first doped semiconductor layer 130 is 0.05 μm to 1 μm, preferably 0.05 μm to 0.7 μm, and more preferably 0.05 μm to 0.5 μm. In the present embodiment, the first doped semiconductor layer 130 can be formed by doping magnesium (Mg) in GaN. In other embodiments, the first doped semiconductor layer 130 can also be P-type InGaN, P-type AlInGaP, or the like. In the present embodiment, the second doped semiconductor layer 150 can be an N-type semiconductor layer and serves as a cathode of each LED unit 100. In the present embodiment, the second doped semiconductor layer 150 can be N-type GaN, N-type InGaN, N-type AlInGaP, or the like. In the present embodiment, the active layer (i.e., the MQW layer) 140 is an active region of an LED epitaxial layer. In the present embodiment, the thickness of the LED epitaxial layer (the first doped semiconductor layer 130, the MQW layer 140, and the second doped semiconductor layer 150) is 0.4 μm to 4 μm, preferably 0.5 μm to 3 μm. Of course, the first doped semiconductor layer 130 can also be an N-type semiconductor layer. Accordingly, when the first doped semiconductor layer 130 is an N-type semiconductor layer, the second doped semiconductor layer 150 is a P-type semiconductor layer.
[0098] 2) Please refer to Figure 3b The first region of the surface of the first substrate 110 is thinned to form a protrusion 112 having a height difference with the second region having the contact 111 on the surface of the first substrate. The thinning process can be achieved by etching, grinding, or other processes known to those skilled in the art.
[0099] 3) Please refer to Figure 3c and Figure 3dIn some embodiments, the bonding layer 160 can be formed on the first doped semiconductor layer 130 and / or the first substrate 110, and the first substrate 110 and the first doped semiconductor layer 130 can be bonded through the bonding layer 160. In some embodiments, the thickness of the bonding layer 160 between the first doped semiconductor layer 130 and the first region of the first substrate 110 can be greater than or equal to the height of the protrusion 112, and the thickness of the bonding layer 160 between the first doped semiconductor layer 130 and the second region of the first substrate 110 can be less than the thickness of the bonding layer 160 between the first doped semiconductor layer 130 and the first region of the first substrate 110.
[0100] In some embodiments, the bonding layer 160 can be a conductive adhesive layer formed between the first substrate 110 and the first doped semiconductor layer 130 to bond the first substrate 110 and the LED unit 100. In some embodiments, the bonding layer 160 can be made of a conductive material, such as a metal or a metal alloy, for example, Au, Sn, In, Cu, or Ti. It should be understood that the description of the material of the bonding layer 160 is only exemplary and not limiting, and those skilled in the art can make changes as required, and all such changes are within the scope of the present application.
[0101] 3) Please refer to Figure 3e In some embodiments, the second substrate 120 can be removed, and the method of removing the second substrate 120 can be direct peeling or other methods known to those skilled in the art. Of course, after removing the second substrate 120, a thinning operation can be performed on the second doped semiconductor layer 150 to remove a portion of the second doped semiconductor layer 150. In some embodiments, the thinning operation can include a dry etching or wet etching operation, and in some embodiments, the thinning operation can also include a chemical mechanical polishing (CMP) operation, etc.
[0102] 4) Please refer to Figure 3f In some embodiments, at least the second doped semiconductor layer 150 in the predetermined region can be removed by etching or other methods to form a step structure 151, which separates the second doped semiconductor layer 150 into a plurality of LED mesas, each corresponding to an LED unit. In some embodiments, the height of the step structure 151 is not less than the thickness of the second doped semiconductor layer 150 and is less than or equal to the thickness of the LED epitaxial layer. The step structure 151 at least isolates the second doped semiconductor layers 150 of adjacent LED units from each other, and the step surface of the step structure 151 serves as a light emitting region of the LED epitaxial layer.
[0103] It can be understood that the step structure 151 penetrates the second doped semiconductor layer 150 in the thickness direction, thereby achieving isolation of the second doped semiconductor layer 150; or part of the step structure 151 penetrates the second doped semiconductor layer 150 and the active layer 140 in the thickness direction, or part of the step structure 151 penetrates the second doped semiconductor layer 150, the active layer 140 and the first doped semiconductor layer 130 in the thickness direction;
[0104] In the embodiment, the thickness of the LED epitaxial layer including the first doped semiconductor layer 130, the active layer 140 and the second doped semiconductor layer 150 can be between about 0.3 μm and about 5 μm, in some other embodiments, the thickness of the LED epitaxial layer including the first doped semiconductor layer 130, the active layer 140 and the second doped semiconductor layer 150 can be between about 0.4 μm and about 4 μm, in some alternative embodiments, the thickness of the LED epitaxial layer including the first doped semiconductor layer 130, the active layer 140 and the second doped semiconductor layer 150 can be between about 0.5 μm and about 3 μm;
[0105] 5) Please refer to Figure 3g , the LED epitaxial layer and at least part of the bonding layer 160 remaining at the bottom of the step structure and the area corresponding to the contact 111 are removed by etching or the like to form a first etching hole 101 exposing the contact 111; in the embodiment, the thickness of the bonding layer 160 covering the raised portion 112 of the first substrate is thinner, so that the etching depth is smaller and the etching process is faster when part of the bonding layer is etched to expose the contact, and the etching damage to the device is smaller;
[0106] 6) Please refer to Figure 3h and Figure 3i , a passivation layer 170 is formed on the surface of the formed device epitaxial structure unit, and a first opening 171 and a second opening 172 are processed on the passivation layer 170 to expose part of the second doped semiconductor layer 150 from the first opening 171 and expose the contact 111 from the second opening 172; it should be noted that in specific implementation, the passivation layer 170 can be formed on the surface of the formed device epitaxial structure unit first, and then the first opening 171 and the second opening 172 are processed by etching, of course, the passivation layer with the first opening 171 and the second opening 172 can also be formed by selective epitaxy;
[0107] In the embodiment, the material of the passivation layer 170 can be SiO2, Al2O3, SiN or other suitable materials, etc., and the passivation layer 170 can also include polyimide, SU-8 photoresist or other photo-patternable polymers, etc.
[0108] 7) Please refer to Figure 3i A transparent electrode layer 180 is formed on the passivation layer 170, and the transparent electrode layer 180 is electrically connected with the second doped semiconductor layer 150 and the contact 111 from the first opening 171 and the second opening 172, respectively. The driving circuit on the first substrate 110 can control the voltage and current of the second doped semiconductor layer 150 through the transparent electrode layer 180. In the embodiment, the transparent electrode layer 180 is electrically isolated from other structure layers except the second doped semiconductor layer 150 through the passivation layer.
[0109] In the embodiment, the electrode layer 180 is formed on a part of the passivation layer 170. In the embodiment, the material of the electrode layer 180 can be an electrically conductive material such as indium tin oxide (ITO), Cr, Ti, Pt, Au, Al, Cu, Ge, or Ni.
[0110] The depth of the etched opening in the Micro-LED micro display chip provided by the embodiment is shallower, the exposure depth is lower, the process of opening the passivation layer is easier to control, the flatness of the subsequently formed electrode layer is better, and the fluctuation of the electrode layer at the corresponding contact is smaller.
[0111] Embodiment 2
[0112] Figure 2c A cross-sectional view of a Micro-LED micro display chip is shown in an illustrative embodiment of the application. The Micro-LED micro display chip includes a first substrate 110 and an LED epitaxial layer formed on the first substrate 110. The first substrate 110 includes a driving circuit and a plurality of contacts 111 electrically connected with the driving circuit. The LED epitaxial layer is fixedly combined on the first substrate 110 through a bonding layer 160, and the LED epitaxial layer is divided into a plurality of LED units 100 arranged in an array. Each contact 111 drives one LED unit 100, and adjacent LED units 100 can be independently driven.
[0113] In the embodiment, the surface of the first substrate 110 has a first region and a second region. The first region at least surrounds the second region. The second region has a plurality of protruding portions 112. Each contact 111 is correspondingly arranged at one protruding portion 112. At least part of one protruding portion 112 and one contact 111 are arranged in a region between adjacent two LED units 100. The thickness of the bonding layer 160 between the LED epitaxial layer and the first region is not less than the height of the protruding portion 112.
[0114] In the embodiment, the isolation material layer 190 is arranged between the two adjacent LED units 100, and the two adjacent LED units 100 are electrically isolated by the isolation material layer 190, so that each LED unit 100 can be independently driven. The isolation material layer 190 is arranged at least above the protruding portion 112, and the region of the isolation material layer 191 corresponding to the contact 111 has a second etching hole exposing the contact. The LED unit 100 is also electrically connected to the contact 111 on the first substrate 110 through the electrode layer 180.
[0115] Taking one of the LED units 100 as an example, the LED epitaxial layer includes a first doped semiconductor layer 130, an active layer 140, and a second doped semiconductor layer 150 arranged in sequence on the first substrate 110.
[0116] In the embodiment, the second doped semiconductor layer 150 and a part of the exposed first doped semiconductor layer 130, the active layer 140, and the isolation material layer 190 are formed with a passivation layer 170. The passivation layer 170 can be used to protect and isolate the LED unit 100. The passivation layer 170 is provided with a second opening 172 corresponding to the region of the second etching hole exposing the contact 111 and a first opening 171 corresponding to the second doped semiconductor layer 150. The electrode layer 180 is formed on a part of the passivation layer 170 and is electrically connected to the second doped semiconductor layer 150 through the first opening 171 of the passivation layer 170 and to the contact 111 through the second opening 172 of the passivation layer 170.
[0117] In the embodiment, the first opening 171 is preferably arranged in the central region of each LED unit 100. The shape of the first opening 171 can be circular or square, etc. Of course, the first opening 171 can also be other regular or irregular patterns.
[0118] In the embodiment, the isolation material layer 190 is arranged at least in the second doped semiconductor layer 150, and the thickness of the isolation material layer 190 is not less than the thickness of the second doped semiconductor layer 150. The isolation material layer 190 at least electrically isolates the second doped semiconductor layers 150 of the adjacent LED units 100.
[0119] In the embodiment, the isolation material layer 190 can be formed in the second doped semiconductor layer 150 with a depth insufficient to penetrate the active layer 140, the active layer 140, the first doped semiconductor layer 130 and the bonding layer 160 included in each LED unit can extend horizontally to adjacent LED units, or the isolation material layer 190 can be continuously formed in the second doped semiconductor layer 150, the active layer 140, or the isolation material layer 190 can be continuously formed in the second doped semiconductor layer 150, the active layer 140 and the first doped semiconductor layer 130.
[0120] In the embodiment, the isolation material layer 190 has an electrically insulating physical property, and the material of the isolation material layer 190 includes ion implantation material, which includes any one or a combination of two or more of hydrogen, helium, nitrogen, oxygen, fluorine, magnesium, silicon and argon.
[0121] The materials and structures of the first doped semiconductor layer 130, the active layer 140, the second doped semiconductor layer 150, the bonding layer 160, the passivation layer 170 and the electrode layer 180 in the embodiment can be basically the same as those in Embodiment 1, and will not be described here.
[0122] Figures 4a-4d An exemplary cross-sectional view of a Micro-LED micro display chip during the manufacturing process according to some embodiments of the present application is shown, it should be noted that, Figures 4a-4d Only the manufacturing process after the LED epitaxial layer including the first doped semiconductor layer 130, the active layer 140 and the second doped semiconductor layer 150 is transferred from the second substrate 120 to the first substrate 110 is shown.
[0123] Referring to Figures 4a-4d , the manufacturing process of the Micro-LED micro display chip provided by the embodiment of the present application is basically the same as that of Embodiment 1, therefore, the embodiment only introduces the differences from Embodiment 1, and the remaining process steps that are the same or similar and the limitations on the materials and structures of each epitaxial structure layer will not be described here; the manufacturing method can include the following steps:
[0124] 4) Referring to Figure 4a , an isolation material layer 190 is formed in the second doped semiconductor layer 150 corresponding to the protruding portion 112 on the first substrate 110 by ion implantation or other methods, the thickness of the isolation material layer 190 is not less than the thickness of the second doped semiconductor layer 150, and as a result of ion implantation, the second doped semiconductor layer 150 is separated by the isolation material layer 190 into a plurality of LED mesas, each LED mesa corresponding to an LED unit;
[0125] In the present embodiment, the isolation material layer 190 can be formed by implanting ions of any one of H, He, N, O, F, Mg, Si, Ar or a combination of two or more of them into the second doped semiconductor layer 150, in the present embodiment, the isolation material layer 190 has the physical property of electrical insulation, by implanting ions into a specified region of the second doped semiconductor layer 150, the material of the second doped semiconductor layer 150 in the specified region can be converted into the isolation material layer 190.
[0126] In the present embodiment, the isolation material layer 190 can be formed at an ion implantation power of about 10 keV to about 300 keV, in some embodiments, the isolation material layer 190 can be formed at an ion implantation power of about 15 keV to about 250 keV, in some embodiments, the isolation material layer 190 can be formed at an ion implantation power of about 20 keV to about 200 keV.
[0127] In the present embodiment, the depth of ion implantation can be controlled so that the isolation material layer 190 formed penetrates the second doped semiconductor layer 150 in the thickness direction, of course, the isolation material layer 190 formed can also penetrate the second doped semiconductor layer 150 and the active layer 140 in the thickness direction, of course, the isolation material layer 190 formed can also penetrate the second doped semiconductor layer 150, the active layer 140, the first doped semiconductor layer 150 in the thickness direction, it should be understood that the position, shape and depth of the isolation material layer 190 shown in FIG. 4a are only illustrative and not limiting, and those skilled in the art can make changes according to specific embodiments, all of which are within the scope of the present application.
[0128] 5) Please refer to Figure 4b , a second etching hole 102 exposing the contact is formed in the region of the isolation material layer 190 corresponding to the contact 111 by etching or the like, the second etching hole 102 continuously penetrates the isolation material layer 191, the active layer 140, the first doped semiconductor layer 130 and the bonding layer 160 in the thickness direction, it should be noted that the thickness of the bonding layer between the isolation material layer 190 and the raised portion 112 of the first substrate 110 is less than the thickness of the bonding layer between the LED epitaxial layer and the first region of the first substrate 110;
[0129] 6) Please refer to Figure 4c and Figure 4dA passivation layer 170 is formed on the surface of the formed device epitaxial structure unit, and a first opening 171 and a second opening 172 are processed on the passivation layer 170, so that a part of the second doped semiconductor layer 150 is exposed from the first opening 171, and the contact 111 is exposed from the second opening 172;
[0130] 7)Please refer to Figure 4e A transparent electrode layer 180 is formed on the passivation layer 170, and the transparent electrode layer 180 is electrically connected with the second doped semiconductor layer 150 and the contact 111 from the first opening 171 and the second opening 172, respectively.
[0131] The Micro-LED micro display chip provided by the embodiment of the present application has the following advantages: the contact on the substrate is arranged on the raised portion of the substrate, so that when the LED epitaxial layer and the substrate are combined by the bonding layer, the thickness of the bonding layer between the LED epitaxial layer and the raised portion of the substrate is smaller than the thickness of the bonding layer in the remaining area of the LED epitaxial layer and the substrate; when the LED unit is electrically connected with the contact, the bonding layer that needs to be etched and removed is thinner, thereby reducing the process difficulty and minimizing the damage of the etching process to the device.
[0132] It should be understood that the above embodiments are only used to illustrate the technical concept and characteristics of the present application, and the purpose is to enable those skilled in the art to understand the content of the present application and implement it, and cannot limit the protection scope of the present application. Any equivalent changes or modifications made according to the spirit and principle of the present application should be covered within the protection scope of the present application.
Claims
1. A Micro-LED microdisplay chip, characterized in that, include: A substrate has a plurality of protrusions arranged in an array on its surface. Each protrusion has a contact at its top. The contact is electrically connected to a driving circuit included in the substrate. The surface of the substrate has a first region and a second region. The first region is arranged at least around the second region, and the protrusions are arranged in the second region. An LED epitaxial layer is disposed on the substrate. The LED epitaxial layer includes a first doped semiconductor layer, an active layer, and a second doped semiconductor layer stacked sequentially on the substrate. The LED epitaxial layer has multiple LED units arranged in an array. A bonding layer is disposed between the LED epitaxial layer and the substrate. The bonding layer is electrically connected to the first doped semiconductor layer. The bonding layer covers the protrusion and exposes the contact. The bonding layer is disposed only in a first region on the surface of the substrate, or the bonding layer is disposed in a first region and a second region on the surface of the substrate. The thickness of the bonding layer in the second region is less than the thickness of the bonding layer in the first region, and the thickness of the bonding layer in the first region is greater than the height of the protrusion. The protrusion is located between two adjacent LED units, and the second doped semiconductor layer of each LED unit is electrically connected to a contact on the protrusion, so that each LED unit can be driven independently.
2. The Micro-LED microdisplay chip according to claim 1, characterized in that: The LED unit has a stepped structure, and two adjacent LED units are electrically isolated by the stepped structure, so that adjacent LED units can be driven independently. Furthermore, the region of the LED epitaxial layer corresponding to the contact also has a first etched hole that exposes the contact. The second doped semiconductor layer of each LED unit is electrically connected to the contact on a protrusion through the electrode layer from the first etched hole.
3. The Micro-LED microdisplay chip according to claim 2, characterized in that: The step structure is formed on the second doped semiconductor layer, and the height of the step structure is not less than the thickness of the second doped semiconductor layer but less than the thickness of the LED epitaxial layer. The step structure at least electrically isolates the second doped semiconductor layers of adjacent LED units.
4. The Micro-LED microdisplay chip according to claim 2, characterized in that: The step structure is formed on the second doped semiconductor layer, and the height of the step structure is equal to the thickness of the LED epitaxial layer. The step structure also electrically isolates the active layer of the adjacent LED unit from the first doped semiconductor layer.
5. The Micro-LED microdisplay chip according to claim 3 or 4, characterized in that: A passivation layer is further disposed on the second doped semiconductor layer, and the passivation layer also covers the sidewall of the stepped structure. The passivation layer has a first opening and a second opening. The first opening exposes the second doped semiconductor layer corresponding to each LED unit, and the second opening exposes the contact. The electrode layer is disposed on the passivation layer and covers the first opening and the second opening. The electrode layer is electrically connected to the second doped semiconductor layer from the first opening and electrically connected to the contact from the second opening.
6. The Micro-LED microdisplay chip according to claim 1, characterized in that: An isolation material layer is provided between two adjacent LED units, and the two adjacent LED units are electrically isolated by the isolation material layer, so that the adjacent LED units can be driven independently. Furthermore, the area of the isolation material layer corresponding to the contact also has a second etched hole that exposes the contact. The second doped semiconductor layer of the LED unit is electrically connected to the contact on a protrusion through the electrode layer from the second etched hole.
7. The Micro-LED microdisplay chip according to claim 6, characterized in that: The isolation material layer is formed within the second doped semiconductor layer, and the thickness of the isolation material layer is not less than the thickness of the second doped semiconductor layer. The isolation material layer at least electrically isolates the second doped semiconductor layers of adjacent LED units.
8. The Micro-LED microdisplay chip according to claim 7, characterized in that: A passivation layer is further disposed on the second doped semiconductor layer, the passivation layer covers the sidewall of the second etched hole, the passivation layer has a first opening and a second opening, the first opening exposes the second doped semiconductor layer corresponding to each LED unit, the second opening exposes the contact, the electrode layer is disposed on the passivation layer and covers the first opening and the second opening, the electrode layer is electrically connected to the second doped semiconductor layer from the first opening and electrically connected to the contact from the second opening.
9. The Micro-LED microdisplay chip according to claim 7, characterized in that: The material of the isolation layer includes ion implantation material, which includes any one or a combination of two or more of hydrogen, helium, nitrogen, oxygen, fluorine, magnesium, silicon and argon.
10. A method for fabricating a Micro-LED microdisplay chip, characterized in that... include: A second substrate is provided, on which an LED epitaxial layer is formed. The LED epitaxial layer includes a second doped semiconductor layer, an active layer, and a first doped semiconductor layer sequentially stacked on the second substrate. A first substrate is provided, the first substrate including a driving circuit and a plurality of contacts electrically connected to the driving circuit, the plurality of contacts being arranged in an array; A first region on the surface of the first substrate is thinned to form a protrusion with a height difference from the first region in a second region having a contact on the surface of the first substrate. Each of the protrusions has a contact at its top. The first region is disposed around the second region at least. A bonding layer is formed on the surface of the first doped semiconductor layer and / or the first substrate, such that the thickness of the bonding layer between the first doped semiconductor layer and the first substrate is greater than or equal to the height of the protrusion, and the thickness of the bonding layer between the first doped semiconductor layer and the second substrate is less than the thickness of the bonding layer between the first doped semiconductor layer and the first substrate. The first doped semiconductor layer is bonded to the first substrate by the bonding layer, and then the second substrate is removed. The thickness of the bonding layer between the LED epitaxial layer and the first substrate is not less than the height of the protrusion. The LED epitaxial layer is processed into multiple LED units arranged in an array. Each contact point is disposed in the area between two adjacent LED units. Each LED unit is electrically connected to a contact point so that each LED unit can be driven independently.
11. The manufacturing method according to claim 10, characterized in that, A method for processing the LED epitaxial layer into an array of multiple LED units includes: Multiple step structures are formed on the LED epitaxial layer, and the multiple step structures divide the LED epitaxial layer to form multiple arrayed LED units.
12. The manufacturing method according to claim 11, characterized in that, include: The LED epitaxial layer is etched from the surface of the second doped semiconductor layer to form a plurality of the stepped structures, wherein the height of the stepped structure is not less than the thickness of the second doped semiconductor layer but less than the thickness of the LED epitaxial layer, and the stepped structure at least isolates the second doped semiconductor layers of adjacent LED units from each other. The remaining LED epitaxial layer and bonding layer in the area corresponding to the contact are etched away to form a first etched hole that exposes the contact. An electrode layer is formed, and the second doped semiconductor layer of each LED unit is electrically connected to a contact on a protrusion via the electrode layer from the first etched hole.
13. The manufacturing method according to claim 11, characterized in that... Specifically, it includes: The LED epitaxial layer is etched from the surface of the second doped semiconductor layer to form a plurality of the stepped structures. The height of the stepped structure is equal to the thickness of the LED epitaxial layer. The stepped structure isolates the second doped semiconductor layer, the active layer and the first doped semiconductor layer of adjacent LED units from each other. The bonding layer corresponding to the contact is etched away to form a first etched hole that exposes the contact; An electrode layer is formed, and the second doped semiconductor layer of each LED unit is electrically connected to a contact on a protrusion via the electrode layer from the first etched hole.
14. The manufacturing method according to claim 12 or 13, characterized in that... Specifically, it includes: After forming multiple stepped structures and before forming the electrode layer, a passivation layer is formed on the second doped semiconductor layer, and the passivation layer covers the stepped structures and contacts. A first opening and a second opening are formed on the passivation layer, the first opening being to expose a portion of the second doped semiconductor layer of the LED unit, and the second opening being to expose the contact.
15. The manufacturing method according to claim 10, characterized in that, include: An isolation material layer is formed in the second doped semiconductor layer by ion implantation, and the implantation depth of the ion implantation material is controlled so that the thickness of the isolation material layer is not less than the thickness of the second doped semiconductor layer. The isolation material layer divides the LED epitaxial layer into multiple LED units arranged in an array.
16. The manufacturing method according to claim 15, characterized in that, include: Etching removes a portion of the isolation material layer and a portion of the bonding layer in the area corresponding to the contact to form a second etched hole exposing the contact; An electrode layer is formed, and the second doped semiconductor layer of each LED unit is electrically connected to a contact on a protrusion via the electrode layer from the second etched hole.
17. The manufacturing method according to claim 16, characterized in that, include: After forming multiple LED units and before forming the electrode layer, a passivation layer is formed on the second doped semiconductor layer and the isolation material layer, and the passivation layer covers the second etched hole and the contact. A first opening and a second opening are formed on the passivation layer, the first opening being to expose a portion of the second doped semiconductor layer of the LED unit, and the second opening being to expose the contact.
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