Drawing device, drawing method, method for manufacturing laminated substrate, storage medium

Abstract

The drawing device of the present application has a drawing unit that draws a pattern on a substrate, and a drawing data generation section (42) that generates drawing data for drawing the pattern in the drawing unit. Design data that indicates a pattern to be drawn on the substrate includes a lower figure that is a pattern region, and an upper figure that overlaps the lower figure. The drawing data generation section (42) performs a deformation process on one of the lower figure and the upper figure, and generates the drawing data by overlapping the other figure that has not been subjected to the deformation process or the other figure that has been subjected to a different deformation process from the one figure with the deformed one figure. Thus, drawing data that has been subjected to a deformation process on one of the lower figure and the upper figure and has not been subjected to a deformation process or has been subjected to a different deformation process on the other figure can be appropriately generated.

Description

Technical Field

[0001] This invention relates to a drawing apparatus, a drawing method, a method for manufacturing a laminated substrate, and a storage medium storing a program. Background Technology

[0002] Previously, drawing devices for drawing patterns on photosensitive materials on a substrate without using a mask have been practically implemented. In these devices, design data created using vector data (such as CAD) is processed using RIP (Rapid Injection Processing) to generate drawing data for drawing the pattern, and the pattern is drawn based on this data. Furthermore, in the device disclosed in Japanese Patent Application Publication No. 2005-157326, when storing an image representing image information on a storage medium that will be distorted after image storage, the image information is converted in such a way that the image on the distorted storage medium has the same shape as the image represented by the image information. Then, based on the converted image information, the image is stored in the storage medium before distortion.

[0003] In recent years, ultra-high multilayer substrates (hereinafter referred to as "layered substrates") consisting of multiple stacked substrates have been manufactured. In the manufacture of layered substrates, circuit patterns are formed by drawing circuit patterns on each of the multiple substrates and performing processes such as development and etching. Next, holes are formed on each substrate, and then the multiple substrates are stacked. The stacked substrates are then mounted in a mold. In these multiple substrates, multiple holes are continuous in the stacking direction, and the multiple substrates are joined together by inserting positioning reference pins included in the mold into these multiple holes.

[0004] However, in a laminated substrate, because each substrate is relatively thin, the substrates expand and contract during the bonding process, causing the substrate dimensions to change from those in the design data. The rate of expansion (scale) of the substrate varies, for example, depending on its position in the lamination direction. Therefore, considering a method where the circuit pattern on each substrate in the laminated substrate approximates the design data, the drawing data is deformed (modified) based on the predicted rate of expansion of the substrate, and the circuit pattern is drawn on the substrate. On the other hand, reference pin marks indicating the positions where holes should be formed are also drawn on each substrate. In this case, the design data includes, in addition to the lower graphic representing the circuit pattern, an upper graphic that overlaps the lower graphic and represents the reference pin marks. Essentially, the drawing data becomes raster data representing an image where the upper graphic overlaps the lower graphic.

[0005] Here, if the drawing data is deformed based on the substrate's stretching ratio as described above, the positions of multiple holes in the stacked substrates will be misaligned, making it impossible to properly insert the reference pins into these holes. To align the positions of the multiple holes in the stacked substrates, the reference pin marks need to be in the same position in the design data, drawing data, and the pattern formed on the substrate. Therefore, a method is sought to generate drawing data that appropriately deforms the circuit pattern as the lower pattern without moving the reference pin marks (i.e., without deforming the reference pin marks). Depending on the application of the substrate, it may also be sought to generate drawing data that deforms the upper pattern differently from the lower pattern, or even drawing data that deforms the upper pattern without deforming the lower pattern. Summary of the Invention

[0006] The present invention relates to a drawing apparatus for drawing patterns, the purpose of which is to appropriately generate drawing data in which one of the lower and upper patterns is deformed while the other pattern is not deformed or is subjected to different deformation processes.

[0007] The drawing apparatus of the present invention includes: a drawing unit for drawing a pattern on a substrate; and a drawing data generation unit for generating drawing data for drawing the pattern in the drawing unit, wherein the design data indicating the pattern to be drawn on the substrate includes a lower graphic as a pattern area and an upper graphic overlapping the lower graphic, the drawing data generation unit performing a deformation process on one of the lower graphic and the upper graphic, and generating the drawing data by overlapping another graphic that has not been deformed or the other graphic that has undergone a deformation process different from the first graphic with the deformed first graphic.

[0008] According to the present invention, it is possible to appropriately generate drawing data in which one of the lower and upper graphics is deformed and the other graphics are not deformed or are subjected to different deformation processes.

[0009] Preferably, the drawing data generation unit uses a lower graphic image as raster data representing the lower graphic and an upper graphic image as raster data representing the upper graphic to generate the drawing data.

[0010] Preferably, the upper graphic is a patterned area, and the design data further includes a background graphic that overlaps the lower graphic and surrounds the upper graphic as a non-patterned area. The drawing data generation unit uses a background graphic image, which is raster data representing the background graphic, to generate the drawing data.

[0011] Preferably, the lower graphic image and the upper graphic image are data compressed based on the runlength.

[0012] Preferably, the drawing unit includes: a stage for holding the substrate; a head for drawing a pattern on the substrate on the stage; a moving mechanism for moving the stage relative to the head; a drawing control unit for controlling the head and the moving mechanism to perform drawing on the substrate; and an imaging unit for capturing an image of an alignment mark formed on the substrate on the stage, wherein the drawing data generation unit performs deformation processing on the pattern based on the position of the alignment mark shown in the captured image.

[0013] Preferably, the substrate is one of a plurality of substrates included in a laminated substrate, the upper pattern represents the position used for alignment of the substrate with respect to other substrates during the manufacturing of the laminated substrate, and the upper pattern is not deformed during the generation of the drawing data.

[0014] Preferably, the drawing data generation unit performs deformation processing on the lower pattern based on a predetermined deformation of the substrate generated during the manufacturing of the laminated substrate.

[0015] This invention relates to a method for drawing a pattern. The drawing method of this invention includes: a) a step of preparing design data, the design data representing a pattern to be drawn on a substrate and including a lower graphic as a pattern area and an upper graphic overlapping the lower graphic; b) a step of deforming one of the lower graphic and the upper graphic by overlapping the deformed graphic with another graphic that has not been deformed or the other graphic that has undergone a different deformation process; and c) a step of drawing the pattern on the substrate by a drawing unit using the drawing data.

[0016] This invention relates to a method for manufacturing a laminated substrate. The method includes: a step of laminating multiple substrates, including a substrate having a pattern drawn by the above-described drawing method; and a step of having multiple holes, including holes formed on the substrate at positions shown in the upper pattern, continuous in the lamination direction among the multiple laminated substrates, and performing a bonding process on the multiple substrates while inserting reference pins into the multiple holes, wherein the upper pattern is not deformed in step b) of the drawing method.

[0017] This invention relates to a storage medium storing a program that causes a computer to generate drawing data for drawing a pattern. When the computer executes the program of this invention, it performs the following steps: a) preparing design data, the design data representing a pattern to be drawn on a substrate, and including a lower graphic as a pattern area and an upper graphic overlapping the lower graphic; and b) deforming one of the lower and upper graphics by overlapping the deformed graphic with another graphic that has not been deformed or that has undergone a different deformation than the first graphic, thereby generating the drawing data.

[0018] The above-described objectives, as well as other objectives, features, methods, and advantages, will become clear from the accompanying drawings and from the detailed embodiments described below. Attached Figure Description

[0019] Figure 1 It is a three-dimensional diagram showing the structure of the drawing device.

[0020] Figure 2 It is a diagram representing the structure of a computer.

[0021] Figure 3 It is a block diagram representing the functions of the control unit.

[0022] Figure 4 This is a diagram used to illustrate the manufacturing process of a multilayer substrate.

[0023] Figure 5 This is a diagram showing the manufacturing process of a multilayer substrate.

[0024] Figure 6 It is a diagram showing the drawing process in the drawing device.

[0025] Figure 7 This is a diagram showing the upper surface of the substrate.

[0026] Figure 8 It is a diagram that represents a portion of the pattern shown in the design data.

[0027] Figure 9 It is a graph representing a complete graphic image.

[0028] Figure 10 It is a graph representing a graphic image.

[0029] Figure 11 It is a graph representing the upper region of the image.

[0030] Figure 12 It is the image after the full graphic image is superimposed on the image of the upper region.

[0031] Figure 13It is a diagram representing a graphic image.

[0032] Figure 14 It is the image after the upper graphic image and the upper region image are superimposed.

[0033] Figure 15 It is a diagram representing a background graphic image.

[0034] Figure 16 It is the image after the deformed graphic image and the background graphic image are superimposed.

[0035] Figure 17 This is a diagram representing the intermediate composite image.

[0036] Figure 18 It is the image obtained by aligning the intermediate composite image with the upper graphic image.

[0037] Figure 19 It is a diagram representing an image used for drawing.

[0038] Explanation of reference numerals in the attached figures

[0039] 1. Drawing device

[0040] 5 Filming Department

[0041] 9. 900 substrate

[0042] 11 Computer

[0043] 21 Platforms

[0044] 22 Platform Moving Mechanism

[0045] 31 heads

[0046] 42. Data Generation Department

[0047] 43 Drawing Control Department

[0048] 62 Graphics and Images

[0049] 64 Graphics and Images

[0050] 65 Background Graphics and Images

[0051] 67 Drawing Images

[0052] 71, 71a circuit diagrams

[0053] 76 reference pin marking

[0054] 77 mark surrounding area

[0055] 81 reference pin

[0056] 90-layer stacked substrate

[0057] 120 program

[0058] 901 (substrate) hole

[0059] 911 Alignment Mark

[0060] Steps S1, S2, S11 to S14 Detailed Implementation

[0061] Figure 1 This is a perspective view showing the structure of a drawing device 1 according to one embodiment of the present invention. Figure 1 In the diagram, three mutually orthogonal directions are represented by arrows as the X, Y, and Z directions. Figure 1 In the example shown, the X and Y directions are horizontal, and the Z direction is vertical.

[0062] The drawing apparatus 1 is a direct drawing apparatus that irradiates spatially modulated light onto a photosensitive material on a substrate 9 and draws a pattern by scanning the irradiated area on the substrate 9. The substrate 9 is, for example, a plate-shaped member that is generally rectangular when viewed from above. The substrate 9 is, for example, a flexible printed wiring substrate. A resist film formed of a photosensitive material is provided on a copper layer in the substrate 9. In the drawing apparatus 1, a circuit pattern is drawn on the resist film of the substrate 9. In subsequent processes, development, etching, and other treatments are performed to obtain a substrate 9 with the circuit pattern formed.

[0063] The drawing apparatus 1 includes a stage 21, a stage moving mechanism 22, a stage lifting mechanism 23, a drawing section 3, a photographing section 5, and a control section 4. The control section 4 controls the stage moving mechanism 22, the stage lifting mechanism 23, the drawing section 3, and the photographing section 5. The stage 21 is a generally flat holding section of a substrate 9 held horizontally from below (i.e., on the (-Z) side) below the drawing section 3. The main surface (hereinafter referred to as "upper surface 91") on the (+Z) side of the substrate 9 placed on the stage 21 is generally perpendicular to the Z direction and generally parallel to the X and Y directions.

[0064] The stage lifting mechanism 23 moves the stage 21 in the Z direction. The stage moving mechanism 22 moves the stage 21 relative to the drawing unit 3 in the horizontal direction. Figure 1In the example shown, the stage moving mechanism 22 moves the stage 21 together with the stage lifting mechanism 23 in the Y direction. In other words, the stage moving mechanism 22 moves the stage 21 in a direction substantially parallel to the upper surface 91 of the substrate 9. For example, the stage moving mechanism 22 is a moving mechanism that moves the stage 21 linearly along a guide rail, using a linear servo motor as the drive source. As a result, the stage 21 moves with high precision. As the drive source for the stage moving mechanism 22, a drive source with a motor mounted on a ball screw can also be used. In the drawing apparatus 1, a rotation mechanism that rotates the stage 21 circumferentially around a rotation axis extending in the Z direction can also be provided. Alternatively, the stage lifting mechanism 23 can be omitted in the drawing apparatus 1.

[0065] The drawing section 3 has multiple (in) arranged in the X and Y directions. Figure 1 (In the example shown, there are five heads 31.) The multiple heads 31 are supported above the stage 21 by head support 19 that spans the stage 21. Each head 31 has a light source and a light modulation unit. For example, a DMD (Digital Micromirror Device) with multiple tiny mirrors arranged in a two-dimensional configuration can be used as the light modulation unit. Alternatively, a modulator with multiple light modulation elements arranged in a one-dimensional configuration can also be used. The multiple heads 31 have substantially the same structure.

[0066] In the drawing apparatus 1, modulated (i.e., spatially modulated) light is irradiated onto the upper surface 91 of the substrate 9 from multiple heads 31 of the drawing unit 3, and the substrate 9 is moved in the Y direction by the stage moving mechanism 22. Thus, the irradiated area of ​​the light from the multiple heads 31 scans along the Y direction on the substrate 9, and a circuit pattern is drawn on the substrate 9. In the following description, the Y direction will be referred to as the "scanning direction," and the X direction will be referred to as the "width direction."

[0067] exist Figure 1 In the drawing apparatus 1, the drawing of the substrate 9 is performed in a so-called one-pass manner. Specifically, the stage 21 moves relative to the plurality of heads 31 in the Y direction via the stage moving mechanism 22, and the illumination area of ​​the light from the plurality of heads 31 is scanned only once in the Y direction (i.e., the scanning direction) on the upper surface 91 of the substrate 9. Thus, the circuit pattern of the substrate 9 is drawn. Alternatively, in the drawing apparatus 1, a sub-scanning mechanism that moves the stage 21 or the heads 31 in the X direction may be provided to perform the drawing of the substrate 9 in a so-called multi-pass manner.

[0068] The imaging unit 5 has multiple cameras 51 (e.g., CCD cameras). The multiple cameras 51 are supported above the stage 21 by the head support 19, similar to the head 31. The multiple cameras 51 are arranged at intervals in the width direction. Figure 1In this example, two cameras 51 are respectively positioned on both sides of the drawing section 3 in the width direction. Each camera 51 captures image data by photographing the substrate 9 on the stage 21. Furthermore, the number and arrangement of the cameras 51 can be varied.

[0069] Figure 2 This diagram illustrates the structure of computer 11. Computer 11 has the structure of a typical computer system, including a CPU 111 for performing various arithmetic operations, a ROM 112 for storing basic programs, and RAM 113 for storing various information. Computer 11 also includes: a disk 114 for storing information, a display unit 115 for displaying various information, a keyboard 116a and a mouse 116b serving as an input unit 116 for receiving input from the operator, a read / write device 118 for reading information from or writing information to a computer-readable storage medium 12 such as an optical disc, magnetic disk, or optical disk, and a communication unit 119 for communicating with the various components of the drawing device 1.

[0070] In computer 11, program 120 is read from storage medium 12 (which is a program product) via read / write device 118 and stored in disk 114. Program 120 can also be stored in disk 114 via network. CPU 111 uses RAM 113 and disk 114 to perform arithmetic processing according to program 120 (i.e., executes the program via computer). Computer 11 acts as... Figure 1 The control unit 4 in the drawing device 1 functions as such. The control unit 4 can be constructed using dedicated circuitry, or it can partially utilize dedicated circuitry. The control unit 4 can also be implemented collaboratively by multiple computers, in which case the multiple computers can be located in mutually separate positions.

[0071] Figure 3 This is a block diagram illustrating the functions of the control unit 4 implemented by the computer 11. Figure 3 The structure other than the control unit 4 is also shown. The control unit 4 includes a storage unit 41, a drawing data generation unit 42, and a drawing control unit 43. The storage unit 41 is mainly implemented by RAM 113 and a fixed disk 114, and stores various information such as design data. The design data represents images such as circuit patterns to be drawn on the substrate 9. The drawing data generation unit 42 is mainly implemented by CPU 111, and generates drawing data for drawing patterns (described later). The drawing control unit 43 is mainly implemented by CPU 111, and performs drawing on the substrate 9 by controlling the stage moving mechanism 22 and the head 31 of the drawing unit 3 based on the above-mentioned drawing data.

[0072] Here, the laminated substrate manufactured using substrate 9 will be described. Figure 4 This is a diagram used to illustrate the manufacturing of the laminated substrate 90. Figure 5 This is a diagram illustrating the process of manufacturing the multilayer substrate 90. The multilayer substrate 90 is an ultra-high multilayer substrate in which multiple (e.g., 80-100) substrates 900 are stacked. Figure 4 The number of substrates 900 depicted is less than the actual number of substrates 900. Typically, the multiple substrates 900 are approximately the same size. The substrate 9 on which the circuit pattern is drawn by the drawing device 1 is one of the multiple substrates 900 included in the laminated substrate 90. The laminated substrate 90 may also include two or more substrates 9 on which the circuit pattern is drawn by the drawing device 1.

[0073] In the manufacturing of the laminated substrate 90, multiple substrates 900 with circuit patterns are prepared and laminated (step S1). For example, circuit patterns are drawn on each substrate 900 on which a resist film is provided on a copper layer, and then multiple substrates 900 with circuit patterns are prepared by performing processes such as development and etching. The multiple substrates 900 are laminated in a predetermined order.

[0074] Here, on each substrate 900, multiple marks indicating the positions where holes 901 should be formed are formed together with the circuit pattern, and before the multiple substrates 900 are stacked, holes 901 are formed at the positions of each mark using a drill bit or the like. Since a reference pin 81, described later, is inserted into the hole 901, this mark is referred to hereinafter as a "reference pin mark". The position of each reference pin mark in the substrate 900 relative to a predetermined reference position (e.g., the center) is the same on the multiple substrates 900. Therefore, in the multiple stacked substrates 900, the multiple holes 901 are in the stacking direction (…). Figure 4 (Continuous in the vertical direction).

[0075] The positioning reference pins 81 included in the mold 80 are inserted into a plurality of consecutive holes 901. The mold 80 includes an upper mold 82 and a lower mold 83, which are disposed on both sides of a plurality of substrates 900 in the stacking direction. The two ends of the plurality of reference pins 81 are supported by the upper mold 82 and the lower mold 83. Two hot plates 84 are respectively provided on the outer sides of the upper mold 82 and the lower mold 83 in the stacking direction. The two hot plates 84 are heated to a predetermined temperature. With the reference pins 81 inserted into the plurality of holes 901, the plurality of substrates 900 are hot-pressed in the stacking direction via the two hot plates 84 (see reference). Figure 4 (See arrow A1 in the diagram). In this way, by performing a bonding process on multiple substrates 900, the multiple substrates 900 are bonded together to manufacture a stacked substrate 90 (step S2).

[0076] In one example of the laminated substrate 90, during the bonding process, each substrate 900 shrinks slightly overall due to the effect of heat. Furthermore, the shrinkage rate varies depending on the position of the substrate 900 in the lamination direction. During the manufacturing of the laminated substrate 90, the shrinkage rate of the substrates 900 positioned at various locations in the lamination direction is obtained in advance through experiments or experience, serving as deformation information during lamination. The deformation information of the substrates 900 during lamination is stored... Figure 3 The data generation section 42 is used for drawing descriptions.

[0077] Next, refer to Figure 6 The drawing process in the drawing apparatus 1 will be described. In the drawing apparatus 1, design data representing the pattern to be drawn on the substrate 9 is stored and prepared in the storage unit 41 (step S11). In this embodiment, the design data is CAD (Computer-Aided Design) data, which is vector data including multiple graphics (objects). The design data will be described in detail later.

[0078] In addition, the substrate 9 of the object to be processed is placed and held Figure 1 The substrate 9 moves downward toward the imaging unit 5 as the stage 21 moves, and the upper surface 91 of the substrate 9 is photographed by multiple cameras 51.

[0079] Figure 7 This diagram shows the upper surface 91 of the substrate 9. Multiple alignment marks 911 are formed on the upper surface 91 of the substrate 9. The alignment marks 911 may also be part of through-holes or wiring pre-set on the substrate 9. The alignment marks 911 can be observed through a resist film, and images (data) obtained by capturing images of the alignment marks 911 are acquired in each camera 51. Figure 7 In this example, multiple alignment marks 911 are provided at both ends in the scanning direction (Y direction). Therefore, the substrate 9 is moved in the scanning direction by the stage moving mechanism 22, so that multiple cameras 51 can capture images of the multiple alignment marks 911 at both ends of the substrate 9.

[0080] Multiple captured images are input to the control unit 4. In the control unit 4, the positions (relative positions relative to a reference position) of multiple alignment marks 911 on the substrate 9 on the stage 21 are determined based on the multiple captured images. The control unit 4 also pre-stores the positions of multiple alignment marks 911 on an ideal substrate (the substrate 9 without deformation) and compares them with the positions of the alignment marks 911 on the actual substrate 9. Thus, deformation information indicating the deformation of the substrate 9 during pattern drawing is obtained (step S12). The deformation of the substrate 9 may be due to stretching or twisting caused in the substrate 9 by previous processes performed on it. The deformation information indicating the deformation of the substrate 9 is output to... Figure 3The data generation section 42.

[0081] In the drawing data generation unit 42, drawing data for drawing patterns is generated based on the design data (step S13). The process of generating drawing data based on the design data will be explained in detail later. The drawing data generated by the drawing data generation unit 42 is sent to the drawing control unit 43. Then, the drawing control unit 43 controls the stage moving mechanism 22 and the head 31 of the drawing unit 3 based on the drawing data, thereby performing the drawing of the pattern on the substrate 9 (step S14). In the drawing apparatus 1, the pattern on the substrate 9 is drawn by a drawing unit whose main structure consists of the stage 21, the head 31, the stage moving mechanism 22, the drawing control unit 43, and the imaging unit 5.

[0082] Next, the process of generating drawing data based on design data will be explained. Figure 8 This is a diagram representing a portion of the pattern shown in the design data. The design data includes a lower graphic and an upper graphic superimposed on the lower graphic. The lower graphic is a patterned area (positive polarity area) representing the circuit pattern 71 to be drawn on the substrate 9. The upper graphic is a patterned area representing the reference pin mark 76 described above. The reference pin mark 76 superimposed on the circuit pattern 71. The design data also includes a background graphic superimposed on the lower graphic and surrounding the upper graphic. The background graphic is a non-patterned area (negative polarity area) representing the area 77 surrounding the reference pin mark 76 (hereinafter referred to as "mark surrounding area 77"). The mark surrounding area 77 superimposed on the circuit pattern 71. In the image shown in the design data, the area in the circuit pattern 71 that overlaps with the mark surrounding area 77 is called the non-patterned area.

[0083] In the design data of this processing example, different attribute information is assigned to the lower graphic, upper graphic, and background graphic, allowing them to be distinguished using this attribute information. In other words, in this processing example, assigning the same attribute information to the upper graphic and background graphic makes it impossible to distinguish them. As described later, different attribute information can also be assigned to the upper graphic and background graphic. Figure 8 In the diagram, parallel diagonal lines are marked on the circuit pattern 71 and the reference pin mark 76, i.e., the pattern area (described later). Figures 9 to 19 (The same applies to the middle section). In addition, a thin dashed line is used to indicate the outer edge of the area 77 surrounding the marker.

[0084] In the drawing data generation unit 42, raster data representing the lower graphic, the upper graphic overlapping the lower graphic, and the background graphic are generated by performing RIP processing on the design data. For example... Figure 9As shown, the grid data represents a binary image 61 (hereinafter referred to as "full graphic image 61") with reference pin marks 76 and surrounding areas 77 superimposed on the circuit pattern 71. The full graphic image 61 can also be a multi-valued image (as in other images). In the actual drawing apparatus 1, the full graphic image 61 is data with compressed stroke length, i.e., stroke length data. This stroke length data represents the position (change point) where light is switched between irradiating the substrate 9 and not irradiating the substrate 9 during pattern drawing.

[0085] Additionally, by performing RIP processing on the data after excluding the upper and background graphics from the design data, raster data representing the lower graphic is generated. For example... Figure 10 As shown, this raster data represents a binary image 62 of circuit pattern 71 (hereinafter referred to as "lower graphic image 62"). The lower graphic image 62 is also data after stroke length compression. Furthermore, upper and background graphics are extracted from the design data, and raster data representing the regions of the upper and background graphics is generated by performing RIP processing on the data that takes all the extracted graphics as pattern areas. Figure 11 As shown, this raster data represents a binary image 63 (hereinafter referred to as "upper region image 63") that uses both the reference pin mark 76 and the area 77 surrounding the mark as the pattern region. The upper region image 63 is also data after stroke length compression. Figure 11 In the image, the outer edge of the reference pin mark 76 is shown by a dashed line.

[0086] Typically, in the data generation unit 42, in Figure 6 After storing the design data in the storage unit 41 in step S11, the full graphic image 61, the lower graphic image 62, and the upper region image 63 are immediately generated. The generation of the full graphic image 61, the lower graphic image 62, and the upper region image 63 is preferably completed when the substrate 9 is placed on the stage 21. By performing a pre-processing RIP (Random In-Place Printing) that requires a certain amount of time, pattern drawing can begin shortly after the substrate 9 is placed on the stage 21.

[0087] Next, as Figure 12 As shown, in the full graphic image 61 (reference) Figure 9 ) and upper region image 63 (refer to) Figure 11 In the case of overlap, extract the region that becomes a pattern region in both images. Figure 12 (The area marked with intersecting lines). In other words, perform an AND (logical AND) synthesis between the full graphic image 61 and the upper region image 63. Thus, as... Figure 13As shown, an upper graphic image 64 is generated, representing the reference pin mark 76 as a pattern area. Furthermore, in the design data, when different attribute information is assigned to the upper graphic and the background graphic, the upper graphic image 64 is generated by performing RIP processing on the data obtained from the upper graphic extracted from the design data.

[0088] When generating the graphic image 64, such as Figure 14 As shown, in the upper graphic image 64 and the upper region image 63 (refer to...) Figure 11 In the case of overlap, extract the region that becomes a pattern region only in one of the images (in Figure 14 The area marked with parallel diagonal lines (excluding the area marked with intersecting shadows). In other words, perform XOR (exclusive OR) synthesis of the upper graphic image 64 and the upper region image 63. Thus, as... Figure 15 As shown, a background graphic image 65 is generated that represents the area 77 surrounding the mark as a pattern area. Furthermore, in the design data, if different attribute information is assigned to the upper graphic and the background graphic, the background graphic image 65 can also be generated by performing RIP processing on the data obtained from the background graphic extracted from the design data. When placing the substrate 9 onto the stage 21, it is preferable that the generation of the upper graphic image 64 and the background graphic image 65 has already been completed.

[0089] Next, regarding Figure 10 The lower graphic image 62 is subjected to deformation processing. Preferably, a plurality of drawing blocks arranged in a matrix in two orthogonal directions are provided on the upper surface 91 of the substrate 9. During the RIP processing described above, each image is divided into a plurality of drawing data elements (so-called grid data) corresponding to the plurality of drawing blocks. In the drawing data generation unit 42, deformation processing is performed by moving the positions of the plurality of drawing data elements in the lower graphic image 62, that is, by moving the drawing positions of the plurality of drawing blocks on the substrate 9. Of course, deformation processing can also be performed by other methods.

[0090] In this embodiment, the deformation processing is performed based on the deformation information during drawing. As described above, the deformation information during drawing indicates the difference between the position of the alignment mark 911 on the ideal substrate (the undeformed substrate 9) and the position of the alignment mark 911 on the actual substrate 9. Furthermore, the lower graphic image 62 represents the circuit pattern 71 that matches the ideal substrate. Therefore, by referring to the deformation information during drawing, the lower graphic image 62 is deformed (modified) according to the deformation of the substrate 9 to generate a deformed lower graphic image representing the deformed circuit pattern. Additionally, alignment marks 911 are provided at the four corners... Figure 7The substrate 9 is just one example; alignment marks 911 can also be provided at desired locations. Alternatively, multiple monolithic regions can be provided on the upper surface 91, and each monolithic region can be subjected to deformation processing of the lower graphic image 62 based on the deformation information during drawing.

[0091] Deformation processing can also be performed based on the deformation information described during layering. In this case, for example, the overall processing of the graphic image 62 is performed, with a reference position as the center, for example, by zooming in or out. Figure 4 In the example, the substrate 9 is slightly shrunk during the fabrication of the laminated substrate 90. Therefore, the magnified lower graphic image 62 is deformed in such a way that a pattern according to the design data is formed in the shrunk substrate 9. This generates a deformed lower graphic image representing the magnified circuit pattern. The deformation processing can also be performed based on both drawing-time deformation information and lamination-time deformation information. In this case, for example, for the deformed lower graphic image based on the drawing-time deformation information, a deformation processing that enlarges or reduces the entire image based on the lamination-time deformation information is also performed. In the drawing apparatus 1, the deformation processing of the lower graphic image 62 can also be performed based on information other than the drawing-time deformation information and the lamination-time deformation information.

[0092] Next, as Figure 16 As shown, the graphic image representing the deformed circuit pattern 71a is compared with the background graphic image 65 (without deformation) after deformation. Figure 15 In the case of overlap, the area where the pattern region of the deformed graphic image overlaps with the pattern region of the background graphic image 65 (i.e., the area where the deformed circuit pattern 71a overlaps with the area around the mark 77) is in the case of overlap. Figure 16 The area marked with intersecting lines is converted into a non-patterned area. Thus, as... Figure 17 As shown, an intermediate composite image 66 is generated, representing the area in the deformed circuit pattern 71a, excluding the area around the marker 77, as the pattern region. The intermediate composite image 66 represents an image where an undeformed background graphic is overlaid on the deformed lower graphic. Furthermore, in Figure 16 as well as Figure 17 In the middle, through the deformation processing of the lower graphic image 62, the circuit pattern 71a is moved to the right.

[0093] Then, as Figure 18 As shown, the intermediate composite image 66 is compared with the undistorted upper graphic image 64 (see reference). Figure 13 In the case of overlap, extract the region that forms a pattern region in one or both images (in Figure 18 In the middle, the region marked with arbitrary parallel diagonal lines. In other words, perform an OR (logical AND) synthesis of the intermediate composite image 66 and the upper graphic image 64. This generates... Figure 19The drawing image 67 shown is the drawing data. The drawing image 67 represents an image in which the reference pin mark 76, which is the pattern area, and the area 77 surrounding the mark, which is the non-pattern area, are superimposed on the deformed circuit pattern 71a. In other words, the drawing image 67 represents an image in which the undeformed upper graphic and the background graphic are superimposed on the deformed lower graphic.

[0094] As described above, in the drawing apparatus 1, design data representing a pattern to be drawn on the substrate 9 is prepared. The design data includes: a lower graphic as a pattern area, an upper graphic as a pattern area overlapping the lower graphic, and a background graphic overlapping the lower graphic and surrounding the upper graphic as a non-pattern area. The drawing data generation unit 42 performs deformation processing on the lower graphic by overlaying the upper graphic (which is not deformed) and the background graphic on the deformed lower graphic to generate drawing data. Thus, it is possible to appropriately generate drawing data that deforms the lower graphic but does not deform the upper graphic or the background graphic.

[0095] As described above, the upper pattern represents the position used for aligning the substrate 9 with other substrates 900 during the manufacturing of the laminated substrate 90 (in the example above, it is the reference pin mark 76). In the drawing apparatus 1, since the upper pattern is not deformed, it is possible to prevent the position used for alignment from shifting from the position shown in the design data. Therefore, during the manufacturing of the laminated substrate 90, positional shift of the substrate 9 can be prevented, resulting in the proper manufacturing of the laminated substrate 90. Preferably, the drawing data generation unit 42 deforms the lower pattern based on a predetermined deformation of the substrate 9 generated during the manufacturing of the laminated substrate 90. Therefore, in the laminated substrate 90, the circuit pattern on the substrate 9 corresponding to the lower pattern can be made approximately approximating the design data.

[0096] However, the raster data generated from the design data (in this embodiment, stroke length data) cannot contain information about the overlap of graphics as the design data does. Therefore, only... Figure 9 In the full graphic image 61, the area of ​​the circuit pattern 71 and the area of ​​the reference pin mark 76 cannot be determined. Therefore, for example, it is also possible to deform the circuit pattern 71 by separately specifying the area of ​​the circuit pattern 71 in the full graphic image 61. However, in the full graphic image 61, information about the portion of the circuit pattern 71 (lower graphic) that overlaps with the reference pin mark 76 and the surrounding area 77 (upper graphic and background graphic) is lost. Therefore, even if the deformation process is used to make this portion of the circuit pattern 71 not overlap with the reference pin mark 76 and the surrounding area 77, this portion cannot be properly reproduced.

[0097] In contrast, in the drawing data generation unit 42, drawing data is generated using a lower graphic image 62 as raster data representing the lower graphic, an upper graphic image 64 as raster data representing the upper graphic, and a background graphic image 65 as raster data representing the background graphic. Therefore, the portion of the lower graphic that has undergone deformation processing and does not overlap with the upper and background graphics can be appropriately reproduced in the drawing data, enabling high-precision generation of drawing data. Furthermore, the background graphic image can also be a pattern area showing both the reference pin mark 76 and the area 77 surrounding the mark. Figure 11 The upper region image 63. In the above processing example, although the lower graphic image 62, the upper graphic image 64 and the background graphic image 65 are travel length data, they do not necessarily have to be travel length data.

[0098] In the drawing data generation unit 42, deformation processing can also be performed on the lower graphic within the design data (vector data) that includes the lower graphic, upper graphic, and background graphic. In this case, drawing data is generated by performing RIP processing on the deformed design data, which represents an image obtained by overlapping the upper graphic (which has not undergone deformation processing) and the background graphic with the deformed lower graphic. Thus, drawing data in which the lower graphic has undergone deformation processing but the upper graphic and background graphic have not been deformed can be generated appropriately.

[0099] However, RIP processing requires a certain amount of time. Therefore, in order to start pattern drawing quickly after placing the substrate 9 on the stage 21, it is preferable to complete the RIP processing when placing the substrate 9 on the stage 21. On the other hand, in the preferred processing of the drawing apparatus 1, the lower pattern is deformed based on the position of the alignment mark 911 of the actual substrate 9 shown in the captured image. In this case, if the above-described method of deforming the lower pattern in the design data is used, the lower pattern is deformed after acquiring the captured image, and then RIP processing is performed, making it impossible to start pattern drawing quickly after placing the substrate 9 on the stage 21. Therefore, in order to start pattern drawing quickly after placing the substrate 9 on the stage 21, as described above, it is preferable to generate drawing data using the lower pattern image 62, the upper pattern image 64, and the background pattern image 65.

[0100] The drawing device 1, the drawing method, and the manufacturing method of the laminated substrate 90 described above can be modified in various ways.

[0101] Depending on the pattern to be drawn on the substrate 9, the background graphic can be omitted from the design data. In this case, the drawing data generation unit 42 generates drawing data using a lower graphic image as grid data representing the lower graphic and an upper graphic image as grid data representing the upper graphic. Furthermore, the upper graphic can be a non-patterned area. That is, the design data can include a lower graphic as a patterned area and an upper graphic as a non-patterned area.

[0102] In the drawing device 1, the upper graphic may be subjected to a different deformation process than the lower graphic. Alternatively, the lower graphic may not be deformed, but the upper graphic may be deformed. As described above, the drawing data generation unit 42 deforms one of the lower and upper graphics, and generates drawing data by overlapping the deformed graphic with another graphic that is not deformed or that has undergone a different deformation process. Thus, it is possible to appropriately generate drawing data that deforms one of the lower and upper graphics and does not deform or performs a different deformation process on the other graphic.

[0103] In design data, the overlapping relationship (top-bottom relationship) between the upper and lower graphics can also be represented by placing the two graphics on different layers.

[0104] In the moving mechanism of the drawing device 1, various structures can be adopted as long as the stage 21 moves relative to the head 31. For example, the stage 21 may be fixed and the head 31 may move in the Y direction. Alternatively, both the head 31 and the stage 21 may move.

[0105] In the drawing apparatus 1, the drawing unit that draws patterns on the substrate 9 can also draw patterns using an electron beam or inkjet.

[0106] The drawing device 1 can also be used for manufacturing laminated substrates 90. The substrate 9 with the pattern drawn on it can be a semiconductor substrate or a glass substrate, in addition to a printed wiring substrate.

[0107] The structures in the above-described embodiments and their variations can be appropriately combined within a range that does not contradict each other.

[0108] Although the present invention has been described in detail, the description is merely illustrative and does not limit the invention. Therefore, various modifications or methods can be made without departing from the scope of the invention.

Claims

1. A drawing device for drawing patterns, wherein, have: The drawing unit draws patterns on the substrate; as well as The drawing data generation unit generates drawing data for drawing patterns in the drawing unit. The design data indicating the pattern to be drawn on the substrate includes a lower graphic as the pattern area and an upper graphic superimposed on the lower graphic. The drawing data generation unit deforms one of the lower and upper graphics. It generates the drawing data by overlapping the deformed graphic with either an undeformed graphic or a graphic that has undergone a different deformation. The drawing data is raster data representing an image of the overlapping of the other graphic and the deformed one graphic.

2. The drawing device as claimed in claim 1, wherein, The drawing data generation unit uses a lower graphic image, which is raster data representing the lower graphic, and an upper graphic image, which is raster data representing the upper graphic, to generate the drawing data.

3. The drawing device as claimed in claim 2, wherein, The above graphic is a patterned area. The design data also includes a background graphic that overlaps the lower graphic and surrounds the upper graphic as a non-patterned area. The drawing data generation unit uses a background graphic image, which serves as raster data representing the background graphic, to generate the drawing data.

4. The drawing device as claimed in claim 2, wherein, The lower and upper graphic images are respectively the compressed data of the travel length.

5. The drawing device as claimed in claim 1, wherein, The drawing unit has: A stage for holding the substrate; The head draws a pattern on the substrate on the stage; A moving mechanism that moves the stage relative to the head; The drawing control unit performs drawing on the substrate by controlling the head and the moving mechanism; as well as The imaging unit captures images of the alignment marks formed on the substrate on the stage. The drawing data generation unit performs deformation processing on the graphic based on the position of the alignment mark shown in the captured image.

6. The drawing apparatus according to any one of claims 1 to 5, wherein, The substrate is one of a plurality of substrates included in a laminated substrate. The above diagram represents the position used for aligning the substrate relative to other substrates during the manufacturing of the laminated substrate. In the generation of the drawing data, the above graphic is not deformed.

7. The drawing device as claimed in claim 6, wherein, The drawing data generation unit performs deformation processing on the lower pattern based on a predetermined deformation of the substrate that occurs during the manufacturing of the laminated substrate.

8. A drawing method for drawing patterns. in, include: a) Step: Prepare design data, which represents a pattern to be drawn on a substrate and includes a lower graphic as a pattern area and an upper graphic superimposed on the lower graphic. (b) A process involving deforming one of the lower and upper graphics by overlapping the deformed graphic with either an undeformed graphic or a graphic that has undergone a different deformation process than the first graphic, thereby generating drawing data; and c) Step: Using the drawing data, the drawing unit draws a pattern on the substrate. The drawing data is raster data representing an image of the overlapping of the other graphic and the deformed one graphic.

9. A method for manufacturing a laminated substrate, in, include: A process of stacking multiple substrates, including a substrate patterned by the drawing method of claim 8; and A process in which multiple holes, including holes formed on the substrate at the positions shown in the above pattern, are continuous in the stacking direction in the multiple stacked substrates, and a bonding process is performed on the multiple substrates with a reference pin inserted into the multiple holes. In step b) of the drawing method, the above graphic is not deformed.

10. A storage medium storing a program that enables a computer to generate drawing data for drawing patterns, wherein, The computer executes the program, causing the computer to perform: a) Step: Prepare design data, which represents a pattern to be drawn on a substrate and includes a lower graphic as a pattern area and an upper graphic superimposed on the lower graphic. as well as (b) Step: Deform one of the lower and upper graphics by overlapping the undeformed graphic or the graphic that has undergone a different deformation with the deformed graphic to generate the drawing data. The drawing data is raster data representing an image of the overlapping of the other graphic and the deformed one graphic.

Images