Integrated circuit device and light source device

Abstract

The present invention provides an integrated circuit device and a light source device, wherein the integrated circuit device includes a driving circuit and a regulator. The driving circuit outputs a driving signal to a switching element. The regulator is input with a source power supply voltage (VRL) having the same potential as a source voltage of a transistor as a switching element, and generates a gate power supply voltage based on the source power supply voltage. The driving circuit (1) has a level shifter for level-shifting a PWM signal according to the gate power supply voltage and the source power supply voltage. The driving circuit outputs a driving signal based on an output signal of the level shifter to the gate of the transistor.

Description

Technical Field

[0001] The present invention relates to an integrated circuit device, a light source device, and the like. Background Art

[0002] Patent document 1 discloses a light source device, which includes a light emitting element, an N-type transistor, an inductor, and a light emitting control circuit that performs switching control on the N-type transistor according to a PWM signal input from the outside, which are connected in series between a power supply and a ground. As shown in FIG. 21 of Patent document 1, in order to appropriately control the N-type transistor to be turned on or off, an external component including a capacitor and a diode is provided between the gate and the source of the N-type transistor.

[0003] Patent Document 1: Japanese Patent Application Publication No. 2019-71269

[0004] The above-mentioned external components are necessary to properly control the N-type transistor to be turned on or off, but on the other hand, since they are mounted on the circuit substrate of the light source device as discrete components, the area or cost of the circuit substrate increases. Thus, there is a problem that it is impossible to take into account both the reduction of external components and the proper control of the N-type transistor to be turned on or off. Summary of the invention

[0005] One embodiment of the present invention relates to an integrated circuit device that controls a switching element that is arranged in series with a light-emitting element on the cathode side of the light-emitting element between a power supply node and one end of an inductor, wherein the integrated circuit device has: a drive circuit that outputs a drive signal to the switch element, turns on the switch element by making the drive signal valid, and turns off the switch element by making the drive signal invalid; and a regulator that is input with a source power supply voltage of the same potential as the source voltage of a transistor serving as the switch element, and generates a gate power supply voltage based on the source power supply voltage, the drive circuit having a level shifter that level-shifts a PWM signal according to the gate power supply voltage and the source power supply voltage, and the drive circuit outputs the drive signal based on the output signal of the level shifter to the gate of the transistor.

[0006] Moreover, another aspect of the present invention relates to a light source device including the integrated circuit device described above, the light emitting element, the switching element, and the inductor. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] Figure 1 This is a configuration example of a light source device when using an external component.

[0008] Figure 2 This is a structural example of a light source device.

[0009] Figure 3 This is an example of a signal waveform in PWM dimming mode.

[0010] Figure 4 This is a first detailed configuration example of a light source device.

[0011] Figure 5 This is a second detailed configuration example of the light source device.

[0012] Figure 6 This is an example of a signal waveform in the second detailed configuration example.

[0013] Figure 7 This is the third detailed configuration example of the light source device.

[0014] Figure 8 This is the fourth detailed configuration example of the light source device.

[0015] Fig. 9 This is a detailed configuration example of a regulator.

[0016] Fig.10 This is a detailed structural example of a level shifter.

[0017] Fig.11 This is a detailed configuration example of a driver circuit.

[0018] Fig.12 This is a detailed configuration example of a pump driver circuit.

[0019] Fig.13 This is a detailed configuration example of a light source device in which the switching element is a P-type transistor.

[0020] Fig.14 This is a detailed configuration example of a regulator.

[0021] Description of symbols

[0022] 10: light source circuit; 11: switching element; 12: analog dimming switching element; 14: inductor; 15: light emitting element; 17: light source circuit; 18: capacitor; 19: external component group; 100: integrated circuit device; 110: drive circuit; 112: analog dimming drive circuit; 114: control circuit; 120: analog dimming control circuit; 131, 132: regulator; 141: driver circuit; 142: driver circuit for pumping; 143: level shifter; 144: buffer amplifier circuit; 145: resistor; 146: Zener diode; 200: light source device; DCS, DCS': PWM signal; GTA: drive signal; GTB: analog dimming drive signal; NGN: ground node; NVI: power supply node; VDR: power supply voltage; VIN: input power supply voltage; VRH: gate power supply voltage; VRL: source power supply voltage. DETAILED DESCRIPTION

[0023] Hereinafter, preferred embodiments of the present invention will be described in detail. In addition, the present embodiment described below does not unduly limit the contents described in the claims, and not all the structures described in the present embodiment are necessarily essential structural elements.

[0024] 1. About external components

[0025] Figure 1 The following is a configuration example of a light source device 207 using external components. The light source device 207 includes an integrated circuit device 107 and a light source circuit 17. Each circuit element constituting the light source circuit 17 is a discrete component, and these discrete components are mounted on a circuit board together with the integrated circuit device 107.

[0026] The light source circuit 17 includes a switch element 11 , an analog dimming switch element 12 , an inductor 14 , a light emitting element 15 , resistors RCS and RIS , a capacitor CA and a diode DA. The integrated circuit device 107 includes a driving circuit 111 and an analog dimming driving circuit 121 .

[0027] The switch element 11 and the analog dimming switch element 12 are N-type transistors. The light emitting element 15 is driven by the current ILD and emits light at a brightness corresponding to the current value of the current ILD. The light emitting element 15 is a plurality of laser diodes connected in series. However, the light emitting element 15 may be a single laser diode or an LED (Light Emitting Diode).

[0028] The light emitting element 15 and the switch element 11 are arranged in series between the power supply node NVI and the first node N1. The power supply node NVI is a node to which the input power supply voltage VIN is input. The first node N1 is the source of the N-type transistor as the switch element 11, and is connected to one end of the inductor 14. The inductor 14, the analog dimming switch element 12 and the resistor RIS are arranged in series between the first node N1 and the ground node NGN. The ground node NGN is a node to which the ground voltage GND is input. The capacitor CA is arranged between the power supply node NVI and the first node N1. The diode DA is arranged between the power supply node NVI and the other end of the inductor 14.

[0029] The driving circuit 111 controls the switch element 11 to be turned on or off by outputting a driving signal GTA. The analog dimming driving circuit 121 controls the analog dimming switch element 12 to be turned on or off by outputting an analog dimming driving signal GTB. The analog dimming driving circuit 121 performs switching regulation control to keep the current ILD flowing through the light emitting element 15 constant according to the voltages CSP and CSN at both ends of the resistor RCS and the voltage IS at one end of the resistor RIS. As dimming modes, there are, for example, analog dimming mode and PWM dimming mode. In the analog dimming mode, the switch element 11 is always turned on, and the light emission of the light emitting element 15 is controlled by switching regulation control of the analog dimming switch element 12. In addition, in the PWM dimming mode, the light emission of the light emitting element 15 is kept constant by switching regulation control of the analog dimming switch element 12 during the period when the switch element 11 is turned on, but the light emission of the light emitting element 15 is controlled by using its on duty by turning the switch element 11 on or off.

[0030] In the analog dimming mode, the drive signal GTA is at a high level. In addition, when the on-duty ratio in the PWM dimming mode is long, the drive signal GTA becomes a high level for a long time. In this case, in order to appropriately control the gate voltage of the switching element 11, the light source circuit 17 includes capacitors CB, CC, diodes DB, DD, a Zener diode DC and a resistor RA as an external component group 19.

[0031] The resistor RA and the Zener diode DC are provided to protect the switching element 11. The first node N1, which is the source of the switching element 11, becomes a voltage corresponding to the current flowing through the inductor 14, and is not a ground voltage. Therefore, the driving signal GTA based on the ground voltage is AC-coupled through the capacitor CB and input to the gate of the switching element 11. At this time, if the driving signal GTA becomes a high level for a long time, the gate-source voltage of the switching element 11 decreases due to the resistor RA, and the switching element 11 is turned off.

[0032] In order to cope with this situation, diodes DB, DD and capacitor CC are provided. The analog dimming drive circuit 121 outputs a signal GTB' identical to the analog dimming drive signal GTB for switch regulation to one end of the capacitor CC, thereby causing the voltage at the other end of the capacitor CC to change based on the source voltage of the switch element 11, and the voltage is transmitted to the gate of the switch element 11 through the diode DD, thereby pumping the gate voltage of the switch element 11.

[0033] As described above, the external component group 19 is provided so that the switch element 11 will not accidentally disconnect. However, since the external component group 19 is mounted as a discrete component on the circuit board of the light source device 207, the area or cost of the circuit board increases. Therefore, it is desirable to set a structure that the switch element 11 will not accidentally disconnect and reduce external components.

[0034] 2. Light source device

[0035] Figure 2 The following is a configuration example of a light source device 200 in this embodiment. The light source device 200 includes an integrated circuit device 100 and a light source circuit 10. The integrated circuit device 100 is also referred to as a light emission control device.

[0036] The light source circuit 10 includes a switch element 11, an analog dimming switch element 12, an inductor 14, a light emitting element 15, resistors RCS, RIS, a capacitor CA, and a diode DA. The integrated circuit device 100 includes a driving circuit 110 and an analog dimming driving circuit 112. The connection relationship between the circuit elements is as follows: Figure 1 As described in the embodiment, the external component group 19 is omitted in this embodiment. Figure 2 In the above description, the switch element 11 is an N-type transistor, but the switch element 11 may be a PMOS transistor. The configuration examples of the light source circuit and the integrated circuit device in this case will be described later.

[0037] The integrated circuit device 100 includes a driving circuit 110, an analog dimming driving circuit 112, a control circuit 114, an analog dimming control circuit 120, regulators 131, 132, a PWM terminal TDCS, a dimming voltage input terminal TACS, terminals TVIN, TGTA, TVRL, TGTB, TIS, TCSP, TCSN, and TGND. The regulator 131 is also referred to as a first regulator, and the regulator 132 is also referred to as a second regulator. Each terminal is a connection pad provided on a semiconductor substrate of the integrated circuit device, or a terminal of a package that accommodates a semiconductor substrate.

[0038] The terminal TVRL is connected to the source of the switching element 11 in a non-AC coupling manner, and the terminal TVRL is input with a source power supply voltage VRL having the same potential as the source voltage of the switching element 11. The input power supply voltage VIN is input to the terminal TVIN from a power supply circuit provided outside the integrated circuit device 100, and the ground voltage GND is input to the terminal TGND. The regulator 131 uses the source power supply voltage VRL and the input power supply voltage VIN to generate a gate power supply voltage VRH that is higher than the source power supply voltage VRL by a predetermined voltage. In addition, an example is shown here in which the source voltage of the switching element 11 is input to the regulator 131 as the source power supply voltage VRL, but as described later, the source voltage of the switching element 11 may be input to the regulator 131 as the source power supply voltage after being buffered.

[0039] The regulator 132 regulates the input power supply voltage VIN to a power supply voltage VDR. The power supply voltage VDR is a voltage based on the ground voltage GND, and is, for example, a voltage lower than the source power supply voltage VRL. The regulator 132 is, for example, a linear regulator using an operational amplifier and resistors.

[0040] The terminal TGTA is connected to the gate of the switching element 11 in a non-AC coupling manner. The driving circuit 110 has a level shifter for level-shifting the PWM signal DCS'. The driving circuit 110 outputs the level-shifted driving signal GTA to the gate of the switching element 11 via the terminal TGTA. In addition, although a detailed structural example of the driving circuit 110 will be described later, the driving circuit 110 can output the output signal of the level shifter directly as the driving signal GTA, or can output it as the driving signal GTA after buffering the output signal of the level shifter. The low level of the PWM signal DCS' is the ground voltage GND, and the high level is the power supply voltage of the control circuit 114. The low level of the level-shifted driving signal GTA is the source power supply voltage VRL, and the high level is the gate power supply voltage VRH. In the case where the switching element 11 is an N-type transistor, since the switching element 11 is turned on when the driving signal GTA is at a high level, the high level is equivalent to valid, and the low level is equivalent to invalid.

[0041] In the above embodiment, the integrated circuit device 100 controls the switch element 11. The switch element 11 is provided in series with the light emitting element 15 on the cathode side of the light emitting element 15 between the power supply node NVI and one end of the inductor 14. The integrated circuit device 100 includes a drive circuit 110 and a regulator 131. The drive circuit 110 outputs a drive signal GTA to the switch element 11, turns on the switch element 11 by making the drive signal GTA effective, and turns off the switch element 11 by making the drive signal GTA ineffective. The regulator 131 receives a source power supply voltage VRL having the same potential as the source voltage of the transistor as the switch element 11, and generates a gate power supply voltage VRH based on the source power supply voltage VRL. The drive circuit 110 has a level shifter that performs level shifting on the PWM signal DCS' according to the gate power supply voltage VRH and the source power supply voltage VRL. The drive circuit 110 outputs a drive signal GTA based on the output signal of the level shifter to the gate of the transistor.

[0042] According to this embodiment, the low level of the driving signal GTA input to the gate of the switching element 11 becomes the source power supply voltage VRL, and the high level becomes the gate power supply voltage VRH based on the source power supply voltage VRL. Therefore, even if the driving signal GTA is input to the gate of the switching element 11 in a manner not performing AC coupling, the switching element 11 is appropriately controlled to be turned on or off. That is, there is no need to set Figure 1 The external component group 19 of the light source circuit 17 shown can appropriately control the switch element 11 to be turned on or off.

[0043] The above describes the configuration and operation for reducing the number of external component groups 19. The following describes the configuration and operation related to the PWM dimming mode and the analog dimming mode of the light source device 200.

[0044] In the PWM dimming mode, a PWM signal DCS for dimming control is input from the processing device to the PWM terminal TDCS. In the analog dimming mode, a dimming voltage ACS for dimming control is input from the processing device to the dimming voltage input terminal TACS. The processing device is a host device of the integrated circuit device 100, such as a processor such as an MPU or a CPU.

[0045] The control circuit 114 buffers the PWM signal DCS and outputs the buffered PWM signal DCS′. The control circuit 114 is a logic circuit, for example, a buffer circuit composed of an inverter, etc. The drive circuit 110 outputs the drive signal GTA according to the PWM signal DCS′ from the control circuit 114.

[0046] The analog dimming control circuit 120 outputs a control signal CGTB according to the dimming voltage ACS and the PWM signal DCS. The analog dimming control circuit 120 controls the analog dimming switch element 12 to be turned on or off during the period when the PWM signal DCS is valid. Specifically, the voltage CSP at one end of the first resistor RCS is input to the terminal TCSP, the voltage CSN at the other end of the first resistor RCS is input to the terminal TCSN, and the voltage IS at one end of the second resistor RIS is input to the terminal TIS. The analog dimming control circuit 120 performs switching adjustment control on the current ILD flowing through the light emitting element 15 according to the voltages CSP, CSN, IS and the dimming voltage ACS, thereby controlling the current ILD to correspond to the dimming voltage ACS.

[0047] The analog dimming driving circuit 112 is a driver for driving the analog dimming switch element 12. The analog dimming driving circuit 112 outputs the analog dimming driving signal GTB to the gate of the analog dimming switch element 12 via the terminal TGTB according to the control signal CGTB from the analog dimming control circuit 120. The analog dimming switch element 12 is turned on when the analog dimming driving signal GTB is valid, and is turned off when the analog dimming driving signal GTB is invalid. Figure 2 In the example, the analog dimming switch element 12 is an N-type transistor, a high level corresponds to validity, and a low level corresponds to invalidity.

[0048] Figure 3 This is an example of a signal waveform in the PWM dimming mode. The period of the PWM signal DCS is TPWM, and the period during which the PWM signal DCS is at a high level is THW. The duty of the PWM signal DCS is (THW / TPWM)×100%.

[0049] When the PWM signal DCS is at a high level, the driving circuit 110 outputs a high-level driving signal GTA. In the present embodiment, the high level of the driving signal GTA is the gate power supply voltage VRH. As a result, the switch element 11 is turned on. At this time, the analog dimming control circuit 120 and the analog dimming driving circuit 112 switch the analog dimming switch element 12, thereby performing switch adjustment control. As a result, the current ILD corresponding to the dimming voltage ACS flows through the light-emitting element 15. When the PWM signal DCS is at a low level, the driving circuit 110 outputs a low-level driving signal GTA. In the present embodiment, the low level of the driving signal GTA is the source power supply voltage VRL. As a result, the switch element 11 is turned off. In addition, the analog dimming control circuit 120 and the analog dimming driving circuit 112 turn off the analog dimming switch element 12. At this time, no current flows through the light-emitting element 15. The time average of the current ILD flowing through the light-emitting element 15 is determined by the duty of the PWM signal DCS, so the amount of light emitted is also determined by the duty of the PWM signal DCS. In this way, in the PWM dimming mode, dimming control is performed according to the duty of the PWM signal DCS.

[0050] In addition, in the analog dimming mode, the high-level PWM signal DCS is always input to the PWM terminal TDCS. The operation of the integrated circuit device 100 in the analog dimming mode is the same as the operation of the integrated circuit device 100 when the PWM signal DCS is at a high level in the PWM dimming mode. That is, in the analog dimming mode, since the current ILD corresponding to the dimming voltage ACS flows through the light emitting element 15, dimming control is performed by the dimming voltage ACS.

[0051] In the above embodiment, the integrated circuit device 100 includes an analog dimming drive circuit 112. The analog dimming drive circuit 112 outputs an analog dimming drive signal GTB to the analog dimming switch element 12. The analog dimming switch element 12 controls the current flowing from the other end of the inductor 14 to the ground node NGN. During the period when the drive signal GTA is valid, the analog dimming drive circuit 112 turns on the analog dimming switch element 12 by making the analog dimming drive signal GTB valid, and turns off the analog dimming switch element 12 by making the analog dimming drive signal GTB invalid.

[0052] According to this embodiment, an analog dimming mode for dimming by switching control of the analog dimming driving circuit 112 and a PWM dimming mode for dimming by PWM driving of the driving circuit 110 can be realized. In the analog dimming mode or when the on-duty ratio in the PWM dimming mode is long, the switching element 11 is turned on for a long time, but according to this embodiment, the gate-source voltage of the switching element 11 does not decrease, so there is no need to set Figure 1The external component group 19 described above can appropriately control the switch element 11 to be turned on or off.

[0053] 3. Detailed structure example

[0054] Figure 4 A first detailed configuration example of the light source device 200 is shown. Figure 4 In, omitted Figure 2 Part of the structural elements shown, but these structural elements are not Figure 2 same.

[0055] In the first detailed configuration example, the driving circuit 110 includes a driver circuit 141 , a level shifter 143 , a buffer amplifier circuit 144 , a resistor 145 , and a Zener diode 146 .

[0056] One end of the resistor 145 and the anode of the Zener diode 146 are connected to the terminal TGTA, and the other end of the resistor 145 and the cathode of the Zener diode 146 are connected to the terminal TVRL. The resistor 145 and the Zener diode 146 are provided as protection elements for the switch element 11. Specifically, the resistor 145 is provided so that the gate-source voltage of the N-type transistor as the switch element 11 is 0 V and the switch element 11 is turned off when the integrated circuit device 100 is turned off. In addition, the Zener diode 146 is provided so that the gate-source voltage does not exceed the withstand voltage of the N-type transistor.

[0057] The buffer amplifier circuit 144 buffers the source voltage of the switching element 11, and outputs the buffered voltage as the source power supply voltage VRL to the regulator 131. The buffer amplifier circuit 144 is, for example, a voltage follower circuit.

[0058] The level shifter 143 receives the PWM signal DCS', generates a signal whose high level is the power supply voltage VDR and whose low level is the ground voltage GND, and level-shifts the signal into an output signal LSQ whose high level is the gate power supply voltage VRH and whose low level is the source power supply voltage VRL. In addition, the low level of the PWM signal DCS' is the ground voltage GND, but the high level may be a voltage different from the power supply voltage VDR. The driver circuit 141 operates with the source power supply voltage VRL and the gate power supply voltage VRH as power supply voltages. The driver circuit 141 buffers the output signal LSQ, and outputs the buffered drive signal GTA to the gate of the switching element 11 via the terminal TGTA.

[0059] Figure 5 A second detailed configuration example of the light source device 200 is shown. Figure 5 In, omitted Figure 2 Part of the structural elements shown, but these structural elements are not Figure 2In addition, the description of the same parts as those in the first detailed configuration example is appropriately omitted.

[0060] In the second detailed configuration example, the integrated circuit device 100 includes the terminal TSPMP, and the light source circuit 10 includes the capacitor 18. The drive circuit 110 includes a pump driver circuit 142 but does not include the driver circuit 141.

[0061] The level shifter 143 outputs the level-shifted output signal as a drive signal GTA. The drive signal GTA is output to the gate of the switching element 11 via the terminal TGTA.

[0062] One end of the capacitor 18 is connected to the gate of the N-type transistor as the switching element 11, and the other end is connected to the terminal TSPMP. The pump driver circuit 142 operates with the power supply voltage VDR and the ground voltage GND as power supplies. The pump driver circuit 142 receives the PWM signal DCS' and generates a pump drive signal SPMP whose high level is the power supply voltage VDR and whose low level is the ground voltage GND. The pump driver circuit 142 outputs the pump drive signal SPMP to the other end of the capacitor 18 via the terminal TSPMP. The pump drive signal SPMP is AC-coupled through the capacitor 18 and is input to the gate of the switching element 11.

[0063] Figure 6 The following is a signal waveform example in the second detailed configuration example. "Without pumping" indicates the waveform of the gate voltage of the switching element 11 when the pumping driver circuit 142 is not provided. "With pumping" indicates the waveform of the gate voltage of the switching element 11 in the second detailed configuration example in which the pumping driver circuit 142 is provided.

[0064] Since the voltage of the drive signal GTA is a higher voltage than the power supply voltage VDR, etc., when considering a failure or damage caused by a short circuit, etc., it is preferred that the driving force of the drive signal GTA is lower. In the present embodiment, the gate of the switching element 11 is directly driven by the level shifter 143 to reduce the driving force. However, since the driving force of the level shifter 143 is low, the waveform of the drive signal GTA will be blunted if the pump driver circuit 142 is not provided. Specifically, the time from the rising edge of the PWM signal DCS' to the gate voltage becoming the gate power supply voltage VRH becomes longer, so the on-duty of the switching element 11 becomes incorrect, and the switching element 11 is not properly controlled to be on or off.

[0065] In the second detailed configuration example, the pump driver circuit 142 pumps the gate of the switching element 11 via the capacitor 18. Specifically, the pump driver circuit 142 sets the pump drive signal SPMP from the ground voltage GND to the power supply voltage VDR, thereby increasing the gate of the switching element 11 from the source power supply voltage VRL by the power supply voltage VDR. In addition, the pump driver circuit 142 sets the pump drive signal SPMP from the power supply voltage VDR to the ground voltage GND, thereby decreasing the gate of the switching element 11 from the gate power supply voltage VRH by the power supply voltage VDR. The power supply voltage VDR is set to a voltage of the difference between the gate power supply voltage VRH and the source power supply voltage VRL, for example.

[0066] Figure 7 A third detailed configuration example of the light source device 200 is shown. Figure 7 In, omitted Figure 2 Part of the structural elements shown, but these structural elements are not Figure 2 In addition, the description of the same parts as those of the first detailed configuration example or the second detailed configuration example is appropriately omitted.

[0067] In the third detailed configuration example, compared with the second detailed configuration example, the drive circuit 110 further includes a driver circuit 141. The driver circuit 141 having a higher driving force than the level shifter 143 drives the gate of the switching element 11, and the pump driver circuit 142 pumps the gate of the switching element 11. As a result, the edge of the drive signal GTA changes more sharply.

[0068] Figure 8 A fourth detailed configuration example of the light source device 200 is shown. Figure 8 In, omitted Figure 2 Part of the structural elements shown, but these structural elements are not Figure 2 In addition, descriptions of the same parts as those of the first detailed configuration example, the second detailed configuration example, or the third detailed configuration example are appropriately omitted.

[0069] In the fourth detailed configuration example, compared with the third detailed configuration example, the drive circuit 110 does not include the buffer amplifier circuit 144. That is, the source voltage input to the terminal TVRL is directly input to the regulator 131 as the source power supply voltage VRL. The consumption current associated with the gate power supply voltage VRH flows to the inductor 14 via the regulator 131. However, this current is a current amount that does not significantly affect the light emission control, so the buffer amplifier circuit 144 can be omitted.

[0070] In addition, in the first detailed configuration example and the second detailed configuration example, the buffer amplifier circuit 144 may be omitted.

[0071] Fig. 9 2 is a detailed configuration example of the regulator 131. The regulator 131 includes a current source circuit IBC, a Zener diode DIC, a resistor RC1, a resistor RC2, and an N-type transistor NTC.

[0072] The current source circuit IBC is provided between the power supply node NVI and the cathode of the Zener diode DIC. The anode of the Zener diode DIC is connected to the node of the source power supply voltage VRL. The current source circuit IBC allows current to flow from the cathode of the Zener diode DIC to the anode, whereby the cathode of the Zener diode DIC becomes a voltage obtained by adding the Zener voltage to the source power supply voltage VRL.

[0073] Resistors RC1 and RC2 are connected in series between the cathode and anode of the Zener diode DIC. The drain of the N-type transistor NTC is connected to the power supply node NVI, and the gate is connected to the node between the resistors RC1 and RC2. Resistors RC1 and RC2 divide the voltage between the cathode voltage of the Zener diode DIC and the source power supply voltage VRL, and the divided voltage is input to the gate of the N-type transistor NTC. As a result, the source voltage of the N-type transistor NTC becomes a voltage lower than the divided voltage by the threshold voltage of the N-type transistor NTC, and the voltage is output as the gate power supply voltage VRH. The voltage division ratio of the resistors RC1 and RC2 is set so that the divided voltage becomes close to the voltage obtained by adding the source power supply voltage VRL, the specified voltage, and the threshold voltage. As a result, the gate power supply voltage VRH becomes a voltage higher than the source power supply voltage VRL by a specified voltage.

[0074] Fig.10 2 is a detailed configuration example of the level shifter 143. The level shifter 143 includes an inverter IVD1, an inverter IVD2, P-type transistors TPD1 to TPD4, and N-type transistors TND1 and TND2.

[0075] The PWM signal DCS′ is input to the inverter IVD1 , and the output signal of the inverter IVD1 is input to the inverter IVD2 .

[0076] P-type transistor TPD1, ​​P-type transistor TPD3, and N-type transistor TND1 are connected in series between power supply node NVI and ground node NGN. P-type transistor TPD2, P-type transistor TPD4, and N-type transistor TND2 are connected in series between power supply node NVI and ground node NGN. The gate of P-type transistor TPD1 is connected to the drain of P-type transistor TPD2, and the gate of P-type transistor TPD2 is connected to the drain of P-type transistor TPD1. The drain voltage of P-type transistor TPD2 is output as the output signal LSQ of level shifter 143. A bias voltage is input to the gate of P-type transistor TPD3 and the gate of P-type transistor TPD4 from a voltage generating circuit not shown. The output signal of inverter IVD2 is input to the gate of N-type transistor TND1, and the output signal of inverter IVD1 is input to the gate of N-type transistor TND2.

[0077] When the PWM signal DCS' is high, the P-type transistor TPD2 is turned on and the N-type transistor TND2 is turned off, thus outputting a high-level output signal LSQ. When the PWM signal DCS' is low, the P-type transistor TPD2 is turned off and the N-type transistor TND2 is turned on, thus outputting a low-level output signal LSQ.

[0078] Fig.11 1 shows a detailed configuration example of the driver circuit 141. The driver circuit 141 includes inverters IVE1 and IVE2, a NOR circuit NRE, an AND circuit ANE, a buffer BFE, a P-type transistor TPE, and an N-type transistor TNE.

[0079] The output signal LSQ of the level shifter 143 is input to the inverter IVE2. The output signal of the inverter IVE1 and the output signal of the buffer BFE are input to the NOR circuit NRE. The output signal of the NOR circuit NRE is input to the inverter IVE2. The output signal of the inverter IVE1 and the output signal of the inverter IVE2 are input to the AND circuit ANE. The output signal of the AND circuit ANE is input to the buffer BFE.

[0080] The P-type transistor TPE and the N-type transistor TNE are connected in series between the node of the gate power supply voltage VRH and the node of the source power supply voltage VRL. The output signal of the inverter IVE2 is input to the gate of the P-type transistor TPE. The output signal of the buffer BFE is input to the gate of the N-type transistor TNE. The drive signal GTA is output from the source of the P-type transistor TPE and the source of the N-type transistor TNE.

[0081] When the output signal LSQ of the level shifter 143 is at a low level, the output signal of the inverter IVE2 is at a high level, and the output signal of the buffer BFE is at a high level, so the low-level drive signal GTA is output. When the output signal LSQ of the level shifter 143 is at a high level, the output signal of the inverter IVE2 is at a low level, and the output signal of the buffer BFE is at a low level, so the high-level drive signal GTA is output.

[0082] exist Fig.12 , a detailed configuration example of the pump driver circuit 142 is shown. The pump driver circuit 142 includes inverters IVF1 and IVF2, a NOR circuit NRF, an AND circuit ANF, a buffer BFF, a P-type transistor TPF, and an N-type transistor TNF.

[0083] The PWM signal DCS' is input to the inverter IVF1. The P-type transistor TPF and the N-type transistor TNF are connected in series between the node of the power supply voltage VDR and the ground node NGN. The pump drive signal SPMP is output from the source of the P-type transistor TPF and the source of the N-type transistor TNF. Fig.11 The driver circuit 141 is the same.

[0084] In addition, the above describes an example in which the on-duty of the switch element 11 is determined according to the high duty of the PWM signal DCS', but the on-duty of the switch element 11 may also be determined according to the low duty of the PWM signal DCS'. Fig.11 The inverter IVE1 and Fig.12 Inverter IVF1.

[0085] In the first, third, and fourth detailed configuration examples described above, the drive circuit 110 includes the driver circuit 141. The driver circuit 141 buffers the output signal LSQ of the level shifter 143 and outputs the drive signal GTA.

[0086] According to the present embodiment, the output signal LSQ of the level shifter 143 is buffered by the driver circuit 141 , so that the gate of the switching element 11 can be driven with a driving force higher than the driving force of the level shifter 143 .

[0087] In the second to fourth detailed configuration examples, the drive circuit 110 includes a pump driver circuit 142. The pump driver circuit 142 outputs a pump drive signal SPMP obtained by buffering the PWM signal DCS' to the other end of the capacitor 18. One end of the capacitor 18 is connected to the gate of the transistor serving as the switching element 11.

[0088] According to this embodiment, the pump driver circuit 142 can pump the gate of the switching element 11 via the capacitor 18. Therefore, compared with the case where the gate of the switching element 11 is driven by the level shifter 143 or the driver circuit 141 without providing the pump driver circuit 142, the gate voltage waveform of the switching element 11 changes sharply.

[0089] In addition, in this embodiment, the integrated circuit device 100 includes a regulator 132 as a second regulator. The regulator 132 generates a power supply voltage VDR with the ground voltage GND as a reference. The power supply voltage VDR is lower than the source power supply voltage VRL. The pump driver circuit 142 outputs a pump drive signal SPMP to the other end of the capacitor 18 based on the power supply voltage VDR and the ground voltage GND.

[0090] According to the present embodiment, since the pump drive signal SPMP is AC-coupled by the capacitor 18, the pump driver circuit 142 can operate by a power supply system based on the ground voltage GND. As described above, since the voltage of the drive signal GTA is a relatively high voltage, if a failure or damage caused by a short circuit is considered, for example, the driving force of the drive signal GTA is preferably low. In this regard, by providing the pump driver circuit 142 that operates at a relatively low voltage, the driving force of the drive signal GTA can be reduced.

[0091] In addition, in this embodiment, the driving circuit 110 includes a resistor 145. The resistor 145 is provided between the source and the gate of the transistor serving as the switching element 11.

[0092] According to this embodiment, the gate of the switching element 11 can be driven without AC coupling, so even if the resistor 145 is provided between the source and the gate of the switching element 11, the gate-source voltage of the switching element 11 does not decrease. Figure 1 The external component group 19 of the light source circuit 17 described in the figure.

[0093] In addition, in the present embodiment, the driving circuit 110 includes a buffer amplifier circuit 144. The buffer amplifier circuit 144 buffers the source voltage of the transistor as the switching element 11 and outputs the source power supply voltage VRL to the regulator 131.

[0094] The consumption current associated with the gate power supply voltage VRH flows from the regulator 131 to the node of the source power supply voltage VRL. According to the present embodiment, the buffer amplifier circuit 144 absorbs the current, so the current does not flow to the inductor 14 of the light source circuit 17. Therefore, the consumption current associated with the gate power supply voltage VRH does not affect the light emission control.

[0095] 4. Detailed Configuration Example When a P-Type Transistor is Used as a Switching Element

[0096] Fig.13 Detailed configuration example of the light source device 200 when the switch element 11 is a P-type transistor. Fig.13 In, omitted Figure 2 Part of the structural elements shown, but these structural elements are not Figure 2 The following is the same as Figure 2 or Figure 7 The different parts are explained.

[0097] In the light source circuit 10, a node connected to the cathode of the light emitting element 15 is referred to as a node NS. The source of the P-type transistor as the switching element 11 is connected to the node NS, and the drain is connected to the first node N1.

[0098] The integrated circuit device 100 includes a terminal TVRH instead of the terminal TVRL, and includes a regulator 133 instead of the regulator 131. The terminal TVRH is connected to the node NS in a non-AC coupling manner, and the source voltage of the switching element 11 is input to the terminal TVRH. The buffer amplifier circuit 144 buffers the source voltage of the switching element 11 and outputs the buffered voltage as the source power supply voltage VRH' to the regulator 133. The regulator 133 uses the source power supply voltage VRH' and the input power supply voltage VIN to generate a gate power supply voltage VRL' that is lower than the source power supply voltage VRH' by a predetermined voltage.

[0099] The level shifter 143 receives the PWM signal DCS', generates a signal whose high level is the power supply voltage VDR and whose low level is the ground voltage GND, and level-shifts the signal into an output signal LSQ whose high level is the source power supply voltage VRH' and whose low level is the gate power supply voltage VRL'. The driver circuit 141 operates using the gate power supply voltage VRL' and the source power supply voltage VRH' as power supplies. The driver circuit 141 buffers the output signal LSQ and outputs the buffered drive signal GTA to the gate of the switching element 11 via the terminal TGTA.

[0100] In addition, similarly to the first detailed configuration example, the second detailed configuration example, or the fourth detailed configuration example, the driver circuit 141 may be omitted, or the pump driver circuit 142 and the capacitor 18 may be omitted, or the buffer amplifier circuit 144 may be omitted.

[0101] Fig.14 2 is a detailed configuration example of the regulator 133. The regulator 133 includes a current source circuit IBD, a Zener diode DID, a resistor RD1, a resistor RD2, and a P-type transistor NTD.

[0102] The current source circuit IBD is provided between the anode of the Zener diode DID and the ground node. The cathode of the Zener diode DID is connected to the node of the source power supply voltage VRH'. The current source circuit IBD allows current to flow from the cathode of the Zener diode DID to the anode, thereby the anode of the Zener diode DID becomes a voltage lower than the source power supply voltage VRH' by the Zener voltage.

[0103] Resistors RD1 and RD2 are connected in series between the cathode and anode of the Zener diode DID. The drain of the P-type transistor NTD is connected to the ground node, and the gate is connected to the node between the resistors RD1 and RD2. Resistors RD1 and RD2 divide the voltage between the anode voltage of the Zener diode DID and the source power supply voltage VRH', and the divided voltage is input to the gate of the P-type transistor NTD. As a result, the source voltage of the P-type transistor NTD becomes a voltage that is higher than the divided voltage by the threshold voltage of the P-type transistor NTD, and the voltage is output as the gate power supply voltage VRL'. The voltage division ratio of the resistors RD1 and RD2 is set so that the divided voltage becomes close to the voltage obtained by subtracting the specified voltage and the threshold voltage from the source power supply voltage VRH'. As a result, the gate power supply voltage VRL' becomes a voltage that is lower than the source power supply voltage VRH' by a specified voltage.

[0104] The integrated circuit device of the present embodiment described above controls the switching element. The switching element is arranged in series with the light-emitting element on the cathode side of the light-emitting element between the power supply node and one end of the inductor. The integrated circuit device includes a drive circuit and a regulator. The drive circuit outputs a drive signal to the switch element, turns on the switch element by making the drive signal valid, and turns off the switch element by making the drive signal invalid. The regulator is input with a source power supply voltage having the same potential as the source voltage of the transistor as the switch element, and generates a gate power supply voltage based on the source power supply voltage. The drive circuit has a level shifter, which performs level shifting on the PWM signal according to the gate power supply voltage and the source power supply voltage, and the drive circuit outputs a drive signal based on the output signal of the level shifter to the gate of the transistor.

[0105] According to this embodiment, the low level of the driving signal input to the gate of the switching element becomes the source power supply voltage, and the high level becomes the gate power supply voltage based on the source power supply voltage. Thus, even if the driving signal is input to the gate of the switching element in a manner not to perform AC coupling, the switching element can be properly controlled to be turned on or off. That is, there is no need to provide an external component for properly controlling the switching element to be turned on or off, so it is possible to achieve both reduction of external components and proper control of the switching element.

[0106] In addition, in this embodiment, the driving circuit may include a driver circuit. The driver circuit may buffer the output signal of the level shifter and output the driving signal.

[0107] According to this embodiment, the driver circuit buffers the output signal of the level shifter, thereby being able to drive the gate of the switching element with a driving force higher than the driving force of the level shifter.

[0108] In the present embodiment, the drive circuit may include a pump driver circuit. The pump driver circuit may output a pump drive signal obtained by buffering the PWM signal to the other end of a capacitor connected to the gate of the transistor.

[0109] According to this embodiment, the pump driver circuit can pump the gate of the switching element via the capacitor, thereby causing the gate voltage waveform of the switching element to change rapidly compared to a case where the gate of the switching element is driven by a level shifter or a driver circuit without providing a pump driver circuit.

[0110] In addition, in this embodiment, when the regulator is set as the first regulator, the integrated circuit device may include a second regulator. The second regulator may also generate a power supply voltage lower than the source power supply voltage based on the ground voltage. The pump driver circuit may also output a pump drive signal to the other end of the capacitor based on the power supply voltage and the ground voltage.

[0111] According to this embodiment, since the pump drive signal is AC-coupled by the capacitor, the pump driver circuit can operate by a power supply system based on the ground voltage. Since the voltage of the drive signal is a relatively high voltage, when considering failure or damage caused by, for example, a short circuit, it is preferred that the driving force of the drive signal is low. In this regard, by providing a pump driver that operates at a relatively low voltage, the driving force of the drive signal can be reduced.

[0112] Furthermore, in this embodiment, the driving circuit may include a resistor provided between the source and the gate of the transistor.

[0113] According to this embodiment, the gate of the switching element can be driven without AC coupling, so even if a resistor is provided between the source and the gate of the switching element, the gate-source voltage of the switching element will not decrease. Thus, it is possible to achieve both reduction of external components of the light source circuit and proper control of the switching element.

[0114] In addition, in this embodiment, the driving circuit may include a buffer amplifier circuit. The buffer amplifier circuit may output a source power supply voltage obtained by buffering the source voltage to the regulator.

[0115] The consumption current associated with the gate power supply voltage flows from the regulator to the node of the source power supply voltage. According to this embodiment, the buffer amplifier circuit absorbs this current, so this current does not flow to the inductor of the light source circuit. Therefore, the consumption current associated with the gate power supply voltage does not affect the light emission control.

[0116] In addition, in this embodiment, the integrated circuit device may also include an analog dimming drive circuit. The analog dimming drive circuit may also output an analog dimming drive signal to the analog dimming switch element. The analog dimming switch element controls the current flowing from the other end of the inductor to the ground node. The analog dimming drive circuit may also turn on the analog dimming switch element by making the analog dimming drive signal valid during the period when the drive signal is valid, and turn off the analog dimming switch element by making the analog dimming drive signal invalid.

[0117] According to this embodiment, an analog dimming mode for dimming by switch adjustment control of an analog dimming driving circuit and a PWM dimming mode for dimming by PWM driving of a driving circuit can be realized. In the analog dimming mode, or when the on-duty ratio in the PWM dimming mode is long, the switching element is turned on for a long time, but according to this embodiment, the gate-source voltage of the switching element is not reduced, so it is possible to take into account both the reduction of external components of the light source circuit and the appropriate control of the switching element.

[0118] Furthermore, a light source device according to the present embodiment includes any one of the above-described integrated circuit devices, a light emitting element, a switching element, and an inductor.

[0119] In addition, the present embodiment is described in detail as described above, but those skilled in the art can easily understand that various modifications can be made without substantially departing from the new matters and effects of the present invention. Therefore, all such modifications are included in the scope of the present invention. For example, in the specification or the drawings, a term recorded at least once together with a different term in a broader sense or with the same meaning can be replaced with the different term at any position in the specification or the drawings. In addition, all combinations of the present embodiment and the modifications are also included in the scope of the present invention. In addition, the structure and operation of the integrated circuit device, the light source circuit, the light source device, etc. are not limited to the contents described in the present embodiment, and various modifications can be implemented.

Claims

1. An integrated circuit device, characterized in that: The integrated circuit device controls a switch element provided in series with the light emitting element on the cathode side of the light emitting element between a power supply node and one end of an inductor, and comprises: a drive circuit that outputs a drive signal to the switch element, turns on the switch element by making the drive signal effective, and turns off the switch element by making the drive signal ineffective; as well as a regulator which receives a source power supply voltage having the same potential as a source voltage of the transistor as the switching element and generates a gate power supply voltage based on the source power supply voltage; The drive circuit includes a level shifter that level-shifts a PWM signal according to the gate power supply voltage and the source power supply voltage, and outputs the drive signal based on an output signal of the level shifter to the gate of the transistor.

2. The integrated circuit device according to claim 1, wherein: The driving circuit includes a driver circuit that buffers the output signal of the level shifter and outputs the driving signal.

3. The integrated circuit device according to claim 1 or 2, characterized in that: The driving circuit includes a pumping driver circuit configured to output a pumping drive signal obtained by buffering the PWM signal to the other end of a capacitor having one end connected to the gate of the transistor.

4. The integrated circuit device according to claim 3, characterized in that When the regulator is a first regulator, the integrated circuit device includes a second regulator that generates a power supply voltage lower than the source power supply voltage with reference to a ground voltage. The pump driver circuit outputs the pump drive signal to the other end of the capacitor based on the power supply voltage and the ground voltage.

5. The integrated circuit device according to claim 1 or 2, characterized in that: The driving circuit includes a resistor disposed between a source and a gate of the transistor.

6. The integrated circuit device according to claim 1 or 2, characterized in that: The driving circuit includes a buffer amplifier circuit configured to output the source power supply voltage obtained by buffering the source voltage to the regulator.

7. The integrated circuit device according to claim 1 or 2, characterized in that: The integrated circuit device includes an analog dimming drive circuit, which outputs an analog dimming drive signal to an analog dimming switch element that controls the current flowing from the other end of the inductor to the ground node. During the period when the drive signal is valid, the analog dimming switch element is turned on by making the analog dimming drive signal valid, and the analog dimming switch element is turned off by making the analog dimming drive signal invalid.

8. A light source device, characterized in that: The light source device comprises: An integrated circuit device as claimed in any one of claims 1 to 7; The light emitting element; the switching element; and the inductor.

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