A semiconductor packaging method and packaging structure

Abstract

The present invention belongs to the field of semiconductor manufacturing technology, and specifically discloses a semiconductor packaging method and packaging structure. The method comprises the following steps: opening a plurality of blind holes and a plurality of through holes on a substrate; mounting a plurality of passive devices and a plurality of second chips on the bottom surface of the substrate; mounting a plurality of first chips, SAW filters and a plurality of passive devices on the top surface of the substrate, and installing an IDT functional area under each SAW filter; wrapping a layer of photosensitive material film above the top surface to form a cavity structure at the bottom of each SAW filter; removing the photosensitive material film on the through hole on the top surface to expose the through hole again; using a plastic sealing process to process the substrate, after the plastic sealing is completed, removing the fixed cover, and cutting into single products in sequence; performing metal plating on the top surface of each single product to form a metal coating. The present invention can shield the mutual interference between electromagnetic waves of different frequency bands and improve the working stability by performing a metal plating process on the surface of the plastic sealing body on the top surface of the substrate.

Description

Technical Field

[0001] The present invention belongs to the technical field of semiconductor device-power amplifier manufacturing, and in particular relates to a semiconductor packaging method and packaging structure. Background Art

[0002] The power amplifier (PA) is one of the most critical components of a mobile phone. It directly determines the distance, signal quality, and even standby time of the mobile phone's wireless communication. It is the most important part of the entire RF system except for the baseband. The number of power amplifiers in mobile phones has gradually increased with 2G, 3G, 4G, and 5G, and more and more power amplifier chips are required. Especially with the rapid development of 5G communication technology, people's demand for miniaturized and integrated power amplifiers is also increasing; in terms of RF, because 5G focuses on high-speed connections, it needs to be compatible with more frequency bands.

[0003] In the prior art, the most common method is to fix the chip and passive devices (inductors, capacitors, etc.) on the packaging substrate and realize electrical connection by bonding RDL (Re-distributed layer) wiring. However, the packaging method of mounting chips and components on one side of the substrate has low integration, and the overall module packaging size is large, which cannot meet the chip miniaturization requirements. Alternatively, the conventional double-sided packaging process can increase the use space of the chip, but the complexity of the plastic packaging process and the investment cost of the plastic packaging mold will increase exponentially. Alternatively, the filter is additionally packaged as an independent device and then connected to the PA chip, which will also lead to high processing costs and cumbersome packaging processes. Alternatively, the integration of passive devices on an organic substrate will cause mismatching of thermal expansion coefficients between materials and accelerate the failure of product performance. In addition, since the mechanical structure of the surface acoustic wave filter (SAW Filter) is very fragile and the interdigital transducer (IDT) functional area is very sensitive, static electricity, dust and moisture contact will damage the chip performance, and the conventional way of integrating the filter with passive devices is not suitable for surface acoustic wave filters. At the same time, when multiple PA chips are integrated into one package, the mutual interference between signals in different frequency bands will also reduce the signal transmission performance. Summary of the invention

[0004] The purpose of the present invention is to provide a semiconductor packaging method and packaging structure, which is used to carry multiple different filter components and can directly mount more capacitors and inductors, so that the module packaging size can become smaller, while ensuring the signal strength and improving the durability of the surface acoustic wave filter.

[0005] To achieve the above object, the present invention adopts the following technical solutions:

[0006] In a first aspect, a semiconductor packaging method comprises the following steps:

[0007] A plurality of blind holes and a plurality of through holes are provided on the substrate;

[0008] Mounting a plurality of passive components and a plurality of second chips on the bottom surface of the substrate;

[0009] A plurality of first chips, SAW filters and a plurality of passive components are mounted on the top surface of the substrate, and an IDT functional area is arranged under each SAW filter;

[0010] A layer of photosensitive material film is wrapped above the top surface of the substrate to form a cavity structure at the bottom of each SAW filter;

[0011] Removing the photosensitive material film on the top surface through hole to expose the through hole again;

[0012] The substrate is processed by plastic encapsulation process, and after the plastic encapsulation is completed, it is cut into individual products;

[0013] A metal coating is performed on the top surface of each single product to form a metal coating.

[0014] A further improvement of the present invention is that the blind holes are arranged on the top and bottom surfaces of the substrate for placing the first chip, the second chip or the SAW filter, and the through holes are arranged on the edge positions on both sides of the substrate for allowing the molding material to overflow on both sides of the substrate when the substrate is processed by the molding process.

[0015] A further improvement of the present invention is that the fixing cover is U-shaped, the bottom surface is horizontal, and the width of both sides is the same as that of the base.

[0016] A further improvement of the present invention is that the photosensitive material film is installed by a vacuum lamination coating process.

[0017] A further improvement of the present invention is that the photosensitive material film is made of polyimide.

[0018] A further improvement of the present invention is that when mounting components on the top surface of the substrate, a fixing cover is first installed below the bottom surface of the substrate.

[0019] A further improvement of the present invention is that a PVD metal coating process is used when metal coating is performed on the top surface of a single product.

[0020] A further improvement of the present invention is that the metal coating is stainless steel, aluminum or copper.

[0021] A further improvement of the present invention is that the substrate is a low temperature co-fired ceramic plate.

[0022] In the second aspect, a semiconductor packaging structure includes a substrate, a plurality of through holes are provided on both sides of the substrate, a plurality of blind holes are provided on the top and bottom surfaces of the substrate, a plurality of second chips and passive devices are provided on the bottom surface of the substrate, a plurality of first chips, passive devices and SAW filters are provided on the top surface of the substrate, and an IDT functional area is provided under each SAW filter; a layer of photosensitive material film is wrapped above the top surface, a cavity is provided under each IDT functional area, the substrate is wrapped in a plastic packaging material, and a metal plating layer is provided above the top surface of the substrate.

[0023] Compared with the prior art, the present invention has at least the following beneficial effects:

[0024] The present invention can integrate more chips by mounting the first chip, the second chip and components on both sides of the substrate, and the overall module package size becomes smaller;

[0025] The present invention adopts a double-sided packaging process of one-time plastic packaging operation, which reduces the complexity of the plastic packaging process and the investment cost of the plastic packaging mold;

[0026] The present invention directly connects the passive device and the SAW filter with the chip on both sides of the ceramic substrate, which simplifies the packaging process and reduces the mismatch of thermal expansion coefficients between materials.

[0027] The present invention designs a cavity structure for packaging of a SAW filter, thereby protecting a chip functional area from external interference.

[0028] The present invention can shield mutual interference between electromagnetic waves of different frequency bands and improve working stability by performing a metal plating process on the surface of the plastic package body on the top surface of the substrate. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] The accompanying drawings constituting a part of the present invention are used to provide a further understanding of the present invention. The exemplary embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute an improper limitation of the present invention. In the accompanying drawings:

[0030] Figure 1 A flowchart of a semiconductor packaging method of the present invention;

[0031] Figure 2 A top view of a semiconductor packaging structure of the present invention;

[0032] Figure 3 It is an AA cross-sectional view of a semiconductor packaging structure of the present invention;

[0033] Figure 4 A schematic diagram of a substrate structure of a semiconductor packaging structure of the present invention;

[0034] Figure 5A schematic diagram of the fixed cover position structure in a semiconductor packaging method of the present invention;

[0035] Figure 6 It is a schematic structural diagram of a semiconductor packaging method of the present invention when wrapping a photosensitive material film;

[0036] Figure 7 It is a structural schematic diagram of a semiconductor packaging method of the present invention when a substrate is subjected to a plastic packaging process.

[0037] In the figure: 1. first chip; 2. SAW filter; 3. through hole; 4. passive device; 5. substrate; 6. IDT functional area; 7. photosensitive material film; 8. blind hole; 9. cavity; 10. solder joint; 11. solder wire; 12. metal plating; 13. plastic packaging material; 14. fixing cover; 15. second chip. DETAILED DESCRIPTION

[0038] The present invention will be described in detail below with reference to the accompanying drawings and in combination with embodiments. It should be noted that the embodiments and features in the embodiments of the present invention can be combined with each other without conflict.

[0039] The following detailed description is an exemplary description, which is intended to provide further detailed description of the present invention. Unless otherwise specified, all technical terms used in the present invention have the same meaning as those generally understood by those skilled in the art to which the present invention belongs. The terms used in the present invention are only for describing specific embodiments, and are not intended to limit the exemplary embodiments according to the present invention.

[0040] Example 1

[0041] like Figure 1-3 As shown, a semiconductor packaging method includes the following steps:

[0042] A plurality of blind holes 8 and a plurality of through holes 3 are provided on the substrate 5;

[0043] A plurality of passive components 4 and a plurality of second chips 15 are mounted on the bottom surface of the substrate 5, and a fixing cover 14 is installed on the lower side of the substrate 5;

[0044] A plurality of first chips 1, SAW filters 2 and a plurality of passive components 4 are mounted on the top surface of the substrate 5, and an IDT functional area 6 is provided under each SAW filter 2;

[0045] A layer of photosensitive material film 7 is wrapped above the top surface, so that a cavity 9 structure is formed at the bottom of each SAW filter 2;

[0046] Removing the photosensitive material film 7 on the top surface through hole 3 to expose the through hole 3 again;

[0047] The substrate 5 is processed by a plastic encapsulation process. After the plastic encapsulation is completed, the fixed cover 14 is removed and the substrate 5 is cut into individual products.

[0048] Metal plating is performed on the top surface of each single product to form a metal plating layer 12 .

[0049] The substrate is low temperature co-fired ceramic (LTCC for short).

[0050] like Figure 4 As shown, blind holes 8 are arranged on the top and bottom surfaces of the substrate for placing the first chip 1, the second chip 15 or the SAW filter 2, and through holes 3 are arranged on the edge positions on both sides of the substrate 5, so that the plastic encapsulation material 13 overflows on both sides of the substrate 5 when the substrate 5 is processed by the plastic encapsulation process, thereby performing one-time molding and improving efficiency.

[0051] like Figure 5 As shown, the fixed cover 14 is U-shaped, with a horizontal bottom surface and the same width on both sides as the base 5. The fixed cover 14 is a metal cover, and the base 5 is fixed to the processing device through the fixed cover 14 to ensure that it is flat when processing the other side, so as to avoid the second chip 15 on the bottom surface causing the top surface to be processed, resulting in the inability to continue the operation due to the failure of vacuum adsorption of the base on the equipment platform.

[0052] The circuit among the SAW filter 2, the first chip 1, the second chip 15 and the passive device 4 is completed by a WB (wirebonding) process or a FC (Flip chip) process.

[0053] like Figure 6 As shown, after mounting the first chip 1, SAW filter 2 and passive device 4 on the top surface of substrate 5, a vacuum lamination process is used to coat the photosensitive material on the top surface and at the same time, the photosensitive material film 7 is evacuated. The photosensitive material is polyimide (PI), so that a cavity 9 structure is formed at the bottom of SAW filter 2;

[0054] The photosensitive material film 7 on the top surface of the through hole 3 is removed by photolithography and etching process.

[0055] like Figure 7 As shown, a plastic encapsulation process is adopted to directly form the two sides of the base 5 at one time. After completion, the fixing cover 14 is peeled off and the products are cut into individual products.

[0056] like Figure 2 As shown, a PVD metal coating process is used to form a metal coating layer 12 on the top surface of a single product. The metal coating layer 12 has a good electromagnetic shielding effect on filters in lower frequency bands.

[0057] The metal coating 12 is made of a metal that is not easily oxidized. To save costs, a stainless steel layer, an aluminum layer or a copper layer is often used.

[0058] The capacitor and inductor are fixed on the substrate 5 through the bonding wires 11 , the first chip 1 and the second chip 15 are fixed on the substrate 5 through the bonding wires 11 or the welding points 10 , and the SAW filter 2 is fixed on the substrate 5 through the welding points 10 .

[0059] Example 2

[0060] like Figure 2-7 As shown, a semiconductor packaging structure includes a substrate 5, a plurality of through holes 3 are provided on both sides of the substrate 5, a plurality of blind holes 8 are provided on the top and bottom surfaces of the substrate 5, a plurality of second chips 15 and passive devices 4 are provided on the bottom surface of the substrate 5, a plurality of first chips 1, passive devices 4 and SAW filters 2 are provided on the top surface of the substrate 5, and an IDT functional area 6 is provided below each SAW filter 2; a layer of photosensitive material film 7 is wrapped above the top surface, a cavity 9 is provided below each IDT functional area 6, the substrate 5 is wrapped in a plastic packaging material 13, and a metal plating layer 12 is provided above the top surface of the substrate 5.

[0061] It is known from common technical knowledge that the present invention can be implemented by other embodiments that do not deviate from its spirit or essential features. Therefore, the above disclosed embodiments are only illustrative in all respects and are not exclusive. All changes within the scope of the present invention or within the scope equivalent to the present invention are included in the present invention.

[0062] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention rather than to limit it. Although the present invention has been described in detail with reference to the above embodiments, ordinary technicians in the relevant field should understand that the specific implementation methods of the present invention can still be modified or replaced by equivalents. Any modification or equivalent replacement that does not depart from the spirit and scope of the present invention should be covered within the scope of protection of the claims of the present invention.

Claims

1. A semiconductor packaging method, characterized in that: The following steps are involved: A plurality of blind holes (8) and a plurality of through holes (3) are provided on the substrate (5); Mounting a plurality of passive components (4) and a plurality of second chips (15) on the bottom surface of the substrate (5); A plurality of first chips (1), SAW filters (2) and a plurality of passive components (4) are mounted on the top surface of a substrate (5), and an IDT functional area (6) is provided below each SAW filter (2); A layer of photosensitive material film (7) is wrapped above the top surface of the substrate (5) so that a cavity (9) structure is formed at the bottom of each SAW filter (2); Removing the photosensitive material film (7) on the top surface through hole (3) to expose the through hole (3) again; The substrate (5) is processed by a plastic encapsulation process, and after the plastic encapsulation is completed, it is cut into individual products; Metal coating is performed on the top surface of each single product to form a metal coating layer (12).

2. A semiconductor packaging method according to claim 1, characterized in that: When mounting components on the top surface of the base (5), a fixing cover (14) is first installed below the bottom surface of the base (5).

3. A semiconductor packaging method according to claim 1, characterized in that: The blind holes (8) are arranged on the top and bottom surfaces of the substrate (5) for placing the first chip (1), the second chip (15) or the SAW filter (2); the through holes (3) are arranged on the edge positions of both sides of the substrate (5) for allowing the plastic encapsulation material (13) to overflow on both sides of the substrate (5) when the substrate (5) is processed by a plastic encapsulation process.

4. A semiconductor packaging method according to claim 2, characterized in that: The fixed cover (14) is U-shaped, with a horizontal bottom surface and two sides having the same width as the base (5).

5. The semiconductor packaging method according to claim 1, characterized in that: The photosensitive material film (7) is installed by using a vacuum lamination coating process.

6. The semiconductor packaging method according to claim 1, characterized in that: The photosensitive material film (7) is made of polyimide.

7. A semiconductor packaging method according to claim 1, characterized in that: The PVD metal coating process is used to perform metal coating on the top surface of a single product.

8. The semiconductor packaging method according to claim 1, characterized in that: The metal coating (12) is stainless steel, aluminum or copper.

9. The semiconductor packaging method according to claim 1, characterized in that: The substrate (5) is made by a low temperature co-fired ceramic process.

10. A semiconductor packaging structure, based on a semiconductor packaging method according to any one of claims 1 to 9, characterized in that: The invention comprises a substrate (5), wherein a plurality of through holes (3) are provided on both sides of the substrate (5), a plurality of blind holes (8) are provided on the top and bottom surfaces of the substrate (5), a plurality of second chips (15) and passive components (4) are provided on the bottom surface of the substrate (5), a plurality of first chips (1), passive components (4) and SAW filters (2) are provided on the top surface of the substrate (5), and an IDT functional area (6) is provided below each SAW filter (2); a layer of light-sensitive material film (7) is wrapped above the top surface, a cavity (9) is provided below each IDT functional area (6), the substrate (5) is wrapped in a plastic packaging material (13), and a metal plating layer (12) is provided above the top surface of the substrate (5).

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