A multi-channel PTP timestamp extraction method and system

By detecting the maximum delay channel and performing frame positioning and bit sliding data compensation, the problem of low time stamp accuracy in multi-channel transmission is solved, and high-precision PTP time stamp extraction is realized, suitable for FlexE, FlexO, Ethernet and other interfaces.

CN114826471BActive Publication Date: 2025-07-11FIBERHOME TELECOMMUNICATION TECHNOLOGIES CO LTD +1
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Patent Information

Application Number
CN202210391713.X
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-04-14
Publication Date
2025-07-11
Estimated Expiration
2042-04-14

AI Technical Summary

Technical Problem

In multi-channel transmission, the prior art is difficult to meet the requirements of 5G high-precision PTP timestamp extraction. The traditional method introduces time stamp jitter and consumes a lot of resources, and the judgment accuracy is poor when multiple channels are delayed.

Method used

By detecting the maximum delay channel among multiple channels and performing frame positioning, recording bit sliding data, calculating PTP timestamp compensation value, directly obtaining the PTP timestamp value of each channel, eliminating the phase difference, and improving the time stamp recovery accuracy.

Benefits of technology

It realizes high-precision extraction of time stamps in multi-channel transmission, saves logical resources, has strong versatility and scalability, and is suitable for high-speed multi-channel interfaces such as FlexE, FlexO, and Ethernet.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present invention discloses a multi-channel PTP timestamp extraction method and system. The method includes: writing the data of each channel into its corresponding phase correction FIFO, performing frame positioning on each channel respectively, recording the frame positioning signals and bit slip data of each channel during the frame positioning process, and obtaining the PTP timestamp compensation value of the bit slip data of each channel; selecting a starting channel among the channels, recording the arrival order of the frame positioning signals of each channel from the starting channel, and selecting the channel corresponding to the last occurrence of the frame positioning signal as the maximum delay channel; extracting the PTP timestamp value of the maximum delay channel, and adding the PTP timestamp compensation value of the bit slip data of the maximum delay channel to the PTP timestamp value of the maximum delay channel to obtain the PTP timestamp extraction value of each channel. By performing corresponding timestamp compensation for the framed bit slip on the extracted channel timestamps, the channel timestamp recovery accuracy is improved.
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Description

Technical Field

[0001] The present invention belongs to the field of network communication technologies, and more specifically, relates to a multi-channel PTP timestamp extraction method and system. Background Art

[0002] The SPN / MTN / OTN / OSU bearer interfaces of 5G are all required to support the Precision Time Protocol (PTP). With the continuous increase in line rate, the interface bandwidth that needs to support PTP is also getting higher and higher. The interface rate of the previous lane is no longer sufficient to support the deployment of PTP protocol functions, and it is necessary to deploy PTP protocol functions on ports with multiple channels. When using PTP packets to measure the delay between two network nodes on ports with multiple channels, for the sending direction, the PTP protocol requires that multiple channels of the same port must be aligned for sending, that is, the timestamp values of multiple PTP packets sent in the same beat of multiple channels of the same port are the same. In the receiving direction, due to the influence of the transmission environment, it is impossible to ensure that the delays of multiple channels are the same. It is necessary to compensate and align the timestamp values of PTP packets received by multiple channels to the same reference channel. The reference channel defined by the current protocol is the channel with the maximum delay.

[0003] Traditional PTP timestamp extraction is generally performed at the framer framing layer or the data link layer. Due to the influence of the cache and correction circuit, large timestamp jitters will be introduced, which cannot meet the requirements of 5G high-precision PTP timestamp extraction.

[0004] The traditional method for determining the channel with the maximum delay is to use software or hardware methods to compare the waterline values of the correction FIFOs between channels. It is necessary to store the waterline values and report them to the UPI, resulting in poor real-time performance and high resource consumption. And due to the certain jitter of the waterline values, when the delays of multiple channels are close, there are problems with the judgment accuracy.

[0005] In view of this, overcoming the defects of the existing technology is an urgent problem to be solved in this technical field. Summary of the Invention

[0006] Aiming at the above defects or improvement requirements of the existing technology, the present invention provides a method and system for detecting the channel with the maximum delay at the physical layer. The purpose is to detect the channel with the maximum delay and the bit-sliding data generated by frame positioning among multiple channels, add the PTP timestamp compensation value of the bit-sliding data framed by the channel with the maximum delay to the PTP timestamp value of the channel with the maximum delay, and obtain the PTP timestamp values of each channel, thereby solving the technical problem of low timestamp accuracy extraction in multi-channel transmission of high-speed interfaces at present.

[0007] To achieve the above object, according to one aspect of the present invention, there is provided a multi-channel PTP timestamp extraction method, including: writing the data of each channel into the corresponding phase correction FIFO respectively, performing frame positioning on each channel separately, recording the frame positioning signals and bit slip data of each channel during the frame positioning process, and obtaining the PTP timestamp compensation value of the bit slip data of each channel; selecting the starting channel among the channels, recording the arrival order of the frame positioning signals of each channel from the starting channel, and selecting the channel corresponding to the last occurrence of the frame positioning signal as the maximum delay channel; extracting the PTP timestamp value of the maximum delay channel, and adding the PTP timestamp compensation value of the bit slip data of the maximum delay channel to the PTP timestamp value of the maximum delay channel to obtain the PTP timestamp extraction value of each channel.

[0008] Preferably, the method of writing the data of each channel into the corresponding phase correction FIFO respectively includes: initializing the read-write addresses of the FIFOs of each channel; starting the write operation of each channel on the write side of the FIFO of each channel; presetting a read control threshold on the read side of the FIFO of each channel, and if the difference between the read-write addresses of the FIFOs in each channel is greater than or equal to the read control threshold at the same time, starting the read operation of each channel, otherwise stopping the read operation of each channel.

[0009] Preferably, the method of performing frame positioning on each channel separately and recording the bit slip data of each channel during the frame positioning process to obtain the PTP timestamp compensation value of the bit slip data of each channel includes: marking the position of the frame positioning signal during the frame positioning process; recording the bit slip data generated by each channel during the frame positioning process, and the bit slip data is the difference between the position of the frame positioning signal and the highest bit position.

[0010] Preferably, the method of selecting the starting channel among the channels includes: setting a delay threshold according to the configured frame period of the multi-channel; after the frame positioning signals of each channel appear in two adjacent frame periods, judging whether the distance between the frame positioning signal that appears last in the first frame period and the frame positioning signal that appears first in the second frame period exceeds the delay threshold, and if it exceeds the delay threshold, the channel corresponding to the frame positioning signal that appears first in the second frame period is used as the starting channel among the channels.

[0011] Preferably, the order in which the frame positioning signals of the respective channels arrive is recorded sequentially from the starting channel, and the channel corresponding to the last occurrence of the frame positioning signal is selected as the maximum delay channel. The specific method includes: allocating arrival signals to the frame positioning signals of the respective channels, querying whether the arrival signals of the respective channels appear and recording the order; after the arrival signals of all the channels appear, selecting the channel corresponding to the last occurrence of the arrival signal as the maximum delay channel.

[0012] Preferably, frame positioning is performed on each channel separately, and during the frame positioning process, the bit slip data of each channel is recorded to obtain the PTP timestamp compensation value of the bit slip data of each channel. The specific method includes: calculating the single-bit PTP timestamp value according to the channel rate configured for the multi-channel, and multiplying the bit slip data of each channel by the single-bit PTP timestamp value to obtain the PTP timestamp compensation value of the bit slip data of each channel.

[0013] Preferably, after the PTP timestamp extraction values of each channel, the method includes: the PTP timestamp extraction values of each channel are used to calculate the master-slave time difference on the transmission master-slave line, and the local time is adjusted using the master-slave time difference, so that the device times of all devices maintain the same frequency and phase as the master device time.

[0014] According to another aspect of the present invention, there is provided a multi-channel PTP timestamp extraction system, including: a channel phase difference elimination module, which writes the data of each channel into the respective corresponding phase correction FIFO, and at the same time reads out each channel. The channel phase difference elimination module is used to eliminate the phase differences of each channel; a channel frame positioning detection module, which sequentially inputs each channel into the channel frame positioning detection module for frame positioning to obtain the frame positioning signals of each channel, and at the same time records the bit slip data of each channel. The channel frame positioning detection module is used to calculate the PTP timestamp compensation value of each channel with respect to the bit slip data; a starting channel detection module, which sets a delay threshold according to the configured frame period of the multi-channel, and determines the starting channel of each channel by judging whether the distance between the frame positioning signals of adjacent frame periods exceeds the delay threshold; a maximum delay channel detection module, which starts from the starting channel, sequentially queries the order in which the frame positioning signals of each channel appear, and selects the channel corresponding to the last occurrence of the arrival signal as the maximum delay channel; a channel timestamp extraction module, which extracts the PTP timestamp value of the maximum delay channel according to the maximum delay channel, and at the same time gives corresponding timestamp compensation to the bit slip generated during the frame positioning of each channel, improving the timestamp recovery accuracy of each channel.

[0015] Preferably, the maximum delay channel detection module assigns arrival signals to the frame positioning signals of each channel, queries whether the arrival signals of each channel appear and records the order; after the arrival signals of each channel appear, the channel corresponding to the last appearance of the arrival signal is selected as the maximum delay channel.

[0016] Preferably, the channel timestamp extraction module calculates the single-bit PTP timestamp value according to the configured channel rate of the multi-channel, multiplies the bit-sliding data of each channel obtained in the channel frame positioning detection module by the single-bit PTP timestamp value to obtain the PTP timestamp compensation value of the bit-sliding data of each channel; adds the PTP timestamp compensation value of the bit-sliding data of the maximum delay channel to the PTP timestamp value of the maximum delay channel to obtain the PTP timestamp extraction value of each channel.

[0017] Generally speaking, compared with the prior art, the above technical solution conceived by the present invention has the following beneficial effects:

[0018] 1. By performing corresponding timestamp compensation for the framed bit-sliding of the extracted channel timestamps, the accuracy of channel timestamp recovery is improved.

[0019] 2. By adopting this method, there is no need to judge the channel delay value by comparing the absolute value of the FIFO storage waterline as in the traditional method. The maximum delay channel can be directly obtained according to the state of the channel fp, effectively saving logic resources, having strong versatility and practicability, without comparing the waterline value, realizing less resources, simplicity and reliability.

[0020] 3. It has strong scalability. In principle, there is no limit to the number of channels and it can be widely applied to high-speed multi-channel interfaces such as FlexE, FlexO, and Ethernet. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figure 1 is a flowchart of a multi-channel PTP timestamp extraction method provided in the first embodiment;

[0022] Figure 2 is a schematic diagram of selecting the starting channel among each channel provided in the first embodiment;

[0023] Figure 3 is a schematic diagram of selecting the maximum delay channel among each channel provided in the first embodiment;

[0024] Figure 4 is a schematic diagram of calculating the PTP timestamp extraction value of each channel provided in the first embodiment;

[0025] Figure 5 is a schematic diagram of a multi-channel PTP timestamp extraction system provided in the second embodiment. Detailed implementation manners

[0026] In order to make the objectives, technical solutions and advantages of the present invention more clear and understandable, the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention, and are not used to limit the present invention. In addition, the technical features involved in the various embodiments of the present invention described below can be combined with each other as long as they do not conflict with each other.

[0027] In the description of the present invention, the orientation or positional relationship indicated by the terms "inner", "outer", "longitudinal", "transverse", "upper", "lower", "top", "bottom", etc. is based on the orientation or positional relationship shown in the accompanying drawings, and is only for the convenience of describing the present invention rather than requiring the present invention to be constructed and operated in a specific orientation. Therefore, it should not be construed as a limitation to the present invention.

[0028] In the present invention, unless otherwise clearly specified and limited, the first feature being "above" or "below" the second feature may include the first and second features being in direct contact, or may include the first and second features not being in direct contact but being in contact through additional features therebetween. Moreover, the first feature being "above", "over" and "on" the second feature includes the first feature being directly above and obliquely above the second feature, or simply indicating that the first feature has a higher horizontal height than the second feature. The first feature being "below", "under" and "beneath" the second feature includes the first feature being directly below and obliquely below the second feature, or simply indicating that the first feature has a lower horizontal height than the second feature.

[0029] Embodiment 1:

[0030] Embodiment 1 of the present invention provides a multi-channel PTP timestamp extraction method, which can detect the channel with the maximum delay in the FlexE, FlexO, OTN, and PCS multi-channel interface layers, and based on the timestamp value of this channel and the PTP timestamp compensation value of the bit slip data of the maximum delay channel, recover the PTP timestamp values of each channel of the interface, meeting the high-precision requirements of multi-channel transmission timestamps. The present invention does not limit the number of channels, has strong versatility, a simple and reliable structure, and requires few resources.

[0031] Embodiment 1 of the present invention provides a multi-channel PTP timestamp extraction method, as Figure 1 shown, the method includes:

[0032] S101: Write the data of each channel into the respective phase correction FIFOs, perform frame positioning on each channel respectively, and record the frame positioning signals and bit slip data of each channel during the frame positioning process to obtain the PTP timestamp compensation values of the bit slip data of each channel.

[0033] When using the First Input First Output (FIFO) queues corresponding to each channel, at the FIFO read side, a read control threshold is preset. If the difference between the read and write addresses of the FIFOs in each channel is greater than or equal to the read control threshold simultaneously, the read operations of each channel are started; otherwise, the read operations of each channel are stopped. The signals output from the FIFO read side are output simultaneously, and the data envelopes of each channel are kept consistent to eliminate the phase difference between multiple channels.

[0034] Since the frame alignment signals of the channels usually have bit slips in the current data beat of frame search, the frame alignment signal (fp) is not at the highest bit of the data bit width but at a certain position between the highest and lowest bits. Therefore, it is necessary to compensate for the bit-sliding data of the PTP timestamp value of the maximum delay channel in the later stage to improve the accuracy of the PTP timestamp values of multiple channels.

[0035] S102: Select the starting channel among the channels, record the order in which the frame alignment signals of the channels arrive starting from the starting channel, and select the channel corresponding to the last occurrence of the frame alignment signal as the maximum delay channel.

[0036] Due to the randomness of the starting points processed by each channel, it is first necessary to find the starting channel that appears earliest (the channel with the smallest delay). Calculate the effective delay of the frame alignment signal fp between adjacent channels in turn. When the delay distance of a certain fp exceeds half of the channel frame period, the fp of the next detected channel is the starting channel. Based on the starting channel, search and detect the channel with the maximum delay.

[0037] Allocate an indication status signal for the arrival of the frame alignment signal fp to each channel. When the fp of a certain channel is detected and searched, the corresponding indication status signal becomes valid (displayed as high level). Starting from the starting channel, record the valid indication status signals for the arrival of the fp at the channels in turn. When the indication status signals of all channels are valid, it indicates that the frame alignment signals fp of all channels have appeared and been detected as valid. The channel corresponding to the last occurrence of the frame alignment signal is used as the maximum delay channel.

[0038] S103: Extract the PTP timestamp value of the maximum delay channel, add the PTP timestamp compensation value of the bit-sliding data of the maximum delay channel to the PTP timestamp value of the maximum delay channel to obtain the PTP timestamp extraction values of the channels.

[0039] In order to further improve the accuracy of timestamp extraction corresponding to the frame positioning signal fp of each channel, it is necessary to perform timestamp compensation for the bit sliding positioned by fp subsequently. For this purpose, the bit sliding data generated by frame synchronization of each channel needs to be saved for timestamp compensation. According to the detected maximum delay channel number, the timestamp value of the timestamp transmission channel corresponding to fp of this channel is extracted, and corresponding timestamp compensation is given based on the positioning bit sliding data of the maximum delay channel, the timestamp value of the corresponding channel is extracted, and timestamp compensation for the bit sliding of this channel is given to improve the recovery accuracy.

[0040] As Figure 4 shown, the channel data bit width is 16-bit, and the starting bit of the frame synchronization pattern of the channel is located at the 8th bit of the data stream. Figure 4 The upper half of Figure 4 is the 16-bit channel data of adjacent two beats, where the starting bit of the frame positioning pattern is located at the 8th bit position of the data of the left beat. It can be seen from Figure 4 that the bit sliding value of this channel is 7. After frame synchronization is completed, in order to shift the starting bit of the frame synchronization pattern to the highest bit of the channel data, it is necessary to splice these two beats of data, and then intercept 16-bit data starting from the starting bit of the frame synchronization pattern as the new channel data, and so on. Figure 4 The lower half of Figure 4 is the intercepted 16-bit channel data, and the frame synchronization starting bit is located at the highest bit of the data. Multiply the bit sliding data of each channel by the single-bit PTP timestamp value to obtain the PTP timestamp compensation value of the bit sliding data of each channel. For example, Figure 4 the PTP timestamp compensation value of the bit sliding data in

[0041] is 8 (bit sliding data) × single-bit PTP timestamp value. The reference timestamp TS0 is the in-channel timestamp corresponding to the highest bit of the input data. The reference timestamp does not consider the bit sliding during frame positioning. Then, the PTP timestamp extraction value of each channel after compensation for each channel = TS0 + 8 × single-bit PTP timestamp value.

[0041] In the first embodiment of the present invention, in order to eliminate the phase difference between multiple channels, in combination with the embodiments of the present invention, there is also a preferred implementation scheme. Specifically, writing the data of each channel into the respective phase deviation correction FIFOs corresponding to them, the specific method includes the following steps:

[0042] S201: Initialize the read / write addresses of the FIFOs of each channel.

[0043] Using the channel phase deviation correction FIFO, the initialized read / write addresses of the FIFO are both zero.

[0044] S202: Start the write operation of each channel on the write side of the FIFO of each channel.

[0045] On the FIFO write side, the data envelope of each channel serves as a write enable signal to initiate the write operations of multiple channels and control the writing of data of each channel into the corresponding RAM of the FIFO.

[0046] S203: Preset a read control threshold on the FIFO read side of each channel. If the difference between the FIFO read and write addresses in each channel is greater than or equal to the read control threshold simultaneously, initiate the read operations of each channel; otherwise, stop the read operations of each channel.

[0047] On the FIFO read side, set a read control threshold (such as a value of 2) that can be configured by a User Programmable Interface (UPI). When the difference between the FIFO read and write addresses of all channels is greater than or equal to the read control threshold, the FIFO read enable signals of all channels become valid simultaneously, and the FIFO read operations of all channels start.

[0048] If the difference between the FIFO read and write addresses of a certain channel is less than the read control threshold, the FIFO read enable signals of all channels become invalid, the FIFO read operations of all channels stop, and the output data of all channels remains unchanged. The FIFO read enable signal serves as the signal envelope for reading the channel data of the FIFO, and the output signal envelopes of all channel data are kept consistent, thereby eliminating the phase difference of multiple channels.

[0049] In the first embodiment of the present invention, in order to improve the accuracy of the PTP timestamp value of the physical interface on the receiving side of multiple channels and meet the high-precision requirements of timestamp transmission of multiple channels, in combination with the embodiments of the present invention, there is also a preferred implementation scheme. Specifically, as Figure 4 shown, perform frame alignment on each channel respectively, record the bit slip data of each channel during the frame alignment process, and obtain the PTP timestamp compensation value of the bit slip data of each channel. The specific method includes:

[0050] Mark the position of the frame alignment signal during the frame alignment process.

[0051] As Figure 4 shown, the starting bit position of the frame alignment pattern is at the 8th bit position of the data in the leftmost 1 beat.

[0052] On the receiving side, perform search and detection of frame alignment on each channel with consistent output signal envelopes respectively. In the stable frame area, the alarm signal disappears, and the frame alignment signals (fp) of each channel are obtained and marked respectively.

[0053] Record the bit slip data generated by each channel during the frame alignment process. The bit slip data is the difference between the position of the frame alignment signal and the most significant bit position.

[0054] Since the frame positioning signal of the channel usually has bit slips in the current data beat of frame search, the frame positioning signal (fp) is not at the highest bit of the data bit width, but at a position between the highest and lowest bits. The input channel timestamp is usually based on the highest bit of the data bit width. After recording the bit slip data generated by multiple channels during frame positioning, the bit slip data is added to the PTP timestamp value of the maximum delay channel to obtain the PTP timestamp value of multiple channels at the highest bit of the data. The bit slip data is used to compensate the PTP timestamp value of the maximum delay channel in the later stage to improve the accuracy of the PTP timestamp values of each channel.

[0055] In the first embodiment of the present invention, in order to eliminate the randomness of the starting points of multiple channels, combined with the embodiments of the present invention, there is also a preferred implementation solution. Specifically, the method for selecting the starting channel among the channels includes:

[0056] Set a delay threshold according to the configured frame period of the multiple channels.

[0057] Calculate in turn whether the delay distance between the frame positioning signals of adjacent channels exceeds the delay threshold of the channel frame period. The delay threshold is selected as half of the channel frame period. The channel service types are selected from FlexE, FlexO, OTN or PCS, and the service types of each channel are the same, and the configured frame period time lengths are also the same.

[0058] After the frame positioning signals of each channel appear in two adjacent frame periods, judge whether the distance between the last-appearing frame positioning signal in the first frame period and the first-appearing frame positioning signal in the second frame period exceeds the delay threshold. If it exceeds the delay threshold, the channel corresponding to the first-appearing frame positioning signal in the second frame period is used as the starting channel among the channels.

[0059] For example, at the receiving end, search for the starting path of the input multi-path, perform frame positioning search and detection on the input channels to obtain the frame positioning signals (fp) of each channel, set the delay threshold to half of the frame period. After the frame positioning signals of each channel appear in two adjacent frame periods, record whether the distance between the last-appearing frame positioning signal in the first frame period and the first-appearing frame positioning signal in the second frame period exceeds half of the frame period. If it exceeds half of the frame period, the channel corresponding to the first-appearing frame positioning signal in the second frame period is used as the starting channel among the channels.

[0060] Such as Figure 2As shown, fp0, fp1, fp2, and fp3 respectively represent four channels. The frame positioning signals (fp) of fp0, fp1, fp2, and fp3 are subjected to a logical OR operation to obtain the fp_or signal. Then, the effective delay within adjacent frame periods of the fp_or signal is calculated in sequence. When the delay distance of fp3 exceeds half of the channel frame period, the counting stops, and a detection flag (flag) is set. The flag is at a low level in the first frame period and at a high level in the second frame period. Within the first and second frame periods, the frame positioning signals of the four channels fp0, fp1, fp2, and fp3 all appear, and the time interval between the last-appearing frame positioning signal in the first frame period and the first-appearing frame positioning signal in the second frame period exceeds half of the frame period. Therefore, the first-occurring fp1 after the flag identification is the starting (minimum-delay) channel, that is, the channel (fp1) corresponding to the first-appearing frame positioning signal in the second frame period is selected as the starting channel among the channels.

[0061] In the first embodiment, in order to extract the PTP timestamps of multiple channels, in combination with the embodiments of the present invention, there is also a preferred implementation scheme. Specifically, as Figure 3 shown, the order in which the frame positioning signals of each channel arrive is recorded sequentially from the starting channel, and the channel corresponding to the last-appearing frame positioning signal is selected as the maximum-delay channel. The specific method includes:

[0062] Arrival signals are assigned to the frame positioning signals of each channel, and it is queried whether the arrival signals of each channel appear and the order is recorded.

[0063] An arrival signal of a frame positioning signal is assigned to each channel. When the arrival signal of any channel is detected or searched, it indicates that the arrival signal is valid.

[0064] After the arrival signals of each channel all appear, the channel corresponding to the last-appearing arrival signal is selected as the maximum-delay channel.

[0065] The order of the valid arrival signals of each channel is recorded sequentially. When the arrival signals of each channel are all valid, the channel corresponding to the last-appearing arrival signal is used as the maximum-delay channel.

[0066] As Figure 3As shown in the figure, fp_st0, fp_st1, fp_st2, and fp_st3 respectively represent the arrival indication signals corresponding to the four channels with channel numbers 0, 1, 2, and 3. After the arrival indication signals of the four channels fp_st0, fp_st1, fp_st2, and fp_st3 numbered fp0, fp1, fp2, and fp3 appear, fp_st0, fp_st1, fp_st2, and fp_st3 are adjusted from low level to high level. The fp_st signals of all channels are subjected to an AND (&) logical operation to obtain the st_and detection signal. When the st_and signal jumps from low level to high level, it indicates that the frame positioning signals of all channels have effectively arrived, and the order of the effective arrival signals of each channel is recorded in sequence. The fp2 corresponding to fp_st2 where the arrival signal appears last is used as the maximum delay channel. As Figure 3 shown, the fp2 signal that appears simultaneously at the high level position of the most_delay_ind signal indicates that the second channel is the maximum delay channel.

[0067] In the first embodiment of the present invention, in order to compensate for the bit slip timestamps of each channel, in combination with the embodiments of the present invention, there is also a preferred implementation scheme. Specifically, as Figure 4 shown, the frame positioning is performed on each channel respectively, and the bit slip data of each channel is recorded during the frame positioning process to obtain the PTP timestamp compensation value of the bit slip data of each channel. The specific method includes:

[0068] Calculate the single-bit PTP timestamp value according to the channel rate configured for the multi-channel, and multiply the bit slip data of each channel by the single-bit PTP timestamp value to obtain the PTP timestamp compensation value of the bit slip data of each channel.

[0069] For example Figure 4 the PTP timestamp compensation value of the bit slip data in = 8 (bit slip data) × single-bit PTP timestamp value. The reference timestamp TS0 is the associated timestamp corresponding to the highest bit of the input data. The reference timestamp does not consider the bit slip during frame positioning. Then the PTP timestamp extraction value of each channel after compensation for each channel = TS0 + 8 × single-bit PTP timestamp value.

[0070] In the first embodiment of the present invention, in combination with the embodiments of the present invention, there is also a preferred implementation scheme. Specifically, after the PTP timestamp extraction value of each channel, the method includes:

[0071] The PTP timestamp extraction value of each channel is used to calculate the master-slave time difference on the transmission master-slave line, and the local time is adjusted using the master-slave time difference, so that the time of each device is kept at the same frequency and phase as the time of the master device.

[0072] In the first embodiment, the PTP timestamp extraction values of each channel have high precision, solving the technical problem of low timestamp extraction precision in multi-channel transmission of high-speed interfaces. When adjusting the local time, the time of each device can maintain the same frequency and phase as the master device time, which is worthy of wide application and promotion.

[0073] Embodiment 2:

[0074] This second embodiment provides a multi-channel PTP timestamp extraction system, as Figure 5 shown. The system includes: a channel phase difference elimination module, a channel frame positioning detection module, a starting channel detection module, a maximum delay channel detection module, and a channel timestamp extraction module, where:

[0075] Channel phase difference elimination module: The channel phase difference elimination module writes the data of each channel into their respective corresponding phase correction FIFOs, and at the same time reads out the respective channels. The channel phase difference elimination module is used to eliminate the phase differences of each channel.

[0076] Channel frame positioning detection module: The channel frame positioning detection module sequentially inputs the respective channels into the channel frame positioning detection module for frame positioning to obtain the frame positioning signals of the respective channels, and at the same time records the bit slip data of the respective channels. The channel frame positioning detection module is used to calculate the PTP timestamp compensation values of the respective channels with respect to the bit slip data.

[0077] Starting channel detection module: The starting channel detection module sets a delay threshold according to the configured frame period of the multi-channel, and determines the starting channels of the respective channels by judging whether the distance between the frame positioning signals of adjacent frame periods exceeds the delay threshold.

[0078] Maximum delay channel detection module: The maximum delay channel detection module starts from the starting channel, sequentially queries the order in which the frame positioning signals of the respective channels appear, and selects the channel corresponding to the last arrival signal as the maximum delay channel.

[0079] Channel timestamp extraction module: The channel timestamp extraction module extracts the PTP timestamp value of the maximum delay channel according to the maximum delay channel, and at the same time gives corresponding timestamp compensation to the bit slips generated by the respective channels during frame positioning, improving the timestamp recovery precision of the respective channels.

[0080] The specific implementation steps of the multi-channel PTP timestamp extraction method are as follows:

[0081] Step 301: Power on the chip to ensure that the physical channels of all lines are correctly connected and the channel mode is correctly configured.

[0082] Step 302: In the channel differential elimination module, write the multi-channel data on the receiving side (such as FlexO) into their respective phase correction FIFOs. Then, the read side of the FIFO adopts a control method with a preset read control threshold. After meeting the read control threshold, the read side of the FIFO reads out all channels simultaneously. The depth of the FIFO is determined by the maximum envelope difference between channels. The channel data read from the phase correction FIFO has the same data packet envelope, eliminating the phase difference between multiple channels.

[0083] Step 303: In the channel frame positioning detection module, perform frame positioning search and detection on each channel in the multi-channel to obtain the frame positioning signal (fp) of each channel. The frame positioning signal (fp) serves as the reference positioning signal for subsequent channel delay comparison. At the same time, record the bit slip data generated by frame synchronization of each channel, which is convenient for compensation after extracting the multi-channel PTP timestamps.

[0084] Step 304: In the starting channel detection module, according to the limit condition that the maximum deviation of the line delay between adjacent channels does not exceed half of the channel frame length, determine the starting (minimum delay) channel of the multi-channel by calculating the delay deviation value between adjacent channels. The implementation process is as follows:

[0085] Sequentially calculate whether the delay distance between adjacent channel frame positioning signals exceeds the preset threshold of the multi-channel frame period, and the preset threshold is set to half of the channel frame period.

[0086] Perform frame positioning search and detection on the input channels to obtain the frame positioning signal (fp) of the current channel. As Figure 2 shown, fp0, fp1, fp2, and fp3 represent four channels respectively, with the same service type. Perform a logical OR operation on the frame positioning signals (fp) of fp0, fp1, fp2, and fp3 to obtain the fp_or signal. Then, sequentially calculate the effective delay between adjacent fps of the fp_or signal. When the delay distance of fp3 exceeds half of the channel frame period, stop counting and set a detection flag (flag). The first fp1 that appears after the flag is the starting (minimum delay) channel.

[0087] Step 305: In the maximum delay channel detection module, assign a fp arrival status signal (fp_st) to each channel, which is initially low. When the fp of a certain channel is detected, the corresponding fp_st signal is set to high level ('1'). During operation, starting from the starting channel, sequentially detect and record the positions of the fps of the channels that have arrived. At this time, the fp_st signals of the corresponding channels are high. By the high-level transition of the fp_st, query the channel number where the last arrival indication signal appears, which is the channel with the maximum delay.

[0088] Step 306: In the channel timestamp extraction module, extract the timestamps of the corresponding channels according to the maximum delay channel label, and at the same time give corresponding timestamp compensation to the bit slip generated by framing this channel to improve the timestamp recovery accuracy. The bit slip timestamp compensation is as Figure 4 shown.

[0089] It should be noted that steps 301 to 305 are all serial steps and are the main channel data stream steps.

[0090] In the second embodiment of the present invention, combined with the embodiments of the present invention, there is also a preferred implementation scheme. Specifically, as Figure 3 shown, the maximum delay channel detection module allocates arrival signals to the frame positioning signals of each channel, queries whether the arrival signals of each channel appear and records the order; after the arrival signals of each channel appear, select the channel corresponding to the last arrival signal as the maximum delay channel.

[0091] An arrival signal of a frame positioning signal is allocated to each channel respectively. When the arrival signal of any channel is detected or searched, it means that the arrival signal is valid.

[0092] Record the order of the valid arrival signals of each channel in sequence. When the arrival signals of all channels are valid, the channel corresponding to the last arrival signal is used as the maximum delay channel.

[0093] As Figure 3 shown, fp_st0, fp_st1, fp_st2 and fp_st3 respectively represent the arrival indication signals corresponding to the four channels with channel numbers 0, 1, 2 and 3. After the arrival indication signals fp_st0, fp_st1, fp_st2 and fp_st3 of the four channels numbered fp0, fp1, fp2 and fp3 appear, fp_st0, fp_st1, fp_st2 and fp_st3 are adjusted from low level to high level, and the fp_st signals of all channels are subjected to an AND (&) logical operation to obtain the st_and detection signal. When the st_and signal jumps from low level to high level, it indicates that the frame positioning signals of all channels have arrived effectively, and record the order of the valid arrival signals of each channel in sequence. The fp2 corresponding to fp_st2 of the last arrival signal is used as the maximum delay channel. The position of the high level of the most_delay_ind signal and the simultaneous appearance of the fp2 signal indicate that the second channel is the maximum delay channel.

[0094] In the second embodiment of the present invention, combined with the embodiments of the present invention, there is also a preferred implementation scheme. Specifically, as Figure 4As shown, the channel timestamp extraction module calculates the single-bit PTP timestamp value according to the configured channel rate of the multi-channel, multiplies the bit-sliding data of each channel obtained in the channel frame positioning detection module by the single-bit PTP timestamp value to obtain the PTP timestamp compensation value of the bit-sliding data of each channel; adds the PTP timestamp compensation value of the bit-sliding data of the maximum delay channel to the PTP timestamp value of the maximum delay channel to obtain the PTP timestamp extraction value of each channel.

[0095] As Figure 4 shown, the channel data bit width is 16-bit, and the starting bit of the framing pattern of the channel is located at the 8th bit of the data stream. Figure 4 The upper half is the adjacent two beats of 16-bit channel data, where the starting bit of the framing pattern is located at the 8th bit position of the left beat of data. After framing is completed, in order to shift the starting bit of the framing pattern to the highest bit of the channel data, it is necessary to splice these two beats of data, and then intercept 16-bit data starting from the starting bit of the framing pattern as the new channel data, and so on. Figure 4 The lower half is the intercepted 16-bit channel data, and the starting bit of framing is located at the highest bit of the data. From Figure 4 it can be seen that the framing bit-sliding value of this channel is 7. The PTP timestamp compensation value of the bit-sliding data = 8 (bit-sliding data) × single-bit PTP timestamp value. The reference timestamp TS0 is the accompanying timestamp corresponding to the highest bit of the input data. The reference timestamp does not consider the bit-sliding during frame positioning, then the PTP timestamp extraction value of each channel after compensation for each channel = TS0 + 8 × single-bit PTP timestamp value.

[0096] In a certain actual scenario, as Figure 4 shown, the channel data bit width is 16-bit, and the starting bit of the framing pattern of the channel is located at the 8th bit of the data stream. The adjacent two beats of 16-bit channel data entering the channel are data A: 0x00 (16-bit all 0) and data B: 0xFF (16-bit all 1). Among them, the starting bit of the framing pattern is located at the 8th bit position of data A, that is, the 8th bit of data A. After framing is completed, in order to shift the starting bit of the framing pattern to the highest bit of the channel data, that is, the highest bit of data A, it is necessary to splice data A and data B, and then intercept 16-bit data starting from the starting bit of the framing pattern (that is, the 8th bit of data A) as the new channel data, and so on, that is, splice the lower 8 bits of data A and the upper 8 bits of data B into new 16-bit data. The spliced data is data C. The upper 8 bits of data C are all 0 of the lower 8 bits of data A, and the lower 8 bits of data C are all 1 of the upper 8 bits of data B, that is, 0x0F, and the starting bit of framing is located at the highest bit of data C. From Figure 4It can be seen that the framed bit sliding value of this channel is 7, that is, it slides 7 bit positions from the highest bit of Data A to the 8th bit of Data A. The PTP timestamp compensation value of the bit sliding data of this channel = 8 × single-bit PTP timestamp value, where the single-bit PTP timestamp value uses the actual timestamp value in the specific scenario. Further, the PTP timestamp extraction value of each channel after compensation for each channel = TS0 + 8 × single-bit PTP timestamp value.

[0097] Those skilled in the art can easily understand that the above are only preferred embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent replacements, and improvements made within the spirit and principles of the present invention shall be included within the protection scope of the present invention.

Claims

1. A multi-channel PTP timestamp extraction method, characterized in that, The method includes: Writing the data of each channel into its corresponding phase correction FIFO, performing frame positioning on each channel separately, and recording the frame positioning signals and bit slip data of each channel during the frame positioning process to obtain the PTP timestamp compensation value of the bit slip data of each channel; Selecting the starting channel among the channels, recording the order in which the frame positioning signals of each channel arrive starting from the starting channel, and selecting the channel corresponding to the last-occurring frame positioning signal as the maximum delay channel; Extracting the PTP timestamp value of the maximum delay channel, and adding the PTP timestamp compensation value of the bit slip data of the maximum delay channel to the PTP timestamp value of the maximum delay channel to obtain the PTP timestamp extraction value of each channel.

2. The multi-channel PTP timestamp extraction method according to claim 1, characterized in that, The specific method of writing the data of each channel into its corresponding phase correction FIFO includes: Initializing the FIFO read / write addresses of each channel; Starting the write operation of each channel on the write side of the FIFO of each channel; Presetting a read control threshold on the read side of the FIFO of each channel. If the difference between the FIFO read / write addresses in each channel is greater than or equal to the read control threshold at the same time, start the read operation of each channel, otherwise stop the read operation of each channel.

3. The multi-channel PTP timestamp extraction method according to claim 1, characterized in that, The specific method of performing frame positioning on each channel separately, recording the bit slip data of each channel during the frame positioning process, and obtaining the PTP timestamp compensation value of the bit slip data of each channel includes: Marking the position of the frame positioning signal during the frame positioning process; Recording the bit slip data generated by each channel during the frame positioning process, where the bit slip data is the difference between the position of the frame positioning signal and the highest bit position.

4. The multi-channel PTP timestamp extraction method according to claim 3, wherein The specific method of selecting the starting channel among the channels includes: Setting a delay threshold according to the configured frame period of the multi-channel; After the frame positioning signals of each channel appear in two adjacent frame periods, determining whether the distance between the last-occurring frame positioning signal in the first frame period and the first-occurring frame positioning signal in the second frame period exceeds the delay threshold. If it exceeds the delay threshold, the channel corresponding to the first-occurring frame positioning signal in the second frame period is used as the starting channel among the channels.

5. The multi-channel PTP timestamp extraction method according to claim 1, wherein The specific method of recording the order in which the frame positioning signals of each channel arrive starting from the starting channel and selecting the channel corresponding to the last-occurring frame positioning signal as the maximum delay channel includes: Assigning arrival signals to the frame positioning signals of each channel, querying whether the arrival signals of each channel appear and recording the order; After the arrival signals of each channel appear, selecting the channel corresponding to the last-occurring arrival signal as the maximum delay channel.

6. The multi-channel PTP timestamp extraction method according to claim 1, characterized in that, The specific method of performing frame positioning on each channel separately, recording the bit slip data of each channel during the frame positioning process, and obtaining the PTP timestamp compensation value of the bit slip data of each channel includes: Calculate the single-bit PTP timestamp value according to the channel rate of the configured multi-channel, and multiply the bit-sliding data of each channel by the single-bit PTP timestamp value to obtain the PTP timestamp compensation value of the bit-sliding data of each channel.

7. The multi-channel PTP timestamp extraction method according to claim 1, characterized in that After the PTP timestamp extraction values of each channel, the method includes: The PTP timestamp extraction values of each channel are used to calculate the master-slave time difference on the transmission master-slave line, and the local time is adjusted using the master-slave time difference, so that the device times of each device maintain the same frequency and phase as the master device time.

8. A multi-channel PTP timestamp extraction system, characterized in that, The extraction system includes: A channel phase difference elimination module, which writes the data of each channel into its corresponding phase correction FIFO, and at the same time reads each channel. The channel phase difference elimination module is used to eliminate the phase difference of each channel; A channel frame positioning detection module, which sequentially inputs each channel into the channel frame positioning detection module for frame positioning to obtain the frame positioning signals of each channel, and at the same time records the bit-sliding data of each channel. The channel frame positioning detection module is used to calculate the PTP timestamp compensation value of each channel with respect to the bit-sliding data; A starting channel detection module, which sets a delay threshold according to the configured frame period of the multi-channel, and determines the starting channels of each channel by judging whether the distance between the frame positioning signals of adjacent frame periods exceeds the delay threshold; A maximum delay channel detection module, which starts from the starting channel and sequentially queries the order in which the frame positioning signals of each channel appear, and selects the channel corresponding to the last-arriving signal as the maximum delay channel; A channel timestamp extraction module, which extracts the PTP timestamp value of the maximum delay channel according to the maximum delay channel, and at the same time gives corresponding timestamp compensation to the bit-sliding generated by each channel during frame positioning, improving the timestamp recovery accuracy of each channel.

9. The multi-channel PTP timestamp extraction system according to claim 8, wherein The maximum delay channel detection module assigns arrival signals to the frame positioning signals of each channel, queries whether the arrival signals of each channel appear and records the order; after the arrival signals of each channel have all appeared, selects the channel corresponding to the last-arriving signal as the maximum delay channel.

10. The multi-channel PTP timestamp extraction system according to claim 8, wherein The channel timestamp extraction module calculates the single-bit PTP timestamp value according to the channel rate of the configured multi-channel, multiplies the bit-sliding data of each channel obtained in the channel frame positioning detection module by the single-bit PTP timestamp value to obtain the PTP timestamp compensation value of the bit-sliding data of each channel; adds the PTP timestamp compensation value of the bit-sliding data of the maximum delay channel to the PTP timestamp value of the maximum delay channel to obtain the PTP timestamp extraction value of each channel.

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