A PIN multi-purpose diode of GaN / BGaN / GaN structure and a preparation method thereof

Abstract

The application provides a PIN multipurpose diode with a GaN / BGaN / GaN structure and a preparation method thereof. The BGaN intrinsic layer 3 with adjustable B content is grown on the N type layer 2 of GaN by using the MOCVD process, so as to efficiently modulate the carrier lifetime of the intrinsic layer and meet the requirements of fast recovery, microwave switch and the like. Meanwhile, the application reduces the two-dimensional electron gas concentration at the BGaN / GaN heterojunction, so as to reduce the parasitic capacitance of the device.

Description

Technical Field

[0001] This invention belongs to the field of semiconductor technology, specifically relating to a GaN / BGaN / GaN structure PIN multipurpose diode and its fabrication method. Background Technology

[0002] Semiconductor devices are indispensable in fields such as military radar and communications, and PIN diodes, as core components, have received widespread attention. GaN, as a representative of third-generation semiconductors, has broad application prospects in various new semiconductor devices due to its large bandgap, high dielectric constant, and high electron mobility. PIN diodes leverage their advantages of high frequency and high power in radio frequency and microwave applications, and GaN-based PIN diodes have enormous development potential in applications such as fast recovery diodes, microwave switches, and microwave limiters.

[0003] refer to Figure 1 Currently, PIN microwave diodes are typically GaN (GaAs) based diodes, where the N-type layer 2 and P-type layer 4 are made of GaN (GaAs) material. Due to polarization, there is a high concentration of two-dimensional electron gas at the AlGaN / GaN interface, which has a significant impact on carrier lifetime. Meanwhile, the polarization intensity at the BGaN / GaN heterojunction interface is very weak, so the concentration of two-dimensional electron gas is also low. The intrinsic layer 3 is made of AlGaN (AlGaAs) material. Carrier lifetime control is difficult in AlGaN material, making it difficult to meet the multi-purpose requirements of fast recovery, microwave switching, etc. Summary of the Invention

[0004] To address the aforementioned problems in the prior art, this invention provides a GaN / BGaN / GaN structured PIN multi-purpose diode and its fabrication method. The technical problem to be solved by this invention is achieved through the following technical solution:

[0005] In a first aspect, the present invention provides a method for fabricating a GaN / BGaN / GaN structured PIN multipurpose diode, comprising:

[0006] Step 1: Obtain the GaN substrate (1);

[0007] Step 2: Use MOCVD process to grow an N-type layer (2) of Si-doped GaN on GaN substrate (1);

[0008] Step 3: Use MOCVD process to grow a BGaN intrinsic layer (3) with adjustable B content on the N-type layer (2) of GaN;

[0009] Step 4: Use MOCVD process to grow a Mg-doped GaN P-type layer (4) on the BGaN intrinsic layer (3);

[0010] Step 5: Fabricate a mask on the P-type layer (4), and use a dry etching process to etch the left side of the P-type layer (4) and the BGaN intrinsic layer (3) until the left side of the N-type layer (2) is exposed.

[0011] Step 6: Deposit Pt metal on the exposed N-type layer to form a cathode metal electrode (6);

[0012] Step 7: Deposit Pt metal on top of the P-type layer (4) to form the anode metal electrode (7).

[0013] Optionally, in step three, the content of B is adjusted to be 10%-30%, the thickness of the intrinsic BGaN layer (3) is 30-200 nm, the thickness of the N-type layer (2) is 50-300 nm, and the thickness of the P-type layer (4) is 50-300 nm.

[0014] Optionally, in step five, the area etched on the left side of the P-type layer (4) and the BGaN intrinsic layer (3) is 5 μm wide.

[0015] Optionally, the process conditions for growing the Si-doped GaN N-type layer in step two are: temperature 1000℃, pressure 300 Torr, gallium source flow rate 100 sccm, Si source flow rate 50 sccm, ammonia flow rate 20000 sccm, and hydrogen flow rate 40000 sccm.

[0016] Optionally, the process conditions for growing the intrinsic BGaN layer (3) in step three are: temperature 1000℃, pressure 300Torr, gallium source flow rate 80sccm, B source flow rate 30sccm, ammonia flow rate 20000sccm, and hydrogen flow rate 40000sccm.

[0017] Optionally, the process conditions for generating the Mg-doped GaN P-type layer (4) in step four are: temperature 1000℃, pressure 300 Torr, gallium source flow rate 100 sccm, Mg source flow rate 500 sccm, ammonia flow rate 20000 sccm, and hydrogen flow rate 40000 sccm.

[0018] Secondly, the GaN / BGaN / GaN structure PIN multipurpose diode provided by the present invention is prepared using the preparation method of the first aspect.

[0019] This invention provides a GaN / BGaN / GaN PIN multi-purpose diode and its fabrication method. By using MOCVD to grow a BGaN intrinsic layer 3 with adjustable boron content on the N-type layer 2 of GaN, the intrinsic layer carrier lifetime can be efficiently modulated to meet various requirements such as fast recovery and microwave switching. Simultaneously, this invention reduces the two-dimensional electron gas concentration at the BGaN / GaN heterojunction, thereby reducing the parasitic capacitance of the device.

[0020] The present invention will be further described in detail below with reference to the accompanying drawings and embodiments. Attached Figure Description

[0021] Figure 1 This is a schematic diagram of the structure of a PIN microwave diode in the prior art;

[0022] Figure 2 This is a schematic flowchart of a method for fabricating a GaN / BGaN / GaN structure PIN multipurpose diode provided in an embodiment of the present invention;

[0023] Figure 3 This is a schematic diagram of the manufacturing process of a GaN / BGaN / GaN structure PIN multipurpose diode provided in an embodiment of the present invention;

[0024] Figure 4 This is a schematic diagram of a GaN / BGaN / GaN structure PIN multipurpose diode provided in an embodiment of the present invention. Detailed Implementation

[0025] The present invention will be further described in detail below with reference to specific embodiments, but the implementation of the present invention is not limited thereto.

[0026] like Figure 2 As shown, the method for fabricating a GaN / BGaN / GaN structure PIN multipurpose diode provided by the present invention includes:

[0027] Step 1: Obtain GaN substrate 1;

[0028] Step 2: Grow an N-type layer 2 of Si-doped GaN on GaN substrate 1 using MOCVD process;

[0029] The thickness of the N-type layer 2 is 50-300 nm; the process conditions for growing a 200 nm Si-doped GaN N-type layer are: temperature 1000℃, pressure 300 Torr, gallium source flow rate 100 sccm, Si source flow rate 50 sccm, ammonia flow rate 20000 sccm, and hydrogen flow rate 40000 sccm.

[0030] Step 3: Use MOCVD process to grow an intrinsic BGaN layer 3 with adjustable B content on the N-type layer 2 of GaN;

[0031] The boron (B) content was adjusted from 10% to 30%, and the thickness of the BGaN intrinsic layer 3 was 30-200 nm. The process conditions for growing the BGaN intrinsic layer 3 were: temperature 1000℃, pressure 300 Torr, gallium source flow rate 80 sccm, boron source flow rate 30 sccm, ammonia flow rate 20000 sccm, and hydrogen flow rate 40000 sccm.

[0032] Step 4: Use MOCVD process to grow a Mg-doped GaN P-type layer 4 on the BGaN intrinsic layer 3;

[0033] The thickness of the P-type layer 4 is 50-300 nm. The process conditions for generating the Mg-doped GaN P-type layer 4 in step four are: temperature 1000℃, pressure 300 Torr, gallium source flow rate 100 sccm, Mg source flow rate 500 sccm, ammonia flow rate 20000 sccm, and hydrogen flow rate 40000 sccm.

[0034] Step 5: Fabricate a mask on the P-type layer 4, and use a dry etching process to etch the left side of the P-type layer 4 and the BGaN intrinsic layer 3 until the left side of the N-type layer 2 is exposed.

[0035] In step five, the area etched on the left side of the P-type layer 4 and the BGaN intrinsic layer 3 is 5 μm wide.

[0036] Step 6: Deposit Pt metal on the exposed N-type layer to form the cathode metal electrode 6;

[0037] Step 7: Deposit Pt metal on top of P-type layer 4 to form anode metal electrode 7.

[0038] This invention provides a method for fabricating a GaN / BGaN / GaN PIN multi-purpose diode. By using MOCVD to grow a BGaN intrinsic layer 3 with adjustable boron content on the N-type layer 2 of GaN, the intrinsic layer carrier lifetime can be efficiently modulated to meet various requirements such as fast recovery and microwave switching. Compared to existing technologies, this invention reduces the two-dimensional electron gas concentration at the BGaN / GaN heterojunction, thereby reducing the parasitic capacitance of the device.

[0039] refer to Figure 3 The present invention illustrates the preparation process by way of examples.

[0040] Example 1

[0041] Step 1, as follows Figure 3As shown in neutron diagram a, 200 nm Si-doped GaN was grown on a GaN substrate using MOCVD process. The process conditions were: temperature 1000℃, pressure 300 Torr, gallium source flow rate 100 sccm, Si source flow rate 50 sccm, ammonia flow rate 20000 sccm, and hydrogen flow rate 40000 sccm.

[0042] Step 2, as follows Figure 3 As shown in neutron diagram b, a 100 nm intrinsic BGaN layer was grown on a GaN N-type layer using MOCVD, with a B content of 15%. The process conditions were: temperature 1000℃, pressure 300 Torr, gallium source flow rate 80 sccm, B source flow rate 30 sccm, ammonia flow rate 20000 sccm, and hydrogen flow rate 40000 sccm.

[0043] Step 3, as follows Figure 3 As shown in neutron diagram c, Mg-doped GaN with a diameter of 200 nm was grown on the intrinsic layer of BGaN using MOCVD process. The process conditions were: temperature 1000℃, pressure 300 Torr, gallium source flow rate 100 sccm, Mg source flow rate 500 sccm, ammonia flow rate 20000 sccm, and hydrogen flow rate 40000 sccm.

[0044] Step 4, as follows Figure 3 As shown in neutron diagram d, a mask is fabricated on the P-type layer, and a dry etching process is used to etch the 5µm wide P-type layer and BGaN intrinsic layer on the left side, exposing the left side of the N-type layer.

[0045] Step 5, as follows Figure 3 As shown in neutron diagram e, Pt metal is deposited on the exposed N-type layer to form a cathode metal electrode;

[0046] Step 6, as follows Figure 3 As shown in neutron diagram f, Pt metal is deposited on top of the P-type layer to form the anode metal electrode.

[0047] Example 2

[0048] Step 1, as follows Figure 3 As shown in neutron diagram a, 200 nm Si-doped GaN was grown on a GaN substrate using MOCVD process. The process conditions were: temperature 1000℃, pressure 300 Torr, gallium source flow rate 100 sccm, Si source flow rate 50 sccm, ammonia flow rate 20000 sccm, and hydrogen flow rate 40000 sccm.

[0049] Step 2, as follows Figure 3As shown in neutron diagram b, a 100 nm intrinsic BGaN layer was grown on a GaN N-type layer using MOCVD, with a B content of 20%. The process conditions were: temperature 1000℃, pressure 300 Torr, gallium source flow rate 80 sccm, B source flow rate 40 sccm, ammonia flow rate 20000 sccm, and hydrogen flow rate 40000 sccm.

[0050] Step 3, as follows Figure 3 As shown in neutron diagram c, Mg-doped GaN with a diameter of 200 nm was grown on the intrinsic layer of BGaN using MOCVD process. The process conditions were: temperature 1000℃, pressure 300 Torr, gallium source flow rate 100 sccm, Mg source flow rate 500 sccm, ammonia flow rate 20000 sccm, and hydrogen flow rate 40000 sccm.

[0051] Step 4, as follows Figure 3 As shown in neutron diagram d, a mask is fabricated on the P-type layer, and a dry etching process is used to etch the 5µm wide P-type layer and BGaN intrinsic layer on the left side, exposing the left side of the N-type layer.

[0052] Step 5, as follows Figure 3 As shown in neutron diagram e, Pt metal is deposited on the exposed N-type layer to form a cathode metal electrode;

[0053] Step 6, as follows Figure 3 As shown in neutron diagram f, Pt metal is deposited on top of the P-type layer to form the anode metal electrode.

[0054] like Figure 4 As shown, the present invention provides a GaN / BGaN / GaN structure PIN multipurpose diode, which is fabricated using a method for fabricating a GaN / BGaN / GaN structure PIN multipurpose diode.

[0055] exist Figure 4 From bottom to top, the structure includes: GaN substrate 1, GaN N-type layer, BGaN intrinsic layer, GaN P-type layer, and cathode and anode metals; N-type layer 2, with a thickness of 50-300 nm; BGaN intrinsic layer 3, with a thickness of 30-200 nm; BGaN intrinsic layer 3, with a B content of 10%-30%; and P-type layer 4, with a thickness of 50-300 nm.

[0056] The above description, in conjunction with specific preferred embodiments, provides a further detailed explanation of the present invention. It should not be construed that the specific implementation of the present invention is limited to these descriptions. For those skilled in the art, various simple deductions or substitutions can be made without departing from the concept of the present invention, and all such modifications and substitutions should be considered within the scope of protection of the present invention.

Claims

1. A method for fabricating a PIN multi-purpose diode of GaN / BGaN / GaN structure, characterized in that, The application relates to a preparation method of a GaN-based heterojunction diode. Step one: obtaining a GaN substrate (1); Step two: growing an N-type Si-doped GaN layer (2) on the GaN substrate (1) by using an MOCVD process; Step three: growing a B-doped GaN intrinsic layer (3) with adjustable B content on the N-type GaN layer (2) by using an MOCVD process; the B content is adjusted in the range of 10%-30%; the process condition for growing the B-doped GaN intrinsic layer (3) is as follows: temperature 1000 DEG C, pressure 300 Torr, gallium source flow 80 sccm, B source flow 30 sccm, ammonia flow 20000 sccm, and hydrogen flow 40000 sccm; Step four: growing a P-type Mg-doped GaN layer (4) on the B-doped GaN intrinsic layer (3) by using an MOCVD process; Step five: manufacturing a mask on the P-type layer (4), and etching the left P-type layer (4) and the B-doped GaN intrinsic layer (3) by using a dry etching process until the left part of the N-type layer (2) is exposed; Step six: depositing Pt metal on the exposed N-type layer to form a cathode metal electrode (6); Step seven: depositing Pt metal on the top of the P-type layer (4) to form an anode metal electrode (7).

2. The method of claim 1, wherein the PIN diode is a PIN photodiode. The B-doped GaN intrinsic layer (3) has a thickness of 30-200 nm.

3. The method for fabricating a PIN multipurpose diode according to claim 1, characterized in that, The N-type layer (2) has a thickness of 50-300 nm.

4. The method of claim 1, wherein the PIN multi-purpose diode is prepared by the steps of: The P-type layer (4) has a thickness of 50-300 nm. ​ 5. The method of claim 1, wherein the PIN multi-purpose diode is prepared by the steps of: The etching area of the left P-type layer (4) and the B-doped GaN intrinsic layer (3) in step five is 5 um wide. ​ 6. The method of claim 1, wherein the PIN multi-purpose diode is prepared by the steps of: The process condition for growing the N-type Si-doped GaN layer in step two is as follows: temperature 1000 DEG C, pressure 300 Torr, gallium source flow 100 sccm, Si source flow 50 sccm, ammonia flow 20000 sccm, and hydrogen flow 40000 sccm. ​ 7. The method of claim 1, wherein the PIN multi-purpose diode is prepared by the steps of: The process condition for generating the P-type Mg-doped GaN layer (4) in step four is as follows: temperature 1000 DEG C, pressure 300 Torr, gallium source flow 100 sccm, Mg source flow 500 sccm, ammonia flow 20000 sccm, and hydrogen flow 40000 sccm. ​ 8. A PIN multi-purpose diode of GaN / BGaN / GaN structure, characterized in that, The GaN-based heterojunction diode is prepared by using the preparation method in any one of claims 1 to 7.

Images