Semiconductor device

Abstract

Provided is a semiconductor device in which a vertical semiconductor element using a Ga2O3-based semiconductor as a material for a substrate and an epitaxial layer is mounted on a lead frame, and heat can be efficiently dissipated from the semiconductor device to the lead frame. As one embodiment, there is provided a semiconductor device (1) including: a lead frame (20) having a convex portion (200) on its surface; and an SBD (10) mounted on the lead frame (20) with its face down, the SBD (10) having: a substrate (11) including a Ga2O3-based semiconductor; an epitaxial layer (12) laminated on the substrate (11) and including a Ga2O3-based semiconductor; a cathode electrode (13) connected to the substrate (11); and an anode electrode (14) connected to the epitaxial layer (12) and having a field plate portion (140) on its outer peripheral portion. The SBD (10) is fixed on the convex portion (200), and the outer peripheral portion (120) of the epitaxial layer (12) is located directly above the flat portion (201) of the lead frame (20).

Description

Technical Field

[0001] The present invention relates to a semiconductor device. Background Art

[0002] Conventionally, a semiconductor package is known in which a vertical Schottky barrier diode is connected to a lead frame (for example, see Patent Document 1).

[0003] The Schottky barrier diode described in Patent Document 1 has a SiC semiconductor substrate and a SiC epitaxial layer formed thereon. An electrode provided on the SiC semiconductor substrate side is connected to a pad portion of the lead frame via a conductive bonding member, and an electrode provided on the SiC epitaxial layer side is connected to a terminal of the lead frame via a wire.

[0004] Prior Art Documents

[0005] Patent Documents

[0006] Patent Document 1: Japanese Patent No. 6563093 Summary of the Invention

[0007] Problems to be Solved by the Invention

[0008] According to Patent Document 1, it is also said that semiconductor materials different from SiC, such as GaN and Ga2O3, can be used. However, when the substrate of the Schottky barrier diode includes a material with low thermal conductivity such as Ga2O3, heat generated in the epitaxial layer cannot be efficiently transferred to the lead frame during the operation of the Schottky barrier diode. Therefore, the heat dissipation is poor, which has an adverse effect on the operation of the Schottky barrier diode.

[0009] An object of the present invention is to provide a semiconductor device in which a vertical semiconductor element using a Ga2O3-based semiconductor as a substrate and an epitaxial layer material is mounted on a lead frame, and heat can be efficiently dissipated from the semiconductor device to the lead frame.

[0010] Solutions for Solving the Problems

[0011] To achieve the above object, one aspect of the present invention provides the semiconductor devices of the following [1] to [7].

[0012] [1]A semiconductor device includes: a lead frame having a convex portion on its surface; and a semiconductor element mounted on the lead frame with its face downwards, the semiconductor element having: a substrate including a Ga2O3-based semiconductor; an epitaxial layer laminated on the substrate and including a Ga2O3-based semiconductor; a first electrode connected to a surface of the substrate on a side opposite to the epitaxial layer; and a second electrode connected to a surface of the epitaxial layer on a side opposite to the substrate and having a field plate portion on its outer peripheral portion. The semiconductor element is fixed on the convex portion, and an outer peripheral portion of the epitaxial layer located outside the field plate portion is directly above a flat portion of the lead frame where the convex portion is not provided.

[0013] [2]In the semiconductor device according to the above [1], the second electrode is electrically connected to the convex portion via a conductive adhesive material. When the conductive adhesive material is directly below the outer peripheral portion on the flat portion, the distance between the outer peripheral portion and the conductive adhesive material located directly below the outer peripheral portion is 3 μm or more. When the conductive adhesive material is not directly below the outer peripheral portion on the flat portion, the distance between the outer peripheral portion and the flat portion is 3 μm or more.

[0014] [3]In the semiconductor device according to the above [1] or [2], the convex portion and the flat portion are integral.

[0015] [4]In the semiconductor device according to the above [3], the lead frame has a concave portion on the back side of the convex portion.

[0016] [5]In the semiconductor device according to the above [1] or [2], the convex portion and the flat portion are separate bodies that are electrically connected.

[0017] [6]A semiconductor device includes: a lead frame; and a semiconductor element having: a substrate including a Ga2O3-based semiconductor; an epitaxial layer on the substrate and including a Ga2O3-based semiconductor; a first electrode connected to the substrate side; and a second electrode connected to the epitaxial layer side. The semiconductor element is mounted on the lead frame with its face downwards, and the distance between the epitaxial layer and the lead frame is 3 μm or more.

[0018] [7]In the semiconductor device according to any one of the above [1] to [6], the substrate has a concave portion on a surface on a side opposite to the epitaxial layer, and a bonding wire is connected to the first electrode on the bottom surface of the concave portion.

[0019] Advantages of the Invention

[0020] According to the present invention, a semiconductor device can be provided in which a vertical semiconductor element using a Ga2O3-based semiconductor as a material for a substrate and an epitaxial layer is mounted on a lead frame, and heat can be efficiently dissipated from the semiconductor device to the lead frame. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figure 1A is a vertical cross-sectional view of the semiconductor device of the first embodiment.

[0022] Figure 1B is a vertical cross-sectional view of the semiconductor device of the first embodiment.

[0023] Figure 2A is a vertical cross-sectional view of a semiconductor device manufactured as a reference example for evaluating the difference in heat dissipation between the case where an SBD is mounted face down and the case where it is mounted face up.

[0024] Figure 2B is a vertical cross-sectional view of a semiconductor device manufactured as a reference example for evaluating the difference in heat dissipation between the case where an SBD is mounted face down and the case where it is mounted face up.

[0025] Figure 3 shows Figure 2A , Figure 2B a coordinate diagram showing the thermal resistance measurement results of the semiconductor device shown.

[0026] Figure 4A is a perspective view showing an example of the overall configuration of a semiconductor device as a package in which an SBD is sealed.

[0027] Figure 4B is a perspective view showing an example of the overall configuration of a semiconductor device as a package in which an SBD is sealed.

[0028] Figure 5 is a vertical cross-sectional view of a modified example of the semiconductor device of the first embodiment.

[0029] Figure 6 is a vertical cross-sectional view of the semiconductor device of the second embodiment.

[0030] Figure 7A is a vertical cross-sectional view showing an example of the mounting process of the SBD of the second embodiment on the lead frame.

[0031] Figure 7B is a vertical cross-sectional view showing an example of the mounting process of the SBD of the second embodiment on the lead frame.

[0032] Figure 7CThis is a vertical cross-sectional view showing an example of the mounting process of the SBD of the second embodiment on the lead frame.

[0033] Figure 8 This is a vertical cross-sectional view of the semiconductor device of the third embodiment.

[0034] Figure 9 This is a vertical cross-sectional view of the semiconductor device of the fourth embodiment.

[0035] Figure 10 This is a vertical cross-sectional view of the semiconductor device of the fifth embodiment.

[0036] Figure 11 This is a vertical cross-sectional view of the semiconductor device of the sixth embodiment. Detailed Embodiments

[0037] [First Embodiment]

[0038] In the first embodiment of the present invention, a Schottky barrier diode (SBD) is used as a vertical semiconductor element.

[0039] (Structure of the Semiconductor Device)

[0040] Figure 1A 、 Figure 1B This is a vertical cross-sectional view of the semiconductor device 1 of the first embodiment. The semiconductor device 1 includes: a lead frame 20; and an SBD 10, which is mounted on the lead frame 20 with its face down. The SBD 10 is fixed by a conductive adhesive material 30 and electrically connected to the lead frame 20.

[0041] Figure 1A The semiconductor device 1 shown Figure 1B The semiconductor device 1 shown is different in the range where the conductive adhesive material 30 covers the lead frame 20. This will be described later.

[0042] Hereinafter, regarding the up-down direction of each component of the SBD 10, it refers to the up-down direction in the mounted state of the SBD 10. For example, the lower surface of each component is the surface on the side of the lead frame 20, and the upper surface is the surface on the side opposite to the lead frame 20.

[0043] The lead frame 20 has a convex portion 200 on its surface. The flat portion 201 where there is no convex portion 200 around the convex portion 200 of the lead frame 20 is provided. In the lead frame 20 of the semiconductor device 1, the convex portion 200 and the flat portion 201 are integrated. The lead frame 20 includes a conductor such as copper or a copper-based alloy.

[0044] The SBD10 has: a substrate 11; an epitaxial layer 12 laminated on the substrate 11; a cathode electrode 13 connected to the upper surface (the surface on the side opposite to the epitaxial layer 12) of the substrate 11; and an anode electrode 14 connected to the lower surface (the surface on the side opposite to the substrate 11) of the epitaxial layer 12. The anode electrode 14 is connected to the convex portion 200 of the lead frame 20 via the conductive adhesive material 30, and the cathode electrode 13 is connected to a portion of the lead frame 20 that is electrically insulated from the anode electrode 14 via a bonding wire 21 including Al or the like.

[0045] In the SBD10, by applying a forward bias between the anode electrode 14 and the cathode electrode 13, the Schottky barrier at the interface between the anode electrode 14 and the epitaxial layer 12 decreases, and current flows from the anode electrode 14 to the cathode electrode 13. On the other hand, when a reverse bias is applied between the anode electrode 14 and the cathode electrode 13, the Schottky barrier at the interface between the anode electrode 14 and the epitaxial layer 12 becomes higher, and current does not flow.

[0046] The substrate 11 and the epitaxial layer 12 include a Ga2O3-based semiconductor and contain an n-type dopant. Preferably, the n-type dopant is a Group IV element such as Si or Sn. The concentration of the n-type dopant in the substrate 11 is generally higher than the concentration of the n-type dopant in the epitaxial layer 12.

[0047] Here, the Ga2O3-based semiconductor is Ga2O3 or Ga2O3 containing substitutional impurities such as Al or In. Preferably, the Ga2O3-based semiconductor is a single crystal. Additionally, preferably, the Ga2O3-based semiconductor is a β-type crystal.

[0048] Using Table 1 below, the characteristics of β-type Ga2O3 (β-Ga2O3) are compared with the characteristics of other semiconductors for illustration.

[0049] [Table 1]

[0050]

[0051] As shown in Table 1, Ga2O3 has a larger bandgap compared to Si, GaAs, GaN, and SiC, and it can be seen that excellent breakdown voltage can be obtained when used as a material for semiconductor elements. On the other hand, Ga2O3 has a low thermal conductivity, and there is a problem of poor heat dissipation when used as a material for semiconductor elements.

[0052] Therefore, in the semiconductor device 1 of the present embodiment, the SBD10 is mounted face down so that the heat generated by the epitaxial layer 12 dissipates to the lead frame 20 without passing through the substrate 11 having a thickness.

[0053] Figure 2A 、 Figure 2BIt is a vertical cross-sectional view of semiconductor devices 9a and 9b manufactured as reference examples to evaluate the difference in heat dissipation performance when SBD10 is mounted face-down and face-up. In semiconductor device 9a, SBD10 is mounted face-down on lead frame 90, and in semiconductor device 9b, SBD10 is mounted face-up on lead frame 90.

[0054] Figure 3 It is a coordinate diagram showing the thermal resistance measurement results of semiconductor devices 9a and 9b. Figure 3 It shows that in semiconductor device 9a, compared with semiconductor device 9b, the magnitude of the thermal resistance is much smaller than the magnitude of the heat capacity, and the heat dissipation performance of semiconductor device 9a with SBD10 mounted face-down is more excellent.

[0055] In addition, since the bandgap of the Ga2O3-based semiconductor is large, the electric field strength inside the epitaxial layer 12 including the Ga2O3-based semiconductor is larger than that of the epitaxial layer including other semiconductors. Therefore, in the semiconductor device 1 of the present embodiment, by providing the field plate portion 140 at the anode electrode 14 of SBD10, the electric field around the end portion of the anode electrode 14 where the electric field is particularly likely to concentrate is dispersed, and the decrease in breakdown voltage is suppressed.

[0056] Here, the field plate portion 140 of the anode electrode 14 of SBD10 is a portion of the outer periphery of the anode electrode 14 that straddles the insulating film 15, and the length L of the field plate portion 140 is, for example, 3 to 60 μm. The insulating film 15 is an insulating film including SiO2 or the like provided around the anode electrode 14 on the lower surface of the epitaxial layer 12, and the insulating film 15 exists between the field plate portion 140 and the epitaxial layer 12. The thickness of the insulating film 15 is, for example, 100 to 10,000 nm. The outer periphery and side surfaces of the field plate portion 140 are covered with an insulator 16 including polyimide, plasma SiN, or plasma SiO.

[0057] However, when a reverse bias voltage is applied to SBD10, due to the electric field generated by the conductive adhesive material 30 or the lead frame 20 located below the epitaxial layer 12, charges accumulate on the surface of the epitaxial layer 12 (field effect). If the distance between the epitaxial layer 12 and the conductive adhesive material 30 or the lead frame 20 is too close, the electric field strength on the surface of the epitaxial layer 12 will become high enough to affect the breakdown voltage of SBD10.

[0058] Therefore, in the semiconductor device 1 of the present embodiment, the SBD 10 is fixed so as to straddle the convex portion 200 of the lead frame 20, and the outer peripheral portion 120 of the epitaxial layer 12 located outside the field plate portion 140 is located directly above the flat portion 201 of the lead frame 20 where the convex portion 200 is not provided. Thereby, the distance between the outer peripheral portion 120 and the conductive adhesive material 30 or the lead frame 20 is increased, and a decrease in the breakdown voltage of the SBD 10 due to the field effect is suppressed.

[0059] Here, as Figure 1A shown, when there is a conductive adhesive material 30 on the flat portion 201 directly below the outer peripheral portion 120, the distance between the outer peripheral portion 120 and the conductive adhesive material 30 located directly below it is set as D1, and as Figure 1B shown, when there is no conductive adhesive material 30 directly below the outer peripheral portion 120, the distance between the outer peripheral portion 120 and the flat portion 201 is set as D2. In order to more effectively suppress a decrease in the breakdown voltage of the SBD 10 due to the field effect, it is preferable that both these distances D1 and D2 are 3 μm or more.

[0060] The thickness of the substrate 11 is, for example, 30 to 700 μm. In addition, the thickness of the epitaxial layer 12 is, for example, 0.4 to 50 μm.

[0061] The cathode electrode 13 includes a metal such as Ti that can form an ohmic contact with the Ga2O3-based semiconductor. The cathode electrode 13 may also have a multilayer structure in which different metal films are laminated, such as Ti / Ni / Au or Ti / Al. In the case of having a multilayer structure, the layer in contact with the substrate 11 includes a metal that can form an ohmic contact with the Ga2O3-based semiconductor.

[0062] The anode electrode 14 includes metals such as Mo, Pt, and Ni. The anode electrode 14 may also have a multilayer structure in which different metal films are laminated, such as Mo / Al, Pt / Au, Ni / Au, Ni / Ti / Au, or Pt / Al. In addition, when the conductive adhesive material 31 is solder or the like, it is preferable to laminate Ti / Ni / Au or the like on the upper layer of Mo / Al, Pt / Au, Ni / Au, Ni / Ti / Au, or Pt / Al.

[0063] As the conductive adhesive material 30, for example, a nano silver paste, a solder (e.g., an Au-Sn low melting point solder), etc. are used. In particular, the nano silver paste having excellent reliability in a high-temperature environment is preferable as the conductive adhesive material 30. In addition, although the conductive adhesive material 30 is connected to the anode electrode 14, it may not be in contact with the field plate portion 140. That is, a gap may exist between the conductive adhesive material 30 and the field plate portion 140. Further, the side portion of the convex portion 200 may also not be in contact with the conductive adhesive material 30. That is, in order to electrically connect the convex portion 200 to the anode electrode 14, it is sufficient that the upper portion of the convex portion 200 is in contact with the conductive adhesive material 30.

[0064] Figure 4A , Figure 4B is a perspective view showing an example of the overall configuration of the semiconductor device 1 as a package body in which the SBD 10 is sealed. Figure 4B is a view in which the illustration of the molding resin 22 described later is omitted. In this example, the lead frame 20 has: a pad portion 20a; a terminal portion 20b that is electrically connected to the pad portion 20a; and a terminal portion 20c that is insulated from the pad portion 20a.

[0065] The anode electrode 14 of the SBD 10 is connected to the pad portion 20a, and the bonding wire 21 is connected to the terminal portion 20c. In addition, the pad portion 20a on which the SBD 10 is mounted, and the end portions on the pad portion 20a side of the terminal portions 20b and 20c are sealed with the molding resin 22.

[0066] Figure 5 is a vertical cross-sectional view of a semiconductor device 2 that is a modification of the semiconductor device 1 according to the first embodiment. In the semiconductor device 2, the convex portion 200 of the lead frame 20 is formed by stamping. Therefore, the lead frame 20 has a concave portion 202 on the back side of the convex portion 200.

[0067] 〔Second Embodiment〕

[0068] The second embodiment of the present invention is different from the first embodiment in the configuration of the lead frame. In addition, for the same points as those in the first embodiment, the description may be omitted or simplified.

[0069] (Structure of Semiconductor Device)

[0070] Figure 6 is a vertical cross-sectional view of a semiconductor device 3 according to the second embodiment. The semiconductor device 3 includes: a lead frame 40; and an SBD 10 that is mounted on the lead frame 40 in a face-down manner. The SBD 10 is fixed by a conductive adhesive material 30 and electrically connected to the lead frame 40.

[0071] In the semiconductor device 3, the lead frame 40 has a conductor 41 as a convex portion. The conductor 41 is separate from the main body 400 of the lead frame 41 which is a flat portion, and is fixed by a conductive adhesive material 30 and electrically connected to the main body 400.

[0072] The conductor 41 includes a material such as Cu which has a higher heat conductivity than the conductive adhesive material 30, and typically has a plate-like shape. In addition, the main body 400 of the lead frame 40 includes the same material as the lead frame 20 of the first embodiment.

[0073] In addition, although the conductive adhesive material 30 is connected to the anode electrode 14, it may not be in contact with the field plate portion 140. That is, there may be a gap between the conductive adhesive material 30 and the field plate portion 140. In addition, the side portion of the conductor 41 may also not be in contact with the conductive adhesive material 30. That is, in order to electrically connect the conductor 41 to the anode electrode 14 and the lead frame 40, it is sufficient that the upper and lower portions of the conductor 41 are in contact with the conductive adhesive material 30.

[0074] Figures 7A to 7C It is a vertical cross-sectional view showing an example of the mounting process of the SBD10 of the second embodiment to the lead frame 40.

[0075] First, as Figure 7A shown, the conductor 41 is connected to the main body 400 of the lead frame 40 through the conductive adhesive material 30a. Here, the conductive adhesive material 30a is a part of the conductive adhesive material 30 and is used to connect the conductor 41 to the main body 400.

[0076] Next, as Figure 7B shown, the surface of the conductor 41 is covered with the conductive adhesive material 30b. Here, the conductive adhesive material 30b is a part of the conductive adhesive material 30 and is used to connect the SBD10 to the lead frame 40.

[0077] Next, as Figure 7C shown, the SBD10 is connected to the lead frame 40 having the conductor 41 as a convex portion. In addition, the connection method of the conductor 41 to the main body 400 and the connection method of the SBD10 to the lead frame 40 are not limited to Figures 7A to 7C the method shown, and the method of forming the conductive adhesive material 30 by dividing it into the conductive adhesive material 30a and the conductive adhesive material 30b is only an example. For example, it is also possible to first bond the conductor 41 to the anode electrode 14 using a conductive adhesive material or the like, and then bond the SBD10 having the conductor 41 bonded thereto to the lead frame 40 using a conductive adhesive material or the like.

[0078] 〔Third Embodiment〕

[0079] In the third embodiment of the present invention, unlike the first embodiment, instead of providing a convex portion on the lead frame, the interval between the epitaxial layer and the lead frame is enlarged. In addition, for the same points as the first embodiment, the description may sometimes be omitted or simplified.

[0080] (Structure of semiconductor device)

[0081] Figure 8 It is a vertical cross-sectional view of the semiconductor device 4 of the third embodiment. The semiconductor device 4 includes: a lead frame 50; and an SBD 10 mounted on the lead frame 50 in a face-down manner. The SBD 10 is fixed by a conductive adhesive material 30 and electrically connected to the lead frame 50.

[0082] In the semiconductor device 4, the SBD 10 is connected to the flat portion of the lead frame 50, and by increasing the thickness of the conductive adhesive material 30 that electrically connects the SBD 10 and the lead frame 50, the interval D2 between the outer peripheral portion 120 and the lead frame 50 is enlarged. Similar to the semiconductor device 1 of the first embodiment, it is preferable that the interval D2 is 3 μm or more.

[0083] As Figure 8 shown, by increasing the thickness of the insulator 16 and supporting the SBD 10 with the insulator 16, it is possible to ensure the stability of the SBD 10 on the lead frame 50 and increase the thickness of the conductive adhesive material 30 to enlarge the distance D2. In this case, the sum of the thickness of the insulating film 15 and the thickness of the insulator 16 is approximately equal to the distance D2.

[0084] In addition, although the conductive adhesive material 30 is connected to the anode electrode 14, it may not be in contact with the field plate portion 140. That is, there may be a gap between the conductive adhesive material 30 and the field plate portion 140.

[0085] 〔Fourth embodiment〕

[0086] In the fourth embodiment of the present invention, unlike the first embodiment, a concave portion is provided on the upper surface of the substrate. In addition, for the same points as the first embodiment, the description may sometimes be omitted or simplified.

[0087] (Structure of semiconductor device)

[0088] Figure 9 It is a vertical cross-sectional view of the semiconductor device 5 of the fourth embodiment. The semiconductor device 5 includes: a lead frame 20; and an SBD 10a mounted on the lead frame 20 in a face-down manner. The SBD 10a is fixed by a conductive adhesive material 30 and electrically connected to the lead frame 20.

[0089] In the semiconductor device 5, a recess 110 is formed on the upper surface of the substrate 11a (the surface opposite to the epitaxial layer 12). A cathode electrode 13a is formed on the upper surface of the substrate 11a including the inner surface of the recess 110. A bonding wire 21 is connected to the cathode electrode 13a on the bottom surface of the recess 110.

[0090] In the substrate 11a, by providing the recess 110, the distance between the epitaxial layer 12 and the cathode electrode 13a is narrowed, and the heat generated by the epitaxial layer 12 can be efficiently dissipated from the cathode electrode 13a side. The heat transferred to the cathode electrode 13a is dissipated to the outside of the SBD10a from the bonding wire 21 or the like.

[0091] In addition, since the portion of the substrate 11a where the recess 110 is not provided has the same thickness as the substrate 1 of the first embodiment (for example, 150 to 600 μm), the formation of the recess 110 can suppress a decrease in mechanical strength compared to the case where the entire surface of the substrate is polished to thin it. The thickness of the portion of the substrate 11a where the recess 110 is provided (the distance between the bottom of the recess 110 and the lower surface of the substrate 11) is, for example, 10 to 250 μm.

[0092] In addition, the SBD10a of the present embodiment can also be mounted on the flat portion of the lead frame 50 by the method of the third embodiment.

[0093] 〔Fifth Embodiment〕

[0094] In the fifth embodiment of the present invention, a trench-type SBD is used as a vertical semiconductor element, which is different from the first embodiment. In addition, for the same points as the first embodiment, the description may be omitted or simplified.

[0095] (Structure of Semiconductor Device)

[0096] Figure 10 is a vertical cross-sectional view of the semiconductor device 6 of the fifth embodiment. The semiconductor device 6 includes: a lead frame 20; and a trench-type SBD 60 mounted on the lead frame 20 with its face down. The trench-type SBD 60 is fixed by a conductive adhesive material 30 and electrically connected to the convex portion 200 of the lead frame 20.

[0097] The trench-type SBD60 has: a substrate 61; an epitaxial layer 62 laminated on the substrate 61; a trench 621 formed on the lower surface of the epitaxial layer 62 (the surface on the side opposite to the substrate 61); an insulating film 65 covering the inner surface of the trench 621; an insulating film 66 covering the inner surface of the outer trench 621 and the outer peripheral portion of the lower surface of the epitaxial layer 62; an anode electrode 64 formed on the lower surface of the epitaxial layer 62 in a manner of filling the trench 621, making a Schottky contact with the epitaxial layer 62; an insulator 67 covering the side surface of the anode electrode 64; and a cathode electrode 63 formed on the upper surface of the substrate 61 (the surface on the side opposite to the epitaxial layer 62), making an ohmic contact with the substrate 61.

[0098] Similar to the substrate 11 and the epitaxial layer 12 of the first embodiment, the substrate 61 and the epitaxial layer 62 include a Ga2O3-based semiconductor.

[0099] The anode electrode 64 and the cathode electrode 63 can be formed of the same materials as the anode electrode 14 and the cathode electrode 13 of the first embodiment, respectively. The anode electrode 64 is connected to the lead frame 20 via the conductive adhesive material 30, and the cathode electrode 63 is connected to a portion of the lead frame 20 that is electrically insulated from the anode electrode 64 via the bonding wire 21.

[0100] The trench-type SBD60 of this embodiment is also mounted in a face-down manner similar to the SBD10 of the first embodiment. Therefore, the heat generated by the epitaxial layer 62 can be dissipated to the lead frame 20 without passing through the substrate 61 having a thickness.

[0101] In addition, by providing a field plate portion 640 on the anode electrode 64 of the trench-type SBD60, the electric field around the end portion of the anode electrode 64 where the electric field is particularly likely to concentrate is dispersed, suppressing the decrease in breakdown voltage.

[0102] Here, the field plate portion 640 of the anode electrode 64 is the portion outside the trench 621 of the outer peripheral portion of the anode electrode 64, and the outer peripheral portion and the side surface of the field plate portion 640 are covered by the insulator 67 including polyimide, plasma SiN, or plasma SiO.

[0103] In addition, in the semiconductor device 6, the outer peripheral portion 620 of the epitaxial layer 62 located outside the field plate portion 640 is located directly above the flat portion 201 of the lead frame 20 where the convex portion 200 is not provided. Thereby, the distance between the outer peripheral portion 620 and the conductive adhesive material 30 or the lead frame 20 is increased, suppressing the decrease in breakdown voltage of the trench-type SBD60 caused by the electric field effect.

[0104] When there is the conductive adhesive material 30 on the flat portion 201 directly below the outer peripheral portion 620, the interval D1 between the outer peripheral portion 620 and the conductive adhesive material 30 located directly below it, and when there is no conductive adhesive material 30 directly below the outer peripheral portion 620, the interval D2 between the outer peripheral portion 620 and the flat portion 201 are preferably both 3 μm or more.

[0105] In addition, the trench-type SBD60 of the present embodiment can also be mounted on the flat portion of the lead frame 50 by the method of the third embodiment. That is, the trench-type SBD60 can be supported by the insulator 67 by increasing the thickness of the insulator 67, ensuring the stability of the trench-type SBD60 on the lead frame 50 and thickening the conductive adhesive material 30 to increase the distance D2.

[0106] Alternatively, a recess similar to the recess 110 of the substrate 11a of the first embodiment can be formed in the substrate 61 of the trench-type SBD60, the cathode electrode 63 can be formed on the upper surface of the substrate 61 including the inner surface of the recess, and the bonding wire 21 can be connected to the cathode electrode 63 on the bottom surface of the recess.

[0107] In addition, although the conductive adhesive material 30 is connected to the anode electrode 64, it may not be in contact with the field plate portion 640. That is, there may be a gap between the conductive adhesive material 30 and the field plate portion 640.

[0108] 〔Sixth Embodiment〕

[0109] In the sixth embodiment of the present invention, a junction field effect transistor (JFET) is used as the vertical semiconductor element, which is different from the first embodiment. In addition, for the same points as the first embodiment, the description may be omitted or simplified.

[0110] (Structure of the Semiconductor Device)

[0111] Figure 11 is a vertical cross-sectional view of the semiconductor device 7 of the sixth embodiment. The semiconductor device 7 includes: a lead frame 80; and a JFET 70 mounted on the lead frame 80 with the face down. The JFET 70 is fixed by the conductive adhesive material 30 and electrically connected to the lead frame 80.

[0112] The JFET 70 has: a substrate 71; an epitaxial layer 72 laminated on the substrate 71; a trench 721 formed on the lower surface of the epitaxial layer 72 (the surface on the side opposite to the substrate 71); an insulating film 76 covering the inner surface of the trench 721; an insulating film 77 covering the inner surface of the outer trench 721 and the outer peripheral portion of the lower surface of the epitaxial layer 72; a gate electrode 75, a part of which is buried in the trench 721; an insulator 78 covering the part of the gate electrode 75 buried in the trench 721; a source electrode 74 formed on the epitaxial layer 72 and the insulator 78, making Schottky contact with the epitaxial layer 72; an insulator 79 covering the part of the gate electrode 75 exposed on the insulating film 77 and the side surface of the source electrode 74; and a drain electrode 73 formed on the upper surface of the substrate 71 (the surface on the side opposite to the epitaxial layer 72), making ohmic contact with the substrate 71.

[0113] Similar to the substrate 11 and the epitaxial layer 12 of the first embodiment, the substrate 71 and the epitaxial layer 72 include a Ga2O3-based semiconductor.

[0114] The source electrode 74 and the drain electrode 73 can be formed of the same materials as the anode electrode 14 and the cathode electrode 13 of the first embodiment, respectively. The gate electrode 75 includes a conductor such as Ni, Cr, Pt, Al, Au, polycrystalline Si doped with phosphorus, etc.

[0115] The lead frame 80 has a part 80a for connecting the source electrode 74 and a part 80b for connecting the gate electrode 75, and the parts 80a and 80b are electrically insulated. The bonding wire 21 connected to the drain electrode 73 is connected to a part of the lead frame 80 that is electrically insulated from the parts 80a and 80b.

[0116] The JFET 70 of this embodiment is also mounted in a face-down manner similar to the SBD 10 of the first embodiment. Therefore, the heat generated by the epitaxial layer 72 can be dissipated to the lead frame 80 without passing through the substrate 71 having a thickness.

[0117] In addition, by providing a field plate portion 740 on the source electrode 74 of the JFET 70, the electric field around the end of the source electrode 74 where the electric field is particularly likely to concentrate is dispersed, suppressing the decrease in breakdown voltage.

[0118] Here, the field plate portion 740 of the source electrode 74 is a part of the outer peripheral portion of the source electrode 74 that straddles the insulator 78, and the outer peripheral portion and the side surface of the field plate portion 740 are covered by an insulator 79 including polyimide, plasma SiN, or plasma SiO, etc.

[0119] In addition, in the semiconductor device 7, the JFET 70 is connected to the flat portion of the lead frame 80. By increasing the thickness of the conductive adhesive material 30 that electrically connects the JFET 70 and the lead frame 80, the interval D2 between the outer peripheral portion 720 of the epitaxial layer 72 located outside the field plate portion 740 and the lead frame 80 is enlarged. Similar to the semiconductor device 1 of the first embodiment, it is preferable that the interval D2 is 3 μm or more.

[0120] As Figure 11 shown, by increasing the thickness of the insulator 79 and supporting the JFET 70 with the insulator 79, it is possible to ensure the stability of the JFET 70 on the lead frame 80 and to thicken the conductive adhesive material 30 to enlarge the distance D2. In this case, the sum of the thickness of the insulating film 77 and the thickness of the insulator 79 is substantially equal to the distance D2.

[0121] In addition, a recess similar to the recess 110 of the substrate 11a of the first embodiment may be formed in the substrate 71 of the JFET 70, a drain electrode 73 may be formed on the upper surface of the substrate 71 including the inner surface of the recess, and the drain electrode 73 on the bottom surface of the recess is connected to the bonding wire 21.

[0122] In addition, although the conductive adhesive material 30 is connected to the source electrode 74, it may not be in contact with the field plate portion 740. That is, a gap may exist between the conductive adhesive material 30 and the field plate portion 740.

[0123] (Effects of the embodiment)

[0124] According to the above first to sixth embodiments, by mounting the vertical semiconductor element including the Ga2O3-based semiconductor in a face-down manner and increasing the distance between the outer peripheral portion of the epitaxial layer and the lead frame or the conductive adhesive material directly below it, it is possible to suppress the decrease in breakdown voltage caused by the field effect and improve the heat dissipation of the semiconductor element.

[0125] The embodiments of the present invention have been described above, but the present invention is not limited to the above embodiments, and various modifications can be made without departing from the gist of the invention. For example, even when other semiconductor elements such as vertical MOSFETs and MISFETs are used as the vertical semiconductor element, the same effects can be obtained by the same method as in the case of using SBDs and the like in the above first to sixth embodiments. In addition, in each embodiment, a jig including Cu or the like or a strip including Al or the like may be used instead of the bonding wire 21.

[0126] In addition, the constituent elements of the above-described embodiments can be arbitrarily combined without departing from the gist of the invention. In addition, the embodiments described above do not limit the invention related to the claims. In addition, it should be noted that not all combinations of the features described in the embodiments are essential for the solution to the problem of the invention.

[0127] Industrial Applicability

[0128] Provided is a semiconductor device in which a vertical semiconductor element using a Ga2O3-based semiconductor as a material for a substrate and an epitaxial layer is mounted on a lead frame, and heat can be efficiently dissipated from the semiconductor device to the lead frame.

[0129] Explanation of Reference Numerals

[0130] 1, 2, 3, 4, 5, 6, 7... semiconductor device, 10... SBD, 11, 11a, 61, 71... substrate, 110... recess, 12, 62, 72... epitaxial layer, 120, 620, 720... outer peripheral portion, 14, 64... anode electrode, 140, 640... field plate portion, 13, 13a, 63... cathode electrode, 21... bonding wire, 20, 40, 50, 80... lead frame, 200... convex portion, 201... flat portion, 202... recess, 41... conductor, 74... source electrode, 740... field plate portion, 73... drain electrode.

Claims

1. A semiconductor device, characterized in that, Comprising: A lead frame having convex portions on its surface; and A semiconductor element mounted face-down on the above lead frame, having: a substrate including a Ga2O3-based semiconductor; an epitaxial layer laminated on the above substrate and including a Ga2O3-based semiconductor; a first electrode connected to the surface of the above substrate on the side opposite to the above epitaxial layer; and a second electrode connected to the surface of the above epitaxial layer on the side opposite to the above substrate and having a field plate portion on its outer peripheral portion, The above semiconductor element is fixed on the above convex portions, The outer peripheral portion of the above epitaxial layer located outside the above field plate portion is directly above the flat portion, which is the portion of the above lead frame where the above convex portions are not provided.

2. The semiconductor device according to claim 1, wherein The above second electrode is electrically connected to the above convex portion via a conductive adhesive material, When the above conductive adhesive material is directly below the above outer peripheral portion on the above flat portion, the interval between the above outer peripheral portion and the above conductive adhesive material located directly below the above outer peripheral portion is 3 μm or more. When the above conductive adhesive material is not directly below the above outer peripheral portion on the above flat portion, the interval between the above outer peripheral portion and the above flat portion is 3 μm or more.

3. The semiconductor device according to claim 1 or 2, wherein The above convex portion and the above flat portion are integral.

4. The semiconductor device according to claim 3, wherein The above lead frame has a concave portion on the back side of the above convex portion.

5. The semiconductor device according to claim 1 or 2, wherein The above convex portion and the above flat portion are separate bodies that are electrically connected.

6. The semiconductor device according to claim 1 or 2, wherein The above substrate has a concave portion on the surface on the side opposite to the above epitaxial layer, A bonding wire is connected to the above first electrode on the bottom surface of the above concave portion.

7. A semiconductor device, characterized in that, Comprising: A lead frame; and A semiconductor element having: a substrate including a Ga2O3-based semiconductor; an epitaxial layer including a Ga2O3-based semiconductor on the above substrate; a first electrode connected to the above substrate side; and a second electrode connected to the above epitaxial layer side, The above semiconductor element is mounted face-down on the above lead frame, The interval between the above epitaxial layer and the above lead frame is 3 μm or more, The above substrate has a concave portion on the surface on the side opposite to the above epitaxial layer, A bonding wire is connected to the above first electrode on the bottom surface of the above concave portion.

8. A semiconductor device, characterized in that, Comprising: A lead frame; A semiconductor element having: a substrate including a Ga2O3-based semiconductor; an epitaxial layer including a Ga2O3-based semiconductor on the above substrate; a first electrode connected to the above substrate side; and a second electrode connected to the above epitaxial layer side; And An insulator covering the outer peripheral portion and the side surface of the above second electrode, The above semiconductor element is supported by the above insulator and mounted face-down on the above lead frame, The above second electrode is electrically connected to the above lead frame via a conductive adhesive material, The interval between the above epitaxial layer and the above lead frame is 3 μm or more.

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