Electric lock driving circuit and electric drive lock

Abstract

The present invention relates to an electric lock driving circuit and an electric drive lock, which are applied to an electric control drive lock. The electric lock driving circuit comprises: an optical coupler, a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, a ninth resistor, a tenth resistor, an eleventh resistor, a first diode, a second diode, a third diode, a fourth diode, a first triode, a second triode, a first capacitor, a second capacitor, a first MOS tube, a second MOS tube and a connection terminal; a full chip production process can be realized, and most electric locks on the market are compatible, so as to solve the problem of surge protection in the circuit and the problem of production cost, and to improve the load problem in the circuit, reduce the interference to other circuits, and have an isolation effect.

Description

Technical Field

[0001] The present application relates to the technical field of electric energy driven locks, and in particular to an electric lock driving circuit and an electric driven lock. Background Art

[0002] At present, among the existing electric energy-driven locks, the mainstream point-driven locks include: cathode locks without delay function, cathode locks with delay function and anode locks; among them, the unlocking methods of cathode locks without delay function include power-off unlocking and power-on unlocking. The main application occasions of power-off unlocking include office glass doors or community gates, and the main application occasions of power-on unlocking include unmanned vending machines and other scenes; the unlocking methods of cathode locks with delay function include power-off or power-off unlocking. The main application occasions of cathode locks with delay function include office glass doors, community gates or unmanned vending machines and other scenes; the unlocking methods of anode locks include pulse power-on unlocking, and the main application occasions of anode locks include iron gates in the courtyard. In the current electric lock drive circuit, the unlocking solutions include plug-in relays, chip relays and single MOS tube drives; among them, the advantages of plug-in relays are controllable costs, simple circuit structure, high circuit reliability, a wide range of compatible electric locks and excellent isolation, but plug-in relays have the disadvantages of not being able to implement chip production processes and requiring the design of special contact absorption circuits to reduce interference with other circuits; the advantages of chip relays are that they can implement chip production processes, simple circuit structure, relatively good reliability, and a wide range of compatible electric locks, but chip relays have the disadvantages of being relatively expensive, low capacity, and requiring the design of special contact absorption circuits to reduce interference with other circuits; the advantages of single MOS tube drives are that they can implement chip production processes and large capacity, but single MOS tube drives have the disadvantages of being compatible with relatively few types of electric locks and requiring surge protection design.

[0003] The cost of the product includes material cost and production cost. With the continuous development of the national economy, labor costs are getting higher and higher, leading to an increase in production costs. If the full SMT process can be used in production, it will greatly improve production efficiency and reduce production costs. Summary of the invention

[0004] Based on this, the present invention provides a multifunctional electric lock driver that can realize a full chip production process.

[0005] In order to achieve the above object, the present invention provides an electric lock driving circuit, which is applied to an electric control drive lock. The electric lock driving circuit includes: a MOS driving module, a power supply module, an electric lock power supply module and a wiring terminal; wherein,

[0006] The MOS driving module comprises: an optical coupler (U12), a first resistor (R103), a first transistor (Q7), a second resistor (R80), a third resistor (R46), a fourth resistor (R54), a fifth resistor (R58), a first MOS transistor (TR1), a second MOS transistor (Q4), a sixth resistor (R222) and a first capacitor (C100); the optical coupler comprises a first input end, a second input end, a first output end and a second output end; one end of the first resistor (R103) is connected to a digital signal voltage (+3.3V_STD), and the other end is connected to the first input end of the optical coupler (U12); the collector of the first transistor (Q7) is connected to the second input end of the optical coupler (U12), and the emitter of the first transistor (Q7) is grounded; one end of the second resistor (R80) is connected to a first unlocking signal (N_UNLOCK), and the other end is connected to the base of the first transistor (Q7); One end of the third resistor (R46) is connected to the base of the first transistor (Q7), and the other end is grounded; the first output end of the optical coupler (U12) is connected to the digital ground (LOCK_GND); one end of the fifth resistor (R58) is connected in series with the fourth resistor (R54), and the other end is connected to the first external power supply; the gate of the first MOS transistor (TR1) is connected between the fourth resistor (R54) and the fifth resistor (R58), and the source of the first MOS transistor (TR1) is connected to the first external power supply; the gate of the second MOS transistor (Q4) is connected to the drain of the first MOS transistor (TR1), one end of the sixth resistor (R222) and the lower plate of the first capacitor (C100), and the source of the second MOS transistor (Q4) is connected to the first external power supply; the other end of the sixth resistor (R222) and the upper plate of the first capacitor (C100) are both connected to the first external power supply;

[0007] The power supply module is connected to the source of the first MOS tube (TR1), the upper plate of the first capacitor (C100), the sixth resistor (R222), and the source of the second MOS tube (Q4);

[0008] The electric lock power supply module is electrically connected to the drain of the first MOS tube (TR1) and the gate of the second MOS tube (Q4);

[0009] The connection terminal (CN2) is connected to the first external power supply, the power supply module, the digital ground, the MOS driving module, the anode lock and the cathode lock.

[0010] According to the electric lock driving circuit provided by an embodiment of the present invention, the power supply module includes an input end, a ground end and an output end, the input end of the power supply module is connected to a second external power supply (+12V), the ground end of the power supply module is grounded, and the output end of the power supply module is connected to the source of the first MOS tube (TR1), the upper plate of the first capacitor (C100), the sixth resistor (R222), and the source of the second MOS tube (Q4).

[0011] According to the electric lock driving circuit provided by the embodiment of the present invention, the power supply module includes: a first diode (D54), a seventh resistor (R1) and a second capacitor (C310); the anode end of the first diode (D54) is connected to the input end of the power supply module, the cathode end of the first diode (D54) is connected to one end of the seventh resistor (R1), the other end of the seventh resistor (R1) is connected to the upper plate of the second capacitor (C310), the source of the first MOS tube, the upper plate of the first capacitor, the sixth resistor, and the source of the second MOS tube, and the lower plate of the second capacitor (C310) is grounded.

[0012] According to the electric lock driving circuit provided by an embodiment of the present invention, the electric lock power supply module includes an input end, a first grounding end, a second grounding end and an output end, the input end of the electric lock power supply module is connected to the second unlocking signal, the first grounding end and the second grounding end are both grounded, and the output end is electrically connected to the drain of the first MOS tube (TR1) and the gate of the second MOS tube (Q4).

[0013] According to the electric lock driving circuit provided by the embodiment of the present invention, the electric lock power supply module includes: an eighth resistor (R160), a ninth resistor (R165), a tenth resistor (R56), an eleventh resistor (R59) and a second transistor (Q13); one end of the eighth resistor (R160) is connected to the input end of the electric lock power supply module, and the other end is connected to one end of the ninth resistor (R165) and the base of the second transistor; the other end of the ninth resistor (R165) is grounded; the emitter of the second transistor (Q13) is connected to the second grounding end, the collector of the second transistor (Q13) is connected to one end of the tenth resistor (R56), and the emitter of the second transistor is grounded; the other end of the tenth resistor (R56) is connected to the digital ground (LOCK_GND) and one end of the eleventh resistor (R59); the other end of the eleventh resistor (R59) is connected to the drain of the first MOS transistor and the gate of the second MOS transistor.

[0014] According to the electric lock driving circuit provided by the embodiment of the present invention, the first transistor (Q7) and the second transistor (Q13) are NPN transistors.

[0015] According to the electric lock driving circuit provided by the embodiment of the present invention, the second output end of the optical coupler (U12) is combined with the digital ground to serve as a control output end of the cathode lock with a time delay.

[0016] According to the electric lock driving circuit provided by an embodiment of the present invention, the electric lock power supply module includes an input end, a first grounding end, a second grounding end and an output end, the input end of the electric lock power supply module is connected to the second unlocking signal, the first grounding end and the second grounding end are both grounded, and the output end is electrically connected to the drain of the first MOS tube (TR1) and the gate of the second MOS tube (Q4).

[0017] The electric lock drive circuit provided according to an embodiment of the present invention further includes a surge protection module, the surge protection module including: a second diode (D2), a third diode (D3 and a fourth diode (D1); an anode end of the second diode (D2) is connected to the first output end of the optical coupler (U12) and a digital ground (LOCK_GND), and a cathode end of the second diode (D2) is connected to the second output end of the optical coupler (U12) and one end of the fourth resistor (R54); an anode end of the third diode (D3) is connected to the digital ground (LOCK_GND), and a cathode end of the third diode (D3) is connected to the third pin of the wiring terminal (CN2), one end of the fourth diode (D1) and the drain of the second MOS tube (Q4); one end of the fourth diode (D1) is connected to the cathode end of the third diode (D3) and the drain of the second MOS tube (Q4), and the other end of the fourth diode (D1) is connected to the first external power supply and the source of the second MOS tube (Q4).

[0018] An embodiment of the present invention further provides an electrically driven lock, which includes the electric lock driving circuit provided by the above embodiment.

[0019] The beneficial effects of the present invention are as follows: the electric lock drive circuit and electric drive lock provided in this embodiment design a new electric lock drive circuit, adopt the design idea of ​​optocoupler and MOS tube, match different software control, and connect different wiring terminals to be compatible with most common electric locks, realize the patch production process, and be compatible with most electric locks on the market, solve the problem of surge protection in the circuit, and the problem of production cost, and also improve the load problem in the circuit, and reduce the interference to other circuits, and also have an isolation effect. Moreover, the electric lock drive circuit provided in this embodiment can simultaneously drive 3 electric control locks of 3A specification and 1 cathode lock with delay of any specification without providing additional power supply; after providing additional power supply, it can simultaneously drive 6 cathode locks of 1.5A specification without delay, and the drive circuit will not generate significant heat. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the conventional technology, the drawings required for use in the embodiments or the conventional technology descriptions are briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0021] Figure 1 This is a schematic diagram of the structure of an electric lock drive circuit provided in an embodiment of the present invention.

[0022] Figure 2 It is a schematic diagram of the structure of a single MOS tube driving circuit in the prior art. DETAILED DESCRIPTION

[0023] In order to facilitate understanding of the present application, the present application will be described more fully below with reference to the relevant drawings. Embodiments of the present application are provided in the drawings. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present application more thorough and comprehensive.

[0024] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used herein in the specification of this application are only for the purpose of describing specific embodiments and are not intended to limit this application.

[0025] In the description of this specification, the description with reference to the terms "some embodiments", "other embodiments", "ideal embodiments", etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic descriptions of the above terms do not necessarily refer to the same embodiment or example.

[0026] An embodiment of the present invention provides an electric lock driving circuit.

[0027] like Figure 1 As shown, Figure 1 A schematic diagram of the structure of an electric lock driving circuit provided in an embodiment of the present invention.

[0028] In this embodiment, the electric lock driving circuit is applied to an electric control drive lock, and the electric lock driving circuit includes: a MOS driving module, a power supply module, an electric lock power supply module and a wiring terminal; wherein,

[0029] The MOS driving module comprises: an optical coupler (U12), a first resistor (R103), a first transistor (Q7), a second resistor (R80), a third resistor (R46), a fourth resistor (R54), a fifth resistor (R58), a first MOS transistor (TR1), a second MOS transistor (Q4), a sixth resistor (R222) and a first capacitor (C100); the optical coupler comprises a first input end, a second input end, a first output end and a second output end; one end of the first resistor (R103) is connected to a digital signal voltage (+3.3V_STD), and the other end is connected to the first input end of the optical coupler (U12); the collector of the first transistor (Q7) is connected to the second input end of the optical coupler (U12), and the emitter of the first transistor (Q7) is grounded; one end of the second resistor (R80) is connected to a first unlocking signal (N_UNLOCK), and the other end is connected to the base of the first transistor (Q7); One end of the third resistor (R46) is connected to the base of the first transistor (Q7), and the other end is grounded; the first output end of the optical coupler (U12) is connected to the digital ground (LOCK_GND); one end of the fifth resistor (R58) is connected in series with the fourth resistor (R54), and the other end is connected to the first external power supply; the gate of the first MOS transistor (TR1) is connected between the fourth resistor (R54) and the fifth resistor (R58), and the source of the first MOS transistor (TR1) is connected to the first external power supply; the gate of the second MOS transistor (Q4) is connected to the drain of the first MOS transistor (TR1), one end of the sixth resistor (R222) and the lower plate of the first capacitor (C100), and the source of the second MOS transistor (Q4) is connected to the first external power supply; the other end of the sixth resistor (R222) and the upper plate of the first capacitor (C100) are both connected to the first external power supply;

[0030] The power supply module is connected to the source of the first MOS tube (TR1), the upper plate of the first capacitor (C100), the sixth resistor (R222), and the source of the second MOS tube (Q4);

[0031] The electric lock power supply module is electrically connected to the drain of the first MOS tube (TR1) and the gate of the second MOS tube (Q4);

[0032] The connection terminal (CN2) is connected to the first external power supply, the power supply module, the digital ground, the MOS driving module, the anode lock and the cathode lock.

[0033] The first input terminal 1 of the optical coupler (U12) is electrically connected to one end of the first resistor (R103), the second input terminal 2 of the optical coupler (U12) is electrically connected to the collector of the first transistor (Q7), the second output terminal 4 of the optical coupler (U12) is electrically connected to the fourth resistor (R54) and the cathode of the second diode (D2), the first output terminal 3 of the optical coupler (U12) is electrically connected to the anode of the second diode (D2), and the first output terminal 3 of the optical coupler (U12) is connected to a digital ground (LOCK_GND).

[0034] The power supply module includes an input end, a ground end and an output end. The input end of the power supply module is connected to a second external power supply (+12V), the ground end of the power supply module is grounded, and the output end of the power supply module is connected to the source of the first MOS tube (TR1), the upper plate of the first capacitor (C100), the sixth resistor (R222), and the source of the second MOS tube (Q4). The power supply module includes: a first diode (D54), a seventh resistor (R1) and a second capacitor (C310); the anode end of the first diode (D54) is connected to the input end of the power supply module, the cathode end of the first diode (D54) is connected to one end of the seventh resistor (R1), the other end of the seventh resistor (R1) is connected to the upper plate of the second capacitor (C310), the source of the first MOS tube, the upper plate of the first capacitor, the sixth resistor, and the source of the second MOS tube, and the lower plate of the second capacitor (C310) is grounded.

[0035] The electric lock power supply module comprises an input end, a first grounding end, a second grounding end and an output end. The input end of the electric lock power supply module is connected to a second unlocking signal, the first grounding end and the second grounding end are both grounded, and the output end is electrically connected to a drain of the first MOS tube (TR1) and a gate of the second MOS tube (Q4). The electric lock power supply module comprises: an eighth resistor (R160), a ninth resistor (R165), a tenth resistor (R56), an eleventh resistor (R59) and a second transistor (Q13); one end of the eighth resistor (R160) is connected to the input end of the electric lock power supply module, and the other end is connected to one end of the ninth resistor (R165) and the base of the second transistor; the other end of the ninth resistor (R165) is grounded; the emitter of the second transistor (Q13) is connected to the second grounding end, the collector of the second transistor (Q13) is connected to one end of the tenth resistor (R56), and the emitter of the second transistor is grounded; the other end of the tenth resistor (R56) is connected to the digital ground (LOCK_GND) and one end of the eleventh resistor (R59); the other end of the eleventh resistor (R59) is connected to the drain of the first MOS transistor and the gate of the second MOS transistor.

[0036] The first transistor (Q7) and the second transistor (Q13) are NPN transistors. The second output end of the optical coupler (U12) is combined with the digital ground to serve as a control output end with a delayed cathode lock.

[0037] The electric lock power supply module comprises an input end, a first grounding end, a second grounding end and an output end. The input end of the electric lock power supply module is connected to a second unlocking signal, the first grounding end and the second grounding end are both grounded, and the output end is electrically connected to a drain of the first MOS tube (TR1) and a gate of the second MOS tube (Q4).

[0038] The electric lock drive circuit also includes a surge protection module, which includes: a second diode (D2), a third diode (D3) and a fourth diode (D1); an anode end of the second diode (D2) is connected to the first output end of the optical coupler (U12) and a digital ground (LOCK_GND), and a cathode end of the second diode (D2) is connected to the second output end of the optical coupler (U12) and one end of the fourth resistor (R54); an anode end of the third diode (D3) is connected to the digital ground (LOCK_GND), and a cathode end of the third diode (D3) is connected to the third pin of the wiring terminal (CN2), one end of the fourth diode (D1) and the drain of the second MOS tube (Q4); one end of the fourth diode (D1) is connected to the cathode end of the third diode (D3) and the drain of the second MOS tube (Q4), and the other end of the fourth diode (D1) is connected to the first external power supply and the source of the second MOS tube (Q4).

[0039] Specifically, in the electric lock driving circuit: one end of the first resistor (R103) is electrically connected to the common connection terminal digital signal voltage (+3.3V_STD), and the other end of the first resistor (R103) is electrically connected to the first input terminal 1 of the optical coupler (U12); the first resistor (R103) is preferably 330 ohms; or other resistors that meet the standards;

[0040] One end of the second resistor (R80) is electrically connected to the first unlocking signal (N_UNLOCK), and the other end of the second resistor (R80) is electrically connected to one end of the third resistor (R46) and the base of the first transistor (Q7); the second resistor (R80) is preferably 10K ohms in resistance and 1 / 16W in power; or other resistors that meet the standards;

[0041] One end of the third resistor (R46) is electrically connected to one end of the second resistor (R80) and the base of the first transistor (Q7), and the other end of the third resistor (R46) is electrically connected to the emitter of the first transistor (Q7) and ground; the third resistor (R46) preferably has a resistance of 4.7K ohms and a power of 1 / 16W; or other resistors that meet the standards;

[0042] One end of the fourth resistor (R54) is electrically connected to one end of the fifth resistor (R58) and the gate of the first MOS tube (TR1), and the other end of the fourth resistor (R54) is electrically connected to the second output end 4 of the optical coupler (U12) and the cathode of the second diode (D2); the fourth resistor (R54) is preferably 100K ohms in resistance and 1 / 16W in power; or other resistors that meet the standards;

[0043] One end of the fifth resistor (R58) is electrically connected to one end of the fourth resistor (R54) and the gate of the first MOS transistor (TR1), and the other end of the fifth resistor (R58) is electrically connected to the source of the first MOS transistor (TR1); the fifth resistor (R58) is preferably 100K ohms in resistance and 1 / 16W in power; or other resistors that meet the standards;

[0044] One end of the sixth resistor (R222) is electrically connected to one end of the first capacitor (C100) and the source of the second MOS transistor (Q4), and the other end of the sixth resistor (R222) is electrically connected to the other end of the first capacitor (C100) and the gate of the second MOS transistor (Q4); the sixth resistor (R222) is preferably 100K ohms in resistance and 1 / 16W in power; or other resistors that meet the standards;

[0045] One end of the seventh resistor (R1) is electrically connected to the cathode of the first diode (D54), and the other end of the seventh resistor (R1) is electrically connected to one end of the second capacitor (C310); the seventh resistor (R1) preferably has a resistance of 180 ohms and a power of 1W; or other resistors that meet the standards;

[0046] One end of the eighth resistor (R160) is electrically connected to the second unlocking signal (P_UNLOCK), and the other end of the eighth resistor (R160) is electrically connected to one end of the ninth resistor (R165) and the base of the second transistor (Q13); the eighth resistor (R160) is preferably 2K ohm in resistance and 1 / 16W in power; or other resistors that meet the standards;

[0047] One end of the ninth resistor (R165) is electrically connected to one end of the eighth resistor (R160), and the other end of the ninth resistor (R165) is grounded. The ninth resistor (R165) is preferably 100K ohm in resistance and 1 / 16W in power; or other resistors that meet the standards;

[0048] One end of the tenth resistor (R56) is electrically connected to the collector of the second transistor (Q13), and the other end of the tenth resistor (R56) is electrically connected to one end of the eleventh resistor (R59) and to the digital ground (LOCK_GND); the tenth resistor (R56) is preferably 10K ohm in resistance and 1 / 16W in power; or other resistors that meet the standards;

[0049] One end of the eleventh resistor (R59) is electrically connected to one end of the tenth resistor (R56), and the other end of the eleventh resistor (R59) is electrically connected to the drain of the first MOS tube (TR1); the eleventh resistor (R59) is preferably 100K ohms in resistance and 1 / 16W in power; or other resistors that meet the standards;

[0050] An anode end of the first diode (D54) is electrically connected to a second external power source (+12V), and a cathode end of the first diode (D54) is electrically connected to one end of the seventh resistor (R1);

[0051] An anode end of the second diode (D2) is electrically connected to the first output end 3 of the optical coupler (U12) and a digital ground (LOCK_GND), and a cathode end of the second diode (D2) is electrically connected to the second output end 4 of the optical coupler (U12) and one end of the fourth resistor (R54);

[0052] The anode end of the third diode (D3) is connected to the digital ground (LOCK_GND), and the cathode end of the third diode (D3) is electrically connected to the drain of the second MOS tube (Q4) and one end of the fourth diode (D1);

[0053] One end of the fourth diode (D1) is electrically connected to the source of the second MOS transistor (Q4), and the other end of the fourth diode (D1) is electrically connected to the drain of the second MOS transistor (Q4);

[0054] The fourth diode (D1) is a unidirectional transient diode, the second diode D2 is a transient diode, and the third diode (D3) and the first diode (D54) are ordinary diodes.

[0055] The base of the first transistor (Q7) is electrically connected to the second resistor (R80) and one end of the third resistor (R46), the emitter of the first transistor (Q7) is electrically connected to the other end of the third resistor (R46) and to ground, and the collector of the first transistor (Q7) is electrically connected to the second input end 2 of the optical coupler (U12);

[0056] The base of the second transistor (Q13) is electrically connected to one end of the eighth resistor (R160) and the ninth resistor (R165), the emitter of the second transistor (Q13) is grounded, and the collector of the second transistor (Q13) is electrically connected to one end of the tenth resistor (R56);

[0057] Wherein, the first transistor (Q7) and the second transistor (Q13) are NPN transistors;

[0058] One end of the first capacitor (C100) is electrically connected to one end of the fifth resistor (R58), and the other end of the first capacitor (C100) is electrically connected to the drain of the first MOS transistor (TR1) and the gate of the second MOS transistor (Q4);

[0059] One end of the second capacitor (C310) is electrically connected to one end of the seventh resistor (R1), and the other end of the second capacitor (C310) is grounded;

[0060] The gate of the first MOS transistor (TR1) is electrically connected to the fifth resistor (R58) and one end of the fourth resistor (R54), the source of the first MOS transistor (TR1) is electrically connected to the other end of the fifth resistor (R58) and one end of the first capacitor (C100), and the drain of the first MOS transistor (TR1) is electrically connected to the gate of the second MOS transistor (Q4) and one end of the eleventh resistor (R59);

[0061] The gate of the second MOS tube (Q4) is electrically connected to the drain of the first MOS tube (TR1), the source of the second MOS tube (Q4) is electrically connected to one end of the sixth resistor (R222), and the drain of the second MOS tube (Q4) is electrically connected to one end of the fourth diode (D1) and the cathode of the third diode (D3).

[0062] The connection terminal (CN2) comprises at least a first pin 1, a second pin 2, a third pin 3, a fourth pin 4 and a fifth pin 5; wherein the first pin 1 is connected to a power supply voltage, the second pin 2 is connected to a digital ground, the third pin 3 is connected to a cathode end of the third diode (D3), the fourth pin 4 is grounded, and the fifth pin 5 is connected to the second output end 4 of the optocoupler (U12).

[0063] When the electric lock drive circuit is connected to a cathode lock without a delay, the first pin 1 and the second pin 2 are connected to a power supply, and the second pin 2 and the third pin 3 are connected to the cathode lock; the second unlocking signal (P_UNLOCK) is at a low level, the second transistor (Q13) is in a disconnected state, the first unlocking signal (N_UNLOCK) is at a high level, the first transistor (Q7) is in an open state, the optical coupler (U12) is in an on state, the first output end 3 of the optical coupler (U12) outputs a signal, the first MOS tube (TR1) and the second MOS tube (Q4) are turned on, the gate of the second MOS tube (Q4) is connected to a high-level power supply signal, and then the second MOS tube (Q4) stops conducting, the cathode lock connected to the second pin 2 and the third pin 3 is powered off, and the cathode lock is powered off to open the door; when the first unlocking signal (N_UNLOCK) returns to a low level, the second MOS tube (Q4) continues to conduct, the cathode lock is powered on, and the cathode lock is converted into a pull-in state to close the door.

[0064] When the electric lock driving circuit is connected to a cathode lock with a time delay, the second pin 2 and the fifth pin 5 are connected to the cathode lock; when the first unlocking signal (N_UNLOCK) is at a high level, the first transistor (TR1) is turned on, the first output end and the second output end of the optical coupler (U12) are low impedance, and the cathode lock is closed and unlocked; when the first unlocking signal (N_UNLOCK) is at a low level, the optical coupler (U12) is not turned on, the second output end 4 and the first output end 3 of the optical coupler (U12) are high impedance, and the cathode lock is powered off and locked; wherein the high level width of the first unlocking signal (N_UNLOCK) is 0.5 seconds.

[0065] When the electric lock drive circuit is connected to the anode lock, the third pin 3 and the fourth pin 4 are connected to the anode lock; when the second unlocking signal (P_UNLOCK) is at a high level, the second transistor (Q13) is turned on, the second MOS tube (Q4) is turned on, the electric energy of the second capacitor (C310) is output to the third pin 3 through the second MOS tube (Q4), and the anode lock receives the power signal to unlock; after 0.5 seconds, the second MOS tube (Q4) returns to the cut-off state, and the second capacitor (C310) is recharged.

[0066] The electric lock driving circuit provided in this embodiment also has a surge protection design.

[0067] Specifically, the combination of surge protection tests includes:

[0068] Combination 1: The first pin 1 is connected to the second pin 2, the third pin 3, the fourth pin 4 and the fifth pin 5 respectively. The surge protection principle is as follows: in the surge channel, the resistance of the fourth resistor (R54) and the tenth resistor (R56) is at least 100K ohms, the resistance of the eleventh resistor (R59) is at least 10K ohms, the fourth resistor (R54), the tenth resistor (R56) and the eleventh resistor (R59) are used to attenuate surge current and protect the optical coupler (U12) and the second transistor (Q13), the fourth diode (D1) is a unidirectional transient diode, and the fourth diode (D1) provides overvoltage protection for the second MOS tube (Q4).

[0069] Combination 2: The second pin 2 is respectively connected to the third pin 3, the fourth pin 4 and the fifth pin 5 in combination. The principle of surge protection is: in the surge channel, the resistance of the fourth resistor (R54) and the tenth resistor (R56) is at least 100K ohms, and the resistance of the eleventh resistor (R59) is at least 10K ohms. The fourth resistor (R54), the tenth resistor (R56) and the eleventh resistor (R59) are used to attenuate surge current and protect the optical coupler (U12) and the second transistor (Q13).

[0070] Combination 3: The third pin 3 is connected to the fourth pin 4 and the fifth pin 5 respectively. The principle of surge protection is: the fourth diode (D1) is a unidirectional transient diode, and the fourth diode (D1) provides overvoltage protection for the second MOS tube (Q4).

[0071] Combination 4: the fourth pin 4 and the fifth pin 5 are connected in combination, and the principle of surge protection is: the second diode (D2) is a transient diode, and the second diode (D2) provides overvoltage protection for the optical coupler (U12).

[0072] In the electric lock drive circuit provided in this embodiment, all resistor devices, capacitor devices, optocoupler devices, diode devices, triode devices and MOS tube devices can be produced using a general chip manufacturing process; the terminal blocks use a plug-in chip manufacturing process. The first resistor, the second resistor, the third resistor, the fourth resistor, the fifth resistor, the sixth resistor, the seventh resistor, the eighth resistor, the ninth resistor, the tenth resistor and the eleventh resistor in the electric lock drive circuit are all chip resistors; the first capacitor and the second capacitor are chip capacitors; the first diode, the second diode, the third diode and the fourth diode are all chip diodes.

[0073] The electric lock driving circuit provided in this embodiment is as follows Figure 2 On the basis of the single MOS tube driving circuit in the prior art shown, a first diode (D54), a seventh resistor (R1) and a second capacitor (C310) are added as energy storage to replace the additional power supply to power the anode lock; a second triode (Q13), a tenth resistor (R56), an eighth resistor (R160) and a ninth resistor (R165) are added as the control end of the anode lock, and a dedicated pin is added to the wiring terminal CN2 to separate it from the cathode lock control end, which is conducive to avoiding unexpected faults caused by wrong wiring in the circuit.

[0074] The electric lock driving circuit provided in this embodiment can simultaneously drive three 3A electric control locks and one cathode lock with delayed time of any specification without providing additional power supply; after providing additional power supply, it can simultaneously drive six 1.5A cathode locks without delayed time, and the driving circuit will not generate significant heat.

[0075] This embodiment also provides an electric drive lock, which uses the electric lock drive circuit provided in the above embodiment.

[0076] An electric lock drive circuit and an electric drive lock provided in this embodiment design a new electric lock drive circuit, adopt the design concept of optocoupler and MOS tube, match different software control, and be compatible with most common electric locks by connecting different wiring terminals. It realizes the patch production process and is compatible with most electric locks on the market. It solves the problem of surge protection in the circuit and the problem of production cost, improves the load problem in the circuit, reduces interference to other circuits, and has an isolation effect.

[0077] The technical features of the above-mentioned embodiments can be combined arbitrarily. In order to make the description concise, not all possible combinations of the technical features of the above-mentioned embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0078] The above-described embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be construed as limiting the scope of the patent application. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent application shall be subject to the attached claims.

Claims

1. An electric lock driving circuit, characterized in that: The electric lock driving circuit includes: a MOS driving module, a power supply module, an electric lock power supply module and a wiring terminal; wherein, The MOS driving module includes: an optical coupler, a first resistor, a first transistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a first MOS transistor, a second MOS transistor, a sixth resistor and a first capacitor; the optical coupler includes a first input terminal, a second input terminal, a first output terminal and a second output terminal; one end of the first resistor is connected to the digital signal voltage, and the other end is connected to the first input terminal of the optical coupler; the collector of the first transistor is connected to the second input terminal of the optical coupler, and the emitter of the first transistor is grounded; one end of the second resistor is connected to the first unlocking signal, and the other end is connected to the base of the first transistor; one end of the third resistor is connected to the first unlocking signal, and the other end is connected to the base of the first transistor; one end of the third resistor is connected to the first unlocking signal, and the other end is connected to the base of the first transistor; one end of the third resistor is connected to the first unlocking signal, and the other end is connected to the base of the first transistor; one end of the third resistor is connected to the first unlocking signal, and the other end of the third resistor is connected to the first unlocking signal. The base of the first transistor is connected, and the other end is grounded; the first output end of the optical coupler is connected to the digital ground; one end of the fifth resistor is connected in series with the fourth resistor, and the other end is connected to the first external power supply; the gate of the first MOS tube is connected between the fourth resistor and the fifth resistor, and the source of the first MOS tube is connected to the first external power supply; the gate of the second MOS tube is connected to the drain of the first MOS tube, one end of the sixth resistor and the lower plate of the first capacitor, and the source of the second MOS tube is connected to the first external power supply; the other end of the sixth resistor and the upper plate of the first capacitor are both connected to the first external power supply; The power supply module includes an input end, a ground end and an output end, the input end of the power supply module is connected to the second external power supply, the ground end of the power supply module is grounded, and the output end of the power supply module is connected to the source of the first MOS tube, the upper plate of the first capacitor, the sixth resistor, and the source of the second MOS tube; The electric lock power supply module includes an input end, a first ground end, a second ground end and an output end, the input end of the electric lock power supply module is connected to the second unlocking signal, the first ground end and the second ground end are both grounded, and the output end is electrically connected to the drain of the first MOS tube and the gate of the second MOS tube; The power supply module is connected to the source of the first MOS tube, the upper plate of the first capacitor, the sixth resistor, and the source of the second MOS tube; The electric lock power supply module is electrically connected to the drain of the first MOS tube and the gate of the second MOS tube; The connection terminal is connected to the first external power supply, the power supply module, the digital ground, the MOS driving module, the anode lock and the cathode lock.

2. The electric lock driving circuit according to claim 1, characterized in that: The power supply module includes: a first diode, a seventh resistor and a second capacitor; the anode end of the first diode is connected to the input end of the power supply module, the cathode end of the first diode is connected to one end of the seventh resistor, the other end of the seventh resistor is connected to the upper plate of the second capacitor, the source of the first MOS tube, the upper plate of the first capacitor, the sixth resistor, and the source of the second MOS tube, and the lower plate of the second capacitor is grounded.

3. The electric lock driving circuit according to claim 1, characterized in that: The electric lock power supply module includes: an eighth resistor, a ninth resistor, a tenth resistor, an eleventh resistor and a second transistor; one end of the eighth resistor is connected to the input end of the electric lock power supply module, and the other end is connected to one end of the ninth resistor and the base of the second transistor; the other end of the ninth resistor is grounded; the emitter of the second transistor is connected to the second grounding end, the collector of the second transistor is connected to one end of the tenth resistor, and the emitter of the second transistor is grounded; the other end of the tenth resistor is connected to the digital ground and one end of the eleventh resistor; the other end of the eleventh resistor is connected to the drain of the first MOS tube and the gate of the second MOS tube.

4. The electric lock driving circuit according to claim 3, characterized in that: The first transistor and the second transistor are NPN transistors.

5. The electric lock driving circuit according to claim 1, characterized in that: The second output terminal of the optical coupler is combined with the digital ground to serve as a control output terminal with delayed cathode lock.

6. The electric lock driving circuit according to claim 1, characterized in that: It also includes a surge protection module, which includes: a second diode, a third diode and a fourth diode; the anode end of the second diode is connected to the first output end of the optocoupler and the digital ground, and the cathode end of the second diode is connected to the second output end of the optocoupler and one end of the fourth resistor; the anode end of the third diode is connected to the digital ground, and the cathode end of the third diode is connected to the third pin of the wiring terminal, one end of the fourth diode and the drain of the second MOS tube; one end of the fourth diode is connected to the cathode end of the third diode and the drain of the second MOS tube, and the other end of the fourth diode is connected to the first external power supply and the source of the second MOS tube.

7. An electrically driven lock, characterized in that: The electrically driven lock comprises the electric lock driving circuit according to any one of claims 1-6.

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