A system architecture, method and device for embedded full-connection real-time communication

By adopting an embedded, fully connected, real-time communication system architecture, independent processing of different business logics and point-to-point real-time data exchange are achieved, solving the problems of mutual influence and latency under the centralized data processing system architecture, and improving the independence and response speed of the acquisition and execution unit.

CN114860645BActive Publication Date: 2026-03-17NARI TECH CO LTD +1
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-04-22
Publication Date
2026-03-17

AI Technical Summary

Technical Problem

Existing merging units or integrated intelligent devices adopt a centralized data processing system architecture, which leads to mutual interference between different business logics, an expanded range of system failures, and high data transmission latency, failing to meet the independence and timeliness requirements of the new generation of independently controllable acquisition and execution units.

Method used

An embedded, fully connected, real-time communication system architecture is adopted, utilizing at least two communication nodes and a full-duplex mesh topology network. An embedded multi-core CPU is deployed, an operating system is deployed on the main control board, and other cores are bare-metal software. The application program runs on the bare-metal software core to achieve point-to-point real-time data exchange.

Benefits of technology

It enhances the system's independence and robustness, reduces real-time data exchange latency, improves operational efficiency and business independence, and increases response speed.

✦ Generated by Eureka AI based on patent content.

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Abstract

The application discloses a system architecture, a method and equipment for embedded full-connection real-time communication, and the architecture comprises at least two communication nodes connected with core boards and gigabit full-duplex Ethernet links connected between the nodes; the core boards are provided with embedded multi-core CPUs, and one of the core boards is selected as a main control board; one core of the multi-core CPU of the main control board is selected to deploy an embedded operating system, and the remaining cores directly run bare machine software without deploying the operating system; all the cores of the multi-core CPU of the core board other than the main control board do not deploy the operating system and directly run the bare machine software; and an application program module for processing business logic runs on the core of the bare machine software. Through input variable tables and input variable tables, all real-time data exchanges can be directly exchanged in point-to-point real-time synchronization, various businesses can be processed in parallel and decoupled and independently run, and the businesses do not affect each other, so that the running processing efficiency is improved.
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Description

Technical Field

[0001] This invention belongs to the field of common platform technology for power secondary equipment, specifically relating to an embedded fully connected real-time communication system architecture, method, and acquisition and execution unit device that applies the system architecture and method. Background Technology

[0002] Digital substations, as a crucial component of smart grids, comprise a three-layer structure: process layer, bay layer, and station control layer. The merging unit, acting as a data interface device, collects electrical quantities transmitted from primary transformers in the process layer and provides this data, conforming to the digital standard (IEC 61850), to various types of secondary equipment in the bay layer, including protection and control systems. Furthermore, existing integrated smart substations, in addition to possessing all the functions of the merging unit, are also required to have intelligent terminal functionality, including collecting location information from circuit breakers and disconnectors and transmitting it to the bay layer, as well as receiving tripping and remote control commands from the bay layer. Therefore, the efficiency and stability of data acquisition and processing by the merging unit and integrated smart substation play a vital role in the operation of digital substations.

[0003] Existing merging units or integrated intelligent devices adopt a centralized data processing system architecture, that is, using only one core board (CPU board) to run business logic and process data. After the acquisition board receives the acquired data from the electronic instrument transformer or cascade merging unit, all data is centralized to the CPU board; after being processed by different business logics such as protection transmission, measurement and control transmission, and cascade merging unit transmission on the CPU board, the data is forwarded to the intelligent transmission board; and then sent to different types of devices such as protection, measurement and control, and cascade merging units through different communication ports of the intelligent transmission board.

[0004] In this architecture, all different business logics are processed centrally on the CPU board. The coupled program execution makes them prone to mutual interference. If one business logic malfunctions, it may affect other business logics, potentially causing subsequent measurement, control, protection, and stability control devices that receive sampled data to fail, thus expanding the scope of system failures. Furthermore, the serial processing of data through multiple stages, including the acquisition board, CPU board, and intelligent transmission board, results in a relatively high data transmission delay, significantly impacting the rapid fault isolation protection.

[0005] Currently, the device specifications for the independently controllable new generation of data acquisition and execution units require that different sampling modules (intervals, buses, etc.) within the data acquisition and execution unit be independent of each other. An abnormality in the sampling circuit of any module should not cause abnormalities in the data processing of other sampling circuits. This places higher demands on the independence of different services, the robustness of the device, and the timeliness of data processing. The centralized data processing system architecture adopted by existing integrated intelligent devices cannot meet the development requirements of the independently controllable new generation of data acquisition and execution units. Summary of the Invention

[0006] This invention addresses the technical problem that the centralized data processing system architecture used in existing integrated intelligent devices cannot meet the development requirements of a new generation of independently controllable acquisition and execution units, and provides an embedded fully connected real-time communication system architecture, method, and device.

[0007] To achieve the above-mentioned technical objectives, the present invention adopts the following technical solution.

[0008] On one hand, the present invention provides a system architecture for embedded fully connected real-time communication, comprising: at least two communication nodes, wherein the communication nodes are connected through a full-duplex mesh topology communication network, and each communication node is equipped with a core board; one of the core boards is selected as the main control board;

[0009] The core board is equipped with an embedded multi-core CPU, and one of the cores of the main control board is equipped with an embedded operating system.

[0010] All cores on the main control board, except for the core that deploys the operating system, as well as all cores on other core boards that are not part of the main control board, are bare-metal software cores and do not deploy an embedded operating system; applications that process business logic run on the bare-metal software cores.

[0011] Secondly, the present invention provides an embedded fully connected real-time communication method, which is applied to an embedded fully connected real-time communication system architecture provided by the above technical solutions. The method includes: deploying a main control module in the kernel of the operating system deployed on the main control board, and deploying auxiliary modules on the bare-metal software kernels of the main control board and non-main control boards.

[0012] During the initialization phase, each auxiliary module registers with the main controller module;

[0013] After successful registration, the main control module obtains the output variable table and input variable table for each auxiliary module that interacts with the peer auxiliary module. The output variable table includes the output module identifier, input module identifier, message length, output variable index, output variable attribute, and output variable mapping address. The input variable table includes the input module identifier, output module identifier, message length, input variable index, input variable attribute, and input variable mapping address.

[0014] During the operation phase, the auxiliary module receives data exchange messages sent by the peer auxiliary module, parses the messages according to the input variable table, and obtains the mapping address for retrieving values ​​and the variable index for storage.

[0015] The auxiliary module parses the output variable table to obtain the mapping address for writing the output variables and the variable index for storage. The auxiliary module retrieves the output data from the corresponding variable index, assembles the packet, fills it into the corresponding message mapping address, and sends the data exchange message to the peer auxiliary module.

[0016] The auxiliary module interacts with the application for data exchange.

[0017] Furthermore, the various auxiliary modules are registered with the main controller module, including:

[0018] The main control module receives registration information sent by each auxiliary module. The registration information sent by each auxiliary module includes the variable index, signal name, and variable attributes of the input variables, or the variable index, signal name, and variable attributes of the output variables.

[0019] The main control module reads a pre-determined configuration file and obtains the link relationship information between output variables and input variables from the configuration file;

[0020] The main control module compiles data exchange messages between each pair of auxiliary modules based on the registration information and the link relationship information of output and input variables sent by each auxiliary module; and determines the message length and input or output variable mapping address of each auxiliary module based on the compiled data exchange messages between each pair of auxiliary modules.

[0021] The main control module determines the output variable table and input variable table of each auxiliary module for each peer interaction auxiliary module, and sends the output variable table and input variable table of each auxiliary module for each peer interaction auxiliary module to each auxiliary module respectively.

[0022] Furthermore, during the initialization phase, before the main control module receives the registration information sent by each auxiliary module, it includes:

[0023] The application modules on each bare-metal software core pass the variable index, signal name, and variable attributes of the input or output variables that need to be interacted with to the auxiliary modules according to the function interface provided by the auxiliary modules on that core;

[0024] The auxiliary module sends the variable index, signal name, and variable attribute registration information, including the input or output variable, to the main control module.

[0025] Furthermore, prior to the initialization phase, the following is included:

[0026] After each core board is powered on and started, the main control module sends a broadcast probe message;

[0027] After receiving the probe message, each auxiliary module replies with a response message to the main control module;

[0028] After receiving all response messages, the main control module sends an instruction message to all auxiliary modules to enter initialization.

[0029] Furthermore, after receiving the output variable table and input variable table of the auxiliary module that it interacts with from the peer, each auxiliary module parses the content and sends the parsing result to the main control module.

[0030] After receiving the parsing results from all auxiliary modules, the main control module sends the execution instructions to all auxiliary modules.

[0031] All auxiliary modules enter the running phase after receiving the running instruction.

[0032] Thirdly, the present invention provides a data acquisition execution unit, which executes an embedded fully connected real-time communication method provided by any possible embodiment of the above technical solutions. The data acquisition execution unit includes: a bus backplane, a main control board, an AC acquisition board, at least one service board, a communication board, and an intelligent IO board.

[0033] The main control board, AC acquisition board, at least one service board, communication board, and intelligent IO board are all core boards, and each core board is inserted into the bus backplane via a plug-in card.

[0034] One main control module is deployed on the operating system kernel of the main control board;

[0035] Multiple auxiliary modules are deployed on each bare-metal software core of the main control board and the remaining boards;

[0036] During operation, the AC acquisition board and communication board receive electrical quantity data from the outside and store it in local variables; during the initialization phase, these variables are registered as output signals through an auxiliary module.

[0037] During the initialization phase, the intelligent I / O board registers external input variables as output signals and external output variables as input signals through an auxiliary module.

[0038] The service board runs applications for different services; during the initialization phase, the application registers input signals through an auxiliary module; during the operation phase, the application obtains data from the input signals, assembles network packets according to standards, and sends them out from the local network port.

[0039] Furthermore, it also includes a configuration file generation module, which is used to link the output signals of the AC acquisition board, communication board, and intelligent IO board to the input signals of the service board and intelligent IO board.

[0040] The beneficial technical effects achieved by this invention are as follows:

[0041] The system architecture proposed in this invention includes at least two communication nodes connecting core boards, and gigabit full-duplex Ethernet links connecting each node. The core boards are equipped with embedded multi-core CPUs and shared memory between cores, all adopting an asymmetric system architecture. One of the at least two core boards is selected as the main control board. On the multi-core CPU of the main control board, one core is selected to deploy an embedded operating system, while the remaining cores run bare-metal software directly. All cores of the multi-core CPUs of the core boards other than the main control board do not deploy operating systems and run bare-metal software directly. The application module that processes business logic runs on the bare-metal software core.

[0042] The embedded fully connected real-time communication system architecture and method described in this invention enable applications of different types of services to be deployed on different core boards, allowing each service to be processed in parallel and decoupled to run independently without affecting each other, thereby improving processing efficiency and system robustness. At the same time, all real-time data exchanges can be directly exchanged point-to-point in real time, which reduces the latency of real-time data exchange compared to a centralized processing system architecture.

[0043] The data acquisition and execution unit device described in this invention utilizes the embedded fully connected real-time communication system architecture and method described in this invention; different applications run on independent core boards; data received by the AC acquisition board and communication board is transmitted to these core boards point-to-point, in real-time, and synchronously; compared with existing merging units and integrated intelligent devices, this deployment improves the operational efficiency and robustness of these services; furthermore, data no longer needs to be centrally processed before being transmitted to the transmitting board, reducing the rated latency required for processing and forwarding electrical and status quantities, and making it faster to respond to interval layer commands, execute tripping, remote control, and measurement of primary equipment. Attached Figure Description

[0044] Figure 1 This is a schematic diagram of the system architecture for embedded fully connected real-time communication according to an embodiment of the present invention;

[0045] Figure 2 This is a schematic diagram illustrating the module interaction and process of the system software in an embodiment of the present invention;

[0046] Figure 3 This is a schematic diagram of the configuration file for the system software in an embodiment of the present invention;

[0047] Figure 4 This is a schematic diagram of the OVT orchestration of the system software in an embodiment of the present invention;

[0048] Figure 5 This is a schematic diagram of the IVT orchestration of the system software in an embodiment of the present invention;

[0049] Figure 6 This is a typical hardware block diagram of the acquisition and execution unit device according to an embodiment of the present invention. Detailed Implementation

[0050] like Figure 1 As shown, in this embodiment, the embedded fully connected real-time communication system architecture includes: 4 communication nodes and 6 gigabit full-duplex Ethernet links that connect each other to the communication nodes, thereby forming a full-duplex mesh topology communication network;

[0051] The hardware synchronization system includes a clock module and a CAN bus on the core board to ensure interrupt synchronization and clock synchronization of all core board CPUs, with high timekeeping capability.

[0052] The four communication nodes connect to the four core boards;

[0053] One set of system software;

[0054] All four core boards are equipped with embedded dual-core CPUs, have inter-core shared memory, and all adopt an asymmetric system architecture; among the four core boards, [the following is a selection process]... Figure 1 The one in the upper left corner serves as the main control panel;

[0055] One core (OS core) of the dual-core CPU on the main control board is used to deploy an embedded operating system, while the other core (bare core) does not deploy an operating system and runs bare-metal software directly.

[0056] In addition to the main control board, all cores (bare cores) of the dual-core CPUs on the three core boards run bare-metal software directly without an operating system; the application module (APP) that processes business logic runs on the bare-metal software core.

[0057] The interaction between the system software modules located on the same board is achieved through shared memory between CPU cores; the interaction between the system software modules located on different boards is achieved through the full-duplex mesh topology real-time communication network.

[0058] Figure 1 The system software consists of one main control module and seven auxiliary modules; the main control module is deployed on the OS core of the main control board; the seven auxiliary modules are deployed on the seven bare cores of the main control board and the core board, respectively.

[0059] The interaction between system software modules located on the same board is achieved through shared memory between CPU cores; the interaction between system software modules located on different boards is achieved through the full-duplex mesh topology communication network.

[0060] Thus, the system architecture for embedded fully connected real-time communication was realized;

[0061] The embedded fully connected real-time communication method of the present invention, i.e., the functional logic of the system software, is implemented in this embodiment as follows:

[0062] like Figure 2 As shown, the system software is divided into an initialization phase and a running phase in the time domain; the initialization phase is divided into two initialization sub-phases: initialization sub-phase 1 and initialization sub-phase 2;

[0063] Figure 2 Taking the interaction and process between the main control module and the two auxiliary modules in this embodiment as an example, we will explain the process control of the entire system sub-stage, configuration file parsing, and data exchange message arrangement handled by the main control module, as well as the variable information registration, data exchange message arrangement information parsing, and real-time synchronization and exchange of variable data handled by the auxiliary modules; the specific steps are as follows:

[0064] Step 1: After the device is powered on, the main control module sends a broadcast detection message;

[0065] Step 2: After receiving the probe message, the auxiliary module replies with a response message to the main control module;

[0066] Step 3: After receiving all response messages, the main control module enters the initialization sub-stage 1 and simultaneously sends instruction messages to all auxiliary modules to enter sub-stage 1.

[0067] Step 4: After receiving the message, the auxiliary module enters sub-stage 1;

[0068] Step 5: The application module transmits the variable index, signal name, and variable attributes of the input or output variables that need to be interacted with to the attached drawing module according to the function interface provided by the auxiliary module;

[0069] The auxiliary module sends variable registration information such as variable index, signal name, and variable attributes to the main control module;

[0070] Step 6: After all variable registration information has been sent, the auxiliary module sends a registration end message and simultaneously enters initialization sub-phase 2;

[0071] Step 7: After receiving the registration completion message from all auxiliary modules, the main control module enters the initialization sub-stage 2;

[0072] Step 8: The main control module reads the configuration file;

[0073] Step 9: The main control module compiles data exchange messages between each pair of auxiliary modules based on the link relationship information; and for each auxiliary module, it compiles an output variable table (OTV) and an input variable table (IVT) for each peer auxiliary module.

[0074] Step 10: The main control module sends 6 OVTs to auxiliary module 1, corresponding to 6 peer auxiliary modules that receive the output data sent from auxiliary module 1; sends 6 OVTs to auxiliary module 2, corresponding to 6 peer auxiliary modules that receive the output data sent from auxiliary module 2; and so on, until 6 OVTs are sent to auxiliary module 7, corresponding to 6 peer auxiliary modules that receive the output data sent from auxiliary module 7.

[0075] Step 11: The main control module sends 6 IVTs to auxiliary module 1, corresponding to 6 peer auxiliary modules that send output data to auxiliary module 1; sends 6 IVTs to auxiliary module 2, corresponding to 6 peer auxiliary modules that send output data to auxiliary module 2; and so on, until 6 IVTs are sent to auxiliary module 7, corresponding to 6 peer auxiliary modules that send output data to auxiliary module 7.

[0076] Step 12: After receiving and parsing all OVT and IVT, the auxiliary module sends the parsing results to the main control module;

[0077] Step 13: After receiving the parsing results from all auxiliary modules, the main control module sends run commands to all auxiliary modules.

[0078] Step 14: After receiving the run instruction, the auxiliary module enters the running phase;

[0079] Step 15: During the running phase, each auxiliary module receives and parses the data exchange messages sent by the other 6 auxiliary modules at the beginning of each interrupt, and parses the data from the message mapping address to the corresponding variable index, thereby updating the input data of the application module;

[0080] Step 16: The application module runs the business logic processing and updates its output data;

[0081] Step 17: The auxiliary module retrieves the output data from the corresponding variable index, assembles the packet, fills it into the corresponding message mapping address, and sends the data exchange message to the other 6 auxiliary modules;

[0082] Step 18: Repeat steps 15 to 17 for each interruption;

[0083] like Figure 3 As shown, the configuration file contains the linking information of the output and input variables of the application modules on different boards or cores in the form of the signal names;

[0084] like Figure 4 As shown, the OVT contains information about the data exchange message sent by the auxiliary module to a specific peer auxiliary module, including message length information and mapping information between the local output variable index and the address in the message;

[0085] like Figure 5 As shown, the IVT includes information about the data exchange message received by the auxiliary module from a specific peer auxiliary module, including message length information and mapping information between the address of the data in the message and the index of the local input variable;

[0086] Figure 3 , Figure 4 and Figure 5 The data exchange message orchestration, OVT, and IVT are illustrated using three auxiliary modules in this embodiment as examples.

[0087] Main control module read Figure 3 The configuration file, based on the signal names in the configuration file, corresponds to the registration information entries received in initialization sub-phase 1; based on the registration subsidiary module identifier, variable index, variable attributes, etc. of the entries, the data exchange messages between each pair of subsidiary modules are arranged, and OVTs (On-Version Messages) are generated and sent to different subsidiary modules. Figure 4 ) and IVT ( Figure 5 );

[0088] Figure 3 In the first line, "signal_out_1" is an output signal name, and "signal_in_11" is an input signal name, indicating that the output value of "signal_out_1" needs to be passed to "signal_in_11" as its input value; the second line indicates that the output value of "signal_out_2" needs to be passed to "signal_in_12" as its input value; and so on;

[0089] Figure 4 and Figure 5 In the diagram, the first and second columns, representing the auxiliary module identifiers, are unique identifiers for each auxiliary module, containing the board number and core number of that module for easy addressing during point-to-point real-time data exchange. "M1" is the identifier for auxiliary module 1, and the identifier information carried by "M1" is (see reference). Figure 1 The board consists of 1 core and 2 sub-cores; "M2" is the identifier for sub-module 2, and the identification information for "M2" is as follows (see reference). Figure 1 The components are: 2 boards, 1 core; "M3" is the identifier for auxiliary module 3, and the identification information carried by "M3" is (see reference). Figure 1 The components are: 2 boards and 2 cores.

[0090] like Figure 4 As shown, the first column represents the output auxiliary module of the data exchange sender, which is also the target auxiliary module for the main control module to send OVT; the second column represents the input auxiliary module of the data exchange receiver; the third column represents the length of the data exchange message; and the last three columns contain specific information about the output variables.

[0091] by Figure 4 Taking the first OVT as an example, it contains data exchange information from auxiliary module 1 to auxiliary module 2; the total message length is 5, and it contains 5 output variables;

[0092] The first variable index is "INDEX_1", corresponding to Figure 3 The "signal_out_1" in the message has the attribute TYPE1 and its mapping address in the message is 0;

[0093] The second variable index is "INDEX_2", corresponding to Figure 3 The "signal_out_2" in the message has the attribute TYPE1 and its mapping address in the message is 1;

[0094] The third variable index is "INDEX_3", corresponding to Figure 3 The "signal_out_3" in the message has the attribute TYPE1 and the mapped address in the message is 2;

[0095] The fourth variable index is "INDEX_4", corresponding to Figure 3 The "signal_out_4" in the message has the attribute TYPE2 and its mapping address in the message is 3;

[0096] The fifth variable has an index of "INDEX_5", corresponding to... Figure 3 The "signal_out_5" in the message has the attribute TYPE4 and its mapped address in the message is 4;

[0097] Thus, auxiliary module 1 obtains the variable index for retrieving values ​​and the mapping address for storing data, which are required when outputting data to auxiliary module 2;

[0098] like Figure 5 As shown, the first column represents the input auxiliary module of the data exchange receiver, which is also the target auxiliary module for the main control module to send IVT; the second column represents the output auxiliary module of the data exchange sender; the third column represents the length of the data exchange message; and the last three columns contain specific information about the input variables.

[0099] Taking the data exchange from auxiliary module 1 to auxiliary module 2 as an example, the corresponding IVT is: Figure 5 The third IVT in the message; the total message length is 5, containing 5 input variables;

[0100] The first variable index is "INDEX_11", corresponding to Figure 3 The "signal_in_11" in the message has the attribute TYPE1 and its mapping address in the message is 0;

[0101] The second variable index is "INDEX_12", corresponding to Figure 3 The "signal_in_12" in the message has the attribute TYPE1 and the mapping address in the message is 1;

[0102] The third variable index is "INDEX_13", corresponding to Figure 3 The "signal_in_13" in the message has the attribute TYPE1 and the mapped address in the message is 2;

[0103] The fourth variable index is "INDEX_14", corresponding to Figure 3 The "signal_in_14" in the message has the attribute TYPE2 and the mapped address in the message is 3;

[0104] The fifth variable index is "INDEX_15", corresponding to Figure 3 The "signal_in_15" in the message has the attribute TYPE4 and its mapping address in the message is 4;

[0105] Thus, auxiliary module 2 obtains the mapping address for retrieving values ​​and the variable index for storage, etc., required for parsing data from the variable exchange message sent by auxiliary module 1;

[0106] Thus, Figure 3 The data exchange in the first 5 rows, that is, the data exchange from auxiliary module 1 to auxiliary module 2; Figure 3 The remaining data exchange messages are arranged in Figure 4 OVT and Figure 5 The IVT is arranged according to the above rules;

[0107] Therefore, the embedded fully connected real-time communication method of the present invention, that is, the functional logic of the system software, enables all real-time data exchange to be directly point-to-point and synchronized in real time through the input variable table and the input variable table.

[0108] Example 2:

[0109] This embodiment describes in detail the acquisition and execution unit device of the present invention.

[0110] The acquisition and execution unit device described in this invention applies the embedded fully connected real-time communication system architecture and method described in this invention.

[0111] like Figure 6The diagram shows a typical hardware block diagram of a data acquisition and execution unit device based on an embedded, fully connected, real-time communication system architecture. The main control board 1, core board 2, core board 3, AC acquisition board 4, communication board 5, and intelligent I / O board 6 are typical boards. The communication nodes and gigabit full-duplex Ethernet links are deployed on the bus backplane 7. The main control board 1, core board 2, core board 3, AC acquisition board 4, communication board 5, and intelligent I / O board 6 are inserted into the bus backplane 7 via plug-in cards and interact with data through signals interconnected via the bus backplane 7. The bus backplane 1 is designed with a hardware synchronization bus 70, a CAN management bus 71, a high-speed communication bus 72, and a sampling bus 73.

[0112] When the data acquisition and execution unit is working, the AC acquisition board 4 receives analog signal information transmitted from electromagnetic, electronic, or photoelectric current transformers from outside the device and sends it directly to core board 2 and core board 3 via sampling bus 73. After processing by the business logic of the application module in core board 2, the bus protection logic is sent directly from the external communication port of this board. After processing by the business logic of the application module in core board 3, the interval protection logic is sent directly from the external communication port of this board. At the same time, core boards 2 and 3 can control the communication board 5 to send bus measurement and control logic via high-speed communication bus 72. The main control board 1 synchronizes the clock and interrupts of core board 2, core board 3, and communication board 5 via hardware synchronization bus 70 to achieve real-time communication. The main control board 1 collects remote signal input and remote control output functions from the intelligent IO board 6 via CAN management bus 71 to realize remote closing and opening of circuit breakers and disconnectors, as well as unlocking and locking control. Core boards 2 and 3 and the main control board 1 achieve real-time data interaction via high-speed communication bus 72.

[0113] Figure 6 The acquisition and execution unit device of the present invention shown has the following characteristics:

[0114] 1. After the sampling information is processed by the application module of core board 2 and core board 3, it can be sent directly from the external communication port of this board, which greatly reduces the rated delay of the device in forwarding data.

[0115] 2. The interaction between different processor cores within the main control board 1, core board 2 and core board 3 is achieved through inter-core shared memory, and the inter-board interaction is achieved through the embedded fully connected real-time communication system architecture proposed in this invention;

[0116] 3. Application modules for different business types are distributed across different boards, enabling parallel processing, which improves robustness and operational efficiency. Data does not need to be forwarded through the main control board, reducing the rated latency caused by data forwarding.

[0117] 4. The main control board 1 synchronizes the clock and interrupts of the core board 2, core board 3 and communication board 5 through the hardware synchronization bus 70, which has a high timekeeping capability.

[0118] Those skilled in the art will understand that embodiments of this application can be provided as methods, systems, or computer program products. Therefore, this application can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, this application can take the form of a computer program product embodied on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0119] This application is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of this application. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart... Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0120] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.

[0121] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0122] The embodiments of the present invention have been described above with reference to the accompanying drawings. However, the present invention is not limited to the specific embodiments described above. The specific embodiments described above are merely illustrative and not restrictive. Those skilled in the art can make many other forms under the guidance of the present invention without departing from the spirit and scope of the claims. All of these forms are within the protection scope of the present invention.

Claims

1. A system architecture for embedded all-connectivity real-time communication, characterized in that, The system comprises: at least two communication nodes connected through a full-duplex mesh topology communication network, each of which is provided with a core board; one of the core boards is determined as a master control board; the core boards are provided with embedded multi-core CPUs, one of the cores of the master control board is provided with an embedded operating system; the remaining cores of the master control board except the core provided with the operating system and all the cores of the non-master control boards are provided as bare software cores without embedded operating system; application programs for processing business logic run on the bare software cores; the master control board is provided with a master control module in the core provided with the operating system, and the bare software cores of the master control board and the non-master control boards are provided with auxiliary modules; a hardware synchronization system is further included, which comprises clock modules on the core boards and CAN buses to ensure synchronization of interrupts and clocks of all the core boards.

2. An embedded all-connectivity real-time communication method, characterized by, The method is applied to the system architecture of the embedded full-connection real-time communication system as claimed in claim 1, and the method comprises: in an initialization stage, each auxiliary module registers with the master controller module; after successful registration, each auxiliary module obtains an output variable table and an input variable table of the auxiliary module and a peer auxiliary module sent by the master control module; the output variable table comprises an output module identifier, an input module identifier, a message length, an output variable index, an output variable attribute and an output variable mapping address; the input variable table comprises an input module identifier, an output module identifier, a message length, an input variable index, an input variable attribute and an input variable mapping address; in a running stage, the auxiliary module receives a data exchange message sent by the peer auxiliary module, parses the message according to the input variable table, and obtains a mapping address for value acquisition and a variable index for storage; the auxiliary module parses the output variable table, obtains a mapping address for writing the output variable and a variable index for storage, acquires output data from the corresponding variable index, fills the data into the corresponding message mapping address, and sends a data exchange message to the peer auxiliary module; the auxiliary module interacts with the application program.

3. The method of claim 2, wherein, the registration of each auxiliary module with the master controller module comprises: the master control module receives registration information sent by each auxiliary module, the registration information sent by each auxiliary module comprises a variable index, a signal name and a variable attribute of an input variable of each auxiliary module, or a variable index, a signal name and a variable attribute of an output variable; the master control module reads a pre-determined configuration file, and obtains linkage relationship information of the output variable and the input variable from the configuration file; the master control module compiles data exchange messages between two auxiliary modules according to the registration information sent by each auxiliary module and the linkage relationship information of the output variable and the input variable, and determines a message length and an input variable or output variable mapping address corresponding to each auxiliary module according to the compiled data exchange messages between two auxiliary modules. The main control module determines the output variable table and the input variable table of each subsidiary module to each peer interactive subsidiary module, and sends the output variable table and the input variable table of each subsidiary module to each peer interactive subsidiary module to each subsidiary module respectively.

4. The method of claim 3, wherein, Before the initialization stage, the main control module receives the registration information sent by each subsidiary module, and the registration information includes: The application module on each core board transmits the variable index, signal name and variable attribute of the input variable or output variable to be interacted to the subsidiary module according to the function interface provided by the subsidiary module on the core board; The subsidiary module sends the registration information including the variable index, signal name and variable attribute of the input variable or output variable to the main control module.

5. The method of claim 2, wherein, Before the initialization stage, the main control module sends a broadcast detection packet after each core board is powered on; After receiving the detection packet, each subsidiary module replies an answer packet to the main control module; After receiving all the answer packets, the main control module sends an instruction packet to enter the initialization to all the subsidiary modules. After receiving the output variable table and the input variable table of the peer interactive subsidiary module sent by the main control module, each subsidiary module analyzes the content and sends the analysis result to the main control module; 6. The method of claim 2, wherein, After receiving the analysis result of all the subsidiary modules, the main control module sends a running instruction to all the subsidiary modules; After receiving the running instruction, all the subsidiary modules enter the running stage. The collection and execution unit executes the embedded full-connection real-time communication method, and the collection and execution unit comprises a bus backboard, a main control board, an AC collection board, at least one service board, a communication board and an intelligent IO board.

7. A harvesting execution unit, characterized by, The main control board, the AC collection board, the at least one service board, the communication board and the intelligent IO board are core boards, and each core board is inserted into the bus backboard in the form of a plug-in card. One main control module is arranged on the operating system core of the main control board. A plurality of subsidiary modules are arranged on each bare machine software core of the main control board and the remaining boards. The AC collection board and the communication board receive electrical quantity data from the outside and store the data into local variables in the running stage, and the variables register output signals through the subsidiary modules in the initialization stage. The intelligent IO board registers external input variables as output signals and registers external output variables as input signals through the subsidiary modules in the initialization stage. The service board runs application programs of different services, and the application programs register input signals through the subsidiary modules in the initialization stage, and in the running stage, the application programs obtain data from the input signals, form network packets according to standards, and send the network packets from local network ports. The configuration file generation module is further arranged to link the output signals of the AC collection board, the communication board and the intelligent IO board to the input signals of the service board and the intelligent IO board.

8. The harvesting execution unit of claim 7, wherein, The services of the application programs of different services include bus protection sending, multi-functional bus measurement and control sending, interval collection and execution unit sending and / or interval protection sending services.

9. The harvesting execution unit of claim 7, wherein, ​

Citation Information

Patent Citations

  • Relay protection device multi-core CPU embedded system processing method and platform

    CN108155619A

  • Device based on fast bus and multistage system coordination management and management method of device

    CN111865551A