An implementation method for Fast Fourier Transform and Inverse Fourier Transform

Abstract

The present application is applicable to the field of data processing technology, and provides a method for implementing fast Fourier transform and inverse transform. In the embodiment of the present application, the data length of the data to be calculated is obtained; when the data length of the data to be calculated is less than or equal to half of the registers in the preset register group, the register group is discretized, and the data to be calculated and the first preset rotation factor are input into the discretized register group; the connection between the register group and the preset two-dimensional systolic array is reconstructed through re-discrete processing; the register group after re-discrete processing is butterfly operated according to the preset Fourier transform rule, and the fast Fourier transform result of the data to be calculated is determined according to the butterfly operation result, thereby improving the calculation speed when solving the fast Fourier transform result of the data.

Description

Technical Field

[0001] The present application belongs to the field of data processing technology, and in particular to a method for implementing fast Fourier transform and inverse transform. Background Art

[0002] In modern information processing, such as in the fields of acoustics, signal processing, digital image processing, etc., fast Fourier transform is often used to process relevant data in modern information. However, the existing fast Fourier transform calculation of data through a single floating point results in a low calculation speed. Summary of the invention

[0003] The embodiment of the present application provides a method for implementing fast Fourier transform and inverse transform, which can solve the problem of low calculation speed when calculating the fast Fourier transform of data through a single floating point.

[0004] In a first aspect, an embodiment of the present application provides a method for implementing a fast Fourier transform, including:

[0005] Get the data length of the data to be calculated;

[0006] When the data length of the data to be calculated is less than or equal to half of the registers in the preset register group, the register group is discretized, and the data to be calculated and the first preset rotation factor are input into the discretized register group;

[0007] Reconstructing the connection between the register group and the preset two-dimensional systolic array by re-discretization;

[0008] A butterfly operation is performed on the register group after the discretization process according to a preset Fourier transform rule, and a fast Fourier transform result of the data to be calculated is determined according to the butterfly operation result.

[0009] In a second aspect, an embodiment of the present application provides a method for implementing an inverse fast Fourier transform, including:

[0010] Get the data length of the data to be processed;

[0011] When the data length of the data to be processed is less than or equal to half of the registers in the preset register group, the register group is discretized, and the data to be processed and the second preset rotation factor are input into the discretized register group;

[0012] Reconstructing the connection between the register group and the preset two-dimensional systolic array by re-discretization;

[0013] According to the preset Fourier transform rule, a butterfly operation is performed on the register group after the discretization process, and data scaling is performed on the butterfly operation result to obtain the fast Fourier inverse transform result of the data to be processed.

[0014] In a third aspect, an embodiment of the present application provides a device for implementing a fast Fourier transform, including:

[0015] A length acquisition module is used to obtain the data length of the data to be calculated;

[0016] A discrete module, used for discretizing the register group when the data length of the data to be calculated is less than or equal to half of the registers in the preset register group, and inputting the data to be calculated and the first preset rotation factor into the discretized register group;

[0017] A reconstruction processing module, used for reconstructing the connection between the register group and the preset two-dimensional systolic array through re-discretization processing;

[0018] The operation module is used to perform butterfly operation on the register group after the discretization according to the preset Fourier transformation rule, and determine the fast Fourier transformation result of the data to be calculated according to the butterfly operation result.

[0019] In a fourth aspect, an embodiment of the present application provides a terminal device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements the steps of any one of the above-mentioned methods for implementing a fast Fourier transform or any one of the above-mentioned methods for implementing an inverse fast Fourier transform when executing the computer program.

[0020] In a fifth aspect, an embodiment of the present application provides a computer-readable storage medium, wherein the computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps of implementing any one of the above-mentioned methods for implementing a fast Fourier transform or any one of the above-mentioned methods for implementing an inverse fast Fourier transform are implemented.

[0021] In a sixth aspect, an embodiment of the present application provides a computer program product. When the computer program product is run on a terminal device, the terminal device executes any one of the fast Fourier transform implementation methods in the first aspect or any one of the inverse fast Fourier transform implementation methods in the second aspect.

[0022] In the embodiment of the present application, the data length of the data to be calculated is obtained, and the data to be calculated is judged according to the data length of the data to be calculated, and the calculation method of the data to be calculated is determined. When the data length of the data to be calculated is less than or equal to half of the registers in the preset register group, the register group is discretized, and the data to be calculated and the first preset rotation factor are input into the discretized register group, and the connection between the register group and the preset two-dimensional systolic array is reconstructed through re-discretization. Finally, a butterfly operation is performed on the register group after the re-discretization according to the preset Fourier transform rule, so as to determine the fast Fourier transform result of the data to be calculated according to the butterfly operation result, so as to store the calculated data through the register group, and calculate the register group through the two-dimensional systolic array to solve the fast Fourier transform result, so as to improve the calculation speed when solving the fast Fourier transform result of the data. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0024] Figure 1 It is a flowchart of a method for implementing a fast Fourier transform provided in an embodiment of the present application;

[0025] Figure 2 is a structural diagram of a data processing system provided in an embodiment of the present application;

[0026] Figure 3 It is a schematic diagram of a discrete processing method provided in an embodiment of the present application;

[0027] Figure 4 It is a schematic diagram of a re-discretization processing method provided in an embodiment of the present application;

[0028] Figure 5 is a schematic diagram of a first preset array transformation method provided in an embodiment of the present application;

[0029] Figure 6 It is a schematic diagram of a recovery method after redispersion provided in an embodiment of the present application;

[0030] Figure 7 It is a schematic diagram of the first second preset array transformation method provided in an embodiment of the present application;

[0031] Figure 8 is a schematic diagram of a second preset array transformation method provided in an embodiment of the present application;

[0032] Fig. 9is a schematic diagram of a third second preset array transformation method provided in an embodiment of the present application;

[0033] Fig.10 is a schematic diagram of a fourth second preset array transformation method provided in an embodiment of the present application;

[0034] Fig.11 is a schematic diagram of a third preset array transformation method provided in an embodiment of the present application;

[0035] Fig.12 It is a flowchart of a method for implementing an inverse fast Fourier transform provided in an embodiment of the present application;

[0036] Fig.13 It is a structural schematic diagram of a device for implementing a fast Fourier transform provided in an embodiment of the present application;

[0037] Fig.14 It is a schematic diagram of the structure of the terminal device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0038] In the following description, specific details such as specific system structures, technologies, etc. are provided for the purpose of illustration rather than limitation, so as to provide a thorough understanding of the embodiments of the present application. However, it should be clear to those skilled in the art that the present application may also be implemented in other embodiments without these specific details. In other cases, detailed descriptions of well-known systems, devices, circuits, and methods are omitted to prevent unnecessary details from obstructing the description of the present application.

[0039] In addition, in the description of the present application specification and the appended claims, the terms "first", "second", "third", etc. are only used to distinguish the descriptions and cannot be understood as indicating or implying relative importance.

[0040] Embodiment 1

[0041] Figure 1 FIG. 1 is a flow chart of a method for implementing a fast Fourier transform in an embodiment of the present application. The execution subject of the method may be a terminal device, such as Figure 1 As shown, the implementation method of the above fast Fourier transform may include the following steps:

[0042] Step S101, obtaining the data length of the data to be calculated.

[0043] In one embodiment, Figure 2 As shown, Figure 22 is a structural diagram of a data processing system, which can implement the implementation method of the fast Fourier transform, and can include a controller 21, a register group 22, a two-dimensional systolic array 23, a high-speed bus 24 and a data storage module 25. The controller 21 is responsible for starting and controlling each component in the data processing system to implement the implementation method of the fast Fourier transform, which is equivalent to the terminal device in this embodiment; the register group 22 can be composed of N*N registers, that is, the data can be divided into N groups, each group of N, N is a power of 2, the register width can be set according to user needs, and the register group needs to be cleared when calculating the register group; the two-dimensional systolic array 23 is a rectangular structure, which can be composed of N*N multiplication and addition units of the same type, and the two-dimensional systolic array 23 can be used to calculate matrix bitwise addition, subtraction, multiplication, and matrix multiplication; the high-speed bus 24 inputs or outputs data to the data storage module 25 through high-speed interconnection; the data storage module 25 is used to store data.

[0044] It can be understood that the register group 22 may include at least one group of register groups. For example, in this embodiment, three groups of register groups with completely identical structures and functions may be used to implement the fast Fourier transform implementation method. Specifically, the three groups of register groups are the first register group 221, the second register group 222, and the third register group 223, and the first register group 221 includes register group A and register group BA, the second register group 222 includes register group B and register group BB, and the third register group 223 includes register group C and register group BC. Among them, the register group BA, register group BB, and register group BC can be used to cache data, but are not interconnected with the computing array, that is, equivalent to the cache register group, and the register group A, register group B, and register group C can be used to cache and process data, that is, equivalent to the processing register group.

[0045] Step S102: determine whether the data length of the data to be calculated is less than or equal to half of the registers in the preset register group.

[0046] If yes, execute step S103 to step S105; if no, execute step S106 and subsequent steps.

[0047] In this embodiment, if the number of registers in the register group is N*N, and is represented by k, then half the number of registers is k / 2.

[0048] Step S103: discretize the register group, and input the data to be calculated and the first preset rotation factor into the discretized register group.

[0049] In this embodiment, the terminal device performs discrete processing on the register group according to a preset discrete processing mode to discretize the register group. It can be understood that the discrete processing can be used to heterogeneously transform the register group into k / 16 groups of register groups with a size of 4*4. For example, the register group BA can be discretized into k / 16 groups of register groups with a size of 4*4, such as ba1, ba2, ba3, ba4, etc., and the register group A can perform the same operation to discretize into k / 16 groups of register groups with a size of 4*4, such as a1, a2, a3, a4, etc. Figure 3 As shown, when N is 8, register group A is discretized into a1, a2, a3, and a4.

[0050] In one embodiment, the register group includes a first processing register group, a cache register group, and a second processing register group, and the first processing register group is connected to the cache register group. In step S102, inputting the data to be calculated and the first preset rotation factor into the discrete register group may include: splitting the data to be calculated into the first data to be calculated and the second data to be calculated, that is, taking the storage position of the data to be calculated as the starting address, the first n / 2 data are the first data to be calculated, and the last n / 2 data are the second data to be calculated. And input the first data to be calculated into the first processing register group, which is a discrete register group, such as the discrete generated register group corresponding to register group A. Input the second data to be calculated into the second processing register group, which is a discrete register group, such as the discrete generated register group corresponding to register group B. Input the first preset rotation factor into the cache register group according to the storage position of the first preset rotation factor, that is, take the storage position of the first preset rotation factor as the starting address to move n / 2 first preset rotation factors into the discrete generated register group corresponding to register group BA. It can be understood that, based on the Fourier transform rule, when carrying n2 first preset rotation factors, the rotation factor at the position corresponding to the number of cycles is selected, where n is the data length of the data to be calculated.

[0051] Step S104: reconstructing the connection between the register group and the preset two-dimensional systolic array by re-discretization.

[0052] In this embodiment, the terminal device reconstructs the connection between the register group and the two-dimensional systolic array according to a preset re-discretization processing method, that is, the discretized register group is re-discretized. It can be understood that the re-discretization processing can be used to generate register groups a1, a2, a3, a4, etc., b1, b2, b3, b4, etc., c1, c2, c3, c4, etc. by discretizing the register groups A, B, and C in the register group, and then re-isomerize them into 4 groups of register groups with a size of 2*2. For example, the register group a1 can be discretized into 4 groups of register groups a11, a12, a13, 14, etc. with a size of 2*2 by performing the same operation. The discretized register groups are recombined with the two-dimensional systolic array in order. At this time, the granularity of the calculated data is 2*2, such as Figure 4 As shown, Figure 4 The following is a schematic diagram of register group discretization when N is 8. By discretizing the A, B, and C register groups, the target register groups AC0, AC1, AC2, and AC3 are obtained. Figure 4 There are four calculation domains in each target register in , for example, the calculation domain in the upper left corner of AC0 is AC01, the calculation domain in the upper right corner is AC02, the calculation domain in the lower left corner is AC03, and the calculation domain in the lower right corner is AC04, and data processing and calculation are performed on each calculation domain respectively; the calculation domain in the upper left corner of AC1 is AC11, the calculation domain in the upper right corner is AC12, the calculation domain in the lower left corner is AC13, and the calculation domain in the lower right corner is AC14, and data processing and calculation are performed on each calculation domain respectively; the calculation domain in the upper left corner of AC2 is AC21, the calculation domain in the upper right corner is AC22, the calculation domain in the lower left corner is AC23, and the calculation domain in the lower right corner is AC24, and data processing and calculation are performed on each calculation domain respectively; the calculation domain in the upper left corner of AC3 is AC31, the calculation domain in the upper right corner is AC32, the calculation domain in the lower left corner is AC33, and the calculation domain in the lower right corner is AC34, and data processing and calculation are performed on each calculation domain respectively.

[0053] Step S105 , performing butterfly operation on the register group after the discretization process according to a preset Fourier transform rule, and determining a fast Fourier transform result of the data to be calculated according to the butterfly operation result.

[0054] In one embodiment, step S105 includes: determining a target number of operations according to the data length of the data to be calculated; determining an array transformation set according to a Fourier transform rule, the array transformation set including at least one array transformation method arranged in a preset order; performing butterfly operations on the register group after the discretization processing in sequence according to the array transformation methods in the array transformation set until the number of butterfly operations is equal to the target number, and determining the butterfly operation result.

[0055] Specifically, the above-mentioned butterfly operation is performed on the register group after the discretization processing in the array transformation method in the array transformation set in order, including: performing data processing on the register group after the discretization processing in the array transformation method to obtain the register group after the data processing; performing butterfly operation on the register group after the data processing through a two-dimensional systolic array. Among them, the above-mentioned array transformation method includes but is not limited to a first preset array transformation method, a second preset array transformation method and a third preset array transformation method, and the processing methods of the first preset array transformation method, the second preset array transformation method and the third preset array transformation method are as follows.

[0056] Exemplarily, the number of calculations c is set to log2n, n is the data length of the data to be calculated, and step S105 includes the following steps:

[0057] The first step is to determine a first preset array transformation method according to the Fourier transform rule, and process the data in the discretized register group in the first preset array transformation method. Figure 5 As shown, in the calculation domain AC01, the data to be calculated X0_r, X1_r, X0_r, X0_i and the first preset rotation factors W0_r, W0_i are mapped according to the first preset array transformation mode, and a butterfly operation is performed to update the value of c to c-1, wherein the specific calculation formula is as follows:

[0058] P0_r=X0_r+X1_r*W0_r–X1_i*W0_i;

[0059] P0_i=X0_i+X1_r*W0_i+X1_i*W0_r;

[0060] P1_r=X0_r–X1_r*W0_r+X1_i*W0_i;

[0061] P1_i=X0_i–X1_r*W0_i–X1_i*W0_r.

[0062] When register group N is 8, through Figure 5 The calculation method can obtain the calculation results of each calculation domain corresponding to each target register group, and the calculation results are P0_r, P1_r, P2_r...P31_r, and P0_i, P1_i, P2_i...P31_i.

[0063] It can be understood that the above-mentioned first preset array transformation method can be used to adjust the position of input data in each register, and move the same group of first preset rotation factors from register groups ba1, ba2, ba3, ba4, etc. to b11, b12, b13, b14, etc., b21, b22, b23, b24, etc., b31, b32, b33, b34, etc., b41, b42, b43, b44, etc. in the new register group structure.

[0064] The second step is to determine whether c is 0. When c is 0, the recovery method after discretization is determined according to the Fourier transform rule. The register group structure is restored according to the recovery method after discretization. The result diagram of the register when N is 8 is as follows: Figure 6 As shown, the storage location of the calculation result is used as the starting address to move n data from the register group generated after the discretization of register group A to the data storage module, and the calculation is completed.

[0065] When c is not 0, a second preset array transformation mode is determined according to the Fourier transform rule, and the data in the re-discrete register group is processed in the second preset array transformation mode. Figure 7 As shown, when facing the calculation domain AC01, the previous round of calculation results P0_r, P0_i, P2_r, P2_i and the first preset rotation factors W0_r, W0_i are mapped according to the second preset array transformation method, and a butterfly operation is performed to update the value of c to c-1, where the specific calculation formula is as follows:

[0066] Q0_r=P0_r+P2_r*W0_r–P2_i*W0_i;

[0067] Q0_i=P0_i+P2_r*W0_i+P2_i*W0_r;

[0068] Q2_r=P0_r–P2_r*W0_r+P2_i*W0_i;

[0069] Q2_i=P0_i–P2_r*W0_i–P2_i*W0_r.

[0070] When register group N is 8, through Figure 7 The calculation method can obtain the calculation results of each calculation domain corresponding to each target register group, and the calculation results are Q0_r, Q1_r, Q2_r...Q31_r, and Q0_i, Q1_i, Q2_i...Q31_i.

[0071] It can be understood that the above-mentioned recovery method after rediscrete can be used to cause each register group generated by rediscrete register groups to keep data unchanged and reorganize into discrete register groups according to the original position order. For example, register groups a11, a12, a13, a14, etc. generated after register group a1 is discretized can execute this operation to reorganize into register a1.

[0072] It can be understood that the second preset array transformation method can be used to adjust the position of the data in each register generated by the calculation after the first preset array transformation method is processed, and to carry two sets of first preset rotation factors from the register groups ba1, ba2, ba3 and ba4 to spread to b11, b12, b13, b14, b21, b22, b23, b24, b31, b32, b33, b34, b41, b42, b43, b44 in the new register group structure, and then When the transformation is performed for the nth time, based on the new register group structure generated by the first preset array transformation method, the position of the data in each register generated by the calculation after the previous round of transformation is adjusted, and the first preset rotation factor of the transfer group ba1, ba2, ba3 and ba4 is diffused to b11, b12, b13, b14, b21, b22, b23, b24, b31, b32, b33, b34, b41, b42, b43, b44 in the new register group structure.

[0073] The third step is to determine whether c is 0. When c is 0, the recovery method after re-discretization is determined according to the Fourier transform rule, and the register group structure is restored according to the recovery method after re-discretization. The storage location of the calculation result is used as the starting address to move n data from the register group generated after the discretization of register group A to the data storage module. The calculation is now completed.

[0074] When c is not 0, a second preset array transformation mode is determined according to the Fourier transform rule, and the data in the re-discrete register group is processed in the second preset array transformation mode. Figure 8 As shown, when facing the calculation domain AC01, the previous round of calculation results Q0_r, Q0_i, Q4_r, Q4_i and the first preset rotation factors W0_r, W0_i are mapped according to the second preset array transformation method, and a butterfly operation is performed to update the value of c to c-1, where the specific calculation formula is as follows:

[0075] R0_r=Q0_r+Q4_r*W0_r–Q4_i*W0_i;

[0076] R0_i=Q0_i+Q4_r*W0_i+Q4_i*W0_r;

[0077] R4_r=Q0_r–Q4_r*W0_r+Q4_i*W0_i;

[0078] R4_i=Q0_i–Q4_r*W0_i–Q4_i*W0_r.

[0079] When register group N is 8, through Figure 7 The calculation method can obtain the calculation results of each calculation domain corresponding to each target register group, and the calculation results are R0_r, R1_r, R2_r...R31_r, and R0_i, R1_i, R2_i...R31_i.

[0080] The fourth step is to determine whether c is 0. When c is 0, the recovery method after re-discretization is determined according to the Fourier transform rule, and the register group structure is restored according to the recovery method after re-discretization. The storage location of the calculation result is used as the starting address to move n data from the register group generated after the discretization of register group A to the data storage module. The calculation is now completed.

[0081] When c is not 0, a second preset array transformation mode is determined according to the Fourier transform rule, and the data in the re-discretized register group is processed in the second preset array transformation mode. Fig. 9 As shown, when facing the calculation domain AC01, the previous round of calculation result R0_r and the first preset rotation factors W0_r and W0_i are mapped according to the second preset array transformation method, and a butterfly operation is performed to update the value of c to c-1, wherein the specific calculation formula is as follows:

[0082] S0_r=R0_r+R8_r*W0_r–R8_i*W0_i;

[0083] S0_i=R0_i+R8_r*W0_i+R8_i*W0_r;

[0084] S8_r=R0_r–R8_r*W0_r+R8_i*W0_i;

[0085] S8_i=R0_i–R8_r*W0_i–R8_i*W0_r.

[0086] When register group N is 8, through Fig. 9 The calculation method can obtain the calculation results of each calculation domain corresponding to each target register group, and the calculation results are S0_r, S1_r, S2_r...S31_r, and S0_i, S1_i, S2_i...S31_i.

[0087] The fifth step is to determine whether c is 0. When c is 0, the recovery method after re-discretization is determined according to the Fourier transform rule, and the register group structure is restored according to the recovery method after re-discretization. The storage location of the calculation result is used as the starting address to move n data from the register group generated after the discretization of register group A to the data storage module. The calculation is now completed.

[0088] When c is not 0, a second preset array transformation mode is determined according to the Fourier transform rule, and the data in the re-discretized register group is processed in the second preset array transformation mode. Fig.10 As shown, when facing the calculation domain AC01, the previous round of calculation result Q and the first preset rotation factor W are mapped according to the second preset array transformation method and a butterfly operation is performed, and the value of c is updated to c-1, wherein the specific calculation formula is as follows:

[0089] T0_r=S0_r+S16_r*W0_r–S16_i*W0_i;

[0090] T0_i=S0_i+S16_r*W0_i+S16_i*W0_r;

[0091] T16_r=S0_r–S16_r*W0_r+S16_i*W0_i;

[0092] T16_i=S0_i–S16_r*W0_i–S16_i*W0_r.

[0093] When register group N is 8, through Fig.10 The calculation method can obtain the calculation results of each calculation domain corresponding to each target register group, and the calculation results are T0_r, T1_r, T2_r...T31_r, and T0_i, T1_i, T2_i...T31_i.

[0094] The sixth step is to determine the recovery method after re-discretization according to the Fourier transform rule, restore the register group structure according to the recovery method after re-discretization, and use the storage location of the calculation result as the starting address to move n data from the register group generated after the discretization of register group A to the data storage module. The calculation is now completed.

[0095] It is understandable that when facing other calculation domains, the calculation method corresponding to the above-mentioned calculation domain AC01 is also used for solving, and accordingly, the specific value of the first rotation factor corresponding to each calculation domain can be determined according to the fast Fourier transform rule.

[0096] In one embodiment, the terminal device determines in advance the operation type of the data to be calculated based on the identification information carried by the data to be calculated, that is, what operation needs to be performed on the data to be calculated at present, and then determines the corresponding target control algorithm based on the obtained operation type, and determines the corresponding rules from the algorithm, such as the Fourier transform rules used in the implementation method of the fast Fourier transform in this embodiment.

[0097] Step S106: Divide the data to be calculated into a plurality of data groups to be calculated.

[0098] Specifically, the terminal device may group the data to be calculated with a granularity of k, that is, n / k=q, and there are q data groups to be calculated.

[0099] Step S107 , discretizing the register groups corresponding to the data groups to be calculated, and inputting the data groups to be calculated and the first preset rotation factors into the register groups corresponding to the discretized data groups to be calculated.

[0100] Specifically, the terminal device discretizes the register group according to a preset discrete processing method to discretize the register group. The storage location of the data to be calculated is used as the starting address, and the first k / 2 data are input into the discretized register group corresponding to the register group A, and the latter k / 2 data are input into the discretized register group corresponding to the register group B. The storage location of the first preset rotation factor is used as the starting address to transfer k / 2 first preset rotation factors to the discretized register group corresponding to the register group BA. It can be understood that based on the Fourier transform rule, when transferring the k / 2 first preset rotation factors, the rotation factors at the corresponding position of the loop number are selected.

[0101] Step S108 , reconstructing the connection between the register group and the two-dimensional systolic array corresponding to each discretized data group to be calculated through re-discretization processing.

[0102] Step S109: performing butterfly operations on the register groups corresponding to the discretized data groups to be calculated according to the Fourier transform rule, and determining target result data according to the butterfly operation results corresponding to the data groups to be calculated.

[0103] Exemplarily, the number of calculations c is set to log2n, n is the data length of the data to be calculated, and step S109 includes the following steps:

[0104] The first step is to determine the first preset array transformation method according to the Fourier transform rule, map the data to be calculated X and the first preset rotation factor W according to the first preset array transformation method and perform a butterfly operation to obtain a calculation result P, and update the value of c to c-1, wherein the specific calculation formula can refer to the corresponding part of the above example.

[0105] In the second step, the second preset array transformation method is determined according to the Fourier transform rule, and the previous round calculation result P and the first preset rotation factor W are mapped according to the second preset array transformation method and a butterfly operation is performed to obtain the calculation result Q, and the value of c is updated to c-1, where the specific calculation formula can refer to the corresponding part of the above example.

[0106] The third step is to determine the second preset array transformation method according to the Fourier transform rule, map the previous round calculation result Q and the first preset rotation factor W according to the second preset array transformation method and perform a butterfly operation to obtain the calculation result R, and update the value of c to c-1, where the specific calculation formula can refer to the corresponding part of the above example.

[0107] The fourth step is to determine the second preset array transformation method according to the Fourier transform rule, map the previous round calculation result R and the first preset rotation factor W according to the second preset array transformation method and perform a butterfly operation to obtain the calculation result S, and update the value of c to c-1, where the specific calculation formula can refer to the corresponding part of the above example.

[0108] The fifth step is to determine the second preset array transformation method according to the Fourier transform rule, map the previous round calculation result S and the first preset rotation factor W according to the second preset array transformation method and perform a butterfly operation to obtain the calculation result T, and update the value of c to c-1, where the specific calculation formula can refer to the corresponding part of the above example.

[0109] The sixth step is to determine the recovery method after re-discretization according to the Fourier transform rule, restore the register group structure according to the recovery method after re-discretization, and use the storage location of the calculation result as the starting address to move n data from the register group generated after the discretization of register group A to the data storage module, and update the q value to q value minus 1.

[0110] Step 7, q value determination, when q is not 0, update the storage location of the data to be calculated to the sum of the last round storage location of the data to be calculated and the word length of k data storage; update the storage location of the calculation result to the sum of the last round storage location of the calculation result and the word length of k data storage, and loop through steps 1 to 7. When the q value is 0, update the q value to the initial value of q; update the storage location of the data to be calculated to the initial storage location of the data to be calculated; update the storage location of the calculation result to the initial storage location of the calculation result, set the value of parameter i to 2*n / k-1, and execute step S110.

[0111] Step S110, transposing the target result data through a two-dimensional systolic array, and processing the transposed target result data according to a Fourier transform rule to obtain a fast Fourier transform result of the data to be calculated.

[0112] In this embodiment, the transposition process is equivalent to treating the n results obtained by the above calculation as a matrix of size 2*n / 2. Through the matrix transposition operation of the two-dimensional systolic array, the matrix of size 2*n / 2 can be transposed into a matrix of n / 2*2, and the matrix is ​​placed back into the data storage module with the storage location of the data to be calculated as the starting address.

[0113] In one embodiment, the processing of the target result data after the transposition processing according to the Fourier transform rule may include:

[0114] In the first step, the target result data after transposition processing is input into the register group.

[0115] Specifically, the terminal device discretizes the register group according to the preset discrete processing method to discretize the register group. The storage position of the target result data after the transposition processing is used as the starting address, and the first k / 2 data are input into the discretized register group corresponding to the register group A, and the latter k / 2 data are input into the discretized register group corresponding to the register group B. The storage position of the first preset rotation factor is used as the starting address to transfer k / 2 first preset rotation factors to the discretized register group corresponding to the register group BA. It can be understood that based on the Fourier transform rule, the rotation factor corresponding to the position of the loop number is selected when transferring the k / 2 first preset rotation factors.

[0116] The second step is to determine a third preset array transformation method according to the Fourier transform rule, and process the data in the discretized register group in the third preset array transformation method. Fig.11 As shown, when facing the calculation domain AC01, the transposed result Y and the first preset rotation factor W are mapped according to the third preset array transformation method, and a butterfly operation is performed:

[0117] U0_r=Y0_r+Y1_r*W0_r–Y1_i*W0_i;

[0118] U0_i=Y0_i+Y1_r*W0_i+Y1_i*W0_r;

[0119] U1_r=Y0_r–Y1_r*W0_r+Y1_i*W0_i;

[0120] U1_i=Y0_i–Y1_r*W0_i–Y1_i*W0_r.

[0121] When register group N is 8, through Fig.11 The calculation method can obtain the calculation results of each calculation domain corresponding to each target register group, and the calculation results are U0_r, U1_r, U2_r...U31_r, and U0_i, U1_i, U2_i...U31_i.

[0122] It can be understood that the above-mentioned third preset array transformation method can be used to adjust the position of input data in each register and transfer the first preset rotation factor from the register groups ba1, ba2, ba3 and ba4 to b11, b12, b13, b14, b21, b22, b23, b24, b31, b32, b33, b34, b41, b42, b43, b44 in the new register group structure.

[0123] The third step is to determine the q value. When q is not 0, update the storage position of the data to be calculated to the sum of the last round storage position of the data to be calculated and the word length of k data storage; update the storage position of the first preset rotation factor to the sum of the last round storage position of the first preset rotation factor and the word length of k data storage; update the storage position of the calculation result to the sum of the last round storage position of the calculation result and the word length of k data storage; loop through the first to third steps. When the q value is 0, update the q value to the initial value of q; update the storage position of the data to be calculated to the initial storage position of the data to be calculated; update the storage position of the calculation result to the initial storage position of the calculation result, and perform i value determination.

[0124] Step 4. When the value of i is not 0, the transposition process in step S110 and the first step to the third step are executed in a loop; when the value of i is 0, the calculation ends.

[0125] In the embodiment of the present application, the data length of the data to be calculated is obtained, and the data to be calculated is judged according to the data length of the data to be calculated, and the calculation method of the data to be calculated is determined. When the data length of the data to be calculated is less than or equal to half of the registers in the preset register group, the register group is discretized, and the data to be calculated and the first preset rotation factor are input into the discretized register group, and the connection between the register group and the preset two-dimensional systolic array is reconstructed through re-discretization. Finally, a butterfly operation is performed on the register group after the re-discretization according to the preset Fourier transform rule, so as to determine the fast Fourier transform result of the data to be calculated according to the butterfly operation result, so as to store the calculated data through the register group, and calculate the register group through the two-dimensional systolic array to solve the fast Fourier transform result, so as to improve the calculation speed when solving the fast Fourier transform result of the data.

[0126] Embodiment 2

[0127] Fig.12 FIG. 1 is a flow chart of a method for implementing an inverse fast Fourier transform in an embodiment of the present application. The execution subject of the method may be a terminal device, such as Fig.12 As shown, the implementation method of the above-mentioned inverse fast Fourier transform may include the following steps:

[0128] Step S1201: Obtain the data length of the data to be processed.

[0129] Step S1202: determine whether the data length of the data to be processed is less than or equal to half of the registers in the preset register group.

[0130] If yes, execute step S1203 to step S1205; if no, execute step S1206 and subsequent steps.

[0131] Step S1203: discretize the register group, and input the data to be processed and the second preset rotation factor into the discretized register group.

[0132] Step S1204: reconstruct the connection between the register group and the preset two-dimensional systolic array by re-discretization.

[0133] Step S1205 , performing butterfly operation on the register group after the discretization process according to a preset Fourier transform rule, and performing data scaling process on the butterfly operation result to obtain the inverse fast Fourier transform result of the data to be processed.

[0134] In one embodiment, step S1205 includes: sequentially acquiring vectors of data lengths of the data to be processed from the butterfly operation results; and performing data scaling processing on each data to be processed in the vector according to the data lengths of the data to be processed.

[0135] Specifically, a vector of length n is obtained by taking the storage location of the calculation result as the starting address, and each data in the vector is multiplied by 1 / n to obtain a calculation result of length n, which is the inverse fast Fourier transform result of the data to be processed.

[0136] Step S1206: Divide the data to be processed into a plurality of data groups to be processed.

[0137] Step S1207: Discretely process the register groups corresponding to the data groups to be processed, and input the data groups to be processed and the second preset rotation factors into the register groups corresponding to the discretized data groups to be processed.

[0138] Step S1208: reconstructing the connection between the register group and the two-dimensional systolic array corresponding to each discretized data group to be processed through re-discretization.

[0139] Step S1209: performing butterfly operations on the register groups corresponding to the discretized data groups to be processed according to the Fourier transform rule, and determining target result data according to the butterfly operation results corresponding to the data groups to be processed.

[0140] Step S1210, transpose the target result data through a two-dimensional systolic array, process the transposed target result data according to the Fourier transform rule to obtain a target processing result, and perform data scaling on the target processing result to obtain a fast Fourier inverse transform result of the data to be processed.

[0141] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working process of the second embodiment described above can refer to the corresponding process in the first embodiment, which will not be repeated here.

[0142] Embodiment 3

[0143] Corresponding to the method for implementing a fast Fourier transform described in Embodiment 1, Fig.13 FIG. 1 is a schematic diagram of a structure of a device for implementing a fast Fourier transform in an embodiment of the present application. Fig.13 As shown, the implementation device of the above-mentioned fast Fourier transform may include:

[0144] The length acquisition module 131 is used to acquire the data length of the data to be calculated.

[0145] The discretization module 132 is used to discretize the register group when the data length of the data to be calculated is less than or equal to half of the registers in the preset register group, and input the data to be calculated and the first preset rotation factor into the discretized register group.

[0146] The reconstruction processing module 133 is used to reconstruct the connection between the register group and the preset two-dimensional systolic array through re-discretization processing.

[0147] The operation module 134 is used to perform butterfly operation on the register group after the discretization process according to a preset Fourier transform rule, and determine the fast Fourier transform result of the data to be calculated according to the butterfly operation result.

[0148] In one embodiment, the computing module 134 may include:

[0149] The number determination unit is used to determine the target number of operations according to the data length of the data to be calculated.

[0150] The set determination unit is used to determine an array transformation set according to a Fourier transform rule, where the array transformation set includes at least one array transformation mode arranged in a preset order.

[0151] The result determination unit is used to perform butterfly operation on the register group after the discretization process in sequence in the array transformation mode in the array transformation set until the number of butterfly operations is equal to the target number, and then determine the butterfly operation result.

[0152] In one embodiment, the result determination unit may include:

[0153] The data processing subunit is used to perform data processing on the register group after the discretization processing in an array transformation manner to obtain the register group after the data processing.

[0154] The butterfly operation subunit is used for performing butterfly operation on the register group after data processing through a two-dimensional systolic array.

[0155] In one embodiment, the register group includes a first processing register group, a cache register group, and a second processing register group, and the first processing register group and the cache register group are connected. The discrete module 132 may include:

[0156] The data splitting unit is used to split the data to be calculated into first data to be calculated and second data to be calculated, input the first data to be calculated into the first processing register group, input the second data to be calculated into the second processing register group, and input the first preset rotation factor into the cache register group.

[0157] In one embodiment, the fast Fourier transform implementation device may further include:

[0158] The data division module is used to divide the data to be calculated into multiple data groups to be calculated when the data length of the data to be calculated is greater than half of the registers in the register group.

[0159] The discrete processing module is used to perform discrete processing on the register groups corresponding to the data groups to be calculated, and input the data groups to be calculated and the first preset rotation factors into the register groups corresponding to the discretized data groups to be calculated.

[0160] The first re-discretization processing module is used to reconstruct the connection between the register group and the two-dimensional systolic array corresponding to each discretized data group to be calculated through re-discretization processing.

[0161] The butterfly operation module is used to perform butterfly operation on the register groups corresponding to each discretized data group to be calculated according to the Fourier transform rule, and determine the target result data according to the butterfly operation results corresponding to each data group to be calculated.

[0162] The transposition processing module is used to perform transposition processing on the target result data through a two-dimensional systolic array, and process the target result data after transposition processing according to the Fourier transform rule to obtain the fast Fourier transform result of the data to be calculated.

[0163] In the embodiment of the present application, the data length of the data to be calculated is obtained, and the data to be calculated is judged according to the data length of the data to be calculated, and the calculation method of the data to be calculated is determined. When the data length of the data to be calculated is less than or equal to half of the registers in the preset register group, the register group is discretized, and the data to be calculated and the first preset rotation factor are input into the discretized register group, and the connection between the register group and the preset two-dimensional systolic array is reconstructed through re-discretization. Finally, a butterfly operation is performed on the register group after the re-discretization according to the preset Fourier transform rule, so as to determine the fast Fourier transform result of the data to be calculated according to the butterfly operation result, so as to store the calculated data through the register group, and calculate the register group through the two-dimensional systolic array to solve the fast Fourier transform result, so as to improve the calculation speed when solving the fast Fourier transform result of the data.

[0164] Embodiment 4

[0165] Corresponding to the method for implementing an inverse fast Fourier transform described in the second embodiment, an implementation device for an inverse fast Fourier transform may include:

[0166] The data length acquisition module is used to obtain the data length of the data to be processed.

[0167] The data input module is used to discretize the register group when the data length of the data to be processed is less than or equal to half of the registers in the preset register group, and input the data to be processed and the second preset rotation factor into the discretized register group.

[0168] The second re-discretization processing module is used to reconstruct the connection between the register group and the preset two-dimensional systolic array through re-discretization processing.

[0169] The data scaling module is used to perform butterfly operation on the register group after the discretization processing according to the preset Fourier transform rule, and perform data scaling processing on the butterfly operation result to obtain the fast Fourier inverse transform result of the data to be processed.

[0170] In one embodiment, the data scaling module may include:

[0171] The vector acquisition unit is used to sequentially acquire vectors of data lengths of the data to be processed from the butterfly operation results.

[0172] The data scaling unit is used to perform data scaling processing on each data to be processed in the vector according to the data length of the data to be processed.

[0173] In one embodiment, the above-mentioned inverse fast Fourier transform implementation device may also include:

[0174] The data group division module is used to divide the data to be processed into multiple data groups to be processed when the data length of the data to be processed is greater than half of the registers in the register group.

[0175] The processing module is used to perform discrete processing on the register groups corresponding to each data group to be processed, and input each data group to be processed and the second preset rotation factor into the register groups corresponding to each discretized data group to be processed.

[0176] The third re-discrete processing module is used to reconstruct the connection between the register group and the two-dimensional systolic array corresponding to each discretized data group to be processed through re-discrete processing.

[0177] The data determination module is used to perform butterfly operation on the register groups corresponding to each discretized data group to be processed according to the Fourier transform rule, and determine the target result data according to the butterfly operation results corresponding to each data group to be processed.

[0178] The data processing module is used to perform transposition processing on the target result data through a two-dimensional systolic array, and process the transposed target result data according to Fourier transform rules to obtain a target processing result.

[0179] The data scaling processing module is used to perform data scaling processing on the target processing result to obtain the fast Fourier transform result of the data to be processed.

[0180] Those skilled in the art can clearly understand that, for the convenience and simplicity of description, the specific working process of the above-described device and module can refer to the corresponding process in the aforementioned method embodiment, and will not be repeated here. In the above embodiments, the description of each embodiment has its own emphasis. For parts that are not described or recorded in detail in a certain embodiment, refer to the relevant description of other embodiments.

[0181] It should be understood that the order of execution of the steps in the above embodiments does not necessarily mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the above embodiments.

[0182] Embodiment 5

[0183] Fig.14 This is a schematic diagram of the structure of a terminal device provided in an embodiment of the present application. For ease of explanation, only the parts related to the embodiment of the present application are shown.

[0184] like Fig.14 As shown, the terminal device 14 of this embodiment includes: at least one processor 1400 ( Fig.14Only one is shown in the figure), a memory 1401 connected to the above-mentioned processor 1400, and a computer program 1402 stored in the above-mentioned memory 1401 and executable on the above-mentioned at least one processor 1400, such as a fast Fourier transform implementation program. When the above-mentioned processor 1400 executes the above-mentioned computer program 1402, the steps in the above-mentioned implementation method of each fast Fourier transform are implemented, such as Figure 1 Steps S101 to S110 shown or Fig.12 Alternatively, when the processor 1400 executes the computer program 1402, the functions of the modules in the above-mentioned device embodiments are realized, for example, Fig.13 The functions of modules 131 to 134 are shown.

[0185] Exemplarily, the computer program 1402 may be divided into one or more modules, and the one or more modules are stored in the memory 1401 and executed by the processor 1400 to complete the present application. The one or more modules may be a series of computer program instruction segments capable of completing specific functions, and the instruction segments are used to describe the execution process of the computer program 1402 in the terminal device 14. For example, the computer program 1402 may be divided into a length acquisition module 131, a discrete module 132, a reconstruction processing module 133, and an operation module 134, and the specific functions of each module are as follows:

[0186] The length acquisition module 131 is used to acquire the data length of the data to be calculated.

[0187] The discretization module 132 is used to discretize the register group when the data length of the data to be calculated is less than or equal to half of the registers in the preset register group, and input the data to be calculated and the first preset rotation factor into the discretized register group.

[0188] The reconstruction processing module 133 is used to reconstruct the connection between the register group and the preset two-dimensional systolic array through re-discretization processing.

[0189] The operation module 134 is used to perform butterfly operation on the register group after the discretization process according to a preset Fourier transform rule, and determine the fast Fourier transform result of the data to be calculated according to the butterfly operation result.

[0190] The terminal device 14 may include, but is not limited to, a processor 1400 and a memory 1401. Those skilled in the art will appreciate that Fig.14 It is only an example of the terminal device 14 and does not constitute a limitation on the terminal device 14. It may include more or fewer components than shown in the figure, or a combination of certain components, or different components. For example, it may also include input and output devices, network access devices, buses, etc.

Claims

1. A method for implementing fast Fourier transform, characterized in that: include: Get the data length of the data to be calculated; When the data length of the data to be calculated is less than or equal to half of the registers in the preset register group, the register group is discretized, and the data to be calculated and the first preset rotation factor are input into the discretized register group; Reconstructing the connection between the register group and the preset two-dimensional systolic array by re-discretizing, including: re-discretizing the discretized register group into a plurality of register groups of the same size, and re-combining the re-discretized register groups with the two-dimensional systolic array in sequence; Determine a target number of operations according to the data length of the data to be calculated; determine an array transformation set according to a preset Fourier transform rule, the array transformation set including at least one array transformation method arranged in a preset order; perform data processing on the re-discretized register group in accordance with the array transformation methods in the array transformation set in sequence according to the preset order to obtain a register group after data processing; perform butterfly operation on the register group after data processing by using the two-dimensional systolic array until the number of butterfly operations is equal to the target number of operations, determine the butterfly operation result, and determine the fast Fourier transform result of the data to be calculated according to the butterfly operation result.

2. The method for implementing the fast Fourier transform according to claim 1, wherein: The register group includes a first processing register group, a cache register group and a second processing register group, the first processing register group and the cache register group are connected, and the register group after inputting the data to be calculated and the first preset rotation factor into discretization includes: The data to be calculated is divided into first data to be calculated and second data to be calculated, and the first data to be calculated is input into the first processing register group, the second data to be calculated is input into the second processing register group, and the first preset rotation factor is input into the cache register group.

3. The method for implementing the fast Fourier transform according to claim 1, wherein: Also includes: When the data length of the data to be calculated is greater than half of the registers in the register group, dividing the data to be calculated into a plurality of data groups to be calculated; Discretely process the register groups corresponding to the data groups to be calculated, and input the data groups to be calculated and the first preset rotation factors into the register groups corresponding to the discretized data groups to be calculated; Reconstructing the connection between the register group corresponding to each of the discretized data groups to be calculated and the two-dimensional systolic array by re-discretization processing; Perform butterfly operation on the register groups corresponding to the discretized data groups to be calculated according to the Fourier transform rule, and determine the target result data according to the butterfly operation results corresponding to the data groups to be calculated; The target result data is transposed by the two-dimensional systolic array, and the transposed target result data is processed according to the Fourier transform rule to obtain a fast Fourier transform result of the data to be calculated.

4. A method for implementing inverse fast Fourier transform, characterized in that: include: Get the data length of the data to be processed; When the data length of the data to be processed is less than or equal to half of the registers in the preset register group, the register group is discretized, and the data to be processed and the second preset rotation factor are input into the discretized register group; Reconstructing the connection between the register group and the preset two-dimensional systolic array by re-discretizing, including: re-discretizing the discretized register group into a plurality of register groups of the same size, and re-combining the re-discretized register groups with the two-dimensional systolic array in sequence; Determine a target number of operations according to the data length of the data to be processed; determine an array transformation set according to a preset Fourier transform rule, the array transformation set including at least one array transformation method arranged in a preset order; perform data processing on the re-discretized register group in sequence according to the preset order using the array transformation methods in the array transformation set to obtain a register group after data processing; perform butterfly operation on the register group after data processing by using the two-dimensional systolic array until the number of butterfly operations is equal to the target number of operations, determine the butterfly operation result, and perform data scaling processing on the butterfly operation result to obtain a fast Fourier inverse transform result of the data to be processed.

5. The method for implementing inverse fast Fourier transform according to claim 4, characterized in that: The data scaling process of the butterfly operation result includes: Sequentially acquiring vectors of data lengths of the data to be processed from the butterfly operation results; Data scaling processing is performed on each data to be processed in the vector according to the data length of the data to be processed.

6. The method for implementing inverse fast Fourier transform according to claim 4, characterized in that: Also includes: When the data length of the data to be processed is greater than half of the registers in the register group, dividing the data to be processed into a plurality of data groups to be processed; Discretely process the register groups corresponding to the data groups to be processed respectively, and input the data groups to be processed and the second preset rotation factors into the register groups corresponding to the discretized data groups to be processed respectively; Reconstructing the connection between the register group corresponding to each of the discretized data groups to be processed and the two-dimensional systolic array by re-discretization processing; Performing butterfly operation on register groups corresponding to each discretized data group to be processed according to the Fourier transform rule, and determining target result data according to the butterfly operation results corresponding to each data group to be processed; Transposing the target result data by using the two-dimensional systolic array, and processing the transposed target result data according to the Fourier transform rule to obtain a target processing result; Data scaling is performed on the target processing result to obtain a fast Fourier transform result of the data to be processed.

7. A device for implementing fast Fourier transform, characterized in that: include: A length acquisition module is used to obtain the data length of the data to be calculated; A discretization module, used for discretizing the register group when the data length of the data to be calculated is less than or equal to half of the registers in the preset register group, and inputting the data to be calculated and the first preset rotation factor into the discretized register group; a reconstruction processing module, used for reconstructing the connection between the register group and the preset two-dimensional systolic array by re-discretizing, including: re-discretizing the discretized register group into a plurality of register groups of the same size, and re-combining the re-discretized register groups with the two-dimensional systolic array in sequence; The operation module is used to determine the target number of operations according to the data length of the data to be calculated; determine an array transformation set according to a preset Fourier transform rule, wherein the array transformation set includes at least one array transformation method arranged in a preset order; perform data processing on the re-discretized register group in accordance with the array transformation methods in the array transformation set in sequence according to the preset order to obtain a register group after data processing; perform butterfly operation on the register group after data processing by using the two-dimensional systolic array until the number of butterfly operations is equal to the target number of operations, determine the butterfly operation result, and determine the fast Fourier transform result of the data to be calculated according to the butterfly operation result.

8. A terminal device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that: When the processor executes the computer program, the processor implements the steps of a method for implementing a fast Fourier transform as described in any one of claims 1 to 3 or a method for implementing an inverse fast Fourier transform as described in any one of claims 4 to 6.

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