A pixel circuit and driving method thereof, array substrate and display panel

Abstract

The present application discloses a pixel circuit and a driving method thereof, an array substrate and a display panel. A compensation unit and a second reset unit are added to the pixel circuit, and the compensation unit is connected to the driving unit and the storage unit. Since after the compensation unit is added, the voltage value of the driving node between the first reset unit and the driving unit and the voltage value of the compensation node between the compensation unit and the driving unit present a negative correlation, the compensation unit can be used to make the amount of charge required for resetting the pixel circuit for a black screen consistent with the amount of charge required for resetting the pixel circuit for a white screen, so that the reference voltage after resetting the black screen and the reference voltage after resetting the white screen remain stable, and then the voltage of the driving node after resetting remains stable, thereby eliminating the lateral crosstalk problem existing in the OLED display panel and improving the display effect of the OLED display panel.

Description

Technical Field

[0001] The present application relates to the field of display technology, and more specifically, to a pixel circuit and a driving method thereof, an array substrate and a display panel. Background Art

[0002] Organic Light-Emitting Diode (OLED) display panels are widely used in various display devices due to their thinness, lightness and power saving. OLED display technology does not require a backlight and uses a very thin organic material coating and a glass substrate. When an electric current passes through, these organic materials will emit light.

[0003] Usually in an OLED display panel, a pixel circuit is required to provide corresponding conditions for the OLED to be continuously lit. However, the design of the existing pixel circuit will cause the OLED display panel to have a lateral crosstalk problem. The lateral crosstalk is caused by the different amounts of charge that need to be charged into the reference voltage when the pixel circuit resets the black screen and the white screen respectively, resulting in differences in the terminal voltage of the driving unit after reset. Specifically, when the picture is a black picture, the terminal voltage of the driving node between the reset unit and the driving unit in the pixel circuit is a high potential; when the picture is a white picture, the terminal voltage of the driving node between the reset unit and the driving unit in the pixel circuit is a low potential. Therefore, when the pixel circuit resets the black picture, the amount of charge required is greater than that required to reset the white picture, and the amount of charge that needs to be charged into the reference voltage is also greater. At this time, there is a certain voltage drop in the reference voltage, resulting in the voltage of the driving node after the black picture is reset to be higher than the voltage of the driving node after the white picture is reset, which in turn causes the picture driven by the pixel circuit to be darker after the next frame of data signal is connected, resulting in a poor display effect of the OLED display panel. Summary of the invention

[0004] The embodiments of the present application provide a pixel circuit and a driving method thereof, an array substrate and a display panel, which can ensure that the amount of charge required for the pixel circuit to reset a black screen is consistent with the amount of charge required for the pixel circuit to reset a white screen, so that the reference voltage after resetting the black screen and the reference voltage after resetting the white screen remain stable, and then the voltage of the driving node after reset remains stable, thereby eliminating the lateral crosstalk problem existing in the OLED display panel and improving the display effect of the OLED display panel.

[0005] In view of this, an embodiment of the present application provides a pixel circuit, including: a first reset unit, a driving unit, a compensation unit, a second reset unit and a storage unit;

[0006] The first resetting unit is used to reset the driving node between the first resetting unit and the driving unit;

[0007] The second reset unit is used to reset the compensation node between the second reset unit and the driving unit;

[0008] The compensation unit is used to make the amount of charge required by the pixel circuit when resetting a black screen equal to the amount of charge required by the pixel circuit when resetting a white screen;

[0009] Wherein, the first end of the first reset unit is connected to the first reference signal output end, the second end of the first reset unit is connected to the third end of the driving unit, and the third end of the first reset unit is connected to the first scan signal input end;

[0010] The first end of the driving unit is connected to the power signal output end, and the second end of the driving unit is connected to the second end of the compensation unit;

[0011] The first end of the compensation unit is connected to the power signal output end;

[0012] The first end of the second reset unit is connected to the second end of the compensation unit, the second end of the second reset unit is connected to the first reference signal output end, and the third end of the second reset unit is connected to the first scan signal output end;

[0013] The first end of the storage unit is connected to the first end of the compensation unit, and the second end of the storage unit is connected to the third end of the driving unit.

[0014] Optionally, the compensation unit includes a first capacitor.

[0015] Optionally, the storage unit includes a second capacitor, and the first capacitor satisfies the following relationship:

[0016] ;

[0017] Among them, C1 is the value of the first capacitor, Cst is the value of the second capacitor, V1 is the voltage value of the driving node when the pixel circuit resets the black screen, V2 is the voltage value of the compensation node when the pixel circuit resets the black screen, V3 is the voltage value of the driving node when the pixel circuit resets the white screen, and V4 is the voltage value of the compensation node when the pixel circuit resets the white screen.

[0018] Optionally, the pixel circuit further includes: a writing unit, a third resetting unit, a first control unit, a second control unit, and a light emitting element;

[0019] The writing unit writes the data signal into the driving unit in response to the second scanning signal;

[0020] The third resetting unit is configured to reset a control node between the second control unit and the light emitting element in response to a second scanning signal;

[0021] The first control unit controls the connection and disconnection between the driving unit and the power signal output terminal in response to the enable signal;

[0022] The second control unit controls the connection and disconnection between the driving unit and the light emitting unit in response to an enable signal.

[0023] Optionally, the first reset unit includes a first transistor, the driving unit includes a second transistor, and the second reset unit includes a third transistor;

[0024] The gate of the first transistor is connected to the first scanning signal output terminal, the first terminal of the first transistor is connected to the first reference signal output terminal, and the second terminal of the first transistor is connected to the gate of the third transistor;

[0025] A first end of the second transistor is connected to a power signal output end, and a second end of the second transistor is connected to a second end of the first capacitor;

[0026] The first end of the first capacitor is connected to the power signal output end;

[0027] The gate of the third transistor is connected to the first scanning signal output terminal, the first terminal of the third transistor is connected to the second terminal of the first capacitor, and the second terminal of the third transistor is connected to the first reference signal output terminal;

[0028] The first end of the second capacitor is connected to the first end of the first capacitor, and the second end of the second capacitor is connected to the gate of the second transistor.

[0029] Optionally, the third resetting unit includes a fourth transistor, the writing unit includes a fifth transistor and a sixth transistor, the first control unit includes a seventh transistor, and the second control unit includes an eighth transistor;

[0030] The gate of the fourth transistor is connected to the second scanning signal output terminal, the first terminal of the fourth transistor is connected to the second reference signal output terminal, and the second terminal of the fourth transistor is connected to the second terminal of the eighth transistor;

[0031] The gate of the fifth transistor is connected to the gate of the sixth transistor, the first end of the fifth transistor is connected to the data signal output end, and the second end of the fifth transistor is connected to the second end of the seventh transistor;

[0032] The gate of the sixth transistor is connected to the second scan signal output terminal, the first terminal of the sixth transistor is connected to the gate of the second transistor, and the second terminal of the sixth transistor is connected to the second terminal of the second transistor;

[0033] The gate of the seventh transistor is connected to the enable signal output terminal, the first terminal of the seventh transistor is connected to the first terminal of the second capacitor, and the second terminal of the seventh transistor is connected to the first terminal of the second transistor;

[0034] The gate of the eighth transistor is connected to the enable signal output terminal, the first terminal of the eighth transistor is connected to the second terminal of the second transistor, and the second terminal of the eighth transistor is connected to the first terminal of the light emitting element.

[0035] The embodiment of the present application further provides a driving method of a pixel circuit, which is applied to the pixel circuit described above, and the driving method includes:

[0036] In the reset stage, a low level is input to the first scan signal input terminal; the first reset unit, the driving unit, and the second reset unit are turned on, so that the first reference signal can simultaneously reset the driving node and the compensation node through the first reset unit and the second reset unit.

[0037] The embodiment of the present application further provides another driving method of a pixel circuit, which is applied to the pixel circuit described above, and the driving method includes:

[0038] In the reset stage, a low level is input to the first scan signal input terminal, a high level is input to the second scan signal input terminal, and a high level is input to the enable signal input terminal; the first reset unit, the driving unit, and the second reset unit are turned on, so that the first reference signal can simultaneously reset the driving node and the compensation node through the first reset unit and the second reset unit;

[0039] In the data writing stage, a high level is input to the first scan signal input terminal and the enable signal input terminal, and a low level is input to the second scan signal input terminal; the writing unit, the driving unit, and the third reset unit are turned on, and the data signal input to the data signal input terminal is transmitted to the storage unit via the writing unit and the driving unit, so that the storage unit starts to charge, and the second reference signal resets the control node via the third reset unit;

[0040] In the light-emitting stage, a high level is input to the first scan signal input terminal and the second scan signal input terminal, and a low level is input to the enable signal input terminal; the first control unit, the second control unit, and the driving unit are turned on, so that the current generated by the power signal input terminal can drive the light-emitting element to emit light.

[0041] An embodiment of the present application also provides an array substrate, comprising the various pixel circuits as described above.

[0042] An embodiment of the present application further provides a display panel, comprising the array substrate as described above.

[0043] The pixel circuit and its driving method, array substrate and display panel provided in the embodiments of the present application add a compensation unit and a second reset unit in the pixel circuit, and connect the compensation unit to the driving unit and the storage unit. Since after the compensation unit is added, the voltage value of the driving node between the first reset unit and the driving unit and the voltage value of the compensation node between the compensation unit and the driving unit show a negative correlation, the compensation unit can be used to make the amount of charge required for the pixel circuit to reset a black screen consistent with the amount of charge required for the pixel circuit to reset a white screen, so that the reference voltage after resetting the black screen and the reference voltage after resetting the white screen remain stable, and then the voltage of the driving node after resetting remains stable, thereby eliminating the lateral crosstalk problem existing in the OLED display panel and improving the display effect of the OLED display panel. BRIEF DESCRIPTION OF THE DRAWINGS

[0044] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on the provided drawings without paying any creative work.

[0045] Figure 1 A schematic diagram of a structure of a pixel circuit for resetting a display screen provided in an embodiment of the present application;

[0046] Figure 2 A schematic diagram of the structure of a pixel circuit provided in an embodiment of the present application;

[0047] Figure 3 A curve diagram showing the relationship between a driving node and a compensation node of a pixel circuit provided in an embodiment of the present application;

[0048] Figure 4 A schematic diagram of the structure of another pixel circuit provided in an embodiment of the present application;

[0049] Figure 5 A schematic diagram of the structure of another pixel circuit provided in an embodiment of the present application;

[0050] Figure 6 A schematic diagram of the structure of another pixel circuit provided in an embodiment of the present application;

[0051] Figure 7A voltage signal waveform diagram provided in an embodiment of the present application;

[0052] Figure 8 A schematic diagram of the structure of an array substrate provided in an embodiment of the present application;

[0053] Fig. 9 A schematic diagram of the structure of a display panel provided in an embodiment of the present application. DETAILED DESCRIPTION

[0054] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0055] The terms "first", "second", "third", "fourth", etc. (if any) in the specification and claims of this application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments described herein can be implemented in an order other than that illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0056] Usually in OLED display panels, pixel circuits are required to provide corresponding conditions for the OLED to continuously light up. However, the existing pixel circuit design will cause OLED display panels to have lateral crosstalk problems, such as Figure 1 As shown, the lateral crosstalk is caused by the difference in the terminal voltage of the driving unit when the pixel circuit resets the black screen and the white screen respectively. Specifically, there are 2 / 3 black screens on the center line of the H1 screen, at which time the driving node of the driving unit is at a high potential, and 1 / 3 white screens, at which time the driving node of the driving unit is at a low potential. Therefore, when the reference voltage resets the driving node of the pixel circuit in the H1 screen, more charge needs to be charged, while the center line of the H2 screen is all white, and the driving node of the pixel circuit is easier to reset. When the next frame of data signal is connected, the potential of the driving node in the pixel circuit of the H1 screen after reset is higher than the potential of the driving node in the pixel circuit of the H2 screen, resulting in a darker H1 screen and a poor display effect of the OLED display panel.

[0057] In view of this, if Figure 2 As shown, an embodiment of the present application provides a pixel circuit, the pixel circuit comprising: a first reset unit 201, a driving unit 202, a compensation unit 203, a second reset unit 204, and a storage unit 205;

[0058] The first resetting unit 201 is used to reset the driving node between the first resetting unit 201 and the driving unit 202;

[0059] The second resetting unit 204 is used to reset the compensation node between the second resetting unit 204 and the driving unit 202;

[0060] The compensation unit 203 is used to make the amount of charge required by the pixel circuit when resetting a black picture equal to the amount of charge required by the pixel circuit when resetting a white picture.

[0061] Among them, the first end of the first reset unit 201 is connected to the first reference signal output terminal Vref1, the second end of the first reset unit 201 is connected to the third end of the driving unit 202, and the third end of the first reset unit 201 is connected to the first scan signal input terminal S1; the first end of the driving unit 202 is connected to the power signal output terminal PVDD, and the second end of the driving unit 202 is connected to the second end of the compensation unit 203; the first end of the compensation unit 203 is connected to the power signal output terminal PVDD; the first end of the second reset unit 204 is connected to the second end of the compensation unit 203, the second end of the second reset unit 204 is connected to the first reference signal output terminal Vref1, and the third end of the second reset unit 204 is connected to the first scan signal output terminal S1; the first end of the storage unit 205 is connected to the first end of the compensation unit 203, and the second end of the storage unit 205 is connected to the third end of the driving unit 202.

[0062] During the operation of the pixel circuit, under the action of the first scanning signal outputted from the first scanning signal output terminal S1, the first reset unit 201, the driving unit 202 and the second reset unit 204 are turned on, and the first reference signal outputted from the first reference signal output terminal Vref1 can reset the driving node N1 between the first reset unit 201 and the driving unit 202 through the first reset unit 201, and can also reset the compensation node N3 between the second reset unit 204 and the driving unit 202 at the same time.

[0063] It is worth noting that through research, it was found that Figure 3As shown, after the compensation unit 203 is added to the pixel circuit, as the potential of the driving node N1 increases, the potential of the compensation node N3 decreases, that is, the potential of the driving node N1 and the potential of the compensation node N3 are negatively correlated. Therefore, at this time, the driving node N1 and the compensation node N3 can be reset simultaneously by making the first reference signal, so that the amount of charge required for the pixel circuit to reset the black screen is consistent with the amount of charge required for the pixel circuit to reset the white screen, thereby avoiding the lateral crosstalk problem caused by the high voltage of the driving node after the pixel circuit is reset to the black screen.

[0064] In the embodiment of the present application, a compensation unit and a second reset unit are added to the pixel circuit, and the compensation unit is connected to the driving unit and the storage unit. Since, after the compensation unit is added, the voltage value of the driving node between the first reset unit and the driving unit and the voltage value of the compensation node between the compensation unit and the driving unit are negatively correlated, the compensation unit can be used to make the amount of charge required for resetting the pixel circuit for a black screen consistent with the amount of charge required for resetting the pixel circuit for a white screen, so that the reference voltage after resetting the black screen and the reference voltage after resetting the white screen remain stable, and then the voltage of the driving node after resetting remains stable, thereby eliminating the lateral crosstalk problem existing in the OLED display panel and improving the display effect of the OLED display panel.

[0065] In a possible implementation, the compensation unit 203 includes a first capacitor C1.

[0066] In a possible implementation, the storage unit 205 includes a second capacitor Cst, and the first capacitor satisfies the following relationship:

[0067] ;

[0068] Among them, C1 is the value of the first capacitor, Cst is the value of the second capacitor, V1 is the voltage value of the driving node N1 when the pixel circuit resets the black screen, V2 is the voltage value of the compensation node N3 when the pixel circuit resets the black screen, V3 is the voltage value of the driving node N1 when the pixel circuit resets the white screen, and V4 is the voltage value of the compensation node N3 when the pixel circuit resets the white screen.

[0069] It should be noted that when the pixel circuit resets the black screen, the charge that needs to be charged into the pixel circuit is Q1=Cst*(Vref1-V1)+C1(Vref1-V2), where Vref1 is the voltage value of the first reference voltage; when the pixel circuit resets the white screen, the charge that needs to be charged into the pixel circuit is Q2=Cst*(Vref-V3)+C1(Vref-V4). When the first capacitor C1=Cst*(V1-V3) / (V4-V2), Q1=Q2 can be obtained after substitution, that is, whether the pixel circuit resets the black screen or the white screen, the required number of charges is the same, so that the reference voltage after resetting the black screen and the reference voltage after resetting the white screen can be kept stable, and then the voltage of the driving node after reset is kept stable, thereby eliminating the lateral crosstalk problem existing in the OLED display panel and improving the display effect of the OLED display panel.

[0070] like Figure 4 As shown, the embodiment of the present application also provides another pixel circuit, which includes a first reset unit 401, a driving unit 402, a compensation unit 403, a second reset unit 404, a storage unit 405, a write unit 406, a third reset unit 407, a first control unit 408, a second control unit 409, and a light-emitting element 410; wherein the functions of the first reset unit 401, the driving unit 402, the compensation unit 403, the second reset unit 404 and the storage unit 405 can refer to the contents described above.

[0071] The writing unit 406 writes the data signal into the driving node in response to the second scanning signal;

[0072] The third resetting unit 407 resets the control node N2 between the second control unit 409 and the light emitting element 410 in response to the second scanning signal;

[0073] The first control unit 408 controls the connection between the driving unit 402 and the power signal output terminal PVDD in response to the enable signal;

[0074] The second control unit 409 controls the connection and disconnection between the driving unit 402 and the light emitting element 410 in response to the enable signal.

[0075] It should be noted that the writing unit 406 can receive the second scanning signal output by the second scanning signal output terminal S2 and the data signal output by the data signal output terminal Vdata, so as to write the data signal into the driving node of the driving unit 402 under the drive of the second scanning signal. The third resetting unit 407 can receive the second scanning signal output by the second scanning signal output terminal S2 and the second reference signal output by the second reference signal output terminal Vref2, so as to reset the control node N2 between the second control unit 409 and the light-emitting element 410 under the drive of the second scanning signal. The first control unit 408 can receive the enable signal output by the enable signal output terminal Emit, so as to control the on-off between the driving unit 402 and the power signal output terminal PVDD under the drive of the enable signal. The second control unit 409 receives the enable signal output by the enable signal output terminal Emit, so as to control the on-off between the driving unit 402 and the light-emitting element 410 under the drive of the enable signal.

[0076] In the embodiment of the present application, a compensation unit and a second reset unit are added to the pixel circuit, and the compensation unit is connected to the driving unit and the storage unit. Since, after the compensation unit is added, the voltage value of the driving node between the first reset unit and the driving unit and the voltage value of the compensation node between the compensation unit and the driving unit are negatively correlated, the compensation unit can be used to make the amount of charge required for resetting the pixel circuit for a black screen consistent with the amount of charge required for resetting the pixel circuit for a white screen, so that the reference voltage after resetting the black screen and the reference voltage after resetting the white screen remain stable, and then the voltage of the driving node after resetting remains stable, thereby eliminating the lateral crosstalk problem existing in the OLED display panel and improving the display effect of the OLED display panel.

[0077] like Figure 5 As shown, an embodiment of the present application provides another pixel circuit, wherein the first reset unit includes a first transistor M1, the driving unit includes a second transistor M2, and the second reset unit includes a third transistor M3;

[0078] The gate of the first transistor M1 is connected to the first scan signal output terminal S1, the first end of the first transistor M1 is connected to the first reference signal output terminal S1, and the second end of the first transistor M1 is connected to the gate of the third transistor M3;

[0079] A first end of the second transistor M2 is connected to the power signal output terminal PVDD, and a second end of the second transistor M2 is connected to the second end of the first capacitor C1;

[0080] The first end of the first capacitor C1 is connected to the power signal output terminal PVDD;

[0081] The gate of the third transistor M3 is connected to the first scan signal output terminal S1, the first terminal of the third transistor M3 is connected to the second terminal of the first capacitor C1, and the second terminal of the third transistor M3 is connected to the first reference signal output terminal Verf1;

[0082] A first end of the second capacitor Cst is connected to a first end of the first capacitor C1 , and a second end of the second capacitor Cst is connected to a gate of the second transistor M2 .

[0083] During the operation of the pixel circuit, under the action of the first scanning signal outputted from the first scanning signal output terminal S1, the first transistor M1, the second transistor M2 and the third transistor M3 are turned on, and the first reference signal outputted from the first reference signal output terminal Vref1 can reset the driving node N1 between the first transistor M1 and the second transistor M2 through the first transistor M1, and can also reset the compensation node N3 between the third transistor M3 and the second transistor M2 at the same time.

[0084] It should be noted that, through research, it is found that after the first capacitor C1 is added to the pixel circuit, as the potential of the driving node N1 increases, the potential of the compensation node N3 decreases, that is, the potential of the driving node N1 and the potential of the compensation node N3 are negatively correlated. Therefore, at this time, the driving node N1 and the compensation node N3 can be reset at the same time by making the first reference signal, so that the amount of charge required for the pixel circuit to reset the black screen is consistent with the amount of charge required for the pixel circuit to reset the white screen, thereby avoiding the lateral crosstalk problem caused by the high voltage of the driving node after the pixel circuit is reset to the black screen.

[0085] In the embodiment of the present application, a compensation unit and a second reset unit are added to the pixel circuit, and the compensation unit is connected to the driving unit and the storage unit. Since, after the compensation unit is added, the voltage value of the driving node between the first reset unit and the driving unit and the voltage value of the compensation node between the compensation unit and the driving unit are negatively correlated, the compensation unit can be used to make the amount of charge required for resetting the pixel circuit for a black screen consistent with the amount of charge required for resetting the pixel circuit for a white screen, so that the reference voltage after resetting the black screen and the reference voltage after resetting the white screen remain stable, and then the voltage of the driving node after resetting remains stable, thereby eliminating the lateral crosstalk problem existing in the OLED display panel and improving the display effect of the OLED display panel.

[0086] like Figure 6As shown, the embodiment of the present application further provides another pixel circuit, in which the third reset unit includes a fourth transistor M4, the write unit includes a fifth transistor M5 and a sixth transistor M6, the first control unit includes a seventh transistor M7, and the second control unit includes an eighth transistor M8;

[0087] The gate of the fourth transistor M4 is connected to the second scan signal output terminal S2, the first terminal of the fourth transistor M4 is connected to the second reference signal output terminal Verf2, and the second terminal of the fourth transistor M4 is connected to the second terminal of the eighth transistor M8;

[0088] The gate of the fifth transistor M5 is connected to the gate of the sixth transistor M6, the first end of the fifth transistor M5 is connected to the data signal output end Vdata, and the second end of the fifth transistor M5 is connected to the second end of the seventh transistor M7;

[0089] The gate of the sixth transistor M6 is connected to the second scan signal output terminal S2, the first end of the sixth transistor M6 is connected to the gate of the second transistor M2, and the second end of the sixth transistor M6 is connected to the second end of the second transistor M2;

[0090] The gate of the seventh transistor M7 is connected to the enable signal output terminal Emit, the first end of the seventh transistor M7 is connected to the first end of the second capacitor Cst, and the second end of the seventh transistor M7 is connected to the first end of the second transistor M2;

[0091] The gate of the eighth transistor M8 is connected to the enable signal output terminal Emit, the first end of the eighth transistor M8 is connected to the second end of the second transistor M2, and the second end of the eighth transistor M8 is connected to the first end of the light emitting element.

[0092] It should be noted that the fifth transistor M2 and the sixth transistor M6 can receive the second scan signal output by the second scan signal output terminal S2 and the data signal output by the data signal output terminal Vdata, so as to write the data signal into the driving node of the third transistor M3 under the drive of the second scan signal S2. The fourth transistor M4 can receive the second scan signal output by the second scan signal output terminal S2 and the second reference signal output by the second reference signal output terminal Vref2, so as to reset the control node N2 between the eighth transistor M8 and the light-emitting element under the drive of the second scan signal. The seventh transistor M7 can receive the enable signal output by the enable signal output terminal Emit, so as to control the on-off between the second transistor M2 and the power signal output terminal PVDD under the drive of the enable signal. The eighth transistor M8 receives the enable signal output by the enable signal output terminal Emit, so as to control the on-off between the second transistor M2 and the light-emitting element under the drive of the enable signal.

[0093] In the embodiment of the present application, a compensation unit and a second reset unit are added to the pixel circuit, and the compensation unit is connected to the driving unit and the storage unit. Since, after the compensation unit is added, the voltage value of the driving node between the first reset unit and the driving unit and the voltage value of the compensation node between the compensation unit and the driving unit are negatively correlated, the compensation unit can be used to make the amount of charge required for resetting the pixel circuit for a black screen consistent with the amount of charge required for resetting the pixel circuit for a white screen, so that the reference voltage after resetting the black screen and the reference voltage after resetting the white screen remain stable, and then the voltage of the driving node after resetting remains stable, thereby eliminating the lateral crosstalk problem existing in the OLED display panel and improving the display effect of the OLED display panel.

[0094] The embodiment of the present application further provides a driving method for a pixel circuit, which can be performed by the pixel circuit described in the above embodiment. The driving method for the pixel circuit includes:

[0095] In the reset stage, a low level is input to the first scan signal input terminal; the first reset unit, the driving unit, and the second reset unit are turned on, so that the first reference signal can simultaneously reset the driving node and the compensation node through the first reset unit and the second reset unit.

[0096] To better understand the driving method, Figure 2 The pixel circuit shown in the figure is taken as an example, and combined with Figure 7 The waveform diagram of the voltage signals outputted from the first scanning signal output terminal, the second scanning signal output terminal and the enable signal output terminal in the pixel circuit shown in FIG. further illustrates the driving method. Figure 7In the figure, S1 represents the first scanning signal outputted from the first scanning signal output terminal, S2 represents the second scanning signal outputted from the second scanning signal output terminal, and Emit represents the enable signal outputted from the enable signal output terminal.

[0097] See also Figure 2 and Figure 7 In the reset stage, i.e., stage T1, a low level is input to the first scan signal input terminal S1; the first reset unit 201, the driving unit 202, and the second reset unit 204 are turned on, so that the first reference signal can simultaneously reset the driving node N1 and the compensation node N3 through the first reset unit 201 and the second reset unit 204.

[0098] In the embodiment of the present application, a compensation unit and a second reset unit are added to the pixel circuit, and the compensation unit is connected to the driving unit and the storage unit. Since, after the compensation unit is added, the voltage value of the driving node between the first reset unit and the driving unit and the voltage value of the compensation node between the compensation unit and the driving unit are negatively correlated, the compensation unit can be used to make the amount of charge required for resetting the pixel circuit for a black screen consistent with the amount of charge required for resetting the pixel circuit for a white screen, so that the reference voltage after resetting the black screen and the reference voltage after resetting the white screen remain stable, and then the voltage of the driving node after resetting remains stable, thereby eliminating the lateral crosstalk problem existing in the OLED display panel and improving the display effect of the OLED display panel.

[0099] The embodiment of the present application further provides a driving method for a pixel circuit, which can be performed by the pixel circuit described in the above embodiment. The driving method for the pixel circuit includes:

[0100] In the reset stage, a low level is input to the first scan signal input terminal, a high level is input to the second scan signal input terminal, and a high level is input to the enable signal input terminal; the first reset unit, the driving unit, and the second reset unit are turned on, so that the first reference signal can simultaneously reset the driving node and the compensation node through the first reset unit and the second reset unit;

[0101] In the data writing stage, a high level is input to the first scan signal input terminal and the enable signal input terminal, and a low level is input to the second scan signal input terminal; the writing unit, the driving unit, and the third reset unit are turned on, and the data signal input to the data signal input terminal is transmitted to the storage unit via the writing unit and the driving unit, so that the storage unit starts to charge, and the second reference signal resets the control node via the third reset unit;

[0102] In the light-emitting stage, a high level is input to the first scan signal input terminal and the second scan signal input terminal, and a low level is input to the enable signal input terminal; the first control unit, the second control unit, and the driving unit are turned on, so that the current generated by the power signal input terminal can drive the light-emitting element to emit light.

[0103] To better understand the driving method, Figure 4 The pixel circuit shown in the figure is taken as an example, and combined with Figure 7 The waveform diagram of the voltage signals outputted from the first scanning signal output terminal, the second scanning signal output terminal and the enable signal output terminal in the pixel circuit shown in FIG. further illustrates the driving method. Figure 7 In the figure, S1 represents the first scanning signal outputted from the first scanning signal output terminal, S2 represents the second scanning signal outputted from the second scanning signal output terminal, and Emit represents the enable signal outputted from the enable signal output terminal.

[0104] See also Figure 4 and Figure 7 In the reset phase, i.e., phase T1, a low level is input to the first scan signal input terminal S1; the first reset unit 401, the driving unit 402, and the second reset unit 404 are turned on, and the first control unit 408, the second control unit 409, the third reset unit 407, and the writing unit 406 are turned off, so that the first reference signal can simultaneously reset the driving node N1 and the compensation node N3 through the first reset unit and the second reset unit.

[0105] In the data writing stage, i.e., stage T2, a high level is input to the first scan signal input terminal S1 and the enable signal input terminal Emit, and a low level is input to the second scan signal input terminal S2; the writing unit 406, the driving unit 402, and the third reset unit 407 are turned on, and the first reset unit 401, the second reset unit 404, the first control unit 408, and the second control unit 409 are turned off, so that the data signal input at the data signal input terminal Vdata is transmitted to the storage unit 405 via the writing unit 406 and the driving unit 402, so that the storage unit 405 starts to charge, and at the same time, the second reference signal resets the control node N2 via the third reset unit 407.

[0106] In the light-emitting stage, that is, stage T3, a high level is input to the first scan signal input terminal S1 and the second scan signal input terminal S2, and a low level is input to the enable signal input terminal Emit; the driving unit 402, the first control unit 408, and the second control unit 409 are turned on, and the first reset unit 401, the second reset unit 404, the writing unit 406, and the third reset unit 407 are turned off, so that the current generated by the power signal input terminal PVDD can drive the light-emitting element 410 to emit light.

[0107] In the embodiment of the present application, a compensation unit and a second reset unit are added to the pixel circuit, and the compensation unit is connected to the driving unit and the storage unit. Since, after the compensation unit is added, the voltage value of the driving node between the first reset unit and the driving unit and the voltage value of the compensation node between the compensation unit and the driving unit are negatively correlated, the compensation unit can be used to make the amount of charge required for resetting the pixel circuit for a black screen consistent with the amount of charge required for resetting the pixel circuit for a white screen, so that the reference voltage after resetting the black screen and the reference voltage after resetting the white screen remain stable, and then the voltage of the driving node after resetting remains stable, thereby eliminating the lateral crosstalk problem existing in the OLED display panel and improving the display effect of the OLED display panel.

[0108] The embodiment of the present application also provides an array substrate. Figure 8 is a schematic diagram of the structure of an array substrate provided in an embodiment of the present application. Figure 8 The array substrate includes: a scan driving circuit 21, a data driving circuit 22, m scan lines (S1, S2..., Sm), n data lines (D1, D2..., Dn) and a plurality of pixel circuits 23; wherein the structure of the pixel circuit 23 adopts the pixel circuit described in the above embodiments, which will not be repeated here.

[0109] Specifically, Figure 8 The scan drive circuit 21 shown in the figure is used to provide a scan signal to each scan line (S1, S2..., Sm); the data drive circuit 22 is used to provide a data signal to each data line (D1, D2..., Dn); the pixel circuits 23 are respectively arranged in the pixel area formed by the intersection of the scan line and the data line, wherein the first signal input terminal of each pixel circuit 23 is electrically connected to the corresponding scan line, and the first signal received by the first signal input terminal is the scan signal, and the second signal input terminal of each pixel circuit 23 is electrically connected to the corresponding data line, and the second signal received by the second signal input terminal is the data signal.

[0110] The embodiment of the present application also provides a display panel. Fig. 9 is a schematic diagram of the structure of a display panel provided by an embodiment of the present invention. Fig. 9 The display panel includes: a first substrate 31 and a second substrate 32 arranged opposite to the first substrate 31, wherein the first substrate 31 can be a color film substrate, a cover glass or a cover lens, etc., and the second substrate 32 is the array substrate described in the above embodiment.

[0111] It should be noted that the above display panel may or may not have a touch function, and can be selected and designed according to specific needs during actual production. The touch function may be an electromagnetic touch function, a capacitive touch function, or an electromagnetic capacitive touch function.

[0112] Finally, it should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the presence of other identical elements in the process, method, article or device including the elements.

[0113] The above description of the disclosed embodiments enables those skilled in the art to implement or use the present invention. Various modifications to these embodiments will be apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present application will not be limited to the embodiments shown herein, but will conform to the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A pixel circuit, It is characterized in that include: A first resetting unit, a driving unit, a compensation unit, a second resetting unit and a storage unit; The first resetting unit is used to reset the driving node between the first resetting unit and the driving unit; The second reset unit is used to reset the compensation node between the second reset unit and the driving unit; The compensation unit is used to make the amount of charge required by the pixel circuit when resetting a black screen equal to the amount of charge required by the pixel circuit when resetting a white screen, and the compensation unit includes a first capacitor; Wherein, the first end of the first reset unit is connected to the first reference signal output end, the second end of the first reset unit is connected to the third end of the driving unit, and the third end of the first reset unit is connected to the first scan signal input end; The first end of the driving unit is connected to the power signal output end, and the second end of the driving unit is connected to the second end of the compensation unit; The first end of the compensation unit is connected to the power signal output end; The first end of the second reset unit is connected to the second end of the compensation unit, the second end of the second reset unit is connected to the first reference signal output end, and the third end of the second reset unit is connected to the first scan signal output end; The first end of the storage unit is connected to the first end of the compensation unit, the second end of the storage unit is connected to the third end of the driving unit, and the storage unit includes a second capacitor; The first capacitor satisfies the following relationship: ； Among them, C1 is the value of the first capacitor, Cst is the value of the second capacitor, V1 is the voltage value of the driving node when the pixel circuit resets the black screen, V2 is the voltage value of the compensation node when the pixel circuit resets the black screen, V3 is the voltage value of the driving node when the pixel circuit resets the white screen, and V4 is the voltage value of the compensation node when the pixel circuit resets the white screen.

2. The pixel circuit according to claim 1, It is characterized in that The pixel circuit further includes: a writing unit, a third resetting unit, a first control unit, a second control unit, and a light emitting element; The writing unit writes the data signal into the driving unit in response to the second scanning signal; The third resetting unit is configured to reset a control node between the second control unit and the light emitting element in response to a second scanning signal; The first control unit controls the connection and disconnection between the driving unit and the power signal output terminal in response to the enable signal; The second control unit controls the connection and disconnection between the driving unit and the light emitting element in response to an enable signal.

3. The pixel circuit according to claim 2, It is characterized in that The first reset unit includes a first transistor, the driving unit includes a second transistor, and the second reset unit includes a third transistor; The gate of the first transistor is connected to the first scanning signal output terminal, the first terminal of the first transistor is connected to the first reference signal output terminal, and the second terminal of the first transistor is connected to the gate of the third transistor; A first end of the second transistor is connected to a power signal output end, and a second end of the second transistor is connected to a second end of the first capacitor; The first end of the first capacitor is connected to the power signal output end; The gate of the third transistor is connected to the first scanning signal output terminal, the first terminal of the third transistor is connected to the second terminal of the first capacitor, and the second terminal of the third transistor is connected to the first reference signal output terminal; The first end of the second capacitor is connected to the first end of the first capacitor, and the second end of the second capacitor is connected to the gate of the second transistor.

4. The pixel circuit according to claim 3, It is characterized in that The third reset unit includes a fourth transistor, the write unit includes a fifth transistor and a sixth transistor, the first control unit includes a seventh transistor, and the second control unit includes an eighth transistor; The gate of the fourth transistor is connected to the second scanning signal output terminal, the first terminal of the fourth transistor is connected to the second reference signal output terminal, and the second terminal of the fourth transistor is connected to the second terminal of the eighth transistor; The gate of the fifth transistor is connected to the gate of the sixth transistor, the first end of the fifth transistor is connected to the data signal output end, and the second end of the fifth transistor is connected to the second end of the seventh transistor; The gate of the sixth transistor is connected to the second scan signal output terminal, the first terminal of the sixth transistor is connected to the gate of the second transistor, and the second terminal of the sixth transistor is connected to the second terminal of the second transistor; The gate of the seventh transistor is connected to the enable signal output terminal, the first terminal of the seventh transistor is connected to the first terminal of the second capacitor, and the second terminal of the seventh transistor is connected to the first terminal of the second transistor; The gate of the eighth transistor is connected to the enable signal output terminal, the first terminal of the eighth transistor is connected to the second terminal of the second transistor, and the second terminal of the eighth transistor is connected to the first terminal of the light emitting element.

5. A method for driving a pixel circuit, It is characterized in that Applied to the pixel circuit as claimed in claim 1, the driving method comprises: In the reset stage, a low level is input to the first scan signal input terminal; the first reset unit, the driving unit, and the second reset unit are turned on, so that the first reference signal can simultaneously reset the driving node and the compensation node through the first reset unit and the second reset unit.

6. A method for driving a pixel circuit, It is characterized in that Applied to the pixel circuit according to any one of claims 2 to 4, the driving method further comprises: In the reset stage, a low level is input to the first scan signal input terminal, a high level is input to the second scan signal input terminal, and a high level is input to the enable signal input terminal; the first reset unit, the driving unit, and the second reset unit are turned on, so that the first reference signal can simultaneously reset the driving node and the compensation node through the first reset unit and the second reset unit; In the data writing stage, a high level is input to the first scan signal input terminal and the enable signal input terminal, and a low level is input to the second scan signal input terminal; the writing unit, the driving unit, and the third reset unit are turned on, and the data signal input to the data signal input terminal is transmitted to the storage unit via the writing unit and the driving unit, so that the storage unit starts to charge, and the second reference signal resets the control node via the third reset unit; In the light-emitting stage, a high level is input to the first scan signal input terminal and the second scan signal input terminal, and a low level is input to the enable signal input terminal; the first control unit, the second control unit, and the driving unit are turned on, so that the current generated by the power signal input terminal can drive the light-emitting element to emit light.

7. An array substrate, It is characterized in that Comprising the pixel circuit as described in any one of claims 1-4.

8. A display panel, It is characterized in that Comprising the array substrate as claimed in claim 7.

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