A silicon gate MOS integrated circuit ESD protection circuit structure

Abstract

The present invention relates to the technical field of ESD protection circuits, and discloses a silicon-gate MOS integrated circuit ESD protection circuit structure, comprising an input circuit, the input circuit being electrically connected to a protection resistor, the protection resistor being electrically connected to a MOS integrated circuit tube on a side away from the input circuit, and the outer wall of the MOS integrated circuit tube being uniformly fixedly connected to a discharge needle. When in use, the silicon-gate MOS integrated circuit ESD protection circuit structure allows air from a cooling fan to enter an air inlet, evenly blowing negative ions generated by a negative ion generator into the interior of the protection tube. These negative ions can eliminate positively charged particles near the MOS integrated circuit tube, thereby preventing the MOS integrated circuit from generating static electricity. When static electricity occurs in the circuit and affects the MOS integrated circuit tube, the static electricity in the circuit can be promptly eliminated through the discharge needle, preventing the MOS integrated circuit from being affected by the static electricity.

Description

Technical Field

[0001] The present invention relates to the technical field of ESD protection circuits, and in particular to an ESD protection circuit structure of a silicon-gate MOS integrated circuit. Background Art

[0002] MOS integrated circuits are integrated circuits composed of metal oxide semiconductor (MOS) field effect transistors as their main components. They are a commonly used integrated circuit with the advantages of simple manufacturing structure, convenient isolation, small circuit size, low power consumption and suitability for high-density integration. MOS tubes are bidirectional devices with high design flexibility, unique dynamic operation capabilities, and good temperature characteristics.

[0003] Traditional ESD protection for silicon-gate MOS integrated circuits uses many simple circuit structures, typically with the gate directly grounded or connected to the ground through a resistor. This circuit cannot ensure that static electricity is first released through the NMOS transistor and then through the resistor, which can easily damage the circuit. To address this issue, we propose an ESD protection circuit structure for silicon-gate MOS integrated circuits. Summary of the Invention

[0004] In view of the shortcomings of the prior art and to solve the above-mentioned problems, the present invention provides the following technical solutions: A silicon-gate MOS integrated circuit ESD protection circuit structure, comprising an input circuit, the input circuit being electrically connected to a protection resistor, the side of the protection resistor away from the input circuit being electrically connected to a MOS integrated circuit tube, the outer wall of the MOS integrated circuit tube being evenly and fixedly connected to a discharge needle, the side of the MOS integrated circuit tube away from the protection resistor being electrically connected to an output circuit, the outside of the MOS integrated circuit tube being sleeved with a protection tube, the outside of the protection tube being fixedly connected to a discharge nozzle, an air inlet being provided at the top of the protection tube, a negative ion generator being installed inside the air inlet, and an air outlet being provided on the side of the protection tube away from the air inlet.

[0005] Furthermore, the end of the discharge needle away from the MOS integrated circuit tube gradually becomes thinner to facilitate discharge.

[0006] Furthermore, the outer wall of the protection tube is grounded to facilitate discharge.

[0007] Furthermore, the discharge nozzle is covered on the outside of the discharge needle, thereby improving discharge safety.

[0008] Furthermore, the air inlet faces the air outlet of the circuit cooling fan, which facilitates the entry of air into the air inlet.

[0009] Furthermore, the negative ion generating device can evenly generate negative ions to offset the generated positive ions.

[0010] Compared with the prior art, the present invention provides a silicon-gate MOS integrated circuit ESD protection circuit structure, which has the following beneficial effects:

[0011] When the silicon-gate MOS integrated circuit ESD protection circuit structure is in use, the air blown by the cooling fan enters the air inlet, and the negative ions generated by the negative ion generator are evenly blown into the interior of the protection tube. At this time, these negative ions can eliminate positively charged particles near the MOS integrated circuit tube, thereby preventing the MOS integrated circuit from generating static electricity. When static electricity occurs in the circuit and affects the MOS integrated circuit tube, the static electricity in the circuit can be eliminated in time through the discharge needle, thereby preventing the MOS integrated circuit from being affected by static electricity. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] Figure 1 It is a schematic diagram of the main structure of the present invention;

[0013] Figure 2 This is a schematic cross-sectional view of the protective tube structure of the present invention;

[0014] Figure 3 For the present invention Figure 2 A magnified schematic diagram of the structure in the middle.

[0015] In the figure: 1. Input circuit; 2. Protection resistor; 3. MOS integrated circuit tube; 4. Discharge needle; 5. Output circuit; 6. Protection tube; 7. Discharge nozzle; 8. Air inlet; 9. Negative ion generator; 10. Air outlet. DETAILED DESCRIPTION

[0016] The following will provide a clear and complete description of the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. All other embodiments obtained by ordinary technicians in this field based on the embodiments of the present invention without making any creative efforts shall fall within the scope of protection of the present invention.

[0017] The embodiment of the silicon gate MOS integrated circuit ESD protection circuit structure is as follows:

[0018] See also Figure 1-Figure 3A silicon-gate MOS integrated circuit ESD protection circuit structure includes an input circuit 1, the input circuit 1 is electrically connected to a protection resistor 2, the side of the protection resistor 2 away from the input circuit 1 is electrically connected to a MOS integrated circuit tube 3, the outer wall of the MOS integrated circuit tube 3 is evenly fixedly connected with a discharge needle 4, the end of the discharge needle 4 away from the MOS integrated circuit tube 3 gradually tapers to facilitate discharge, the side of the MOS integrated circuit tube 3 away from the protection resistor 2 is electrically connected to an output circuit 5, the outside of the MOS integrated circuit tube 3 is sleeved with a protection tube 6, the outer wall of the protection tube 6 is grounded to facilitate discharge, the outside of the protection tube 6 is fixedly connected to a discharge nozzle 7, the discharge nozzle 7 covers the outside of the discharge needle 4 to improve discharge safety, the top of the protection tube 6 is provided with an air inlet 8, the air inlet 8 is directly opposite to the air inlet of the circuit cooling fan, so that air can enter the air inlet 8, a negative ion generator 9 is installed inside the air inlet 8, the negative ion generator 9 can evenly generate negative ions to offset the generated positive ions, and the side of the protection tube 6 away from the air inlet 8 is provided with an air outlet 10.

[0019] Working principle: When in use, because the air inlet 8 is facing the air outlet of the circuit cooling fan, the wind blown by the cooling fan can enter the air inlet 8, and because a negative ion generator 9 is installed inside the air inlet 8, the negative ion generator 9 can evenly generate negative ions, so the wind blown by the cooling fan can evenly blow the negative ions generated by the negative ion generator 9 into the protective tube 6, and because the outside of the MOS integrated circuit tube 3 is connected with the protective tube 6, the negative ions can eliminate the positively charged particles near the MOS integrated circuit tube 3, thereby avoiding the generation of static electricity in the MOS integrated circuit.

[0020] When static electricity occurs in the circuit and affects the MOS integrated circuit 3, the discharge needles 4 are evenly and fixedly connected to the outer wall of the MOS integrated circuit 3. The discharge needles 4 gradually taper at the end away from the MOS integrated circuit 3. Therefore, the static electricity in the circuit can be promptly eliminated through the discharge needles 4, thereby preventing the MOS integrated circuit from being affected by static electricity.

[0021] In summary, when the silicon-gate MOS integrated circuit ESD protection circuit structure is in use, the wind blown by the cooling fan enters the air inlet 8, and the negative ions generated by the negative ion generating device 9 are evenly blown into the interior of the protection tube 6. At this time, these negative ions can eliminate the positively charged particles near the MOS integrated circuit tube 3, thereby avoiding the generation of static electricity in the MOS integrated circuit. When static electricity occurs in the circuit and affects the MOS integrated circuit tube 3, the static electricity in the circuit can be eliminated in time through the discharge needle 4, avoiding the MOS integrated circuit from being affected by static electricity.

[0022] While embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions, and variations may be made to these embodiments without departing from the principles and spirit of the invention, and that the scope of the invention is defined by the appended claims and their equivalents.

Claims

1. A silicon gate MOS integrated circuit ESD protection circuit structure, comprising an input circuit (1), characterized in that: The input circuit (1) is electrically connected to a protective resistor (2), the side of the protective resistor (2) away from the input circuit (1) is electrically connected to a MOS integrated circuit tube (3), the outer wall of the MOS integrated circuit tube (3) is evenly fixedly connected to a discharge needle (4), the side of the MOS integrated circuit tube (3) away from the protective resistor (2) is electrically connected to an output circuit (5), the outer portion of the MOS integrated circuit tube (3) is sleeved with a protective tube (6), the outer portion of the protective tube (6) is fixedly connected to a discharge nozzle (7), the top of the protective tube (6) is provided with an air inlet (8), the interior of the air inlet (8) is provided with a negative ion generating device (9), and the side of the protective tube (6) away from the air inlet (8) is provided with an air outlet (10); The end of the discharge needle (4) away from the MOS integrated circuit tube (3) gradually becomes thinner; The outer wall of the protection tube (6) is grounded; The discharge nozzle (7) is covered on the outside of the discharge needle (4).

2. The silicon-gate MOS integrated circuit ESD protection circuit structure according to claim 1, characterized in that: The air inlet (8) faces the air outlet of the circuit cooling fan.

3. The silicon-gate MOS integrated circuit ESD protection circuit structure according to claim 1, characterized in that: The negative ion generating device (9) can generate negative ions uniformly.

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