Array substrate and manufacturing method thereof, and display panel
By integrating the first filter layer and the second filter layer on the array substrate, selective detection of ultraviolet light is achieved, the preparation process of the ultraviolet light detection structure is simplified, the production cost is reduced and the selectivity is improved, thus solving the problems of complex and high cost of ultraviolet light detection structure in the existing technology.
Patent Information
- Application Number
- CN202210547754.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-05-18
- Publication Date
- 2025-09-23
- Estimated Expiration
- 2042-05-18
AI Technical Summary
The ultraviolet light detection structure in existing display panels is complex and the production process is cumbersome. In addition, the existing materials have poor selectivity for ultraviolet light and visible light, and the need for additional filters leads to high costs.
The first filter layer and the second filter layer are integrated on the array substrate, and the light is guided to the active layer through two reflections. The wide bandgap semiconductor material is used as the photosensitive unit to achieve selective detection of ultraviolet light, eliminating the step of attaching filters.
The preparation process of the ultraviolet light detection structure is simplified, the production cost is reduced, the selection ratio of ultraviolet light to visible light is improved, and the risk of damage to the display device is avoided.
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Figure CN114864605B_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of display technology, and in particular to an array substrate and a preparation method thereof, and a display panel. Background Art
[0002] With the advancement of display technology, flat-panel displays such as liquid crystal displays (LCDs) and organic light-emitting diodes (OLEDs) have become mainstream in consumer electronics, including mobile phones, televisions, personal digital assistants (PDAs), digital cameras, laptops, and desktop computers, due to their advantages of high image quality, power efficiency, thin design, and wide application range. In addition to demanding high resolution, wide viewing angles, and low power consumption, consumers are also placing additional demands on display panels. Enriching panel functionality, increasing human-computer interaction, and enhancing the competitiveness of display panels are currently key development directions for display panels.
[0003] Optical fingerprint sensors, ambient light sensors, and UV sensors are currently hot areas of development. Common semiconductor materials used in photodetectors include amorphous silicon, microcrystalline silicon, and polycrystalline silicon. However, these materials have narrow band gaps and poor light detection selectivity, limiting their practical applications. Currently, polycrystalline silicon is commonly used for UV detectors, but it responds to both visible and UV light, resulting in poor UV selectivity and requiring an accompanying filter. However, these commonly used filters are costly and have a limited UV / visible light selectivity.
[0004] Therefore, improvements are urgently needed to address the defects in the prior art. Summary of the Invention
[0005] The embodiments of the present application provide an array substrate and a display panel to improve the problems of complex ultraviolet light detection structure and cumbersome production process in current display panels.
[0006] An embodiment of the present application provides an array substrate, comprising: a base substrate; a first buffer layer, disposed on one side of the base substrate and having a groove; a first filter layer, disposed on a side of the first buffer layer away from the base substrate and covering the groove; an active layer, disposed on a side of the first filter layer away from the first buffer layer and corresponding to the first filter layer; and a second filter layer, disposed on a side of the active layer away from the first filter layer and corresponding to the active layer; wherein the orthographic projection of the active layer on the base substrate is located within the orthographic projection of the first filter layer on the base substrate.
[0007] Optionally, in some embodiments of the present application, the cross-section of the groove is in the shape of an inverted trapezoid, and the angle between the sidewall of the groove and the substrate ranges from 0° to 60°.
[0008] Optionally, in some embodiments of the present application, the first filter layer includes at least one first metal layer and at least one first metal oxide layer, and the first metal layer is arranged close to the first buffer layer; the second filter layer includes at least one second metal layer and at least one second metal oxide layer, and the second metal oxide layer is arranged close to the active layer.
[0009] Optionally, in some embodiments of the present application, the material of the first metal layer and the second metal layer includes titanium; the material of the first metal oxide layer and the second metal oxide layer includes titanium oxide.
[0010] Optionally, in some embodiments of the present application, the thickness of the first metal layer and the second metal layer ranges from 40 nm to 300 nm; the thickness of the first metal oxide layer and the second metal oxide layer ranges from 10 nm to 500 nm.
[0011] Optionally, in some embodiments of the present application, the orthographic projection of the second filter layer on the base substrate is located within the orthographic projection of the first filter layer on the base substrate; the orthographic projection of the second filter layer on the active layer covers at least a portion of the active layer.
[0012] Optionally, in some embodiments of the present application, the orthographic projection shape of the second filter layer on the base substrate includes a cross; the orthographic projection of the second filter layer on the base substrate exposes four corners of the orthographic projection of the active layer on the base substrate; and the source / drain electrodes are connected to the active layer at the positions of the four corners.
[0013] Optionally, in some embodiments of the present application, the array substrate further includes: a second buffer layer, arranged on a side of the first filter layer away from the first buffer layer, and covering the first buffer layer and the first filter layer; a gate insulating layer, arranged on a side of the active layer away from the second buffer layer, and covering the second buffer layer and the active layer; a gate, arranged on a side of the gate insulating layer away from the active layer, and arranged corresponding to the active layer; an interlayer insulating layer, arranged on a side of the gate away from the gate insulating layer, and covering the gate insulating layer and the gate; a source / drain electrode, arranged on a side of the interlayer insulating layer away from the gate, and connected to the active layer through a via hole passing through the interlayer insulating layer and the gate insulating layer; and a flat layer, arranged on a side of the second filter layer away from the interlayer insulating layer, and covering the interlayer insulating layer, the second filter layer and the source / drain electrode.
[0014] Correspondingly, an embodiment of the present application also provides a method for preparing the array substrate described in any of the above embodiments, comprising the following steps: providing a base substrate; depositing an insulating material on the base substrate, and patterning to form a groove to form a first buffer layer; depositing a metal material and a metal oxide material on the first buffer layer, and patterning to form a first filter layer, the first filter layer covering the groove; depositing a polysilicon material on the first filter layer, and patterning to form an active layer, the active layer being formed directly above the first filter layer, and the orthographic projection of the active layer on the base substrate being located within the orthographic projection of the first filter layer on the base substrate; depositing a metal oxide material and a metal material on the active layer, and patterning to form a second filter layer, so that the orthographic projection of the second filter layer on the active layer covers at least a portion of the active layer.
[0015] Correspondingly, an embodiment of the present application further provides a display panel, which includes the array substrate described in any of the above embodiments and an opposite substrate arranged opposite to the array substrate.
[0016] An embodiment of the present application provides an array substrate, comprising a base substrate, a first buffer layer, a first filter layer, a second buffer layer, an active layer, a gate insulating layer, a gate, an interlayer insulating layer, a second filter layer, a source / drain electrode, and a flat layer stacked in sequence. By integrating the first filter layer and the second filter layer into the array substrate, external light can be incident on the array substrate, first reflected to the second filter layer by the first filter layer, and then reflected to the active layer by the second filter layer. The active layer can act as a photosensitive unit to meet the need for detecting the intensity of ultraviolet light in the external light. The present application can directly prepare the ultraviolet detection structure on the array substrate, so there is no need to carry out a process for fixing the ultraviolet detection structure to the display device, so there is no risk of damage to the display device during the fixing process, and solves the problem that the current ultraviolet light detection requires an accompanying filter to be used, and the preparation process is simpler, saving production costs.
[0017] Furthermore, the first buffer layer is provided with the groove, the orthographic projection of the active layer on the base substrate is located within the orthographic projection of the first filter layer on the base substrate, and the second filter layer is provided corresponding to the active layer, that is, the orthographic projection of the second filter layer on the base substrate is located within the orthographic projection of the first filter layer on the base substrate. When the cross-section of the groove is an inverted trapezoid, the periphery of the first filter layer has a slope, which serves to converge light, that is, it can more easily reflect external light to the second filter layer. Reflecting more light can enable the active layer to absorb more external light, thereby meeting the need to detect the intensity of ultraviolet light in the external light. BRIEF DESCRIPTION OF THE DRAWINGS
[0018] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For those skilled in the art, other drawings can be obtained based on these drawings without creative work.
[0019] Figure 1 A schematic plan view of a partial structure of an array substrate provided in an embodiment of the present application;
[0020] Figure 2 for Figure 1 A schematic diagram of the cross-sectional structure of the array substrate at AA';
[0021] Figure 3 for Figure 1 A schematic diagram of the cross-sectional structure of the array substrate at BB';
[0022] Figure 4 A flow chart of a method for preparing an array substrate provided in an embodiment of the present application;
[0023] Figures 5 to 15 A schematic diagram of the structures of each step in the method for preparing an array substrate provided in an embodiment of the present application;
[0024] Figure 16 A schematic structural diagram of a display panel provided in an embodiment of the present application.
[0025] Description of main reference numerals:
[0026] DETAILED DESCRIPTION
[0027] The technical solutions in the embodiments of the present application will be described clearly and completely below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without making creative work are within the scope of protection of the present application. In addition, it should be understood that the specific embodiments described herein are only used to illustrate and explain the present application, and are not used to limit the present application. In the present application, unless otherwise specified, the directional words used, such as "up", "down", "left" and "right", can be the directions of the actual use or working state of the device, can also be the directions of the drawings with reference to the drawings, or can refer to two relative directions; while "inside" and "outside" refer to the outline of the device.
[0028] See also Figures 1 to 3 An embodiment of the present application provides an array substrate, including a base substrate 110, a first buffer layer 120, a first filter layer 130, a second buffer layer 140, an active layer 150, a gate insulating layer 160, a gate 170, an interlayer insulating layer 180, a second filter layer 190, a source / drain electrode 1110 and a flat layer 1120, which are stacked in sequence. Specifically, the first buffer layer 120 is provided on one side of the base substrate 110 and has a groove 121; the first filter layer 130 is provided on the side of the first buffer layer 120 away from the base substrate 110 and covers the groove 121; the second buffer layer 140 is provided on the side of the first filter layer 130 away from the first buffer layer 120 and covers the first buffer layer 120 and the first filter layer 130; the active layer 150 is provided on the side of the second buffer layer 140 away from the first filter layer 130 and is provided corresponding to the first filter layer 130; the gate insulating layer 160 is provided on the side of the active layer 150 away from the second buffer layer 140 and covers the second buffer layer 140 and the active layer 150; the gate 17 0 is arranged on a side of the gate insulating layer 160 away from the active layer 150, and is arranged corresponding to the active layer 150; the interlayer insulating layer 180 is arranged on a side of the gate 170 away from the gate insulating layer 160, and covers the gate insulating layer 160 and the gate 170; the second filter layer 190 is arranged on a side of the interlayer insulating layer 180 away from the gate 170, and is arranged corresponding to the active layer 150; and the source / drain electrode 1110 is arranged on the same layer as the second filter layer 190, and is connected to the active layer 150 through a via hole penetrating the interlayer insulating layer 180 and the gate insulating layer 160; wherein the orthographic projection of the active layer 150 on the base substrate 110 is located within the orthographic projection of the first filter layer 130 on the base substrate 110.
[0029] In this embodiment, by integrating the first filter layer 130 and the second filter layer 190 into the array substrate, external light can enter the array substrate, firstly reflect the light to the second filter layer 190 through the first filter layer 130, and then reflect the light to the active layer 150 through the second filter layer. The material of the active layer 150 is preferably a wide bandgap semiconductor material. For example, the wide bandgap semiconductor material is zinc oxide or indium gallium zinc oxide, which can act as a photosensitive unit to meet the need for detecting the intensity of ultraviolet light in external light. The present application can directly prepare the ultraviolet detection structure on the array substrate, so there is no need to fix the ultraviolet detection structure to the display device, so there is no risk of damage to the display device during the fixing process, and solves the problem that the current ultraviolet light detection requires an accompanying filter to be used. The preparation process is simpler and the production cost is saved.
[0030] In one embodiment, the cross-section of the groove 121 is an inverted trapezoid, and the angle between the sidewall of the groove 121 and the base substrate 110 ranges from 0° to 60°, for example, 10°, 15°, 20°, 25°, 30°, 35°, 40°, 45°, 50°, or 55°. Preferably, the angle between the sidewall of the groove 121 and the base substrate 110 ranges from 25° to 45°. It is understood that the orthographic projection of the active layer 150 on the base substrate 110 lies within the orthographic projection of the first filter layer 130 on the base substrate 110, and the second filter layer 190 is disposed corresponding to the active layer 150. That is, the orthographic projection of the second filter layer 190 on the base substrate 110 lies within the orthographic projection of the first filter layer 130 on the base substrate 110. When the cross-section of the groove 121 is an inverted trapezoid, the periphery of the first filter layer 130 has an inclined surface that serves to converge light, thereby more easily reflecting external light onto the second filter layer 190. More reflected light allows the active layer 150 to absorb more external light, thereby enabling detection of the intensity of ultraviolet light in the external light. In this application, the angle between the sidewall of the groove 121 and the base substrate 110 is set between 0° and 60°, which can effectively utilize external light and help reduce the area of the second filter layer 190.
[0031] In this embodiment, the first filter layer 130 and the second filter layer 190 are composite films. The first filter layer 130 includes at least one first metal layer 131 and at least one first metal oxide layer 132. The first metal layer 131 is disposed adjacent to the first buffer layer 120. The second filter layer 190 includes at least one second metal layer 191 and at least one second metal oxide layer 192. The second metal oxide layer 192 is disposed adjacent to the interlayer insulating layer 180. The first and second metal layers 131 and 191 are made of titanium, while the first and second metal oxide layers 132 and 192 are made of titanium oxide. It is understood that the composite layer of titanium and titanium oxide can reflect light of different wavelengths differently. When the wavelength of external light is less than 380 nm, its reflectivity is approximately 65%. When the wavelength of external light is between 380 nm and 780 nm, its reflectivity is approximately 10%. That is, in this application, the reflectivity of the first filter layer 130 or the second filter layer 190 for ultraviolet light is approximately 65%, and the reflectivity for visible light is approximately 10%. It can be understood that in this application, the external light is reflected twice by the first filter layer 130 and the second filter layer 190, thereby reflecting the external light to the active layer 150. In other words, the external light detected by the active layer 150 ultimately has approximately 42% of its original intensity for ultraviolet light and approximately 1% for visible light, resulting in a selectivity ratio of 42:1 for ultraviolet to visible light. This high selectivity achieves excellent ultraviolet light detection performance. Furthermore, because the first filter layer 130 has an approximately 10% reflectivity for visible light, the orthographic projection of the active layer 150 on the base substrate 110 lies within the orthographic projection of the first filter layer 130 on the base substrate 110. Therefore, light generated by the backlight source is blocked by the first filter layer 130 and does not reach the active layer 150, thereby eliminating the backlight's impact on ultraviolet light detection.
[0032] Preferably, the thickness of the first metal layer 131 and the second metal layer 191 ranges from 40 nm to 300 nm, respectively; the thickness of the first metal oxide layer 132 and the second metal oxide layer 192 ranges from 10 nm to 500 nm, respectively. For example, the thickness of the first metal layer 131 or the second metal layer 191 is 50 nm, 60 nm, 70 nm, 80 nm, 90 nm, 100 nm, 110 nm, 120 nm, 130 nm, 140 nm, 150 nm, 160 nm, 170 nm, 180 nm, 190 nm, 200 nm, 210 nm, 220 nm, 230 nm, 240 nm, 250 nm, 260 nm, 270 nm, 280 nm, or 290 nm, but is not limited thereto. The thickness of the first metal oxide layer 132 or the second metal oxide layer 192 is 10 nm, 20 nm, 30 nm, 40 nm, 50 nm, 60 nm, 70 nm, 80 nm, 90 nm, 100 nm, 110 nm, 120 nm, 130 nm, 140 nm, 150 nm, 160 nm, 170 nm, 180 nm, 190 nm, 200 nm, 210 nm, 220 nm, 230 nm, 240 nm, 250 nm, 260 nm, 270 nm, 280 nm, 290 nm, 300 nm, 310 nm, 320 nm, 330 nm, 340 nm, 360 nm, 370 nm, 380 nm, 390 nm, 400 nm, 410 nm, 0nm, 250nm, 260nm, 270nm, 280nm, 290nm, 300nm, 310nm, 320nm, 330nm, 340nm, 350nm, 360nm, 370nm, 380nm, 390nm, 400nm, 410nm, 420nm, 430nm, 440nm, 450nm, 460nm, 470nm, 480nm or 490nm, but is not limited thereto. Preferably, the first metal layer 131 and the second metal layer 191 have the same thickness, and the first metal oxide layer 132 and the second metal oxide layer 192 have the same thickness. Such a configuration can make light reflection more uniform.
[0033] like Figure 1As shown, in one embodiment, the orthographic projection of the second filter layer 190 on the base substrate 110 is located within the orthographic projection of the first filter layer 130 on the base substrate 110; the orthographic projection of the second filter layer 190 on the active layer 150 covers at least a portion of the active layer 150. The orthographic projection of the second filter layer 190 on the base substrate comprises a cross; the orthographic projection of the second filter layer 190 on the base substrate 110 exposes four corners of the orthographic projection of the active layer 150 on the base substrate 110; and the source / drain electrodes 1110 are connected to the active layer 150 at these four corners. This arrangement ensures that as much light as possible reflected from the second filter layer 190 is reflected back to the active layer 150 without affecting the film connection of the active layer 150, thereby fully utilizing the light.
[0034] See also Figures 4 to 15 The present application also provides a method for preparing the array substrate 10, comprising the following steps:
[0035] like Figure 4 and Figure 5 As shown, step S1: providing a base substrate 110; the base substrate 110 can be a flexible substrate, a glass substrate or a flexible substrate, and the preparation material of the flexible substrate includes but is not limited to polyimide and polyethylene terephthalate.
[0036] like Figure 4 and Figure 6 As shown, step S2: depositing an insulating material on the base substrate 110, and patterning to form a groove 121 to form a first buffer layer 120; the first buffer layer 120 is used for heat preservation, which is any one of a silicon nitride layer, a silicon oxide layer or an overlapping layer of silicon nitride and silicon oxide. Preferably, the first buffer layer 120 is made of silicon nitride.
[0037] like Figure 4 and Figure 7 As shown, step S3: depositing a metal material and a metal oxide material on the first buffer layer 120, and patterning to form a first filter layer 130. The first filter layer 130 covers the groove 121; the angle between the sidewall of the groove 121 and the substrate 110 ranges from 0° to 60°. The first filter layer 130 includes at least one first metal layer 131 and at least one first metal oxide layer 132. The first metal layer 131 is disposed adjacent to the first buffer layer 120. The material of the first metal layer 131 includes titanium, and the material of the first metal oxide layer 132 includes titanium oxide.
[0038] like Figure 4 and Figure 8As shown, step S4: depositing an insulating material on the first filter layer 130, covering the first buffer layer 120 and the first filter layer 130 to form a second buffer layer 140; the second buffer layer 140 is used for heat preservation, and is any one of a silicon nitride layer, a silicon oxide layer, or an overlapping layer of silicon nitride and silicon oxide. Preferably, the second buffer layer 140 is made of silicon oxide.
[0039] like Figure 4 and Figure 9 As shown, step S5: depositing polysilicon material on the second buffer layer 140 and patterning to form an active layer 150, the active layer 150 is correspondingly formed directly above the first filter layer 130, and the orthographic projection of the active layer 150 on the base substrate 110 is located within the orthographic projection of the first filter layer on the base substrate; the material of the active layer 150 is preferably a wide bandgap semiconductor material, for example, the wide bandgap semiconductor material is zinc oxide or indium gallium zinc oxide, which can act as a photosensitive unit to meet the need of detecting the intensity of ultraviolet light in external light.
[0040] like Figure 4 and Figure 10 As shown, step S6: depositing an insulating material on the active layer 150 to form a gate insulating layer 160; the gate insulating layer 160 is any one of a silicon nitride layer, a silicon oxide layer or an overlapping layer of silicon nitride and silicon oxide.
[0041] like Figure 4 and Figure 11 As shown, step S7: depositing a metal material on the gate insulating layer 160 and patterning to form a gate 170, wherein the gate 170 is formed directly above the active layer 150; the preparation material of the gate 170 includes at least one of molybdenum, aluminum, titanium, chromium and copper.
[0042] like Figure 4 and Figure 12 As shown, step S8: depositing an insulating material on the gate 170 to form an interlayer insulating layer 180 .
[0043] like Figure 4 and Figure 13 As shown, step S9: depositing a metal oxide material and a metal material on the interlayer insulating layer 180 respectively, and patterning to form a second filter layer 190; the second filter layer 190 includes at least one second metal layer 191 and at least one second metal oxide layer 192, and the second metal oxide layer 192 is arranged close to the interlayer insulating layer 180; wherein the material of the second metal layer 191 includes titanium; the material of the second metal oxide layer 192 includes titanium oxide.
[0044] like Figure 4 and Figure 14 As shown, step S10: forming a via hole on the interlayer insulating layer 180 that penetrates the interlayer insulating layer 180 and the gate insulating layer 160 to expose a portion of the active layer 150, and then depositing a metal material on the interlayer insulating layer 180 to cover the exposed portion of the active layer 150, and patterning to form a source / drain electrode 1110 to connect the source / drain electrode 1110 to the active layer 150; the interlayer insulating layer 180 is used to insulate the source / drain 1110 and the gate 170 from other conductive layers. It is understood that the second filter layer 190 and the source / drain electrode 1110 are arranged on the same layer, and are both arranged on the interlayer insulating layer 180. The source / drain electrode 1110 is wet-etched. While etching the source / drain electrode 1110, the etching solution will not etch the second filter layer 190 because the source / drain electrode 1110 and the second filter layer 190 are made of different materials. This allows the second filter layer 190 and the source / drain electrode 1110 to be arranged on the same layer, thereby reducing the thickness of the array substrate 10. Figure 4 and Figure 15 As shown, step S11: depositing an insulating material on the second filter layer 190 to cover the interlayer insulating layer 180, the second filter layer 190 and the source / drain electrode 1110 to form a flattening layer 1120; the flattening layer 1120 serves to flatten the devices in the array substrate 10, so as to facilitate the preparation of other film layers in subsequent processes.
[0045] In this embodiment, the specific preparation method of each film layer can be prepared by conventional methods in the field. In this embodiment, the first filter layer 130 and the second filter layer 190 are integrated into the array substrate. External light can enter the array substrate 10, and the light is first reflected by the first filter layer 130 to the second filter layer 190, and then reflected by the second filter layer 190 to the active layer 150. The active layer 150 acts as a photosensitive unit to meet the need for detecting the intensity of ultraviolet light in the external light.
[0046] See also Figure 16 , the present application also provides a display panel 1, which includes the array substrate 10 and the opposite substrate 20 arranged opposite to the array substrate 10. It can be understood that the display panel 1 also includes some other conventional film layers, which are not described in detail in this application. Specifically, the display panel 1 described in this application can be applied to any product or component with a display function, such as mobile phones, tablet computers, televisions, monitors, laptops, digital photo frames, and navigators. The other essential components of the display panel 1 should be understood by ordinary technicians in this field, and will not be described in detail here, nor should they be used as a limitation to this application.
[0047] An embodiment of the present application provides an array substrate, comprising a base substrate 110, a first buffer layer 120, a first filter layer 130, a second buffer layer 140, an active layer 150, a gate insulating layer 160, a gate 170, an interlayer insulating layer 180, a second filter layer 190, source / drain electrodes 1110, and a planar layer 1120, which are stacked in sequence. By integrating the first filter layer 130 and the second filter layer 190 into the array substrate, external light can enter the array substrate and be first reflected by the first filter layer 130 to the second filter layer 190, and then by the second filter layer 190 to the active layer 150. The active layer 150 can function as a photosensitive unit to meet the requirement of detecting the intensity of ultraviolet light in the external light. The present application can directly prepare the ultraviolet detection structure on the array substrate, so there is no need to carry out the process of fixing the ultraviolet detection structure to the display device, so there is no risk of damaging the display device during the fixing process, and solves the current problem that ultraviolet light detection requires an accompanying filter to be used. The preparation process is simpler and production costs are saved.
[0048] Furthermore, the first buffer layer 120 is provided with the groove 121, the orthographic projection of the active layer 150 on the base substrate 110 is located within the orthographic projection of the first filter layer 130 on the base substrate 110, and the second filter layer 190 is provided corresponding to the active layer 150, that is, the orthographic projection of the second filter layer 190 on the base substrate 110 is located within the orthographic projection of the first filter layer 130 on the base substrate 110. When the cross-section of the groove 121 is an inverted trapezoid, the periphery of the first filter layer 130 has a slope, which serves to converge light, that is, it can more easily reflect external light to the second filter layer 190. Reflecting more light can enable the active layer 150 to absorb more external light, thereby meeting the need to detect the intensity of ultraviolet light in the external light.
[0049] In the above embodiments, the description of each embodiment has its own focus. For parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.
[0050] The above is a detailed introduction to an array substrate 10 and a display panel 1 provided in an embodiment of the present application. Specific examples are used herein to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the method of the present application and its core idea. At the same time, for technical personnel in this field, based on the ideas of the present application, there will be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as a limitation on the present application.
Claims
1. An array substrate, characterized in that: include: substrate; A first buffer layer is disposed on one side of the base substrate and has a groove; a first filter layer disposed on a side of the first buffer layer away from the base substrate and covering the groove, the first filter layer comprising at least one first metal layer and at least one first metal oxide layer, the first metal layer being disposed adjacent to the first buffer layer; an active layer, disposed on a side of the first filter layer away from the first buffer layer and corresponding to the first filter layer; as well as a second filter layer disposed on a side of the active layer away from the first filter layer and corresponding to the active layer, the second filter layer comprising at least one second metal layer and at least one second metal oxide layer, the second metal oxide layer being disposed adjacent to the active layer; The orthographic projection of the active layer on the base substrate is located within the orthographic projection of the first filter layer on the base substrate. The materials of the first metal layer and the second metal layer include titanium. The materials of the first metal oxide layer and the second metal oxide layer include titanium oxide.
2. The array substrate according to claim 1, wherein: The cross section of the groove is in an inverted trapezoidal shape, and the angle between the sidewall of the groove and the substrate is in a range of 0° to 60°.
3. The array substrate according to claim 1, wherein: The thickness of the first metal layer and the second metal layer ranges from 40 nm to 300 nm; the thickness of the first metal oxide layer and the second metal oxide layer ranges from 10 nm to 500 nm.
4. The array substrate according to claim 1, wherein: The orthographic projection of the second filter layer on the base substrate is located within the orthographic projection of the first filter layer on the base substrate; The orthographic projection of the second filter layer on the active layer covers at least a portion of the active layer.
5. The array substrate according to claim 1, wherein: The array substrate further includes: a second buffer layer, disposed on a side of the first filter layer away from the first buffer layer, and covering the first buffer layer and the first filter layer; a gate insulating layer, disposed on a side of the active layer away from the second buffer layer, and covering the second buffer layer and the active layer; a gate, disposed on a side of the gate insulating layer away from the active layer and corresponding to the active layer; an interlayer insulating layer, disposed on a side of the gate away from the gate insulating layer and covering the gate insulating layer and the gate; a source / drain electrode, disposed on a side of the interlayer insulating layer away from the gate, and connected to the active layer through a via hole penetrating the interlayer insulating layer and the gate insulating layer; and The flat layer is arranged on a side of the second filter layer away from the interlayer insulating layer and covers the interlayer insulating layer, the second filter layer and the source / drain electrodes.
6. The array substrate according to claim 5, wherein: The orthographic projection of the second filter layer on the base substrate includes a cross shape; the orthographic projection of the second filter layer on the base substrate exposes four corners of the orthographic projection of the active layer on the base substrate; The source / drain electrodes are connected to the active layer at the four corners.
7. A method for preparing an array substrate, characterized in that: The steps include: providing a substrate; Depositing an insulating material on the base substrate and patterning it to form grooves to form a first buffer layer; Depositing a metal material and a metal oxide material on the first buffer layer, and patterning the material to form a first filter layer, wherein the first filter layer covers the groove, and the first filter layer includes at least one first metal layer and at least one first metal oxide layer, wherein the first metal layer is disposed adjacent to the first buffer layer; Depositing polysilicon material on the first filter layer and patterning it to form an active layer, wherein the active layer is formed directly above the first filter layer, and an orthographic projection of the active layer on the base substrate is located within an orthographic projection of the first filter layer on the base substrate; A metal oxide material and a metal material are respectively deposited on the active layer, and patterned to form a second filter layer so that an orthographic projection of the second filter layer on the active layer covers at least a portion of the active layer. The second filter layer includes at least one second metal layer and at least one second metal oxide layer. The second metal oxide layer is disposed adjacent to the active layer. The materials of the first metal layer and the second metal layer include titanium, and the materials of the first metal oxide layer and the second metal oxide layer include titanium oxide.
8. A display panel, characterized in that: The display panel includes the array substrate according to any one of claims 1 to 6 and an opposite substrate arranged opposite to the array substrate.
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