Charge pump and method for use therein

Abstract

A charge pump and method used therein are provided. The charge pump includes a first current source configured to discharge a first circuit node between a drain of a second power transistor and a second capacitor for a first time period with first to fourth power transistors in an off state, a second current source configured to discharge a second circuit node between a source of a third power transistor and the second capacitor for the first time period with the first to fourth power transistors in the off state, a first comparator configured to compare a voltage at the first circuit node with a first voltage difference, the first voltage difference being a difference between an output voltage of the charge pump and a second voltage threshold, and a second comparator configured to compare a voltage at the second circuit node with the first voltage threshold.

Description

Technical Field

[0001] The present invention relates to the field of circuits, and more particularly to a charge pump and a method used therein. Background Art

[0002] A charge pump is a switching converter that uses capacitors to store energy. Switches are used to switch the capacitors between charging and discharging states, thereby increasing or decreasing the supply voltage. In mobile electronic devices, the power supply voltage may be higher or lower than the device's operating voltage. A charge pump can help ensure the proper operation of the device by bringing the power supply voltage up or down within a reasonable range. Summary of the Invention

[0003] According to an embodiment of the present invention, a charge pump includes a first capacitor, a second capacitor, and first, second, third, and fourth power transistors connected in series, wherein the first capacitor is connected between the drain and source of the first power transistor, and the second capacitor is connected between the drain of the second power transistor and the source of the third power transistor. The charge pump further includes: a first current source for discharging a first circuit node between the drain of the second power transistor and the second capacitor during a first time period when the first to fourth power transistors are in an off state; a second current source for discharging a second circuit node between the source of the third power transistor and the second capacitor during a first time period when the first to fourth power transistors are in an off state; a first comparator for comparing a voltage at the first circuit node with a first voltage difference, which is a difference between an output voltage of the charge pump and a second voltage threshold; and a second comparator for comparing a voltage at the second circuit node with a first voltage threshold. When the voltage at the first circuit node is less than the first voltage difference and the voltage at the second circuit node is less than the first voltage threshold at the end of the first time period, it indicates that the first to third power transistors and the second capacitor are not in a short-circuit state.

[0004] According to an embodiment of the present invention, a method for use in a charge pump includes a first capacitor, a second capacitor, and first, second, third, and fourth power transistors connected in series, wherein the first capacitor is connected between the drain and source of the first power transistor, and the second capacitor is connected between the drain of the second power transistor and the source of the third power transistor. The method includes: when the first to fourth power transistors are in an off state, discharging a first circuit node between the drain of the second power transistor and the second capacitor using a first current during a first time period; when the first to fourth power transistors are in an off state, discharging a second circuit node between the source of the third power transistor and the second capacitor using a second current during a first time period; comparing a voltage at the first circuit node with a first voltage difference, which is a difference between an output voltage of the charge pump and a second voltage threshold; and comparing a voltage at the second circuit node with a first voltage threshold, wherein at the end of the first time period, the voltage at the first circuit node is less than the first voltage difference and the voltage at the second circuit node is less than the first voltage threshold, indicating that none of the first to third power transistors and the second capacitor are in a short-circuit state. BRIEF DESCRIPTION OF THE DRAWINGS

[0005] The present invention can be better understood from the following description of specific embodiments of the present invention in conjunction with the accompanying drawings, in which:

[0006] Figure 1 A schematic diagram of a conventional interleaved charge pump architecture is shown.

[0007] Figure 2 FIG. 1 is a schematic diagram illustrating a charge pump with an interleaved architecture according to an embodiment of the present invention.

[0008] Figure 3 Shows the application Figure 2 The flowchart of the capacitor / power tube self-detection and pre-start method in the charge pump is shown.

[0009] Figure 4 Shown Figure 2 The working waveforms of the relevant signals in the charge pump are shown. DETAILED DESCRIPTION

[0010] The features and exemplary embodiments of various aspects of the present invention will be described in detail below. In the detailed description below, many specific details are proposed to provide a comprehensive understanding of the present invention. However, it will be apparent to those skilled in the art that the present invention can be implemented without the need for some of these specific details. The following description of the embodiments is merely intended to provide a better understanding of the present invention by illustrating examples of the present invention. The present invention is by no means limited to any specific configuration and algorithm proposed below, but covers any modification, replacement, and improvement of elements, components, and algorithms without departing from the spirit of the present invention. In the accompanying drawings and the following description, known structures and techniques are not shown to avoid causing unnecessary ambiguity to the present invention.

[0011] Figure 1 FIG. 1 shows a schematic diagram of a conventional interleaved charge pump 100. Figure 1 As shown, the charge pump 100 includes a first-side circuit and a second-side circuit that are symmetrical to each other, and a capacitor COUT located therebetween. The first-side circuit includes power transistors Q1 to Q4 and capacitors CBST1 and CFLY1, and the second-side circuit includes power transistors Q5 to Q8 and capacitors CBST2 and CFLY2. The PMID pin is connected to an input power supply, and the VOUT pin is connected to an output load. The eight power transistors Q1 to Q8 are respectively turned on in two phases, wherein the power transistors Q1, Q3, Q6, and Q8 are turned on in the first phase, and the power transistors Q2, Q4, Q5, and Q7 are turned on in the second phase. When the power transistors in the conducting state switch from Q1 / Q3 / Q6 / Q8 to Q2 / Q4 / Q5 / Q7 or from Q2 / Q4 / Q5 / Q7 to Q1 / Q3 / Q6 / Q8, the electric energy at the PMID pin is transferred to the VOUT pin through the capacitor CFLYx (x=1 or 2). Ideally, the voltage at the VOUT pin is approximately half the voltage at the PMID pin.

[0012] Before the charge pump 100 starts normally, it is necessary to check the capacitor CFLYx / CBSTx (x=1 or 2) and the open and short circuit of each power tube to ensure safety. It is also necessary to pre-start the capacitor CFLYx and the capacitor voltage on COUT to a steady-state value.

[0013] In view of the above requirements of a conventional interleaved charge pump, a charge pump with an interleaved architecture according to an embodiment of the present invention is proposed.

[0014] Figure 2 FIG2 shows a schematic diagram of a charge pump 200 with an interleaved architecture according to an embodiment of the present invention. It should be noted that since the first side circuit and the second side circuit of the charge pump 200 are symmetrical to each other, Figure 2 Only one side of the circuit is shown.

[0015] like Figure 2 As shown, the charge pump 200 includes two charge pump chips with PMID pin, VOUT pin and GND pin connected to each other, power tubes Q1, Q2, Q3, Q4, Q5, Q6, Q7 and Q8, capacitors CBST1, CBST2, CFLY1, CFLY2 and COUT ( Figure 2 (not shown), and switch tubes M1 and M2, wherein: the source of the power tube Q1 is connected to the drain of the power tube Q2, the source of the power tube Q2 is connected to the drain of the power tube Q3, and the source of the power tube Q3 is connected to the drain of the power tube Q4; the drain of the power tube Q1 is connected to the PMID pin of the charge pump chip, the source of the power tube Q4 is connected to the GND pin of the charge pump chip, and the drain of the power tube Q3 is connected to the VOUT pin of the charge pump chip; the capacitor CFLY1 is connected between the CFL1 and CFH1 pins of the charge pump chip, the capacitor CBST1 is connected between the BST1 and CFH1 pins of the charge pump chip, and the switch tube M1 is connected to the BST1 and PMID pins; the source of the power tube Q5 is connected to the drain of the power tube Q6, the source of the power tube Q6 is connected to the drain of the power tube Q7, and the source of the power tube Q7 is connected to the drain of the power tube Q8; the drain of the power tube Q5 is connected to the PMID pin of the charge pump chip, the source of the power tube Q8 is connected to the GND pin of the charge pump chip, and the drain of the power tube Q7 is connected to the VOUT pin of the charge pump chip; the capacitor CFLY2 is connected between the CFL2 and CFH2 pins of the charge pump chip, the capacitor CBST2 is connected between the BST2 and CFH2 pins of the charge pump chip, and the switch tube M2 is connected between the BST2 and PMID pins of the charge pump chip.

[0016] like Figure 2As shown, the charge pump 200 also includes a self-detection and pre-start circuit in the charge pump 2:1 charging mode, specifically including comparators COMP1 and COMP7, whose positive input terminals are connected to the VOUT pin of the charge pump chip and whose negative input terminals are connected to the CFHx (x=1 or 2) pin of the charge pump chip, a current source Idis_cfh1 and a switch SW1 connected in series, one end of which is connected to the CFHx pin of the charge pump chip and the other end is connected to the GND pin of the charge pump chip, a current source Idis_cfh2 and a switch SW6, one end of which is connected in series to the PMID pin of the charge pump chip and the other end is connected to the CFHx pin of the charge pump chip. The current source Ich_cfh and switch SW5 connected to the x pin, the comparators COMP2 and COMP4 with the positive input connected to the reference voltage VR1 and the negative input connected to the CFLx pin of the charge pump chip, and the comparator COMP3 with the negative input connected to the reference voltage VR1 and the negative input connected to the CFLx pin of the charge pump chip. After the series connection, one end is connected to the CFLx pin of the charge pump chip and the other end is connected to the GND pin of the charge pump chip. The current source Idis_cf2 and switch SW2 connected in series, one end is connected to the CFLx pin of the charge pump chip and the other end is connected to the internal voltage source VREG of the chip. The current source Ich_cfl and switch SW3 are connected in series, the positive input end is connected to the BSTx pin of the charge pump chip, and the negative input end is connected to the comparator COMP5, the positive input end is connected to the PMID pin of the charge pump chip, and the negative input end is connected to the BSTx pin of the charge pump chip. The comparator COMP6 has one end connected in series to the PMID pin of the charge pump chip and the other end connected to the BSTx pin of the charge pump chip. The current source Ich_bst and switch SW4 have their positive input end connected to the CFHx pin of the charge pump chip and their negative input end connected to the VOU of the charge pump chip. The comparator COMP8 is connected to the T pin, the comparator COMP9 has its positive input connected to the CFHx pin of the charge pump chip and its negative input connected to the PMID pin of the charge pump chip, the comparator COMP10 has its positive input connected to the VOUT pin of the charge pump chip and its negative input connected to the CFLx pin of the charge pump chip, and the comparator COMP11 has its positive input connected to the reference voltage VPMID_DIV (obtained by dividing the PMID pin voltage by resistors R1 and R2) which is half of the PMID pin voltage of the charge pump chip and its negative input connected to the CFHx pin of the charge pump chip.

[0017] Figure 3 Shows the application Figure 2 The flowchart of the capacitor / power tube self-detection and pre-start method in the charge pump is shown. Figure 4 Shown Figure 2The operating waveforms of the relevant signals in the charge pump are shown. It should be noted that since the first-side circuit and the second-side circuit in the charge pump 200 are symmetrical to each other, the following only describes the self-test process of the power transistors Q1 to Q4 and the capacitors CBST1 and CFLY1 of the first-side circuit (the self-test process of the power transistors Q5 to Q8 and the capacitors CBST2 and CFLY2 of the second-side circuit is the same and will not be repeated).

[0018] like Figure 3 and Figure 4 As shown, the self-test process for the power transistors Q1 to Q4 and the capacitors CBST1 and CFLY1 of the first side circuit includes the following steps:

[0019] S301: At the start of the self-test process, power transistors Q1 to Q4 are in the off state. The charge pump chip's timing signal Q2Q3_self_ck begins timing time T1. The CFH1 node is discharged with a current Idis_cfh1, and the CFL1 node is discharged with a current Idis_cfl. This allows for short-circuit detection of power transistors Q1 to Q3 and capacitor CFLY1. At the end of timing time T1, the comparison results of comparators COMP1 and COMP2 are sampled. If the comparison results do not satisfy the conditions that the CFH1 voltage is less than VOUT-VR2 and the CFL1 voltage is less than VR1, then at least one of the power transistors Q1 to Q3 or capacitor CFLY1 is determined to be in a short-circuit state. If the comparison results satisfy the conditions that the CFH1 voltage is less than VOUT-VR2 and the CFL voltage is less than VR1, then the power transistors Q1 to Q3 and capacitor CFLY1 are determined to be not in a short-circuit state, and the process proceeds to step S302.

[0020] S302: The timing signal Q4_self_ck of the charge pump chip starts timing time T2, and the timing signal Q4_noshort_ck starts timing time T3. The power transistors Q1 to Q4 are in the off state, and the CFL1 node is charged with the Ich_cfl current. At the end of timing time T3, the comparison result of the comparator COMP3 is sampled. If the comparison result does not satisfy that the CFL1 voltage is greater than VR1, it is determined that the power transistor Q4 is in the short-circuit state. Otherwise, the process goes to step S303.

[0021] S303: Timing signal Q4_self_ck continues timing time T2, while timing signal Q4_gate starts timing time T4. Power transistors Q1 to Q3 are in the off state, and power transistor Q4 is in the on state. The CFL1 node continues to be charged with the Ich_cfl current. At the end of timing time T2, the comparison result of comparator COMP4 is sampled. If the comparison result does not satisfy that the CFL1 voltage is less than VR1, it is determined that the power transistor Q4 is in the open circuit state. Otherwise, the process proceeds to step S304.

[0022] S304: Timing signal Q4_gate continues timing time T4, while timing signal Cbst_self_ck starts timing time T5. Power transistors Q1 to Q3 are in the off state and power transistor Q4 is in the on state. The BST1 node is charged with the Ich_bst current. At the end of timing time T5, the comparison results of comparators COMP5 and COMP6 are sampled. If the comparison result of comparator COMP5 does not satisfy that the CFH1 voltage is less than BST1-VR1, capacitor CBST1 is determined to be in a short-circuit state. If the comparison result of comparator COMP6 does not satisfy that the BST1 voltage is less than PMID-VR2, capacitor CBST1 is determined to be in an open-circuit state. Otherwise, the process proceeds to step S305.

[0023] In step S305 , the timing signal Q4_gate continues timing time T4, while the timing signal Cfly_self_ck starts timing time T6. Power transistors Q1 to Q3 are in the off state, and power transistor Q4 is in the on state. The CFH1 node is charged with the current Ich_cfh. At the end of timing time T6, the comparison result of the comparator COMP7 is sampled. If the comparison result does not satisfy the condition that the voltage VOUT is greater than CFH1-VR3, the capacitor CFLY1 is determined to be in the open circuit state. Otherwise, the process proceeds to step S306 .

[0024] S306, timing signal Q4_gate continues timing time T4, while timing signal Q2_gate starts timing time T7. Power transistors Q1 and Q3 are in the off state, and power transistors Q2 and Q4 are in the limited current conduction state. At the end of timing time T7, the comparison result of comparator COMP8 is sampled. If the comparison result does not satisfy the condition that the CFH1 voltage is greater than VOUT-VR1, it is determined that power transistor Q2 is in the open circuit state. Otherwise, the process proceeds to step S307.

[0025] At step S307, timing signal Q1 / Q3_gate begins timing time T8. Power transistors Q1 and Q3 are in the current-limited on state, while power transistors Q2 and Q4 are in the off state. At the end of timing time T8, the comparison results of comparators COMP9 and COMP10 are sampled. If the comparison result of comparator COMP9 does not satisfy the requirement that the voltage at CFH1 is greater than PMID-VR1, power transistor Q1 is determined to be in the open circuit state. If the comparison result of comparator COMP10 does not satisfy the requirement that the voltage at VOUT is greater than CFL1-VR1, power transistor Q3 is determined to be in the open circuit state. Otherwise, power transistors Q1 and Q3 are determined to be in the normal state. At this point, power transistors Q1 through Q4 and capacitors CBST1 and CFLY1 have completed self-tests. However, the voltage on capacitor CFLY1 may be too high. If power transistors Q1, Q2, Q3, and Q4 were immediately turned on to begin operation, a large current would be generated at the moment of turning on, potentially burning out the components. To ensure system safety, the system enters the pre-startup step S308.

[0026] S308, the pre-start timing signal Cfly_prech_ck starts timing time T9, power tubes Q1 to Q3 are in the off state and power tube Q4 is in the on state, and the CFH1 node is discharged with the Idis_cfh2 current until the CFH1 voltage is lower than half of the PMID voltage. The pre-start timing signal Cfly_prech_ck timing time T9 ends, the capacitor CFLY1 is pre-started and immediately turned on to start normal operation of Q1, Q2, Q3, and Q4.

[0027] Figure 2 The charge pump and Figure 3 and Figure 4 The self-detection and pre-start process shown can realize the self-detection of the capacitor and the power tube and the pre-start of the charge pump, thereby ensuring that the charge pump works safely and reliably.

[0028] In summary, the present invention provides a method for use in a charge pump. Specifically, the charge pump includes a first capacitor, a second capacitor, and first, second, third, and fourth power transistors connected in series, wherein the first capacitor is connected between the drain and source of the first power transistor, and the second capacitor is connected between the drain of the second power transistor and the source of the third power transistor. The method includes: when the first to fourth power transistors are in an off state, discharging a first circuit node between the drain of the second power transistor and the second capacitor using a first current during a first period; when the first to fourth power transistors are in an off state, discharging a second circuit node between the source of the third power transistor and the second capacitor using a second current during a first period; comparing a voltage at the first circuit node with a first voltage difference, the first voltage difference being the difference between the output voltage of the charge pump and a second voltage threshold; and comparing a voltage at the second circuit node with a first voltage threshold, wherein at the end of the first period, the voltage at the first circuit node is less than the first voltage difference and the voltage at the second circuit node is less than the first voltage threshold, indicating that the first to third power transistors and the second capacitor are not in a short-circuit state.

[0029] In some embodiments, the method used in the charge pump according to the embodiment of the present invention also includes: charging the second circuit node with a third current during a second time period when the first to fourth power switches are in the off state; and comparing the voltage at the second circuit node with the first voltage threshold, wherein at the end of the second time period, the voltage at the second circuit node is not greater than the first voltage threshold, indicating that the fourth power tube is in a short-circuit state.

[0030] In some embodiments, the method used in the charge pump according to the embodiment of the present invention also includes: charging the second circuit node with a third current within a third time period when the first to third power tubes are in the off state and the fourth power tube is in the on state; and comparing the voltage at the second circuit node with the first voltage threshold, wherein at the end of the third time period, the voltage at the second circuit node is not less than the first voltage threshold, indicating that the fourth power tube is in an open circuit state.

[0031] In some embodiments, the method used in the charge pump according to the embodiment of the present invention also includes: when the first to third power tubes are in the off state and the fourth power tube is in the on state, using a fourth current to charge the third circuit node between the drain of the first power tube and the first capacitor within a fourth time period; comparing the voltage at the first circuit node with a second voltage difference, wherein the second voltage difference is the difference between the voltage at the third circuit node and the first voltage threshold, and when the voltage at the first circuit node is not less than the second voltage difference at the end of the fourth time period, it indicates that the first capacitor is in a short-circuit state.

[0032] In some embodiments, the method used in the charge pump according to an embodiment of the present invention further includes: comparing the voltage at the third circuit node with a third voltage difference, wherein the third voltage difference is the difference between the input voltage of the charge pump and the second voltage threshold, and the voltage at the third circuit node is not less than the third voltage difference at the end of the fourth time period, indicating that the first capacitor is in an open circuit state.

[0033] In some embodiments, the method used in the charge pump according to the embodiment of the present invention also includes: charging the first circuit node with a fifth current source during a fifth time period when the first to third power tubes are in the off state and the fourth power tube is in the on state; and comparing the output voltage of the charge pump with a fourth voltage difference, wherein the fourth voltage difference is the difference between the voltage at the first circuit node and the third voltage threshold, and at the end of the fifth time period, the output voltage of the charge pump is not greater than the fourth voltage difference, indicating that the second capacitor is in an open circuit state.

[0034] In some embodiments, the method used in the charge pump according to an embodiment of the present invention further includes: when the first and third power tubes are in the off state and the second and fourth power tubes are in the limited current conduction state, comparing the voltage at the first circuit node with a fifth voltage difference, wherein the fifth voltage difference is the difference between the output voltage of the charge pump and the first voltage threshold, and at the end of the sixth time period, the voltage at the first circuit node is not greater than the fifth voltage difference, indicating that the second power tube is in an open circuit state.

[0035] In some embodiments, the method used in the charge pump according to an embodiment of the present invention further includes: when the first and third power tubes are in the current-limited conduction state and the second and fourth power tubes are in the off state, comparing the voltage at the first circuit node with a sixth voltage difference, wherein the sixth voltage difference is the difference between the input voltage of the charge pump and the first voltage threshold, and at the end of the seventh time period, the voltage at the first circuit node is not greater than the sixth voltage difference, indicating that the first power tube is in an open circuit state.

[0036] In some embodiments, the method used in the charge pump according to an embodiment of the present invention further includes: when the first and third power tubes are in the current-limited conduction state and the second and fourth power tubes are in the off state, comparing the output voltage of the charge pump with a seventh voltage difference, wherein the seventh voltage difference is the difference between the voltage at the second circuit node and the first voltage threshold, and at the end of the seventh time period, the output voltage of the charge pump is not greater than the seventh voltage difference, indicating that the third power tube is in an open circuit state.

[0037] In some embodiments, the method used in the charge pump according to an embodiment of the present invention also includes: when the first to third power tubes are in the off state and the fourth power tube is in the on state, using the sixth current to discharge the first circuit node until the voltage at the first circuit node is lower than half of the input voltage of the charge pump, wherein when the voltage at the first circuit node is lower than half of the input voltage of the charge pump, the first to third power tubes change from the off state to the on state.

[0038] The present invention may be implemented in other specific forms without departing from its spirit and essential characteristics. For example, the algorithms described in the specific embodiments may be modified without departing from the basic spirit of the present invention. Therefore, the present embodiments are to be considered in all respects as illustrative and not restrictive, the scope of the invention is defined by the appended claims rather than the foregoing description, and all modifications coming within the meaning and scope of equivalents of the claims are intended to be included within the scope of the present invention.

Claims

1. A charge pump comprising a first capacitor, a second capacitor, and first, second, third, and fourth power transistors connected in series, wherein: The first capacitor is connected between the drain and source of the first power tube, and the second capacitor is connected between the drain of the second power tube and the source of the third power tube. The charge pump further comprises: a first current source, configured to discharge a first circuit node between the drain of the second power tube and the second capacitor within a first time period when the first to fourth power tubes are in an off state; a second current source, configured to discharge a second circuit node between the source of the third power tube and the second capacitor during the first time period when the first to fourth power tubes are in the off state; a first comparator for comparing the voltage at the first circuit node with a first voltage difference, the first voltage difference being a difference between the output voltage of the charge pump and a second voltage threshold; and A second comparator is configured to compare the voltage at the second circuit node with a first voltage threshold, wherein At the end of the first period, the voltage at the first circuit node is less than the first voltage difference and the voltage at the second circuit node is less than the first voltage threshold, indicating that the first to third power tubes and the second capacitor are not in a short-circuit state.

2. The charge pump according to claim 1, wherein: Also includes: a third current source, configured to charge the second circuit node within a second time period when the first to fourth power switches are in an off state; as well as a third comparator, configured to compare the voltage at the second circuit node with the first voltage threshold, wherein, at the end of the second time period, if the voltage at the second circuit node is not greater than the first voltage threshold, it indicates that the fourth power tube is in a short-circuit state.

3. The charge pump according to claim 2, wherein: The third current source is further configured to charge the second circuit node within a third time period when the first to third power transistors are in an off state and the fourth power transistor is in an on state, and the charge pump further comprises: A fourth comparator is used to compare the voltage at the second circuit node with the first voltage threshold, wherein at the end of the third time period, the voltage at the second circuit node is not less than the first voltage threshold, indicating that the fourth power tube is in an open circuit state.

4. The charge pump according to claim 3, wherein: Also includes: a fourth current source, configured to charge a third circuit node between the drain of the first power tube and the first capacitor during a fourth time period when the first to third power tubes are in the off state and the fourth power tube is in the on state; a fifth comparator, configured to compare the voltage at the first circuit node with a second voltage difference, wherein the second voltage difference is a difference between the voltage at the third circuit node and the first voltage threshold, and when the voltage at the first circuit node is not less than the second voltage difference at the end of the fourth time period, it indicates that the first capacitor is in a short-circuit state.

5. The charge pump according to claim 4, wherein: Also includes: a sixth comparator, configured to compare the voltage at the third circuit node with a third voltage difference, wherein the third voltage difference is a difference between the input voltage of the charge pump and the second voltage threshold, and the voltage at the third circuit node is not less than the third voltage difference at the end of the fourth time period, indicating that the first capacitor is in an open circuit state.

6. The charge pump according to claim 5, wherein: Also includes: a fifth current source, configured to charge the first circuit node within a fifth time period when the first to third power transistors are in the off state and the fourth power transistor is in the on state; as well as a seventh comparator, configured to compare the output voltage of the charge pump with a fourth voltage difference, wherein the fourth voltage difference is a difference between the voltage at the first circuit node and a third voltage threshold, and the output voltage of the charge pump is not greater than the fourth voltage difference at the end of the fifth time period, indicating that the second capacitor is in an open circuit state.

7. The charge pump according to claim 6, wherein: Also includes: an eighth comparator, configured to compare the voltage at the first circuit node with a fifth voltage difference when the first and third power tubes are in an off state and the second and fourth power tubes are in a limited current conduction state, wherein the fifth voltage difference is a difference between the output voltage of the charge pump and the first voltage threshold; and if the voltage at the first circuit node is not greater than the fifth voltage difference at the end of a sixth time period, indicating that the second power tube is in an open circuit state.

8. The charge pump according to claim 7, wherein: Also includes: a ninth comparator, configured to compare the voltage at the first circuit node with a sixth voltage difference when the first and third power tubes are in a current-limited on state and the second and fourth power tubes are in an off state, wherein the sixth voltage difference is a difference between an input voltage of the charge pump and the first voltage threshold; and if the voltage at the first circuit node is not greater than the sixth voltage difference at the end of the seventh time period, indicating that the first power tube is in an open circuit state.

9. The charge pump according to claim 8, wherein: Also includes: a tenth comparator, configured to compare the output voltage of the charge pump with a seventh voltage difference when the first and third power tubes are in the current-limited on state and the second and fourth power tubes are in the off state, wherein the seventh voltage difference is the difference between the voltage at the second circuit node and the first voltage threshold; and if the output voltage of the charge pump is not greater than the seventh voltage difference at the end of the seventh time period, indicating that the third power tube is in an open-circuit state.

10. The charge pump according to claim 9, wherein: Also includes: a sixth current source, configured to discharge the first circuit node when the first to third power transistors are in the off state and the fourth power transistor is in the on state, until the voltage at the first circuit node is lower than half of the input voltage of the charge pump, When the voltage at the first circuit node is lower than half of the input voltage of the charge pump, the first to third power transistors change from an off state to an on state.

11. A method for use in a charge pump, the charge pump comprising a first capacitor, a second capacitor, and first, second, third, and fourth power transistors connected in series, wherein: The first capacitor is connected between the drain and source of the first power tube, and the second capacitor is connected between the drain of the second power tube and the source of the third power tube. The method includes: When the first to fourth power transistors are in the off state, discharging a first circuit node between the drain of the second power transistor and the second capacitor using a first current within a first time period; When the first to fourth power transistors are in the off state, discharging the second circuit node between the source of the third power transistor and the second capacitor using the second current during the first time period; comparing the voltage at the first circuit node to a first voltage difference, the first voltage difference being a difference between an output voltage of the charge pump and a second voltage threshold; and The voltage at the second circuit node is compared to a first voltage threshold, wherein At the end of the first period, the voltage at the first circuit node is less than the first voltage difference and the voltage at the second circuit node is less than the first voltage threshold, indicating that the first to third power tubes and the second capacitor are not in a short-circuit state.

12. The method according to claim 11, characterized in that Also includes: When the first to fourth power switches are in the off state, charging the second circuit node with a third current in a second time period; as well as The voltage at the second circuit node is compared with the first voltage threshold, wherein, at the end of the second period, the voltage at the second circuit node is not greater than the first voltage threshold, indicating that the fourth power transistor is in a short-circuit state.

13. The method according to claim 12, characterized in that Also includes: When the first to third power transistors are in the off state and the fourth power transistor is in the on state, charging the second circuit node with the third current in a third time period; as well as The voltage at the second circuit node is compared with the first voltage threshold, wherein, at the end of the third time period, the voltage at the second circuit node is not less than the first voltage threshold, indicating that the fourth power transistor is in an open circuit state.

14. The method according to claim 13, characterized in that Also includes: When the first to third power tubes are in the off state and the fourth power tube is in the on state, charging a third circuit node between the drain of the first power tube and the first capacitor with a fourth current in a fourth time period; The voltage at the first circuit node is compared with a second voltage difference, where the second voltage difference is the difference between the voltage at the third circuit node and the first voltage threshold, and when the voltage at the first circuit node is not less than the second voltage difference at the end of the fourth time period, it indicates that the first capacitor is in a short-circuit state.

15. The method according to claim 14, characterized in that Also includes: The voltage at the third circuit node is compared with a third voltage difference, wherein the third voltage difference is a difference between the input voltage of the charge pump and the second voltage threshold. At the end of the fourth time period, the voltage at the third circuit node is not less than the third voltage difference, indicating that the first capacitor is in an open circuit state.

16. The method according to claim 15, characterized in that Also includes: When the first to third power transistors are in the off state and the fourth power transistor is in the on state, charging the first circuit node by using a fifth current source in a fifth time period; as well as The output voltage of the charge pump is compared with a fourth voltage difference, wherein the fourth voltage difference is the difference between the voltage at the first circuit node and a third voltage threshold. At the end of the fifth time period, the output voltage of the charge pump is not greater than the fourth voltage difference, indicating that the second capacitor is in an open circuit state.

17. The method according to claim 16, characterized in that Also includes: When the first and third power tubes are in the off state and the second and fourth power tubes are in the limited current conduction state, the voltage at the first circuit node is compared with a fifth voltage difference, wherein the fifth voltage difference is the difference between the output voltage of the charge pump and the first voltage threshold. At the end of the sixth time period, the voltage at the first circuit node is not greater than the fifth voltage difference, indicating that the second power tube is in an open circuit state.

18. The method according to claim 17, characterized in that Also includes: When the first and third power tubes are in the current-limited on state and the second and fourth power tubes are in the off state, the voltage at the first circuit node is compared with a sixth voltage difference, wherein the sixth voltage difference is the difference between the input voltage of the charge pump and the first voltage threshold. At the end of the seventh time period, the voltage at the first circuit node is not greater than the sixth voltage difference, indicating that the first power tube is in an open circuit state.

19. The method according to claim 18, characterized in that Also includes: When the first and third power tubes are in the current-limited conduction state and the second and fourth power tubes are in the off state, the output voltage of the charge pump is compared with a seventh voltage difference, wherein the seventh voltage difference is the difference between the voltage at the second circuit node and the first voltage threshold. At the end of the seventh time period, the output voltage of the charge pump is not greater than the seventh voltage difference, indicating that the third power tube is in an open circuit state.

20. The method according to claim 19, characterized in that Also includes: When the first to third power transistors are in the off state and the fourth power transistor is in the on state, the first circuit node is discharged using a sixth current until the voltage at the first circuit node is lower than half of the input voltage of the charge pump. When the voltage at the first circuit node is lower than half of the input voltage of the charge pump, the first to third power transistors change from an off state to an on state.

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