A power supply for a wideband envelope tracking power amplifier

Abstract

The application discloses a power supply of a broadband envelope tracking power amplifier, comprising a linear amplification circuit, a comparison circuit and a switching amplification circuit; the linear amplification circuit comprises a linear amplifier, a switching amplifier two and an envelope bandwidth processing unit, the input end of the envelope bandwidth processing unit is used for accessing an envelope, the output end of the envelope bandwidth processing unit is connected with the input end of the switching amplifier two, the output end of the switching amplifier two is used for providing a voltage signal to the linear amplifier, and the input end of the linear amplifier is used for accessing the envelope; the output end of the linear amplifier is connected with the input end of the comparison circuit, the output end of the comparison circuit is connected with the input end of the switching amplification circuit, and the output end of the linear amplifier and the output end of the switching amplification circuit are used for providing a power supply signal to the broadband envelope tracking power amplifier. The application changes the design of the linear power supply, improves the efficiency of the linear power supply at the peak envelope, and thus can improve the overall efficiency of the envelope tracking power supply without reducing the performance.

Description

TECHNICAL FIELD

[0001] The present application relates to a power supply of a wideband envelope tracking power amplifier, and belongs to the technical field of LTE, NR, V2X or unlicensed frequency band. BACKGROUND

[0002] The envelope tracking technology is a new type of power amplifier efficiency improvement technology. Usually, the power supply modulator uses a linear modulator to achieve it. Because the linear structure has the advantages of large bandwidth and low fluctuation, the disadvantage is that the efficiency is very low, which is not suitable for the production of envelope tracking power supply. On the other hand, the efficiency of the switching power supply is relatively high, but the fluctuation is relatively large, and the bandwidth is limited to only a few tenths of the switching frequency. Therefore, the existing envelope tracking power supply structure usually includes a series of hybrid structures and parallel hybrid structures, that is, the linear structure and the switching structure are combined through series or parallel, among which the parallel hybrid structure is more popular. The hybrid envelope tracking structure provides good bandwidth, low jitter and high efficiency. The switching power supply provides average power and part of the high-frequency power. The linear power supply provides residual power consumption and acts as a filter. Because the output impedance is relatively low, the linear power supply absorbs the current fluctuation generated by the switching power supply, and achieves the noise performance close to the linear power supply out of band.

[0003] In LTE or NR system, the signal bandwidth is large, at this time the target is a high switching frequency, then the bandwidth of the linear power supply needs to be increased, in order to maintain a low output impedance and a high dc current, the efficiency of the linear power supply will be reduced. Therefore, for the LTE or NR using ET, the linear power supply limits the efficiency. The main reason for the low efficiency is the loss of output module power consumption of the linear power supply. The linear module must be able to provide peak power, which is due to the rapid change of the envelope. The hybrid structure usually works well below the peak envelope part, but for the peak power, the efficiency is poor. SUMMARY

[0004] The technical problem to be solved by the present application is to overcome the defects of the prior art and provide a power supply of a wideband envelope tracking power amplifier.

[0005] To achieve the above-mentioned purpose, the present application provides a power supply of a wideband envelope tracking power amplifier, which comprises a linear amplification circuit, a comparison circuit and a switching amplification circuit.

[0006] The linear amplification circuit comprises a linear amplifier, a switching amplifier two and an envelope bandwidth processing unit. The input end of the envelope bandwidth processing unit is used to access the envelope. The output end of the envelope bandwidth processing unit is connected to the input end of the switching amplifier two. The output end of the switching amplifier two is used to provide a voltage signal to the linear amplifier. The input end of the linear amplifier is used to access the envelope.

[0007] The output end of the linear amplifier is connected with the input end of the comparison circuit, the output end of the comparison circuit is connected with the input end of the switching amplifier circuit, and the output end of the linear amplifier and the output end of the switching amplifier circuit are used for providing a power supply signal to the wideband envelope tracking power amplifier.

[0008] Preferably, the linear amplifier comprises an OTA module, a resistor R6, a resistor R7 and an AB amplifier, and the AB amplifier comprises a push-pull circuit and a bias circuit.

[0009] The positive input end of the OTA module is used for accessing an envelope, the negative input end of the OTA module is connected with the ground in series with the resistor R7, and the negative input end of the OTA module is connected with the output end of the push-pull circuit in series with the resistor R6; the output end of the OTA module is connected with the input end of the push-pull circuit, the output end of the push-pull circuit is connected with the input end of the comparison circuit, and the bias circuit is used for providing a bias current to the push-pull circuit.

[0010] Preferably, the push-pull circuit comprises a current source V1, a current source V2, a current source V3, a current source V4, a MOS tube Tr1, a MOS tube Tr2, a MOS tube Tr3, a MOS tube Tr4, a MOS tube Tr5, a MOS tube Tr6, a MOS tube Tr7, a MOS tube Tr8, a MOS tube Tr13 and a MOS tube Tr14.

[0011] The output end of the switching amplifier two is connected with one end of the current source V1, the S pole of the MOS tube Tr3 and one end of the current source V3, the other end of the current source V1 is connected with the S pole of the MOS tube Tr1, the D pole of the MOS tube Tr1 is connected with the ground, the output end of the OTA module is connected with the G pole of the MOS tube Tr1, the G pole of the MOS tube Tr2, the G pole of the MOS tube Tr4 and the G pole of the MOS tube Tr5, the S pole of the MOS tube Tr1 is connected with the G pole of the MOS tube Tr7, the D pole of the MOS tube Tr2 is connected with VDD, the S pole of the MOS tube Tr2 is connected with VSS in series with the current source V2, and the S pole of the MOS tube Tr2 is connected with the G pole of the MOS tube Tr8.

[0012] The D pole of the MOS tube Tr3 is connected with the S pole of the MOS tube Tr4, the D pole of the MOS tube Tr4 is connected with the D pole of the MOS tube Tr7, the D pole of the MOS tube Tr5 is connected with the D pole of the MOS tube Tr8, the S pole of the MOS tube Tr5 is connected with the D pole of the MOS tube Tr6, and the S pole of the MOS tube Tr6 is connected with VSS.

[0013] The other end of the current source V3 is connected with the D pole of the MOS tube Tr7, the S pole of the MOS tube Tr7 is connected with the S pole of the MOS tube Tr8 after the negative input end of the OTA module is connected with the ground in series with the resistor R6, the S pole of the MOS tube Tr7 is connected with the S pole of the MOS tube Tr8, the D pole of the MOS tube Tr8 is connected with VSS in series with the current source V4, and the D pole of the MOS tube Tr8 is connected with the bias circuit.

[0014] The output end of the switch amplifier two is connected with the S pole of MOS tube Tr13, the G pole of MOS tube Tr13 and the G pole of MOS tube Tr14 are connected with the bias circuit, the S pole of MOS tube Tr14 is connected with VSS,

[0015] The S pole of MOS tube Tr7, the S pole of MOS tube Tr8, the D pole of MOS tube Tr13 and the D pole of MOS tube Tr14 are all connected with the input end of the comparison circuit.

[0016] Preferably, the bias circuit comprises MOS tube Tr9, MOS tube Tr10, MOS tube Tr11, MOS tube Tr12, resistance R8, resistance R9, resistance R10, resistance R11, adjustable resistance R13, transistor Tr15 and capacitor C7,

[0017] The D pole of MOS tube Tr7 is connected with the S pole of MOS tube Tr9, the D pole of MOS tube Tr9 is connected with the S pole of MOS tube Tr10, the D pole of MOS tube Tr10 is connected with the C pole of transistor Tr15, the B pole of transistor Tr15 is connected with the C pole of transistor Tr15 after being connected with adjustable resistance R13 and resistance R8 in series, the B pole of transistor Tr15 is connected with the E pole of transistor Tr15 after being connected with resistance R9 in series, the E pole of transistor Tr15 is connected with the D pole of MOS tube Tr11, the C pole of Tr15 and one end of capacitor C7 are connected with one end of resistance R10, the other end of resistance R10 is connected with the G pole of MOS tube Tr13, the E pole of Tr15 and the other end of capacitor C7 are connected with one end of resistance R11, the other end of resistance R11 is connected with the G pole of MOS tube Tr14; the D pole of MOS tube Tr8 is connected with the S pole of MOS tube Tr12, the D pole of MOS tube Tr12 is connected with the S pole of MOS tube Tr11.

[0018] Preferably, the switch amplifier two comprises voltage selector one, voltage selector two and a plurality of switch power supply circuits, the plurality of switch power supply circuits are arranged in parallel, the output end of voltage selector one is connected with the input end of the plurality of switch power supply circuits respectively, the output end of the plurality of switch power supply circuits is connected with the input end of voltage selector two;

[0019] The switch power supply circuit comprises inductance L11, inductance L12, capacitor C1, capacitor C2, capacitor C3, capacitor C4, capacitor C5, capacitor C6, capacitor C8, resistance R1, resistance R2, resistance R3, resistance R4, resistance R5, Schmitt trigger converter Z1, Schmitt trigger converter Z2, Schmitt trigger converter Z3, transistor Tr19, MOS tube Tr18 and diode D1.

[0020] The output end of the voltage selector one is connected with one end of the capacitor C1, one end of the capacitor C2, one end of the capacitor C3 and one end of the inductor L11, the other end of the capacitor C1, the other end of the capacitor C2 and the other end of the capacitor C3 are grounded;

[0021] The other end of the inductor L11 is connected with one end of the diode D1, the other end of the diode D1 is connected with the ground after being connected in series with the capacitor C4, the other end of the diode D1 is connected with the ground after being connected in series with the capacitor C5, the other end of the diode D1 is connected with the ground after being connected in series with the capacitor C6 and the resistor R2, the resistor R1 is connected in parallel with the capacitor C6, the other end of the diode D1 is connected with the input end of the voltage selector two;

[0022] The output end of the voltage selector one is connected with the input end one of the Schmitt trigger converter Z1, the input end two of the Schmitt trigger converter Z1 is connected with the ground after being connected in series with the capacitor C8, the input end two of the Schmitt trigger converter Z1 is connected with the output end of the Schmitt trigger converter Z1 after being connected in series with the resistor R4, the output end of the Schmitt trigger converter Z1 is connected with the output end of the Schmitt trigger converter Z3 after being connected in series with the resistor R3, the input end of the Schmitt trigger converter Z3 is connected with the C pole of the transistor Tr19, the E pole of the transistor Tr19 is grounded, the B pole of the transistor Tr19 is connected with the ground after being connected in series with the resistor R5 and the resistor R2;

[0023] The output end of the Schmitt trigger converter Z3 is connected with the input end of the Schmitt trigger converter Z2, the output end of the Schmitt trigger converter Z2 is connected with the G pole of the MOS tube Tr18, the S pole of the MOS tube Tr18 is grounded, the D pole of the MOS tube Tr18 is connected with one end of the diode D1, the output end of the voltage selector two is connected with the voltage signal of the linear amplifier after being connected in series with the inductor L12.

[0024] Preferably, the comparison circuit comprises the integrating circuit and the amplifying circuit, the switch amplifying circuit comprises the delay comparator, the NOT gate circuit F1, the NOT gate circuit F2, the NOT gate circuit F3, the NOT gate circuit F4, the MOS tube Tr16, the MOS tube Tr17, the inductor L13 and the resistor R12,

[0025] The output end of the linear amplifier is connected with the negative input end of the delay comparator after being connected in series with the integrating circuit and the amplifying circuit, the positive input end of the delay comparator is connected with the ground after being connected in series with the reference signal level;

[0026] The output end of the delay comparator is connected with the G pole of the MOS tube Tr16 after being connected in series with the NOT gate circuit F1 and the NOT gate circuit F2, the output end of the delay comparator is connected with the G pole of the MOS tube Tr17 after being connected in series with the NOT gate circuit F3 and the NOT gate circuit F4, the S pole of the MOS tube Tr16 is connected with VDD, the D pole of the MOS tube Tr16 is connected with the D pole of the MOS tube Tr17, the S pole of the MOS tube Tr17 is grounded, the D pole of the MOS tube Tr17 is connected with the power signal of the wideband envelope tracking power amplifier after being connected in series with the inductor L13.

[0027] Preferably, the envelope bandwidth processing unit comprises filter one, filter two, half-wave shaping circuit, time domain band limiting processing unit, adder one J1, adder two J2, adder three J3 and adder four J4;

[0028] The input end of filter one is used for accessing the envelope, and the output end of filter one is connected with one input end of adder one J1 and one input end of adder three J3 respectively;

[0029] The other input end of adder one J1 is used for accessing the envelope, and the output end of adder one J1 is connected with the input end of half-wave shaping circuit, and the output end of half-wave shaping circuit is connected with the input end of filter two;

[0030] The other input end of adder three J3 is connected with the output end of filter two, and the output end of adder three J3 is connected with one input end of adder four J4;

[0031] One input end of adder two J2 is used for accessing the envelope, the other input end of adder two J2 is connected with the output end of adder three J3, and the output end of adder two J2 is connected with the input end of time domain band limiting processing unit, and the output end of time domain band limiting processing unit is connected with the other input end of adder four J4;

[0032] The output end of adder four J4 is connected with the input end of switch amplifier two.

[0033] Preferably, filter one comprises capacitor C11, capacitor C12, capacitor C13, capacitor C14, capacitor C15, capacitor C16, capacitor C17, capacitor C18, capacitor C19, inductor L14, inductor L15, inductor L16, inductor L17, inductor L18, inductor L19, inductor L20, inductor L21, inductor L22 and inductor L23;

[0034] One end of inductor L14 is used for accessing the envelope, the other end of inductor L14 is connected with capacitor C13 in series and then grounded, the other end of inductor L14 is connected with inductor L16 and capacitor C12 in series and then grounded, and the connection end of inductor L16 and capacitor C12 is connected with inductor L15 and capacitor C11 in series and then grounded;

[0035] The other end of inductor L14 is connected with inductor L17 and capacitor C19 in series and then grounded, one end of capacitor C19 which is not grounded is connected with inductor L19, inductor L18 and capacitor C15 in series and then grounded, and the connection end of inductor L18 and inductor L19 is connected with capacitor C14 in series and then grounded;

[0036] The other end of the capacitor C19 is connected to the ground through the inductor L23, the inductor L21, the inductor L22 and the capacitor C18 in series, the connection end of the inductor L21 and the inductor L22 is connected to the ground through the capacitor C17 in series, the connection end of the inductor L23 and the inductor L21 is connected to the ground through the capacitor C16 in series, and the connection end of the inductor L23 and the inductor L21 is connected to the input end of the adder one J1 and the input end of the adder two J2 through the inductor L20 in series.

[0037] Preferably, the filter two comprises the capacitor C20, the capacitor C21, the inductor L24, the inductor L25, the inductor L26 and the inductor L27.

[0038] The output end of the half-wave shaping circuit is connected to the other input end of the adder three J3 through the inductor L24 and the inductor L25 in series, the connection end of the inductor L24 and the inductor L25 is connected to the ground through the inductor L26, the inductor L27 and the capacitor C21 in series, and the connection end of the inductor L26 and the inductor L27 is connected to the ground through the capacitor C20 in series.

[0039] A wideband envelope tracking power amplifier circuit comprises a wideband envelope tracking power amplifier and a power supply of the wideband envelope tracking power amplifier as claimed in any one of the above, wherein the power supply is configured to provide a power supply signal to the wideband envelope tracking power amplifier.

[0040] The present application has the following beneficial effects:

[0041] The present application changes the design of the linear power supply, improves the efficiency of the linear power supply at the peak envelope, and thus improves the overall efficiency of the envelope tracking power supply without reducing the performance. BRIEF DESCRIPTION OF DRAWINGS

[0042] Figure 1 is the schematic diagram of the present application;

[0043] Figure 2 is the model diagram of the ideal parallel power amplifier;

[0044] Figure 3 is the circuit diagram of the linear amplifier in the present application;

[0045] Figure 4 is the circuit diagram of the switch amplifier two in the present application;

[0046] Figure 5 is the circuit diagram of the comparator and the switch amplifier in the present application;

[0047] Figure 6 is the circuit diagram of the envelope bandwidth processing unit in the present application. DETAILED DESCRIPTION

[0048] The following embodiments are only used to more clearly illustrate the technical solutions of the present application, and cannot be used to limit the protection scope of the present application.

[0049] It should be noted that if the embodiment of the present application has a directional indication (such as up, down, left, right, front, back, etc.), it is only used to explain the relative position relationship and motion condition between components in a certain posture, and if the posture changes, the directional indication will also change accordingly.

[0050] In addition, if the description of "one" and "two" is involved in the present application, it is only for description purpose, and cannot be understood as indicating or implying the relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features limited by "one" and "two" can be explicitly or implicitly included at least one of the features. In addition, the technical solutions of each embodiment can be combined with each other, but it must be based on the realization of the ordinary skilled in the art, when the combination of technical solutions appears contradictory or unachievable, it should be considered that the combination of technical solutions does not exist, and is not within the protection scope required by the present application.

[0051] As shown in Figure 1 The envelope tracking power amplifier power supply is based on a parallel power supply structure. A broadband envelope tracking power amplifier power supply includes a linear amplifier circuit, a comparison circuit and a switching amplifier circuit.

[0052] The linear amplifier circuit includes a linear amplifier, a switching amplifier two and an envelope bandwidth processing unit. The input end of the envelope bandwidth processing unit is used to access the envelope. The output end of the envelope bandwidth processing unit is connected to the input end of the switching amplifier two. The output end of the switching amplifier two is used to provide a voltage signal to the linear amplifier. The input end of the linear amplifier is used to access the envelope.

[0053] The output end of the linear amplifier is connected to the input end of the comparison circuit. The output end of the comparison circuit is connected to the input end of the switching amplifier circuit. The output end of the linear amplifier and the output end of the switching amplifier circuit are used to provide a power supply signal to the broadband envelope tracking power amplifier.

[0054] Further, the linear amplifier in the embodiment includes an OTA module, a resistor R6, a resistor R7 and an AB type amplifier. The AB type amplifier includes a push-pull circuit and a bias circuit.

[0055] The positive input end of the OTA module is used to access the envelope. The negative input end of the OTA module is connected to the ground through the resistor R7 in series. The negative input end of the OTA module is connected to the output end of the push-pull circuit through the resistor R6 in series. The output end of the OTA module is connected to the input end of the push-pull circuit. The output end of the push-pull circuit is connected to the input end of the comparison circuit. The bias circuit is used to provide a bias current to the push-pull circuit.

[0056] Further, the push-pull circuit in the embodiment includes a current source V1, a current source V2, a current source V3, a current source V4, a MOS tube Tr1, a MOS tube Tr2, a MOS tube Tr3, a MOS tube Tr4, a MOS tube Tr5, a MOS tube Tr6, a MOS tube Tr7, a MOS tube Tr8, a MOS tube Tr13 and a MOS tube Tr14,

[0057] The output end of the second switch amplifier is connected with one end of the current source V1, the S pole of the MOS tube Tr3 and one end of the current source V3, the other end of the current source V1 is connected with the S pole of the MOS tube Tr1, the D pole of the MOS tube Tr1 is grounded, the output end of the OTA module is connected with the G pole of the MOS tube Tr1, the G pole of the MOS tube Tr2, the G pole of the MOS tube Tr4 and the G pole of the MOS tube Tr5, the S pole of the MOS tube Tr1 is connected with the G pole of the MOS tube Tr7, the D pole of the MOS tube Tr2 is connected with VDD, the S pole of the MOS tube Tr2 is connected with VSS after being connected with the current source V2 in series, and the S pole of the MOS tube Tr2 is connected with the G pole of the MOS tube Tr8;

[0058] The D pole of the MOS tube Tr3 is connected with the S pole of the MOS tube Tr4, the D pole of the MOS tube Tr4 is connected with the D pole of the MOS tube Tr7, the D pole of the MOS tube Tr5 is connected with the D pole of the MOS tube Tr8, the S pole of the MOS tube Tr5 is connected with the D pole of the MOS tube Tr6, and the S pole of the MOS tube Tr6 is connected with VSS;

[0059] The other end of the current source V3 is connected with the D pole of the MOS tube Tr7, the negative input end of the OTA module is connected with the S pole of the MOS tube Tr7 after being connected with the resistance R6 in series, the S pole of the MOS tube Tr7 is connected with the S pole of the MOS tube Tr8, the D pole of the MOS tube Tr8 is connected with VSS after being connected with the current source V4 in series, and the D pole of the MOS tube Tr8 is connected with the bias circuit;

[0060] The output end of the second switch amplifier is connected with the S pole of the MOS tube Tr13, the G pole of the MOS tube Tr13 and the G pole of the MOS tube Tr14 are connected with the bias circuit, and the S pole of the MOS tube Tr14 is connected with VSS,

[0061] The S pole of the MOS tube Tr7, the S pole of the MOS tube Tr8, the D pole of the MOS tube Tr13 and the D pole of the MOS tube Tr14 are all connected with the input end of the comparison circuit.

[0062] Further, the bias circuit in the embodiment includes a MOS tube Tr9, a MOS tube Tr10, a MOS tube Tr11, a MOS tube Tr12, a resistance R8, a resistance R9, a resistance R10, a resistance R11, an adjustable resistance R13, a transistor Tr15 and a capacitor C7,

[0063] The D pole of the MOS tube Tr7 is connected to the S pole of the MOS tube Tr9, the D pole of the MOS tube Tr9 is connected to the S pole of the MOS tube Tr10, the D pole of the MOS tube Tr10 is connected to the C pole of the transistor Tr15, the B pole of the transistor Tr15 is connected to the C pole of the transistor Tr15 through the series connection of the adjustable resistor R13 and the resistor R8, the B pole of the transistor Tr15 is connected to the E pole of the transistor Tr15 through the series connection of the resistor R9, the E pole of the transistor Tr15 is connected to the D pole of the MOS tube Tr11, the E pole of the transistor Tr15 is connected to the C pole of the transistor Tr15 through the series connection of the capacitor C7, one end of the C pole of the Tr15 and the capacitor C7 is connected to one end of the resistor R10, the other end of the resistor R10 is connected to the G pole of the MOS tube Tr13, the other end of the E pole of the Tr15 and the capacitor C7 is connected to one end of the resistor R11, the other end of the resistor R11 is connected to the G pole of the MOS tube Tr14; the D pole of the MOS tube Tr8 is connected to the S pole of the MOS tube Tr12, the D pole of the MOS tube Tr12 is connected to the S pole of the MOS tube Tr11.

[0064] Further, the switch amplifier two in the embodiment comprises a voltage selector one, a voltage selector two and a plurality of switch power supply circuits, the plurality of switch power supply circuits are arranged in parallel, the output ends of the voltage selector one are respectively connected to the input ends of the plurality of switch power supply circuits, and the output ends of the plurality of switch power supply circuits are all connected to the input ends of the voltage selector two.

[0065] The switch power supply circuit comprises an inductor L11, an inductor L12, a capacitor C1, a capacitor C2, a capacitor C3, a capacitor C4, a capacitor C5, a capacitor C6, a capacitor C8, a resistor R1, a resistor R2, a resistor R3, a resistor R4, a resistor R5, a Schmitt trigger converter Z1, a Schmitt trigger converter Z2, a Schmitt trigger converter Z3, a transistor Tr19, a MOS tube Tr18 and a diode D1.

[0066] The output ends of the voltage selector one are connected to one end of the capacitor C1, one end of the capacitor C2, one end of the capacitor C3 and one end of the inductor L11, and the other end of the capacitor C1, the other end of the capacitor C2 and the other end of the capacitor C3 are grounded.

[0067] The other end of the inductor L11 is connected to one end of the diode D1, the other end of the diode D1 is connected to the ground through the series connection of the capacitor C4, the other end of the diode D1 is connected to the ground through the series connection of the capacitor C5, the other end of the diode D1 is connected to the ground through the series connection of the capacitor C6 and the resistor R2, the resistor R1 is connected in parallel to the capacitor C6, and the other end of the diode D1 is connected to the input end of the voltage selector two.

[0068] The output end of the voltage selector one is connected with the input end one of the Schmitt trigger converter Z1, the input end two of the Schmitt trigger converter Z1 is connected with the ground through the capacitor C8 in series, the input end two of the Schmitt trigger converter Z1 is connected with the output end of the Schmitt trigger converter Z1 through the resistor R4 in series, the output end of the Schmitt trigger converter Z1 is connected with the output end of the Schmitt trigger converter Z3 through the resistor R3 in series, the input end of the Schmitt trigger converter Z3 is connected with the C pole of the transistor Tr19, the E pole of the transistor Tr19 is connected with the ground, the B pole of the transistor Tr19 is connected with the ground through the resistor R5 and the resistor R2 in series;

[0069] The output end of the Schmitt trigger converter Z3 is connected with the input end of the Schmitt trigger converter Z2, the output end of the Schmitt trigger converter Z2 is connected with the G pole of the MOS transistor Tr18, the S pole of the MOS transistor Tr18 is connected with the ground, the D pole of the MOS transistor Tr18 is connected with one end of the diode D1, the output end of the voltage selector two is connected with the voltage signal of the linear amplifier through the inductor L12 in series.

[0070] Further, the comparison circuit in the embodiment comprises the integration circuit and the amplification circuit, the switch amplification circuit comprises the delay comparator, the NOT gate circuit F1, the NOT gate circuit F2, the NOT gate circuit F3, the NOT gate circuit F4, the MOS transistor Tr16, the MOS transistor Tr17, the inductor L13 and the resistor R12,

[0071] The output end of the linear amplifier is connected with the negative input end of the delay comparator through the integration circuit and the amplification circuit in series, the positive input end of the delay comparator is connected with the ground through the reference signal level in series;

[0072] The output end of the delay comparator is connected with the G pole of the MOS transistor Tr16 through the NOT gate circuit F1 and the NOT gate circuit F2 in series, the output end of the delay comparator is connected with the G pole of the MOS transistor Tr17 through the NOT gate circuit F3 and the NOT gate circuit F4 in series, the S pole of the MOS transistor Tr16 is connected with VDD, the D pole of the MOS transistor Tr16 is connected with the D pole of the MOS transistor Tr17, the S pole of the MOS transistor Tr17 is connected with the ground, the D pole of the MOS transistor Tr17 is connected with the power supply signal of the wideband envelope tracking power amplifier through the inductor L13 in series.

[0073] Further, the envelope bandwidth processing unit in the embodiment comprises the filter one, the filter two, the half-wave shaping circuit, the time domain band limiting processing unit, the adder one J1, the adder two J2, the adder three J3 and the adder four J4;

[0074] The input end of the filter one is used for accessing the envelope, the output end of the filter one is connected with one input end of the adder one J1 and one input end of the adder three J3 respectively;

[0075] The other input terminal of the adder J1 is connected to the envelope, and the output terminal of the adder J1 is connected to the input terminal of the half-wave shaping circuit, and the output terminal of the half-wave shaping circuit is connected to the input terminal of the filter two;

[0076] The other input terminal of the adder J3 is connected to the output terminal of the filter two, and the output terminal of the adder J3 is connected to one input terminal of the adder J4;

[0077] One input terminal of the adder J2 is connected to the envelope, the other input terminal of the adder J2 is connected to the output terminal of the adder J3, and the output terminal of the adder J2 is connected to the input terminal of the time domain band limiting processing unit, and the output terminal of the time domain band limiting processing unit is connected to the other input terminal of the adder J4;

[0078] The output terminal of the adder J4 is connected to the input terminal of the switch amplifier two.

[0079] Further, the filter one in the embodiment includes the capacitor C11, the capacitor C12, the capacitor C13, the capacitor C14, the capacitor C15, the capacitor C16, the capacitor C17, the capacitor C18, the capacitor C19, the inductor L14, the inductor L15, the inductor L16, the inductor L17, the inductor L18, the inductor L19, the inductor L20, the inductor L21, the inductor L22 and the inductor L23;

[0080] One end of the inductor L14 is connected to the envelope, the other end of the inductor L14 is connected to the ground in series with the capacitor C13, the other end of the inductor L14 is connected to the ground in series with the inductor L16 and the capacitor C12, and the connection end of the inductor L16 and the capacitor C12 is connected to the ground in series with the inductor L15 and the capacitor C11;

[0081] The other end of the inductor L14 is connected to the ground in series with the inductor L17 and the capacitor C19, one end of the capacitor C19 not connected to the ground is connected to the ground in series with the inductor L19, the inductor L18 and the capacitor C15, the connection end of the inductor L18 and the inductor L19 is connected to the ground in series with the capacitor C14;

[0082] One end of the capacitor C19 not connected to the ground is connected to the ground in series with the inductor L23, the inductor L21, the inductor L22 and the capacitor C18, the connection end of the inductor L21 and the inductor L22 is connected to the ground in series with the capacitor C17, the connection end of the inductor L23 and the inductor L21 is connected to the ground in series with the capacitor C16, and the connection end of the inductor L23 and the inductor L21 is connected to one input terminal of the adder J1 and the adder J2 respectively.

[0083] Further, the filter two in the embodiment includes the capacitor C20, the capacitor C21, the inductor L24, the inductor L25, the inductor L26 and the inductor L27;

[0084] The output end of the half-wave shaping circuit is connected to another input end of the adder three J3 in series with an inductor L24 and an inductor L25, the connection end of the inductor L24 and the inductor L25 is connected to the ground in series with an inductor L26, an inductor L27 and a capacitor C21, and the connection end of the inductor L26 and the inductor L27 is connected to the ground in series with a capacitor C20.

[0085] A broadband envelope tracking power amplifier circuit, comprising a broadband envelope tracking power amplifier and a power supply for the broadband envelope tracking power amplifier as claimed in any one of the preceding claims, the power supply being configured to provide a power supply signal to the broadband envelope tracking power amplifier.

[0086] As shown in Figure 1 , it contains five modules, which are linear amplification circuit, comparison circuit, switching amplification circuit, switching amplifier two and envelope bandwidth processing unit. Among them, the linear amplification circuit is composed of OTA module and AB type amplifier. Figure 1 The comparison circuit contains a feedback loop, and the feedback control of the comparison circuit is to realize smooth power distribution of the linear power amplifier and the switching amplifier.

[0087] As shown in Figure 2 , the mixed model contains a master-slave structure, a broadband linear power amplifier as a voltage source and a switching amplifier as a current-controlled current source. The broadband linear amplification circuit accurately controls the output voltage and has good linearity, and the switching amplifier efficiently provides most of the output current, detects and amplifies the current of the former.

[0088] A power supply for a broadband envelope tracking power amplifier, comprising a linear amplification circuit, a comparison circuit, a switching amplification circuit, a switching amplifier two and an envelope bandwidth processing unit, the envelope inputting the envelope bandwidth processing unit and the linear amplification circuit, the output end of the envelope bandwidth processing unit connecting the input end of the switching amplifier two, the output end of the switching amplifier two connecting the input end of the linear amplification circuit, the output end of the linear amplification circuit connecting the input end of the comparison circuit, and the output end of the comparison circuit connecting the input end of the switching amplification circuit.

[0089] Further, the linear amplification circuit in the embodiment includes an OTA module, a resistor R7, a push-pull circuit and a bias circuit, the positive input port of the OTA module connecting the envelope input, the negative input port of the OTA module connecting the ground in series with the resistor R7; the output end of the OTA module connecting the input end of the push-pull circuit, the output end of the push-pull circuit connecting the input end of the bias circuit, and the output end of the bias circuit connecting the input end of the comparison circuit.

[0090] The switching amplification circuit further includes a broadband envelope tracking power amplifier, and the broadband envelope tracking power amplifier adopts an RF-PA circuit, and the output end Vout and the OUT output end are both connected to the RF-PA circuit in series with a resistor R12.

[0091] Assuming the gain of the current loop is β and β is a large number and has a large bandwidth. Since the switching amplifier provides most of the output current, the linear amplifier only provides the switching amplifier switching jitter current, according to the formula: , it can be seen that in practical applications, the output current of the switching amplifier is slower and smaller than the output current , because the limited loop gain β , the linear current must provide part of the point signal current, not just the jitter current. The loss and phase lag of the switching power supply at high frequencies need to be compensated for, the magnitude value of the gain β , the phase value of the loop gain θ , and the output current value At a certain frequency value, the required linear amplifier output current is , and the phase delay of the switching amplifier is:

[0092]

[0093] .

[0094] Figures 3-6 The wideband envelope tracking amplifier proposed in the present application includes a filter circuit, a switching amplifier powered by a linear power supply, a linear amplifier circuit, a switching amplifier circuit, a comparison circuit, and an OTA.

[0095] The linear amplifier circuit includes the input of the OTA (Operational Transconductance Amplifier), the output of the AB amplifier has a low output impedance, a complementary common-source configuration has a relatively high impedance in most AB output stages, and a source follower configuration has a relatively low output impedance and a relatively low output swing. Because of the relatively low transconductance, it is not suitable for low-voltage scenarios, which is why few output stages are recommended for use in low-impedance CMOS designs. However, the AB amplifier has low-voltage rail-to-rail, high bandwidth, and high slew rate advantages.

[0096] A local negative feedback uses an OTA to reduce the output common-source stage impedance. The gain of the local loop and the entire loop together reduces the output impedance. The higher the OTA loop gain, the more the output impedance is reduced. However, the output impedance increases with frequency, and because of bandwidth limitations, the feedback gain decreases as the frequency increases. However, increasing the transconductance of the output common-source MOS transistor helps to reduce the output impedance, and adding a Miller compensation capacitor at high frequencies increases power consumption and area.

[0097] The output stage contains a common source amplifier and source follower to solve the rail-to-rail and low output impedance. For the pMOS and nMOS common source MOS tubes of the push-pull circuit, the circuit contains four loops to meet the voltage range of the output, wherein rail-to-rail compensation switches are added to prevent the peak-to-peak value of the output voltage from being cut off. For the positive voltage range, the upper two paths are opened, and for the negative voltage range, the lower two paths are opened.

[0098] As shown in Figure 6 The designed envelope bandwidth processing unit is shown, which contains filter 1, filter 2, half-wave shaping and time domain band limiting processing unit. The frequency response characteristic of the LPF of filter 1 requires higher than that of filter 2, so a high-order filter is used. The logic expression of the time domain band limiting processing is as follows:

[0099]

[0100]

[0101] Wherein y is the input envelope, E is an intermediate variable, E s is the output processed envelope.

[0102] MOS tube Tr1, MOS tube Tr3, MOS tube Tr4, MOS tube Tr8, MOS tube Tr9, MOS tube Tr10, MOS tube Tr13, transistor Tr15, MOS tube Tr16 and transistor Tr19 are NPN type.

[0103] MOS tube Tr2, MOS tube Tr5, MOS tube Tr6, MOS tube Tr7, MOS tube Tr11, MOS tube Tr12, MOS tube Tr14, MOS tube Tr17 and MOS tube Tr18 are PNP type.

[0104] The Schmidt trigger converter, NOT gate circuit, integration circuit, amplification circuit, current source, adjustable resistor, resistor, inductor, capacitor, MOS tube, OTA, AB type amplifier components used in the above are many types that can be used in the prior art, and those skilled in the art can select appropriate types according to actual needs, and the embodiments will not be exemplified one by one.

[0105] The present application uses bandwidth preprocessing technology and uses a selection network together with a switching power supply to improve the overall efficiency of the linear power amplifier. Compared with the traditional envelope tracking power supply design scheme, the present scheme is more suitable for the background of LTE and NR power amplifier, and can provide better efficiency and higher bandwidth.

[0106] The above merely describes the preferred embodiments of the present application, and it should be pointed out that, for those skilled in the art, several improvements and modifications can be made without departing from the technical principles of the present application, and these improvements and modifications should also be considered as the protection scope of the present application.

Claims

1. A power supply for a broadband envelope tracking power amplifier, characterized in that, The linear amplification circuit, the comparison circuit and the switch amplification circuit are included. The linear amplification circuit includes a linear amplifier, a switch amplifier two and an envelope bandwidth processing unit, an input end of the envelope bandwidth processing unit is used for accessing an envelope, an output end of the envelope bandwidth processing unit is connected to an input end of the switch amplifier two, an output end of the switch amplifier two is used for providing a voltage signal to the linear amplifier, and an input end of the linear amplifier is used for accessing the envelope. An output end of the linear amplifier is connected to an input end of the comparison circuit, an output end of the comparison circuit is connected to an input end of the switch amplification circuit, and an output end of the linear amplifier and an output end of the switch amplification circuit are used for providing a power supply signal to a wideband envelope tracking power amplifier. The switch amplifier two includes a voltage selector one, a voltage selector two and a plurality of switch power supply circuits, the plurality of switch power supply circuits are connected in parallel, an output end of the voltage selector one is connected to input ends of the plurality of switch power supply circuits respectively, and output ends of the plurality of switch power supply circuits are all connected to an input end of the voltage selector two. The switch power supply circuit includes an inductor L11, an inductor L12, a capacitor C1, a capacitor C2, a capacitor C3, a capacitor C4, a capacitor C5, a capacitor C6, a capacitor C8, a resistor R1, a resistor R2, a resistor R3, a resistor R4, a resistor R5, a Schmitt trigger converter Z1, a Schmitt trigger converter Z2, a Schmitt trigger converter Z3, a transistor Tr19, a MOS transistor Tr18 and a diode D1. An output end of the voltage selector one is connected to one end of the capacitor C1, one end of the capacitor C2, one end of the capacitor C3 and one end of the inductor L11, and the other end of the capacitor C1, the other end of the capacitor C2 and the other end of the capacitor C3 are grounded. The other end of the inductor L11 is connected to one end of the diode D1, the other end of the diode D1 is connected to the ground in series with the capacitor C4, the other end of the diode D1 is connected to the ground in series with the capacitor C5, the other end of the diode D1 is connected to the ground in series with the capacitor C6 and the resistor R2, the resistor R1 is connected in parallel to the capacitor C6, and the other end of the diode D1 is connected to an input end of the voltage selector two. An output end of the voltage selector one is connected to an input end one of the Schmitt trigger converter Z1, the other input end of the Schmitt trigger converter Z1 is connected to the ground in series with the capacitor C8, the other input end of the Schmitt trigger converter Z1 is connected to the output end of the Schmitt trigger converter Z1 in series with the resistor R4, the output end of the Schmitt trigger converter Z1 is connected to the output end of the Schmitt trigger converter Z3 in series with the resistor R3, an input end of the Schmitt trigger converter Z3 is connected to the C pole of the transistor Tr19, the E pole of the transistor Tr19 is grounded, and the B pole of the transistor Tr19 is grounded in series with the resistor R5 and the resistor R2; The output end of the Schmitt trigger converter Z3 is connected to an input end of the Schmitt trigger converter Z2, the output end of the Schmitt trigger converter Z2 is connected to the G pole of the MOS transistor Tr18, the S pole of the MOS transistor Tr18 is grounded, the D pole of the MOS transistor Tr18 is connected to one end of the diode D1, and the output end of the voltage selector two is connected to the linear amplifier to provide a voltage signal in series with the inductor L12. The envelope bandwidth processing unit comprises filter one, filter two, half-wave shaping circuit, time domain band limiting processing unit, adder one J1, adder two J2, adder three J3 and adder four J4; The input end of filter one is used for accessing the envelope, and the output end of filter one is connected with one input end of adder one J1 and one input end of adder three J3 respectively; The other input end of adder one J1 is used for accessing the envelope, the output end of adder one J1 is connected with the input end of half-wave shaping circuit, and the output end of half-wave shaping circuit is connected with the input end of filter two; The other input end of adder three J3 is connected with the output end of filter two, and the output end of adder three J3 is connected with one input end of adder four J4; One input end of adder two J2 is used for accessing the envelope, the other input end of adder two J2 is connected with the output end of adder three J3, the output end of adder two J2 is connected with the input end of time domain band limiting processing unit, and the output end of time domain band limiting processing unit is connected with the other input end of adder four J4; The output end of adder four J4 is connected with the input end of switch amplifier two.

2. The power supply of the wideband envelope tracking power amplifier according to claim 1, characterized in that, The linear amplifier comprises an OTA module, a resistor R6, a resistor R7 and an AB amplifier, and the AB amplifier comprises a push-pull circuit and a bias circuit; The positive input end of the OTA module is used for accessing the envelope, the negative input end of the OTA module is connected with the ground through the resistor R7 in series, and the negative input end of the OTA module is connected with the output end of the push-pull circuit through the resistor R6 in series; the output end of the OTA module is connected with the input end of the push-pull circuit, the output end of the push-pull circuit is connected with the input end of the comparison circuit, and the bias circuit is used for providing a bias current for the push-pull circuit.

3. The power supply of the wideband envelope tracking power amplifier according to claim 1, characterized in that, The comparison circuit comprises an integration circuit and an amplification circuit, the switch amplifier circuit comprises a delay comparator, a NOT gate circuit F1, a NOT gate circuit F2, a NOT gate circuit F3, a NOT gate circuit F4, a MOS tube Tr16, a MOS tube Tr17, an inductor L13 and a resistor R12, The output end of the linear amplifier is connected with the negative input end of the delay comparator through the integration circuit and the amplification circuit in series, and the positive input end of the delay comparator is connected with the ground through the reference signal level in series; The output end of the delay comparator is connected with the G pole of the MOS tube Tr16 through the NOT gate circuit F1 and the NOT gate circuit F2 in series, the output end of the delay comparator is connected with the G pole of the MOS tube Tr17 through the NOT gate circuit F3 and the NOT gate circuit F4 in series, the S pole of the MOS tube Tr16 is connected with VDD, the D pole of the MOS tube Tr16 is connected with the D pole of the MOS tube Tr17, the S pole of the MOS tube Tr17 is connected with the ground, and the D pole of the MOS tube Tr17 is connected with the inductor L13 in series to provide a power supply signal for the wideband envelope tracking power amplifier.

4. The power supply of the wideband envelope tracking power amplifier according to claim 1, characterized in that, The filter one includes capacitor C11, capacitor C12, capacitor C13, capacitor C14, capacitor C15, capacitor C16, capacitor C17, capacitor C18, capacitor C19, inductor L14, inductor L15, inductor L16, inductor L17, inductor L18, inductor L19, inductor L20, inductor L21, inductor L22 and inductor L23; One end of the inductor L14 is connected to the envelope, the other end of the inductor L14 is connected to the ground through the capacitor C13, the other end of the inductor L14 is connected to the ground through the inductor L16 and the capacitor C12, the connection end of the inductor L16 and the capacitor C12 is connected to the ground through the inductor L15 and the capacitor C11; The other end of the inductor L14 is connected to the ground through the inductor L17 and the capacitor C19, the ungrounded end of the capacitor C19 is connected to the ground through the inductor L19, the inductor L18 and the capacitor C15, the connection end of the inductor L18 and the inductor L19 is connected to the ground through the capacitor C14; The ungrounded end of the capacitor C19 is connected to the ground through the inductor L23, the inductor L21, the inductor L22 and the capacitor C18, the connection end of the inductor L21 and the inductor L22 is connected to the ground through the capacitor C17, the connection end of the inductor L23 and the inductor L21 is connected to the ground through the capacitor C16, the connection end of the inductor L23 and the inductor L21 is connected to the input end of the adder one J1 and the adder two J2 respectively.

5. The power supply of the wideband envelope tracking power amplifier according to claim 1, wherein, The filter two includes capacitor C20, capacitor C21, inductor L24, inductor L25, inductor L26 and inductor L27; The output end of the half-wave shaping circuit is connected to the other input end of the adder three J3 through the inductor L24 and the inductor L25, the connection end of the inductor L24 and the inductor L25 is connected to the ground through the inductor L26, the inductor L27 and the capacitor C21, the connection end of the inductor L26 and the inductor L27 is connected to the ground through the capacitor C20.

6. A wideband envelope tracking power amplifier circuit, comprising: The power supply of the wideband envelope tracking power amplifier and the power supply of the wideband envelope tracking power amplifier according to any one of claims 1-5, wherein the power supply is used to provide a power supply signal to the wideband envelope tracking power amplifier.

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