High voltage, high efficiency sine wave generator to prevent spikes during amplitude adjustment and channel switching

Abstract

This application describes various methods for generating high-voltage sinusoidal signals whose output voltage can be quickly adjusted without introducing high-frequency artifacts on the output. When using these methods, stronger electric fields can be applied to tumors for a higher percentage of time, which can increase the efficacy of TTFields treatment. In some embodiments, this is done by preventing adjustment of the DC power supply during the time when its output is powering the output signal. In some embodiments, this is done by synchronizing the operation of the AC voltage generator and the electronic switch connected to the AC voltage generator output.

Description

[0001] Cross-references to related applications

[0002] This application claims the benefit of U.S. Provisional Applications 62 / 955,673 (filed December 31, 2019) and 62 / 981,875 (filed February 26, 2020), each of which is incorporated herein by reference in its entirety. Background Technology

[0003] U.S. Patent 7,805,201 describes the use of TTFields therapy to treat tumors. TTFields therapy utilizes high-voltage sinusoidal signals. Initially, these high-voltage sinusoidal signals are obtained by generating low-amplitude signals using a function generator, amplifying the low-voltage signals into high-voltage signals using a linear amplifier, and subsequently applying the high-voltage signals to an array of electrodes (also known as a transducer array) positioned on the patient's body. U.S. Patent 9,910,453 describes an alternative method for generating high-voltage sinusoidal signals applied to a transducer array, and this alternative method provides a dramatically improved efficiency compared to the original linear amplifier method. Summary of the Invention

[0004] This application describes various methods for generating high-voltage sinusoidal signals whose output voltage can be rapidly adjusted without introducing high-frequency artifacts (e.g., voltage spikes) into the output. When using these methods, a stronger electric field can be applied to the tumor at a higher percentage of the time, which can increase the efficacy of TTFields therapy.

[0005] One aspect of the invention is directed to a first apparatus for generating a sinusoid at a frequency f. The first apparatus includes a DC power supply having a voltage-controlled input that sets an output voltage of the DC power supply; a transformer having a primary and a secondary; and a power switch. The power switch has a control input, and the power switch is configured to apply the output of the DC power supply to the primary of the transformer in a first direction when a first control signal is applied to the control input, to apply the output of the DC power supply to the primary of the transformer in a second direction when a second control signal is applied to the control input, and to remain open when neither the first control signal nor the second control signal is applied to the control input. The second direction is opposite the first direction. The first apparatus also includes a controller programmed to (a) apply the first control signal to the control input for a duration of T / 3, then (b) wait for a duration of T / 6, then (c) apply the second control signal to the control input for a duration of T / 3, and then (d) wait for a duration of T / 6, then repeating the sequence (a), (b), (c), and (d) in succession. T is the inverse of the frequency f. And the first apparatus also includes an output filter connected to the secondary of the transformer, where the output filter passes the frequency f and attenuates frequencies above a cutoff frequency. The controller is further programmed to control the amplitude of the sinusoid at the frequency f by adjusting a third control signal applied to the voltage-controlled input of the DC power supply, and the controller is further programmed to prevent the adjustment of the third control signal from occurring when either the first control signal or the second control signal is being applied to the control input.

[0006] In some embodiments of the first apparatus, the cutoff frequency is between 2f and 4f, and the output filter has a transfer function that has a zero at 5f.

[0007] Another aspect of the invention is directed to a second apparatus for generating a sinusoid at a frequency f. The second apparatus includes n DC power supplies, each of the n DC power supplies having a voltage-controlled input that sets an output voltage of the respective power supply, where n is a positive integer. The second apparatus also includes a power switch having an output terminal and a control input. The power switch is configured to either (a) route an output of a selected one of the n DC power supplies to the output terminal having a selected polarity in response to 2n states of a control signal applied to the control input, or (b) remain open in response to an additional state of the control signal. The second apparatus also includes a controller programmed to control generation of an oversampled version of a sinusoid that is sampled N times per cycle using uniformly spaced samples including a sample point at 0°, where N = 2 + 4n, by setting the output voltages of the n DC power supplies to levels that occur on the oversampled version of the sinusoid and then ordering the control signal through the 2n states and the additional state, such that each of the n DC power supplies is sequentially routed to the output terminal of the power switch having the selected polarity at the appropriate time in order to generate the oversampled version of the sinusoid. And the second apparatus also includes an output filter that filters current from the output terminal of the power switch. The output filter passes the frequency f and attenuates frequencies above a cutoff frequency. The controller is programmed to control an amplitude of the sinusoid by adjusting the output voltages of the n DC power supplies via the voltage-controlled inputs, and the controller is further programmed to not adjust an output voltage of a DC power supply when its output is being routed to the output terminal of the power switch.

[0008] Some embodiments of the second apparatus further include a transformer having a primary connected to the output terminal of the power switch and a secondary connected to the output filter, the transformer configured such that current from the output terminal of the power switch reaches the output filter via the transformer.

[0009] Some embodiments of the second apparatus further include a transformer having a primary connected to the output terminals of the power switch, and a secondary connected to the output filter, the transformer configured so that current from the output terminals of the power switch reaches the output filter via the transformer. In these embodiments, n = 1, meaning that there is only a single DC power supply. In these embodiments, the controller is programmed to control the generation of the oversampled version of the sinusoidal wave by (a) applying a first control signal to the control input for a duration of T / 3 so as to cause the power switch to route the output of the single DC power supply to the output terminal having a first polarity, then (b) waiting for a duration of T / 6, then (c) applying a second control signal to the control input for a duration of T / 3 so as to cause the power switch to route the output of the single DC power supply to the output terminal having a second polarity opposite the first polarity, and then (d) waiting for a duration of T / 6, then repeating the sequence (a), (b), (c), and (d) in succession. T is the inverse of the frequency f. Optionally, in these embodiments, the cutoff frequency is between 2f and 4f, and the output filter has a transfer function that has a zero at 5f.

[0010] In some embodiments of the second apparatus, n > 1; and the controller is further programmed to control the amplitude of the sinusoidal curve by adjusting the output voltages of the n DC power supplies via the voltage-controlled input, while maintaining a fixed ratio between the output voltages of each of the n DC power supplies. Optionally, in these embodiments, the output filter can have a transfer function that has a zero at a frequency at which a harmonic of the frequency f is expected to contain power.

[0011] Another aspect of the invention is directed to a first method for generating a sinusoidal curve at a frequency f. The first method includes setting n DC power supplies to respective output voltages, where n is a positive integer; and generating an oversampled version of the sinusoidal wave by setting the output voltages of the n DC power supplies to levels that occur on the oversampled version of the sinusoidal wave, and then switching the outputs of the n DC power supplies to the outputs in a controlled order, the oversampled version of the sinusoidal wave sampled N times per cycle using uniformly spaced samples that include a sample at 0°, where N = 2 + 4n, such that each of the n DC power supplies is switched to the output in each direction in order at the appropriate time so as to generate the oversampled version of the sinusoidal wave. The first method further includes filtering the oversampled version of the sinusoidal wave to pass the frequency f and attenuate frequencies above a cutoff frequency, where the filtering achieves a transfer function that has a zero at a frequency at which a harmonic of the frequency f is expected to contain power. The amplitude of the sinusoidal curve is controlled by adjusting the output voltages of the n DC power supplies, and any given one of the n DC power supplies is prevented from having its output voltage adjusted while it is switched to the output.

[0012] In some instances of the first approach, n = 1, meaning that only a single DC power supply is present; and adjustment of the output voltage of the single DC power supply only occurs during such times when the output of the single DC power supply is not being switched to the output.

[0013] In some instances of the first approach, the filtering implements a transfer function that has a zero at a frequency at which harmonics of the frequency f are expected to contain power.

[0014] Another aspect of the invention is directed to a third apparatus for generating an output waveform at a frequency f. The third apparatus includes a first DC power supply having a first voltage-controlled input that sets an output voltage of the first DC power supply; and a second DC power supply having a second voltage-controlled input that sets an output voltage of the second DC power supply. The third apparatus further includes a power switch having an output terminal and a control input. The power switch is configured to (a) route the output of the first DC power supply to the output terminal with a first polarity in response to a first state of the control input, (b) route the output of the first DC power supply to the output terminal with a second polarity in response to a second state of the control input, (c) route the output of the second DC power supply to the output terminal with the first polarity in response to a third state of the control input, (d) route the output of the second DC power supply to the output terminal with the second polarity in response to a fourth state of the control input, and (e) remain open in response to additional states of the control input. The second polarity is opposite the first polarity. The third apparatus further includes an output filter that filters current from the output terminal of the power switch. The output filter passes the frequency f and attenuates frequencies above a cutoff frequency. The third apparatus further includes a controller programmed to operate in a first mode in which the controller sets the control input to the first and second states in an alternating sequence while holding the first voltage-controlled input constant. The controller is further programmed to operate in a second mode in which the controller sets the control input to the third and fourth states in an alternating sequence while holding the second voltage-controlled input constant. The controller is further programmed such that if the controller is operating in the first mode, the controller brings about a change in the output waveform amplitude by adjusting the second voltage-controlled input and subsequently switching the controller to the second mode, and the controller is further programmed such that if the controller is operating in the second mode, the controller brings about a change in the output waveform amplitude by adjusting the first voltage-controlled input and subsequently switching the controller to the first mode.

[0015] In some embodiments of the third apparatus, the output waveform is sinusoidal; setting the control input to the first and second states in an alternating sequence comprises (a) placing the control input in the first state for a duration of T / 3, then (b) waiting for a duration of T / 6, then (c) placing the control input in the second state for a duration of T / 3, and then (d) waiting for a duration of T / 6, then repeating the sequence (a), (b), (c), and (d) in succession; setting the control input to the third and fourth states in an alternating sequence comprises (e) placing the control input in the third state for a duration of T / 3, then (f) waiting for a duration of T / 6, then (g) placing the control input in the fourth state for a duration of T / 3, and then (h) waiting for a duration of T / 6, then repeating the sequence (e), (f), (g), and (h) in succession. T is the inverse of the frequency f.

[0016] In some embodiments of the third apparatus, the controller is further programmed such that if the controller is operating in the first mode, the controller brings about a change in the output waveform amplitude by adjusting the second voltage-controlled input at least 1 ms before switching the controller to the second mode; and the controller is further programmed such that if the controller is operating in the second mode, the controller brings about a change in the output waveform amplitude by adjusting the first voltage-controlled input at least 1 ms before switching the controller to the first mode.

[0017] Some embodiments of the third apparatus further comprise a transformer having a primary connected to the output terminal of the power switch, and a secondary connected to the output filter, the transformer configured such that current from the output terminal of the power switch reaches the output filter via the transformer. Optionally, in these embodiments, the power switch can be configured to (a) route the output of the first DC power source to the primary of the transformer in a first direction in response to the first state of the control input, (b) route the output of the first DC power source to the primary of the transformer in a second direction in response to the second state of the control input, (c) route the output of the second DC power source to the primary of the transformer in the first direction in response to the third state of the control input, (d) route the output of the second DC power source to the primary of the transformer in the second direction in response to the fourth state of the control input, and (e) remain open in response to the fifth state of the control input. The second direction is opposite to the first direction.

[0018] In some embodiments of the third apparatus, the cutoff frequency is between 2f and 4f, and the output filter has a transfer function that has a zero at 5f.

[0019] Another aspect of the invention is directed to a second method for generating an output waveform at a frequency f. The second method includes (a) in response to a first state of a control input of a power switch, routing an output of a first DC power supply to an output terminal of the power switch having a first polarity, (b) in response to a second state of the control input, routing the output of the first DC power supply to the output terminal having a second polarity, (c) in response to a third state of the control input, routing an output of a second DC power supply to the output terminal having the first polarity, (d) in response to a fourth state of the control input, routing the output of the second DC power supply to the output terminal having the second polarity, and (e) in response to an additional state of the control input, remaining open. The second polarity is opposite the first polarity. The second method further includes filtering a current from the output terminal of the power switch. The filtering includes passing frequencies through the frequency f and attenuating frequencies above a cutoff frequency. The second method further includes operating in a first mode in which the control input is set to the first and second states in an alternating sequence while maintaining a constant output voltage of the first DC power supply. The second method further includes operating in a second mode in which the control input is set to the third and fourth states in an alternating sequence while maintaining a constant output voltage of the second DC power supply. In the first mode, a change in the output waveform amplitude is brought about by adjusting the output voltage of the second DC power supply and subsequently switching to the second mode. And in the second mode, a change in the output waveform amplitude is brought about by adjusting the output voltage of the first DC power supply and subsequently switching to the first mode.

[0020] In some instances of the second method, the output waveform is a sinusoid, and the control input is set to the first and second states in an alternating sequence by (a) placing the control input in the first state for a duration of T / 3, then (b) waiting for a duration of T / 6, then (c) placing the control input in the second state for a duration of T / 3, and then (d) waiting for a duration of T / 6, then repeating the sequence (a), (b), (c), and (d) in succession. In these instances, the control input is set to the third and fourth states in an alternating sequence by (e) placing the control input in the third state for a duration of T / 3, then (f) waiting for a duration of T / 6, then (g) placing the control input in the fourth state for a duration of T / 3, and then (h) waiting for a duration of T / 6, then repeating the sequence (e), (f), (g), and (h) in succession. And in these instances, T is the inverse of the frequency f.

[0021] In some instances of the second method, in the first mode, a change in the output waveform amplitude is brought about by adjusting the output voltage of the second DC power supply for at least 1 ms before switching to the second mode; and in the second mode, a change in the output waveform amplitude is brought about by adjusting the output voltage of the first DC power supply for at least 1 ms before switching to the first mode.

[0022] Another aspect of the application is directed to a fourth apparatus for generating an AC electrical signal applied to a first pair of electrodes and a second pair of electrodes. The fourth apparatus includes an AC voltage generator having an output, an electronic switch, and a controller. The electronic switch has an input that receives the output of the AC voltage generator, a first power output, and a second power output. The electronic switch is configured to (a) operate in a first mode in which the output of the AC voltage generator is routed to the first power output, and (b) operate in a second mode in which the output of the AC voltage generator is routed to the second power output. The electronic switch is further configured to cycle through a repeating sequence that includes the first mode and the second mode. The controller is configured to synchronize the operation of the AC voltage generator and the electronic switch such that the amplitude of the instantaneous output of the AC voltage generator is less than 5 V whenever the electronic switch switches to the first mode or the second mode. The output voltage of the AC voltage generator is at least 80% of the steady-state output voltage of the AC voltage generator within 20 ms after the electronic switch switches to the first mode or the second mode.

[0023] In some embodiments of the fourth apparatus, the electronic switch is further configured to (c) operate in a third mode in which the output of the AC voltage generator is not routed to the first power output or the second power output, and (d) cycle through the first mode, the second mode, and the third mode in the following repeating sequence: (1) the first mode, (2) the third mode, (3) the second mode, and (4) the third mode. In some embodiments of the fourth apparatus, the controller is configured to synchronize the operation of the AC voltage generator and the electronic switch such that the amplitude of the instantaneous output of the AC voltage generator is less than 1 V whenever the electronic switch switches to the first mode or the second mode.

[0024] In some embodiments of the fourth apparatus, the output voltage of the AC voltage generator is at least 80% of the steady-state output voltage of the AC voltage generator within 5 ms after the electronic switch switches to the first mode or the second mode. In some embodiments of the fourth apparatus, the output voltage of the AC voltage generator is at least 80% of the steady-state output voltage of the AC voltage generator within 1 ms after the electronic switch switches to the first mode or the second mode.

[0025] In some embodiments of the fourth apparatus, during the transition of the electronic switch to the first mode or the second mode, the AC voltage generator continues to operate at its full steady-state AC output voltage.

[0026] In some embodiments of the fourth apparatus, the controller synchronizes operation of the AC voltage generator and the electronic switch by controlling the transition timing of the electronic switch so that the transitions coincide with a time window during which the instantaneous output of the AC voltage generator has an amplitude less than 5 V. In some embodiments of the fourth apparatus, the controller synchronizes operation of the AC voltage generator and the electronic switch by controlling the AC voltage generator so that the output of the AC voltage generator is turned off whenever the electronic switch transitions. In some embodiments of the fourth apparatus, the controller synchronizes operation of the AC voltage generator and the electronic switch by (a) controlling the transition timing of the electronic switch so that the transitions coincide with a time window during which the instantaneous output of the AC voltage generator has an amplitude less than 5 V, and (b) controlling the AC voltage generator so that the output of the AC voltage generator is turned off whenever the electronic switch transitions.

[0027] In some embodiments of the fourth apparatus, the electronic switch is configured to cycle through the first mode and the second mode in a repeating sequence of: (1) the first mode, (2) the second mode. In these embodiments, the electronic switch is configured to switch directly from the first mode to the second mode, and directly from the second mode to the first mode.

[0028] Another aspect of the present disclosure is directed to a fifth apparatus for generating an AC electrical signal applied to a first pair of electrodes and a second pair of electrodes. The fifth apparatus includes an AC voltage generator having an output, an electronic switch, and a controller. The electronic switch has an input that receives the output of the AC voltage generator, a first power output, and a second power output. The electronic switch is configured to (a) operate in a first mode in which the output of the AC voltage generator is routed to the first power output, and (b) operate in a second mode in which the output of the AC voltage generator is routed to the second power output. The electronic switch is further configured to cycle through a repeating sequence that includes the first mode and the second mode. The controller is configured to synchronize operation of the AC voltage generator and the electronic switch so that whenever the electronic switch switches to the first mode or the second mode, the instantaneous output of the AC voltage generator has an amplitude below a threshold at which a subject being treated begins to experience a perceivable sensation. The output voltage of the AC voltage generator is at least 80% of the steady-state output voltage of the AC voltage generator within 20 ms after the electronic switch switches to the first mode or the second mode.

[0029] In some embodiments of the fifth apparatus, the electronic switch is further configured to (c) operate in a third mode in which the output of the AC voltage generator is not routed to the first power output or the second power output, and (d) cycle through the first mode, the second mode, and the third mode in a repeating sequence of: (1) the first mode, (2) the third mode, (3) the second mode, and (4) the third mode.

[0030] In some embodiments of the fifth apparatus, the controller is configured to synchronize operation of the AC voltage generator and the electronic switch such that whenever the electronic switch switches to the first mode or the second mode, the instantaneous output of the AC voltage generator is less than 1 V.

[0031] In some embodiments of the fifth apparatus, within 5 ms after the electronic switch switches to the first mode or the second mode, the output voltage of the AC voltage generator is at least 80% of the steady-state output voltage of the AC voltage generator. In some embodiments of the fifth apparatus, within 1 ms after the electronic switch switches to the first mode or the second mode, the output voltage of the AC voltage generator is at least 80% of the steady-state output voltage of the AC voltage generator.

[0032] In some embodiments of the fifth apparatus, during the transition of the electronic switch to the first mode or the second mode, the AC voltage generator continues to operate at its full steady-state AC output voltage.

[0033] In some embodiments of the fifth apparatus, the controller synchronizes operation of the AC voltage generator and the electronic switch by controlling the transition timing of the electronic switch such that the transition coincides with a time window during which the instantaneous output of the AC voltage generator has an amplitude below a threshold value. In some embodiments of the fifth apparatus, the controller synchronizes operation of the AC voltage generator and the electronic switch by controlling the AC voltage generator such that whenever the electronic switch transitions, the output of the AC voltage generator is turned off. In some embodiments of the fifth apparatus, the controller synchronizes operation of the AC voltage generator and the electronic switch by (a) controlling the transition timing of the electronic switch such that the transition coincides with a time window during which the instantaneous output of the AC voltage generator has an amplitude below a threshold value, and (b) controlling the AC voltage generator such that whenever the electronic switch transitions, the output of the AC voltage generator is turned off.

[0034] In some embodiments of the fifth apparatus, the electronic switch is configured to cycle through the first mode and the second mode in the following repeating sequence: (1) the first mode, (2) the second mode. In these embodiments, the electronic switch is configured to switch directly from the first mode to the second mode and directly from the second mode to the first mode. BRIEF DESCRIPTION OF DRAWINGS

[0035] Figure 1 is a block diagram of a first embodiment of a sinusoidal curve generator generating a sinusoidal curve with a controllable amplitude at a preset frequency f.

[0036] Figure 2 depicts a block diagram of a preferred method for implementing a power switcher and a suitable architecture for implementing an output filter.

[0037] Figure 3A sinusoidal wave and an oversampled version of this sinusoidal wave, sampled 6 times per cycle, are depicted.

[0038] Figure 4 is a schematic diagram of an output filter embodiment.

[0039] Figure 5 is a block diagram of a second embodiment of a sinusoid generator that generates a sinusoid with a controllable amplitude at a preset frequency f.

[0040] Figure 6 is a block diagram of a preferred method for implementing Figure 5 is a block diagram of a preferred method for implementing

[0041] Figure 7 A sinusoidal wave and an oversampled version of this sinusoidal wave, sampled 10 times per cycle, are depicted.

[0042] Figure 8 A sinusoidal output waveform under steady state conditions is depicted.

[0043] Figure 9 How the sinusoidal output waveform changes when the output of the DC-DC converter used to drive the sinusoidal output changes at some times in the cycle is shown.

[0044] Figure 10 How the sinusoidal output waveform changes when the output of the DC-DC converter used to drive the sinusoidal output changes at other times in the cycle is shown.

[0045] Figure 11 is a block diagram of a third embodiment of a sinusoid generator that generates a sinusoid with a controllable amplitude.

[0046] Figure 12 A waveform showing how the output signal voltage changes rapidly is depicted. Figure 11 How the sinusoidal output waveform changes when the output of the DC-DC converter used to drive the sinusoidal output changes at some times in the cycle is shown.

[0047] Figure 13 is a block diagram of a prior art system for applying TTFields to a human head.

[0048] Figure 14 is a timing diagram showing Figure 13 The ordering between the two directions LR and AP used in the prior art system.

[0049] Figure 15 A waveform including a significant spike is depicted.

[0050] Figure 16A A prior art method for avoiding Figure 15with 1 s intervals between switching events.

[0051] Figure 16B is a schematic representation of the instantaneous output voltage of the AC generator using the ramp rate depicted in Figure 16A

[0052] Figure 17A depicts what would happen if the method of Figure 16 was used with 0.25 s intervals between switching events.

[0053] Figure 17B is a schematic representation of the instantaneous output voltage of the AC generator using the ramp rate depicted in Figure 17A

[0054] Figure 18 depicts an embodiment of the operation of a synchronous AC voltage generator and switch.

[0055] Figure 19 is a timing diagram showing the ordering between the two directions of the Figure 18

[0056] Figure 20 depicts a first method for achieving synchronisation between the AC voltage generator and the switch in the Figure 18

[0057] Figure 21 depicts a second method for achieving synchronisation between the AC voltage generator and the switch in the Figure 18

[0058] Figure 22 depicts how the output of the AC voltage generator jumps immediately to its full steady state output voltage when using the method of Figure 21

[0059] Figure 23 depicts another method for achieving synchronisation between the AC voltage generator and the switch in the Figure 18

[0060] Various embodiments are described in detail below with reference to the attached drawing figures, wherein the like reference numerals refer to like elements. DETAILED DESCRIPTION

[0061] ​​​​​​​When generating high-voltage sinusoidal signals using prior art methods in combination with TTFields therapy, under certain conditions (e.g., in response to a command to change the output voltage, or when the direction of the TTFields is switched), high-frequency artifacts (e.g., voltage spikes) can appear on the output. And because those high-frequency artifacts can cause an unpleasant sensation on a person being treated with TTFields therapy, the output voltage amplitude is typically ramped up slowly to prevent those high-frequency artifacts (and the resulting unpleasant sensation) from occurring. But there is a drawback to using a slow ramp-up: the output voltage is not always as high as it could be, which means that the electric field applied to the tumor is not always as strong as it could be. When the electric field is not as strong as it could be, the efficacy of the treatment can be reduced. The embodiments described herein can advantageously increase the output voltage amplitude much more quickly without introducing high-frequency artifacts. Thus, these embodiments can prevent the unpleasant sensation from occurring without incurring the associated reduction in treatment efficacy.

[0062] The embodiments described herein are useful in connection with generating TTFields, as described in U.S. Patent 7,805,201, which is incorporated herein by reference. The embodiments described herein build on the architecture described in U.S. Patent 9,910,453, which is incorporated herein by reference. Notably, the embodiments described herein enable the voltage of the sinusoidal signal (which is applied to the TTFields transducer array) to be adjusted more quickly without the risk of introducing high-frequency artifacts (e.g., voltage spikes) on the output. The embodiments described herein also enable the sinusoidal signal to be turned on and off to full power instantaneously without the risk of introducing high-frequency artifacts on the output.

[0063] Note that when generating high-voltage signals for TTFields delivery, the exact shape of the signal is known at every instant (pure sinusoidal wave at a known frequency), and only the amplitude of the signal changes over time based on external input (e.g., control based on patient skin temperature).

[0064] The embodiments described herein generate high-voltage sinusoidal signals by generating specific bursts, which when filtered using a specific low-pass filter, will result in a low-loss sinusoidal wave of the desired amplitude and frequency.

[0065] Figure 1 is a block diagram of a first embodiment of a sinusoid generator that generates a sinusoid with a controllable amplitude at a preset frequency f. Ultimately, the amplitude of the output sinusoid will be proportional to the output of a DC power supply 50, which is preferably a controlled DC-DC converter.

[0066] In the illustrated embodiment, the DC-to-DC converter 50 is configured to multiply the analog voltage-controlled input signal by 10, so when a 1 V voltage-controlled signal is applied, the output will be 10 V, and when a 5 V voltage-controlled signal is applied, the output will be 50 V, with proportional control between the two. Thus, depending on the voltage applied to the analog voltage-controlled input (e.g., 0-5V), the output of the DC-DC converter 50 can take any value between 0 and 50 V. The controller 40 controls the output voltage of the DC-DC converter 50 by writing a control word to a digital-to-analog converter (DAC) 42. The DAC 42 then generates an analog voltage proportional to the control word, and this analog voltage is applied to the voltage-controlled input of the DC-DC converter 50.

[0067] The output of the DC-DC converter 50 is routed to a power switch 60. The power switch 60 has a control input, and depending on the state of the control input, it will route the output of the DC-DC converter 50 to the primary of the transformer 70 in either direction. More specifically, when a first control signal is applied to the control input, the power switch 60 will apply the output of the DC-DC converter 50 to the primary of the transformer 70 in a first direction. When a second control signal is applied to the control input, the power switch 60 will apply the output of the DC-DC converter 50 to the primary of the transformer 70 in a second direction opposite the first direction. When neither the first control signal nor the second control signal is applied to the control input, the power switch 60 will remain open, in which case power from the DC-DC converter 50 is not routed to the primary of the transformer 70.

[0068] Figure 2 A block diagram of a preferred method for implementing the power switch 60 using four sets of electrically controlled switches 61-64 connected to the primary of the transformer 70 in an H-bridge configuration is included. These switches 61-64 are opened and closed in response to signals applied to the control input 68. As will be appreciated by those skilled in the relevant art, a variety of technologies are used to implement these switches. For example, the switches 61-64 can be implemented using MOSFET transistors (e.g., BSC109N10NS3 manufactured by Infineon) along with appropriate logic to turn them on and off in response to control signals. To apply the output of the DC-DC converter 50 to the primary of the transformer 70 in a first direction, only switches 63 and 62 should be closed. To apply the output of the DC-DC converter 50 to the primary of the transformer 70 in the opposite direction, only switches 61 and 64 should be closed. When all four switches 61-64 are open, no power is routed into the primary of the transformer 70.

[0069] The transformer 70 is preferably a step-up transformer with a step-up ratio between 1 :4 and 1 :9. In some preferred embodiments, the transformer 70 is a step-up transformer with a step-up ratio of 1 :6. For example, when a transformer with a step-up ratio of 1 :6 is used in conjunction with a DC-DC converter 50 that can output up to 24 V, the resulting voltage at the secondary of the transformer 70 can be up to 300 V.

[0070] Returning to Figure 1 , the controller 40 applies control signals to the control input of the power switch 60 in a time-sequenced order so as to construct a oversampled version of the sinusoidal wave that is sampled six times per cycle using evenly spaced samples. More specifically, Figure 3 depicts a sinusoidal wave 110 and an oversampled version of the sinusoidal wave 112 that is sampled at 0°, 60°, 120°, 180°, 240°, 300°, and 360°. Observing this oversampled version 112, it becomes apparent that it contains only three voltage levels: a positive voltage +V between 60° and 180°, a negative voltage -V between 240° and 360°, and zero volts between 0° and 60° and also between 180° and 240°. Note that the zero-voltage level exists because we have chosen the sampling times such that one sampling point occurs at 0° and another sampling point occurs at 180°, where the sinusoidal function is equal to zero. This choice advantageously reduces the number of voltage levels that must be generated in order to construct the oversampled version of the sinusoidal wave 112. It also advantageously reduces the number of switching events, which minimizes the losses incurred during the switching process.

[0071] As a result, an oversampled version of the sinusoidal curve at a preset frequency f can be constructed at the output of the transformer 70 by continuously repeating the following four steps: (a) applying a first control signal to the control input 68 for a duration of T / 3, which corresponds to Figure 3 the 60-180° segment of the waveform 112; then (b) waiting for a duration of T / 6, which corresponds to the 180-240° segment of the waveform 112; then (c) applying a second control signal to the control input 68 for a duration of T / 3, which corresponds to the 240-360° segment of the waveform 112; and then (d) waiting for a duration of T / 6, which corresponds to the 0-60° segment of the waveform 112. Note that T is the inverse of the preset frequency f.

[0072] The controller 40 is responsible for generating these control signals in this order. The controller 40 can be implemented using a variety of methods that will be apparent to those skilled in the relevant art, including but not limited to a microcontroller or microprocessor that has been programmed to perform the functions described herein. The controller 40 can also be implemented using a microcontroller or microprocessor in conjunction with a hardwired sequencer, the latter of which can be implemented using, for example, a state machine or a counter.

[0073] The secondary output of the transformer 70 is routed to an output filter 80, which has a cutoff frequency between 2f and 4f. The output filter 80 passes the preselected frequency f and attenuates frequencies above the cutoff frequency.

[0074] Note that when the oversampled version of the sine wave (waveform 112 in FIG. 1 12) is converted to the frequency domain, as a result of the fact that the waveform 112 is symmetric, all even harmonics will be zero. Furthermore, because 6 samples are taken per period, the third harmonic of the waveform 112 will also be zero. Figure 3 Many filter designs have inherent instability at their cutoff frequencies. But because the third harmonic component of the oversampled waveform 112 is zero, the lowest harmonic that will have any significant power will be the fifth harmonic. If the output filter 80 is designed such that its cutoff frequency coincides with the third harmonic, the oversampled waveform 112 will not be affected by the instability near the cutoff frequency because the waveform does not contain power at 3f. Thus, it is most preferable to design the output filter 80 with a cutoff frequency of 3f, in which case (a) the fundamental component will be sufficiently below the cutoff frequency so as not to activate the instability, and (b) the fifth harmonic will be sufficiently above the cutoff frequency so as not to activate the instability.

[0075] To further reduce higher order harmonics, the output filter 80 is preferably designed such that the transfer function of the output filter has a zero at the fifth harmonic. This can be accomplished, for example, by selecting components within the output filter 80 to implement an elliptic low pass filter or a Chebyshev-2 low pass filter. In general, elliptic filters and Chebyshev-2 filters are not suitable for filtering a square wave into a sine wave because they have significant ripple in the stop band. Thus, if the input signal happens to contain a frequency component that coincides with a peak in the ripple, that component will not be filtered out of the input signal.

[0076] Embodiments of the present application avoid this situation by generating the oversampled waveform 112 at the preselected frequency, which means that the frequency of the fifth harmonic will be known in advance. By selecting components within the output filter 80 such that the transfer function of the output filter has a zero at the fifth harmonic, we ensure that the fifth harmonic will never coincide with a peak in the ripple in the stop band. Figure 1 To reduce higher order harmonics even further, the output filter 80 can be designed such that its transfer function has an additional zero at the seventh harmonic. Here again, because the frequency of the seventh harmonic will be known in advance, components within the output filter 80 can be selected such that the transfer function of the output filter has a zero at the seventh harmonic.

[0077]

[0078] ​Designing the output filter 80 with zeros at the fifth and seventh harmonics reduces the attenuation at other frequencies located between the harmonics, which would normally be highly undesirable. However, because the frequency of the oversampled waveform 112 is pre-determined, and because it contains only signals centered on odd harmonics (starting with the fifth harmonic), this design will actually reduce the Figure 1 The overall distortion of the output signal in embodiments.

[0079] When the output filter 80 is designed with zeros at the fifth and seventh harmonics, the initial harmonic that will contain any significant power will be the ninth harmonic. But because the power in the ninth harmonic of the oversampled waveform 112 (of Figure 3 the ninth harmonic of the output filter 80 (as well as all higher harmonics) will be low enough to produce an excellent sine wave.

[0080] Figure 2 A suitable architecture for implementing the output filter 80 with the cutoff frequencies and zeros at the locations indicated above is depicted. Preferably, the output filter 80 is a multi-stage low-pass LC filter. In this case, the first stage of the output filter 80 includes an inductor 82 and a capacitor 83, and subsequent stages are represented by block 85. In some embodiments, the filter 80 is a fourth-order LC low-pass filter. In some embodiments, the filter 80 is a double-M-element low-pass filter.

[0081] When modeling the electrical characteristics of the transformer 70, the leakage inductance of the transformer is in series with the secondary of the transformer 70. As a result, when calculating the inductance of the first inductor 82 in the first stage of the output filter 80, the leakage inductance must be accounted for. In some embodiments, a transformer 70 is selected that has a leakage inductance large enough to supply all of the inductance required for the first inductor 82. In this case, the first inductor 82 can be eliminated entirely from the output filter 80 and replaced with a wire. For example, if the calculated desired value for the first inductor in the output filter is 60 μH, and the leakage inductance of the transformer 70 is 60 μH, then the first inductor 82 of the output filter can be eliminated entirely.

[0082] In alternative embodiments, the leakage inductance of the transformer 70 accounts for at least half of the inductance of the first stage of the low-pass LC filter. In these embodiments, we start with the calculated value for the first inductor 82, and reduce that value by the leakage inductance of the transformer 70. For example, if the calculated value for the first inductor in the first stage of the output filter is 100 μH, and the leakage inductance of the transformer 70 is 60 μH, then an inductor of 40 μH should be used as the first inductor 82 of the output filter (because 100 μH - 60 μH = 40 μH).

[0083] Figure 4 is a schematic diagram of an embodiment of the output filter 80 in which the inductance of the transformer 70 provides all of the inductance required for the first inductor to function as the first stage of the output filter. Figure 4 The transformer in is a Zolotov TRM085, which has the following characteristics: a turns ratio of 6:25; an inductance in the primary of 0.25 mH (at 200 kHz); an inductance in the secondary of 4.5 mH (at 200 kHz); and a leakage inductance of between 32 and 36 μH (at 200 kHz). Capacitors C33, C35, C36, C42, C43, and C44 are all 3300 pF capacitors. C40 is a 4.7 nF capacitor. C41 is a 470 pF capacitor. Inductors L5-L8 are all 4 μH inductors. The values of these components are selected to position the filter's zero at the fifth and seventh harmonics when the operating frequency is 200 kHz.

[0084] An alternative design for implementing the output filter 80 with an operating frequency of 150 kHz can be implemented starting with the schematic diagram of Figure 4 and (a) adding an additional 4.7 nF capacitor in parallel with C40; and (b) replacing the 3300 pF capacitors C33, C35, C36, C42, C43, and C44 with 5600 pF capacitors. These components are selected to position the filter's zero at the fifth and seventh harmonics when the operating frequency is 150 kHz.

[0085] The output impedance of the output filter 80 is preferably as close to 70 ohms as possible. In alternative embodiments, the output impedance of the output filter 80 is between 40 and 120 ohms. It is appropriate to use an output impedance in this range because the current and voltage of the output signal 100 can change depending on the presented load (i.e., the patient and transducer array in the context of TTFields therapy). But because the output impedance is between 40 and 120 ohms, the current will not surge to dangerous values even if a short circuit exists at the output. Furthermore, if the impedance of the load suddenly increases (e.g., if the electrodes become partially disconnected from the patient), then the drop in current will not be as significant. This is a very useful safety feature in the context of TTFields therapy.

[0086] The controller 40 controls the amplitude of the output signal 100 by adjusting the control signal applied to the voltage control input of the DC-DC converter 50. In the illustrated embodiment, this is done by having the controller 40 write a control word to the DAC 42. The DAC 42 responds by outputting an analog voltage that serves as the control signal applied to the voltage control input of the DC-DC converter 50. For example, assume that the output of the DAC 42 starts at 1 V, the DC-DC converter is outputting 10 V DC, and the transformer 70 has a step-up ratio of 1 :6. Under these conditions, the pulse of the secondary output of the transformer 70 will be 60 V. When the controller 40 writes a new control word to the DAC 42, it causes the output of the DAC 42 to increase to 2 V. The DC-DC converter 50 will respond to the new signal being applied to its voltage control input by increasing its output voltage to 20 V DC, which (after passing through the step-up transformer 70) will cause the pulse of the secondary output of the transformer 70 to increase to 120 V.

[0087] Preferably, the voltage and / or current of the output signal 100 is monitored by voltage sensing circuitry 92 and / or current sensing circuitry 94. The outputs of these circuits 92, 94 are preferably fed back to the controller 40, and the controller 40 is preferably configured so that when an error condition (e.g., overvoltage, overcurrent, severe voltage droop, etc.) is detected at the output 100, the controller 40 will shut down the power switcher 60 by suppressing the generation of the first and second control signals applied to the control inputs 68 of the power switcher 60. Optionally, the shutdown of the power switcher 60 can also be triggered by an over-temperature condition at the load, by including appropriate temperature sensors and routing signals from those temperature sensors back to the controller 40.

[0088] Note that in the illustrated embodiment, a single controller 40 is used to implement all of the control functions and sequencing functions described herein. But in alternative embodiments, the programmable controller 40 can be combined with a hardwired sequencer to perform those two functions, respectively.

[0089] In some embodiments, the output of the current sense circuit 94 and / or the voltage sense circuit 92 is fed back to the controller 40. In these embodiments, the controller can adjust the voltage at the output of the DC-DC converter 50 by writing appropriate control words to the DAC 42 in order to adjust the current or voltage of the output signal 100 to the desired level. For example, when the controller 40 is set to adjust the current to a particular level and the output of the current sense circuit 94 indicates that the current is too low, the controller can increase the voltage at the output of the DAC 42, which will cause the amplitude at the output signal 100 to increase. Similarly, if the output of the current sense circuit 94 indicates that the current is too high, the controller can decrease the voltage at the output of the DAC 42, which will cause a corresponding decrease in the amplitude at the output signal 100.

[0090] In alternative embodiments, the transformer 70 (shown in FIGS. 1-2) can be omitted, in which case the two wires at the output of the power switch 60 are connected directly to the two wires at the input of the output filter 80. In these embodiments, the current flows directly from the output of the power switch 60 to the input of the output filter 80 without an intervening transformer. But these alternative embodiments are less preferred, especially in situations where isolation is desired and in situations where a high voltage output is desired. Moreover, these alternative embodiments cannot rely on the leakage inductance of the transformer to provide some or all of the inductance required for the first stage of the filter. Figure 1 Figure 2 In alternative embodiments, the transformer 70 (shown in FIGS. 1-2) can be omitted, in which case the two wires at the output of the power switch 60 are connected directly to the two wires at the input of the output filter 80. In these embodiments, the current flows directly from the output of the power switch 60 to the input of the output filter 80 without an intervening transformer. But these alternative embodiments are less preferred, especially in situations where isolation is desired and in situations where a high voltage output is desired. Moreover, these alternative embodiments cannot rely on the leakage inductance of the transformer to provide some or all of the inductance required for the first stage of the filter.

[0091] Note that, Figure 1 The design of the embodiments relies on prior knowledge of the input signal, and the intentional construction of both the signal and the output filter 80 such that the most significant harmonics are either inherently zero (e.g., even harmonics and third harmonics) or are nulled by the output filter 80 (e.g., fifth and seventh harmonics). This helps to provide a very clean high voltage output signal at the desired frequency with very high efficiency.

[0092] Figure 1 The embodiments use a single DC-DC converter 50 and achieve six equidistant sample points per cycle. In alternative embodiments, the number of sample points can be increased to N = 2 + 4n, where n is a positive integer. When n = 1, we have the case described above in connection with FIGS. 1-2. When n = 2, we have the case described below in connection with FIGS. 3-4, which uses two DC-DC converters. Following the same framework, using additional DC-DC converters and even more samples (following the rule N = 2 + 4n), other embodiments can be implemented for n > 2. Figure 1 Figure 5

[0093] Figure 5 ​​​is a block diagram of a second embodiment of a sinusoidal curve generator generating a sinusoidal curve with controllable amplitude at a preset frequency f, where n = 2. As a result, there are two DC-DC converters 50, 50B and 10 samples are used per cycle (following the formula N = 2 + 4n). Note that in Figure 5-6 the embodiment of Fig. 1, components having similar reference numerals operate in a similar manner as described above in connection with the embodiment of Fig. 1. Figure 1-2

[0094] Figure 7 A sinusoidal wave 120 and an oversampled version of this sinusoidal wave 122 sampled 10 times per cycle (i.e. at 0°, 36°, 72°,... 324° and 360°) are depicted. Observing this oversampled version 112, it becomes apparent that it contains only five voltage levels: a low positive voltage +V1, a higher positive voltage +V2, a low negative voltage -V1, a higher negative voltage -V2 and zero volts (between 0° and 36° and also between 180° and 216°). Here again, the zero volts level is present because we have chosen the sampling times such that one sampling point occurs at 0° and another sampling point occurs at 180° where the sinusoidal function is equal to zero. This choice advantageously reduces the number of voltage levels that have to be generated to construct the oversampled version of the sinusoidal wave 122 to two levels (i.e. V1 and V2).

[0095] As a result, the controller 40B can be used to control the generation of the oversampled version of the sinusoidal wave that is sampled N times per cycle using uniformly spaced samples including the sampling point at 0°, where N = 2 + 4n, by setting the output voltage of the DC power supply to the levels present on the oversampled version of the sinusoidal wave and then sequencing the control signal through the 2n states and the additional off state, such that each of the DC power supplies is applied to the primary of the transformer in each direction in sequence at the appropriate time in order to generate the oversampled version of the sinusoidal wave.

[0096] When n = 2 (as it is in the Figure 5-6 embodiment of Fig. 1), the oversampled version of the sinusoidal curve at a preset frequency f can be constructed at the output of the transformer 70 by continuously repeating the following eight steps: applying V1 to the primary of the transformer 70 in a first direction between 36° and 72°; applying V2 in the first direction between 72° and 144°; applying V1 in the first direction between 144° and 180°; holding off between 180° and 216°; applying V1 in a second direction between 216° and 252°; applying V2 in the second direction between 252° and 324°; applying V1 in the second direction between 324° and 360°; and holding off between 0° and 36°. Note that in order for the resulting waveform to correctly track the oversampled version of the sinusoidal curve (​Figure 7 The ratio between V1 and V2 must remain constant. More specifically, the ratio of V2 / V1 must equal sin(72°) / sin(36°), i.e., 1.618.

[0097] Controller 40B is responsible for generating control signals that cause power switch 60B to apply these voltages to transformer 70 in the order identified above. Controller 40B is similar to Figure 1 Controller 40 in the embodiment, except that it cycles through 10 states in sequence, rather than 6 states in sequence, per cycle.

[0098] Referring now to Figure 6 , power switch 60B has a control input 68, and the power switch is configured to: (a) apply the output of a selected one of the DC power sources to the primary of transformer 70 in a selected direction, in response to 2n states of a control signal applied to control input 68, or (b) remain open, in response to additional states of the control signal.

[0099] Figure 6 is a block diagram of one preferred method for implementing power switch 60B. This power switch is similar to Figure 1 power switch 60 of the embodiment, except that it contains additional switches 65-66 for switching the output of the second DC-DC converter across transformer 70 in either direction. More specifically, this power switch 60B is connected to the primary of transformer 70 using a set of six electronically controlled switches 61-66, as Figure 6 depicted in FIG. 1. These switches 61-66, which are similar to the corresponding switches in the Figure 1-2 embodiment, are opened and closed in response to a signal applied to control input 68. To route the output of first DC-DC converter 50 to the primary of transformer 70 in the first direction, only switches 63 and 62 should be closed. To route the output of first DC-DC converter 50 to the primary of transformer 70 in the opposite direction (i.e., with opposite polarity), only switches 61 and 64 should be closed. To route the output of second DC-DC converter 50B to the primary of transformer 70 in the first direction, only switches 65 and 62 should be closed. To route the output of second DC-DC converter 50B to the primary of transformer 70 in the opposite direction (i.e., with opposite polarity), only switches 61 and 66 should be closed. When all six of these switches 61-66 are open, no power is routed into the primary of transformer 70.

[0100] Returning to Figure 5 , output filter 80B is connected to the secondary of transformer 70, and the output filter passes frequencies up to a pre-set frequency f and attenuates frequencies above the cutoff frequency. Output filter 80B is similar toFigure 1-2 The output filter 80 in the embodiments, in addition to having to adjust the position of the zero in the transfer function of the output filter 80B to account for the different frequency content of the oversampled waveform 122 (shown in Figure 7 More specifically, the output filter 80B should have a transfer function that has a zero at the frequency at which the harmonic of the preset frequency f is expected to contain power.

[0101] For example, because the waveform 122 has 10 samples per cycle, we would expect the initial harmonic to be the ninth harmonic. Thus, when using that waveform 122, a transfer function that has a zero at the ninth harmonic would be useful. The cutoff frequency of the filter should also be adjusted accordingly, based on the set of harmonics that are expected to be present (which can be pre-calculated by taking a Fourier transform of the waveform being used).

[0102] Alternatively, the transfer function of the output filter 80B can also be designed to have a zero at the next frequency at which a harmonic of the preset frequency f is expected to contain power. In the case of the waveform 122, this would be the tenth harmonic.

[0103] The controller 40B controls the amplitude of the sinusoid at the output 100B of the output filter 80B by adjusting the output voltage of the DC power supply 50, 50B via its voltage control input, while maintaining a fixed ratio between the output voltages of each DC power supply. In the illustrated embodiment, this is done by writing appropriate control words to the DAC 42 and the DAC 42B, noting to maintain the required ratio of sin(72°) / sin(36°) as described above. In alternative embodiments, the second DAC 42B can be eliminated and replaced by a 1.618x hardware multiplier that is inserted between the output of the DAC 42 and the voltage control input of the second DC-DC converter 50B.

[0104] In alternative embodiments, the transformer 70 can be omitted, Figure 5 The embodiments omit the transformer 70, in which case the two conductors output by the power switch 60B are connected directly to the two conductors input to the output filter 80B. In these embodiments, current flows directly from the output of the power switch 60B to the input of the output filter 80B, without an intervening transformer. But for the same reasons discussed above in connection with Figure 1 the transformer 70, these embodiments are less preferred.

[0105] Note that the system described above is applicable to generating high voltage signals of any shape, provided that the sequence of pulses that will result in those signals can be determined by calculation or experiment prior to use, and the filter designed accordingly.

[0106] When the system-generated output signal is applied to the electrodes to generate TTFields (as described in patent 7,805,201), the load associated with the patient's body and the sensor array can change due to the interaction with the output filter. This means that any change to this load (e.g., removal of an intervertebral disc from the patient's body, short circuit, etc.) will immediately affect the output signal, which is continuously detected. It is therefore possible for the device to respond very quickly to these changes (e.g., by shutting down the power switch 60 in response to detection of a short circuit or overload condition).

[0107] Notably, in the embodiments described above, the exact shape of the desired output signal is known in advance at every instant, since we are generating a sine wave at a known frequency. Based on the controller's response to external inputs (e.g., current measurements or temperature measurements), only the amplitude of the output signal changes over time. The embodiments described above can be advantageously used to generate very clean, narrow-band limited signals in the frequency range of 100-500 kHz, with very low losses and very low sensitivity to the external load to which the signal generator is connected.

[0108] In alternative embodiments, by constructing the filter using components with adjustable reactance (e.g., adjustable capacitance or adjustable inductance), the system can be used to generate a sinusoidal curve at any desired frequency within a preset range. In these embodiments, the reactance of the adjustable components is set so that the filter has the desired transfer function characteristics. Then, as discussed above in connection with Figure 1 and 5 the appropriate oversampled sinusoidal curve is generated and fed into the filter.

[0109] In other alternative embodiments, the system can be used to generate a limited number of predefined signals at a plurality of different preset frequencies. These embodiments can be implemented by saving the characteristics of the pulse sequence of each predefined signal in a lookup table, and providing a set of filters that can be selectively switched into the signal path in order to provide the filtering characteristics necessary to generate the desired one of the predefined signals. When one of the predefined signals is to be generated using the system, the characteristics of the required pulse sequence are retrieved from memory, and the appropriate filter (i.e., the filter that matches the pulse sequence) is switched into the signal path.

[0110] In other alternative embodiments, a composite signal containing a small number of discrete frequencies (e.g., between two and five frequencies) can be generated by generating an oversampled version of the composite signal, and passing the oversampled version of the composite signal through an appropriate filter.

[0111] In the embodiments described above Figure 1 and Figure 5In this embodiment, depending on the configuration of the DC-DC converters 50 / 50B, high-frequency artifacts (e.g., spikes) may appear on the outputs 100 / 100B when the output voltages of those DC-DC converters change (e.g., when the controller 40 / 40B writes a new control word to the DAC 42 / 42B). And because high-frequency artifacts can cause unpleasant sensations in people treated with TTFields therapy, it is preferable to take steps to prevent such high-frequency artifacts.

[0112] One suitable method to prevent high-frequency artifacts on the 100 / 100B output is to intentionally slow down the response time of the DC-DC converter 50 / 50B (e.g., by adding sufficiently large capacitors across the output of each DC-DC converter). However, while this method is effective, it has two drawbacks: first, additional components must be included in the circuit; and second, slowing down the system's response time will prevent rapid changes in the output voltage, especially in situations where rapid changes are expected.

[0113] Figure 8-10 An alternative method is described to prevent high-frequency artifacts on the output 100 / 100B without intentionally slowing down the response time of the DC-DC converter 50 / 50B.

[0114] More specifically, Figure 8 It describes the conditions under steady-state conditions (e.g., when Figure 1 When the voltage at the output of the DC-DC converter 50 remains constant at 20 VDC, this means Figure 1 (The controller 40 in the middle is not updating the contents of DAC 42) combined with the above. Figure 3 The same waveform 112 described (which appears in) Figure 1 The output of the power switch 60 in the middle) and the sine output waveform 115 (which appears at the ... Figure 1 (At output 100 of output filter 80). In this steady-state condition, the output waveform 115 will be as described above. Figure 1-4 It will operate as described and will not include any high-frequency artifacts.

[0115] Figure 9 This illustrates how things change when a DC-DC converter with a fast response time is used, and the DC-DC converter 50 ( Figure 1 The output (shown in the diagram) changes from 20 VDC to 40 VDC. As shown above... Figure 1 As explained, controller 40 can initiate this change by updating the contents of DAC 42 at time t9. Before time t9, the output waveform 215 will be... Figure 8The output waveform 115 in the example is the same. But once the controller 40 updates the contents of the DAC 42 at time t9, because the output of the DAC 42 is applied to the voltage-controlled input of the DC-DC converter 50, the output voltage of the DC-DC converter will quickly start to change (e.g., from 20 V to 40 V in the illustrated example). And because the power switch 60 is set to actively provide current from the DC-DC converter 50 into the transformer 70 at that instant t9, the rapid change in current will pass through the transformer 70 and into the output filter 80, which will add the high-frequency artifact 215 to the output 100 (note that the dashed line 222 represents the continuation of the original sinusoid that existed before t9, and the dashed line 220 represents the clean sinusoid at twice the original amplitude).

[0116] A similar situation exists when the design of the DC-DC converter is such that spikes and / or instability can occur on the output of the DC-DC converter in response to changes in the voltage-controlled input of the DC-DC converter (regardless of the response time of the DC-DC converter). More specifically, if the power switch 60 is set to actively provide current from the DC-DC converter 50 into the transformer 70 at the instant that the voltage-controlled input of the DC-DC converter changes, any spikes on the output of the DC-DC converter will pass through the transformer 70 and into the output filter 80, which will add the high-frequency artifact 215 to the output 100.

[0117] In some cases, high-frequency artifacts can be added to the output 100 if the output voltage of the DC-DC converter changes during the time interval when the power switch 60 is set to actively provide current from the DC-DC converter 50 / 50B into the transformer 70. On the other hand, high-frequency artifacts will not occur at the output 100 if the output of the DC-DC converter changes during the time interval when the power switch 60 is not actively providing current from the DC-DC converter 50 / 50B into the transformer 70. Figure 1 The controller 40 / 40B in the example embodiment can utilize this dichotomy to prevent high-frequency artifacts from occurring on the output 100 / 100B. More specifically, the controller 40 / 40B does this by ensuring that the output of the DC-DC converter 50 / 50B only changes during the interval when the power switch 60 / 60B is not actively sourcing current from the DC-DC converter.

[0118] In the above-described Figure 1In the context of this embodiment, the controller 40 accomplishes this by preventing adjustment of the voltage-controlled input of the DC-DC converter 50 when: (a) a first control signal is being applied to the control input of the power switch 60 (i.e., when the power switch 60 routes the output of the DC-DC converter 50 to the primary of the transformer 70 in one direction) or (b) a second control signal is being applied to the control input of the power switch 60 (i.e., when the power switch 60 routes the output of the DC-DC converter 50 to the primary of the transformer 70 in the opposite direction). When neither the first nor the second control signal is being applied to the control input, the power switch 60 remains disconnected, in which case the controller 40 can adjust the voltage-controlled input of the DC-DC converter 50 without introducing high-frequency artifacts at the output 100.

[0119] Figure 10 This illustrates the change in voltage from 20 VDC to 40 VDC during time t10 when the output of DC-DC converter 50 does not actively draw current from the DC-DC converter by power switch 60. Figure 1 How this unfolds within the context of the embodiment. Before time t10, the output of DC-DC converter 50 will be at a first level (e.g., 20 V in the illustrated example), and the output waveform 315 will be... Figure 8 The output waveform 115 in the example is the same. Controller 40 updates the contents of DAC 42 at time t10, at which time power switch 60 does not actively supply current from DC-DC converter 50 to transformer 70. The output voltage of DC-DC converter 50 will begin to change rapidly (e.g., from 20 V to 40 V in the illustrated example) and will stabilize before power switch 60 starts routing current to transformer 70 at t11. Because the output of DC-DC converter 50 has stabilized when power switch 60 starts routing current to transformer 70 at t11, the waveform entering the output filter after t11 will be an oversampled sine wave with a different amplitude (e.g., 40 V). And as combined with the above... Figure 1-4 As explained, when an oversampled sine wave is provided to the output filter 80, the resulting output 100 will be a very clean sine curve.

[0120] Similarly, as described above Figure 5 In the context of this embodiment, controller 40B prevents high-frequency artifacts on output 100B by ensuring that the output of any given DC-DC converter 50 / 50B changes only during intervals when power switch 60 is not actively drawing current from the given DC-DC converter. Controller 40B accomplishes this by not adjusting the output voltage of any DC power supply while its output is being routed to the output terminals of power switch 60.

[0121] Figure 11 is a block diagram of a third embodiment of a sinusoid generator that generates a sinusoid with controllable amplitude at a pre-set frequency f. Components with like reference numbers operate in a similar manner to the corresponding components described above in connection with Figure 1-5

[0122] This embodiment uses two DC-DC converters 51, 52. Each of these DC-DC converters is configured to multiply an analog voltage-controlled input signal by a fixed number (e.g., 10). In this example, when a 1 V voltage-controlled signal is applied, the output will be 10 V, and when a 5 V voltage-controlled signal is applied, the output will be 50 V, with proportional control between the two. Thus, the output of the DC-DC converters 51, 52 can take any value between 0 and 50 V, depending on the voltage applied to the analog voltage-controlled input (e.g., 0-5 V). The controller 40C controls the output voltage of the DC-DC converters 51, 52 by writing control words to the DACs 42, 42B. The DACs then generate analog voltages proportional to the control words, and these analog voltages are applied to the voltage-controlled inputs of the DC-DC converters 51, 52.

[0123] The controller 40C is responsible for generating control signals that cause the power switch 60B to apply these voltages to the transformer 70 in the order described below.

[0124] Figure 6 is a block diagram of a preferred method for implementing the power switch 60B. This power switch is identical to Figure 5 the power switch 60B of the embodiment. More specifically, this power switch 60B uses a set of six electronically controlled switches 61-66 connected to the primary of the transformer 70 as Figure 6 depicted in the figure. These switches 61-66 are opened and closed in response to signals applied to control inputs 68.

[0125] To route the output of the first DC-DC converter 51 to the primary of the transformer 70 in the first direction, only switches 63 and 62 should be closed. The power switch 60B is configured so that this happens in response to a first state of the control input. To route the output of the first DC-DC converter 51 to the primary of the transformer 70 in the opposite direction (i.e., with opposite polarity), only switches 61 and 64 should be closed. The power switch 60B is configured so that this happens in response to a second state of the control input.

[0126] ​To route the output of the second DC-DC converter 52 to the primary of the transformer 70 in the first direction, only switches 65 and 62 should be closed. The power switch 60B is configured such that this occurs in response to a third state of the control input. To route the output of the second DC-DC converter 52 to the primary of the transformer 70 in the opposite direction (i.e., with opposite polarity), only switches 61 and 66 should be closed. The power switch 60B is configured such that this occurs in response to a fourth state of the control input. When all six of these switches 61-66 are open, no power is routed into the primary of the transformer 70. The power switch 60B is configured such that this occurs in response to a fifth state (also referred to herein as an additional state) of the control input.

[0127] The controller 40C has the ability to operate in a first mode or a second mode. In the first mode, the controller 40C generates an output waveform 100C that is powered exclusively by the first DC-DC converter 51 by setting the control input of the power switch 60B to the first and second states in an alternating sequence while holding the first voltage-controlled input constant. In some preferred embodiments, a waveform similar to the waveform 112 in Figure 3 The waveform in can be generated by (a) placing the control input in the first state for a duration of T / 3, and then (b) waiting for a duration of T / 6, then (c) placing the control input in the second state for a duration of T / 3, and then (d) waiting for a duration of T / 6, then repeating the sequence (a), (b), (c), and (d) continuously. The amplitude of this waveform will depend only on the output voltage of the DC-DC converter 51. Filtering of this waveform by the output filter 80 (which is the same as the output filter 80 in Figure 1-2 Embodiment) will result in a clean sinusoidal curve (as explained above in connection with Figure 1-4 ).

[0128] In the second mode, the controller 40C generates an output waveform 100C that is powered exclusively by the second DC-DC converter 52 by setting the control input of the power switch 60B to the third and fourth states in an alternating sequence while holding the second voltage-controlled input constant. In some preferred embodiments, a waveform similar to the waveform 112 in Figure 3 The waveform in can be generated by (e) placing the control input in the third state for a duration of T / 3, then (f) waiting for a duration of T / 6, then (g) placing the control input in the fourth state for a duration of T / 3, and then (h) waiting for a duration of T / 6, then repeating the sequence (e), (f), (g), and (h) continuously. The amplitude of this waveform will depend only on the output voltage of the DC-DC converter 52. Filtering of this waveform by the output filter 80 will result in a clean sinusoidal curve.

[0129] Figure 12 is illustrated Figure 11 The implementation facilitates rapid changes in the voltage of the output signal 100C by switching between the first and second modes. Trace 410 is the output voltage of the first DC-DC converter 51, trace 420 is the output voltage of the second DC-DC converter 52, and trace 430 is the output signal. Figure 11 At tO, the controller 40C begins operating in the first mode. In this mode, the output waveform 430 is exclusively powered by the first DC-DC converter 51 (which is set to 20 V in the illustrated example). As described above, the controller 40C controls the generation of the output waveform 430 by setting the control inputs of the power switch 60B to the first and second states in an alternating sequence (with wait times interspersed at appropriate times), while keeping the first voltage-controlled input constant.

[0130] While still operating in the first mode, the controller 40C pre-determines what the output voltage will be when it finally switches to the second mode. The controller 40C then issues a command at time tl that causes the output voltage of the second DC-DC converter 52 to move to the desired level. In the illustrated example, the desired level for the second DC-DC converter 52 is 40 V. Notably, the reaction time of the second DC-DC converter can be very slow because the second DC-DC converter is not being used at this time.

[0131] Preferably, after the output of the second DC-DC converter 52 has stabilized to the desired level, the controller 40C switches to the second mode. This transition from the first mode to the second mode occurs when the power switch 60B is in the fifth state and no current is being routed to the transformer 70. In the second mode, the output waveform 430 is exclusively powered by the second DC-DC converter 52 (which is set to 40 V in the illustrated example). As described above, the controller 40C controls the generation of the output waveform 430 by setting the control inputs of the power switch 60B to the third and fourth states in an alternating sequence (with wait times interspersed at appropriate times), while keeping the second voltage-controlled input constant. Preferably, the command to initiate the voltage change of the second DC-DC converter 52 (i.e., at tl in FIG. 4) occurs sufficiently in advance (e.g., at least 1 ms) of the controller 40C switching to the second mode (i.e., at t2 in FIG. 4) to allow the output of the second DC-DC converter 52 to stabilize at the desired level so that the output waveform 430 will immediately reach the desired level when the second mode begins at t2. Figure 12 Figure 12

[0132] ​​A similar process occurs when transitioning back to the first mode from the second mode. More specifically, while still operating in the second mode, the controller 40C determines in advance what the output voltage will be when it finally switches to the first mode. The controller 40C then issues a command at time t3 which causes the output voltage of the first DC-DC converter 52 to move to the desired level. In the illustrated example, the new desired level for the first DC-DC converter 51 is 10 V. Notably, the reaction time of the first DC-DC converter can be very slow because the first DC-DC converter is not being used at this time.

[0133] Preferably, the controller 40C switches to the first mode after the output of the first DC-DC converter 51 has stabilized to the desired level. This transition from the second mode to the first mode occurs when the power switch 60B is in the fifth state and no current is being routed to the transformer 70. In the first mode, the output waveform 430 is exclusively powered by the first DC-DC converter 51 (which is set to 10 V in the illustrated example). As described above, the controller 40C controls the generation of the output waveform 430 by setting the control inputs of the power switch 60B to the first and second states in an alternating sequence (with wait times interspersed at appropriate times) while keeping the first voltage-controlled input constant. Preferably, the command to initiate the voltage change of the first DC-DC converter 51 (i.e., t3 in FIG. 4B) occurs sufficiently in advance of the controller 40C switching to the first mode (i.e., t4 in FIG. 4B) to allow the output of the first DC-DC converter 51 to stabilize at the desired level so that the output waveform 430 will immediately reach the desired level when the first mode begins at t4. Figure 12 Figure 12 Preferably, the controller 40C switches to the first mode after the output of the first DC-DC converter 51 has stabilized to the desired level. This transition from the second mode to the first mode occurs when the power switch 60B is in the fifth state and no current is being routed to the transformer 70. In the first mode, the output waveform 430 is exclusively powered by the first DC-DC converter 51 (which is set to 10 V in the illustrated example). As described above, the controller 40C controls the generation of the output waveform 430 by setting the control inputs of the power switch 60B to the first and second states in an alternating sequence (with wait times interspersed at appropriate times) while keeping the first voltage-controlled input constant. Preferably, the command to initiate the voltage change of the first DC-DC converter 51 (i.e., t3 in FIG. 4B) occurs sufficiently in advance of the controller 40C switching to the first mode (i.e., t4 in FIG. 4B) to allow the output of the first DC-DC converter 51 to stabilize at the desired level so that the output waveform 430 will immediately reach the desired level when the first mode begins at t4.

[0134] In alternative embodiments, the transformer 70 can be omitted, in which case the two conductors at the output of the power switch 60B are directly connected to the two conductors at the input of the output filter 80. In these embodiments, current flows directly from the output of the power switch 60B to the input of the output filter 80 without an intervening transformer. But for the same reasons discussed above in connection with the Figure 11 Figure 1

[0135] ​​​TTFields therapy involves inducing electric fields (e.g., at 200 kHz) through a target body part in order to treat a tumor of that body part. Experiments have shown that the efficacy of TTFields increases when the direction of the TTFields is changed during the course of treatment. For example, in the prior art Optune® system, the direction of the TTFields is changed once every 1 s. But in alternative embodiments, the direction can be changed at different rates (e.g., between 50 ms and 10 s).

[0136] Figure 13 is a block diagram of the original Optune® prior art system for applying TTFields to a human head (or other body part) in two different directions. This is accomplished by using a pair of transducer arrays 25A, 25P positioned in front and back (i.e., anterior and posterior) of the head and another pair of transducer arrays 25L, 25R positioned on the left and right sides of the human head. More specifically, when an AC voltage is applied between the transducer arrays 25L and 25R, an electric field will be induced in the subject's head that extends primarily in the left-to-right (LR) direction. And when an AC voltage is applied between the transducer arrays 25A and 25P, an electric field will be induced in the subject's head that extends primarily in the anterior-to-posterior (AP) direction. TTFields can also be applied to other parts of the body (e.g., pancreas, lung, etc.) by positioning the transducer arrays of the subject's skin in front of / rear of the relevant body part and right / left of the relevant body part.

[0137] In Figure 13 embodiments, a single AC voltage generator 20 is used to drive both pairs of transducer arrays (i.e., 25L / R and 25A / P). This is accomplished by routing the output of the AC voltage generator 20 into a switch 22. Depending on the state of a control signal, the switch 22 will route the signal from the AC voltage generator 20 across one pair of transducer arrays (i.e., 25L / R) or the other pair of transducer arrays (i.e., 25A / P).

[0138] Figure 14 is a timing diagram showing the sequencing between the two directions LR and AP used in the original Optune®. In this approach, the switch 22 will (a) route the output of the AC voltage generator 20 to the left and right transducer arrays (25L / R) for one second, then (b) route the output of the AC voltage generator 20 to the anterior and posterior transducer arrays (25A / P) for one second, and then repeat steps (a) and (b) in an alternating sequence. A short duration (e.g., 5-10 ms) during which the output of the AC voltage generator 20 is not routed to either pair of transducer arrays (25L / R, 25A / P) is inserted between each step (indicated by the label OFF).

[0139] Combination Figure 15 This explains a problem addressed during the original Optune® design. More specifically, if switch 22 switches from the OFF state to the LR or AP state (track 525), and the instantaneous output voltage 520 generated by the AC voltage generator 20 is quite large (e.g., > 10 V), the output waveform will resemble track 530, which includes a spike 532. Because such a spike 532 could cause discomfort to the user, the original Optune® was designed to prevent such spikes from occurring. More specifically, this is accomplished by ramping down the output voltage of the AC voltage generator 20 from its steady-state value to zero V during a 100 ms interval before each OFF state, and then ramping it back up to its steady-state value during a 100 ms interval after each OFF state, as shown below. Figure 16A The trajectory depicted in the image is 540. The ramp rate is approximately 1 V / ms, which is slow enough to avoid spikes that the patient might notice.

[0140] The waveform obtained at the output of AC voltage generator 20 is similar to... Figure 16B The waveforms depicted (except that the actual frequency of the sine wave generated by AC voltage generator 20 will be several orders of magnitude higher than the depicted sine wave). Note that... Figure 16B The scale of the x-axis relative to Figure 16A The image has been magnified 4x to show additional details. Furthermore, this solution works quite well in the original Optune® environment, as the system operates at its peak output voltage 80% of the time and spends only 20% of the time at ramp-up, ramp-down, or shutdown voltages.

[0141] Now, let's examine what would happen if we used a similar method, but reduced the interval at which the AC voltage was applied to the LR or AP transducer array from 1 s to 0.25 s. What would happen if we used the above combination at that new timescale? Figure 16A Using the same 1 V / ms ramp-up and ramp-down method described, the output voltage of AC voltage generator 20 will follow... Figure 17A The trajectory is 550. And as a result, the waveform at the output of AC voltage generator 20 will be similar to... Figure 17B The waveform depicted (except that the actual frequency of the sine wave generated by AC voltage generator 20 will be several orders of magnitude higher than the depicted sine wave). Note that... Figure 17B The scale of the x-axis relative to Figure 17A It has been magnified 4 times to show additional details.

[0142] However, this solution is not ideal because the peak output voltage will only be applied to the sensor array for 20% of the time, meaning the maximum electric field will only be applied to the subject for 20% of the time. Therefore, unlike... Figure 16A The prior art scenario depicted in Figure 17 A / B (where the output voltage is ramped / ramped to ensure patient comfort, and this ramp only slightly reduces the percentage of time spent at peak voltage) would significantly reduce the percentage of time spent at peak voltage when the switching time is reduced to 0.25 s using the same ramp slope (as depicted in Figure 17 A / B). Furthermore, the situation would be even worse if the interval between applying AC voltage to the LR or AP transducer array were reduced to below 0.20 s, in which case the peak voltage (and corresponding peak field strength) would never be reached.

[0143] Figure 18 The embodiments use different methods to avoid similar Figure 15 The peak 532 described in the text. More specifically, Figure 18 The embodiment includes an AC voltage generator 30 and a switch 32, and relies on synchronization between those two functional blocks to avoid spikes, as combined below. Figure 19-23 As described. In some preferred embodiments, Figure 18 The AC voltage generator 30 in the middle uses the above combination Figure 1-7 The method described is used to implement this. Switch 32 is configured to: (a) route the output of AC voltage generator 30 to the left and right transducer arrays (25L / R) in response to a first state of its control input; (b) route the output of AC voltage generator 30 to the front and rear transducer arrays (25A / P) in response to a second state of its control input; or (c) remain open in response to a third state of its control input. Switch 32 can be implemented using any of a variety of methods that will be obvious to those skilled in the art, including but not limited to field-effect transistors, solid-state relays, etc.

[0144] In the illustrated embodiment, synchronization between the AC voltage generator 30 and the switch 32 is achieved using a synchronization controller 35. The synchronization controller 35 is programmed to send control signals to the AC voltage generator 30 and / or the switch 32 to configure those components, causing the generation of signals with the timing relationships described below. Various alternative methods can be used to synchronize the AC voltage generator 30 and the switch 32. For example, synchronization can be achieved by allowing the AC voltage generator 30 to operate freely and adjusting the switching time of the switch 32 (as described below). Figure 20 (As described). Alternatively, synchronization can be achieved by allowing switch 32 to switch automatically and shutting down AC voltage generator 30 before each switching event (as described below). Figure 21(As described). Another alternative for achieving synchronization is to control the timing of both the AC voltage generator 30 and the switch 32.

[0145] Figure 19 It is shown Figure 18 A timing diagram of the sequence between the two directions LR and AP in the embodiment. In this embodiment, switch 32 (a) routes the output of AC voltage generator 30 to the left and right transducer arrays (25L / R) for a duration T, and then (b) routes the output of AC voltage generator 30 to the front and rear transducer arrays (25A / P) for a duration T, and then repeats steps (a) and (b) in an alternating order. A short duration (e.g., 5-10 ms) during which the output of AC voltage generator 30 is not routed to either pair of transducer arrays is inserted between each step (indicated by the label OFF). This can be orchestrated by repeatedly adjusting the control input of switch 32 in a repeating sequence through LR mode, AP mode, and OFF mode: (1) LR mode, (2) OFF mode, (3) AP mode, and (4) OFF mode.

[0146] In this embodiment, the duration T can be much shorter than 1 s because the output voltage of the voltage generator 30 does not slowly ramp up and down (as in the prior art embodiment described above in conjunction with Figure 16). Instead, the output of the AC voltage generator 30 either remains constant at its full value (as described below in conjunction with Figure 16). Figure 20 (as described), or immediately jump to its full value after switch 32 toggles its state (as described below). Figure 21 (As described). In any case, the signal applied to the transducer array 25A / P, 25L / R will be at its full value for the vast majority of the time (e.g., >90% or >95% of the time). And maintaining stronger TTFields for a larger percentage of the time can advantageously improve the efficacy of TTFields therapy. In some embodiments, the duration T is greater than 20 ms. In some embodiments, the duration T is between 0.1 and 0.5 s. In some embodiments, the duration T is between 0.2 and 0.3 s. It is worth noting that, in conjunction with the above... Figure 17A In contrast to the scenario described in / B, the system operates at its full output voltage for a large percentage of the time, regardless of how short the duration T is.

[0147] Figure 20A first method for achieving synchronization between the AC voltage generator 30 and the switch 32 is depicted, which operates by controlling the timing of the transition of the switch 32 from the OFF state to the LR state or the AP state (indicated by the trajectory 635) so that the transition coincides with a time window during which the instantaneous amplitude of the output of the AC voltage generator is small enough so that the jump from the OFF state to the small voltage will not cause the subject being treated to experience a perceptible sensation.

[0148] The threshold of perceived voltage can vary from person to person and can also depend on which parts of the body are in contact with the transducer array. For example, on various parts of the body, a jump from the OFF state to 1 V, 1.5 V, 2 V, 2.5 V, 3 V, 3.5 V, 4 V, 4.5 V, or 5 V will not be perceptible. Thus, to prevent the switching from causing a perceptible sensation, the transition from the OFF state to the LR state or the AP state should be timed to coincide with a time window during which the instantaneous output amplitude of the AC voltage generator is less than or equal to those thresholds. In this approach, the output voltage of the AC voltage generator 30 can remain at its full steady-state value for 100% of the time, as depicted by the trajectory 630. In some preferred embodiments, the transition occurs when the instantaneous output amplitude of the AC voltage generator is less than 1 V.

[0149] For example, assume that the threshold of perception for a given subject is 5 V, and that the output of the AC voltage generator 30 is 100 V peak-to-peak (which means that the instantaneous output value of the AC voltage generator 30 will range between +50 and -50 V). For the first 5.7° of each 360° cycle, the middle 11.4° of each 360° cycle, and the last 5.7° of each 360° cycle, the instantaneous output amplitude of the AC voltage generator will be less than 5 volts. By limiting the switching of the switch 32 from the OFF state to the LR state or the AP state to these specific time windows, the signals 640 applied to the transducer array (25L / R or 25A / P) will never have any spikes with an amplitude greater than 5 V, which means that they will not be perceptible to the subject. Note that when the AC voltage generator is operating at 200 kHz, 11.4° corresponds to 0.16 μs, and this window is long enough to facilitate synchronization by aligning the switching of the switch 32 with the specific time windows identified in this paragraph.

[0150] In some preferred embodiments, the switching of switch 32 from the OFF state to the LR state or the AP state is limited to those time windows in which the AC voltage generator's instantaneous output amplitude is less than 1 V. Assuming the same 100 V peak-to-peak output voltage, the AC voltage generator's instantaneous output will have an amplitude of less than 1 V for the first 1.1° of each cycle, the middle 2.2° of each cycle, and the last 1.1° of each cycle. By limiting the switching of switch 32 from the OFF state to the LR state or the AP state to these specific time windows, the signal 640 applied to the transducer array (25L / R or 25A / P) will never have any spikes with an amplitude greater than 1 V. As will be appreciated by those skilled in the art, the timing of switch 32 can be similarly adjusted for other threshold values.

[0151] In Figure 20 the example illustrated in FIG. 6A, the output voltage of AC voltage generator 30 remains at its full steady state value for 100% of the time, as depicted by trace 630. In this case, the signal 640 applied to the transducer array (25L / R or 25A / P) jumps immediately to its full steady state output voltage as soon as switch 32 opens. Thus, the signal applied to the transducer array 25A / P, 25L / R is at its full value almost all of the time. And as noted above, maintaining the TTFields at a higher percentage of the time can advantageously increase the efficacy of the TTFields treatment. Note, however, that during the initial portion of the LR or AP state, the output voltage of AC voltage generator 30 is not critical, and in alternative embodiments, it is acceptable if the output voltage of the AC voltage generator drops to some extent. But after the electronic switch switches from the OFF state to the LR state or the AP state, the output of AC voltage generator 30 should preferably reach at least 80% of the AC voltage generator's steady state output voltage within 20 ms. In some preferred embodiments, this occurs within 5 ms. And in some preferred embodiments, this occurs within 1 ms.

[0152] When switch 32 switches back to the OFF state from the LR state or the AP state, a similar synchronization of the switching of switch 32 to the low amplitude portions of the AC voltage generator output sine curve (i.e., amplitudes less than or equal to 1 V, 1.5 V, 2 V, 2.5 V, 3 V, 3.5 V, 4 V, 4.5 V, or 5 V) is preferably implemented.

[0153] Figure 21 depicts a method for implementing Figure 18A second method of synchronization between the AC voltage generator 30 and the switch 32. This method operates by reducing the instantaneous output voltage of the AC voltage generator 30 to an amplitude less than 5 V prior to the switch 32 switching from the OFF state to the LR state or the AP state, in order to prevent a spike from appearing on the conductors leading to the transducer arrays 25L / R and 25A / P when the switch 32 switches state. In some preferred embodiments, the amplitude of the instantaneous output voltage of the AC voltage generator 30 is reduced to less than 1 V (e.g., to 0 V) prior to the switching of the switch 32.

[0154] When any of the embodiments described above in connection with Figure 1-6 and Figure 10-12 are used as the AC voltage generator, it is easy to implement a reduction of the output voltage of the AC voltage generator 30 to 0 V. For example, when using the AC voltage generator of Figure 1 and Figure 2 , by ensuring that neither the first control signal nor the second control signal is applied to the control input of the power switch 60, its output can be set to zero, which means that all switches (i.e., switches 61-64) in the power switch 60 will remain open. Similarly, when using the AC voltage generator of Figure 5 and Figure 6 , by sending a control signal to the power switch 60B that causes all switches (i.e., switches 61-66) in the power switch 60B to open, its output can be set to zero.

[0155] In Figure 21 , the upper trace 650 depicts the output of the AC voltage generator 30; the middle trace 655 depicts the state of the switch 32; and the lower trace 660 depicts one of the outputs of the switch 32 (LR or AP). Assume that the switch 32 starts in the OFF state, and at t20, the switch 32 will be set to route the output of the AC voltage generator 30 to either the LR pair of transducer arrays 25L / R or the AP pair of transducer arrays 25A / P. At some time before t20, a control signal is sent to the AC voltage generator 30 to reduce the output voltage of the AC voltage generator 30 to zero. Because the output of the AC voltage generator 30 is 0 V when the switch 32 is switched at t20, at that time there will be no spike on the conductors leading to the transducer arrays 25L / R and 25A / P.

[0156] After a short time interval (e.g., < 0.1 ms), at t21, the synchronization controller 35 (see Figure 18 ) begins sending control signals to the AC voltage generator 30 (e.g., as described above in connection with Figure 1-6 and 10-12), which causes the AC voltage generator 30 to begin generating the sinusoid 650. Because of the construction of the AC voltage generator (e.g., as described above in connection withFigure 1-6 (as described in 10-12), and especially Figure 1-5 In this embodiment, the output filter 80 / 80B and AC voltage generator 30 will not introduce any spikes at t21 on output 650, and therefore no spikes will propagate to output 660. Furthermore, because switch 32 has stabilized to its current state, switch 32 will not introduce any spikes at output 660 (which is fed to transducer arrays 25L / R or 25A / P) at t21.

[0157] It is worth noting that, such as Figure 21 As described, the output voltage 650 of the AC voltage generator 30 preferably jumps immediately to its fully steady-state output voltage without a ramp-up period. Therefore, the signals applied to the transducer array 25A / P, 25L / R will remain almost entirely at their full values. Furthermore, as mentioned above, maintaining stronger TTFields for a larger percentage of the time can advantageously improve the efficacy of TTFields therapy. Figure 22 The graph depicts the immediate jump to the fully steady-state output voltage over a longer timescale, contrasting sharply with the prior art configuration depicted in Figure 16. However, it should be noted that the output voltage of the AC voltage generator 30 is not critical during the initial period of the LR or AP state, and in alternative embodiments, it is acceptable if the output voltage of the AC voltage generator does not immediately jump to its fully steady-state voltage. However, after the electronic switch switches from the OFF state to the LR or AP state, the output of the AC voltage generator 30 should preferably reach at least 80% of the steady-state output voltage of the AC voltage generator within 20 ms. In some preferred embodiments, this occurs within 5 ms. And in some preferred embodiments, this occurs within 1 ms.

[0158] Figure 21 An exemplary method for synchronizing the AC voltage generator 30 and switch 32 is also described when the time for switching from the LR state or AP state to the OFF state arrives. At time t22, the AC voltage generator 30 generates a sine wave with its fully steady-state output voltage, and switch 32 remains set to route the output of the AC voltage generator 30 to either the LR pair transducer array 25L / R or the AP pair transducer array 25A / P. At time t23, the controller stops generating signals to the power switch 60 / 60B (as described above). Figure 1-6and described above with respect to FIG. 10-12), which causes the output of the AC voltage generator 30 to drop to 0 V. And due to the construction of the AC voltage generator described above, no spike will appear on the output 650 at t23, which means that no spike will appear on the output 660 of the switch 32. After a short time interval (e.g., < 0.1 ms), at t24, the switch 32 is set to the OFF state. And because the output of the AC voltage generator 30 is 0 V at t24, no spike will be introduced on the conductor extending between the switch 32 and the transducer array 25 at t24.

[0159] In the embodiments described above with respect to FIG. 10-12, the switch 32 (a) routes the output of the AC voltage generator 30 to the left and right transducer arrays (25L / R) for a duration T, and then (b) routes the output of the AC voltage generator 30 to the front and back transducer arrays (25A / P) for a duration T, and then repeats steps (a) and (b) in an alternating sequence. A short duration (e.g., 5-10 ms) is inserted between each step during which the output of the AC voltage generator 30 is not routed to either pair of transducer arrays. This is choreographed by repeatedly adjusting the control input of the switch 32 to cycle through the LR mode, the AP mode, and the OFF mode in the following repeating sequence: (1) LR mode, (2) OFF mode, (3) AP mode, and (4) OFF mode. Figure 18 and 19 In the embodiments described above with respect to FIG. 10-12, the switch 32 (a) routes the output of the AC voltage generator 30 to the left and right transducer arrays (25L / R) for a duration T, and then (b) routes the output of the AC voltage generator 30 to the front and back transducer arrays (25A / P) for a duration T, and then repeats steps (a) and (b) in an alternating sequence. A short duration (e.g., 5-10 ms) is inserted between each step during which the output of the AC voltage generator 30 is not routed to either pair of transducer arrays. This is choreographed by repeatedly adjusting the control input of the switch 32 to cycle through the LR mode, the AP mode, and the OFF mode in the following repeating sequence: (1) LR mode, (2) OFF mode, (3) AP mode, and (4) OFF mode.

[0160] In a variation of these embodiments, the OFF mode (i.e., the short duration during which the output of the AC voltage generator 30 is not routed to either pair of sensor arrays) is omitted. With this variation, the switch 32 (a) routes the output of the AC voltage generator 30 to the left and right transducer arrays (25L / R) for a duration T, and then (b) routes the output of the AC voltage generator 30 to the front and back transducer arrays (25A / P) for a duration T, and then repeats steps (a) and (b) in a two-step alternating sequence. This is choreographed by repeatedly adjusting the control input of the switch 32 to cycle through the LR mode and the AP mode in the following repeating sequence: (1) LR mode, (2) AP mode.

[0161] In this variation where the OFF mode is omitted, the duration T can also be much shorter than 1 s for the same reasons described above. And here again, in contrast to the scenario described above with respect to FIG. 10-12, the system operates at its full output voltage for a large percentage of the time (e.g., 100% of the time) regardless of the duration of T. Figure 17A

[0162] ​The transitions of switch 32 from LR state to AP state and from AP state to LR state are timed so that the transitions coincide with a time window during which the instantaneous amplitude of the AC voltage generator output is small enough so as not to cause the subject being treated to experience a perceptible sensation. More specifically, the transitions between LR and AP states should be timed to coincide with a time window during which the instantaneous output amplitude of the AC voltage generator is less than or equal to the same threshold value mentioned above in the embodiment including OFF state (e.g., 1.1° at the beginning of each cycle, 2.2° in the middle of each cycle, and 1.1° at the end of each cycle). Figure 18-20

[0163] Figure 23 A timing example is depicted that synchronizes the transitions of switch 32 (shown in Figure 18 ) between LR and AP states (indicated by the trajectory 675 in Figure 23 ) with the output (indicated by the trajectory 670) of the AC voltage generator 30 (shown in Figure 18 ) so that the transitions between LR and AP states coincide with a time window during which the instantaneous amplitude of the AC voltage generator 30 (trajectory 675) output is close to zero (e.g., < 5 V or < 1 V).

[0164] The embodiments described above in connection with Figure 18-22 facilitate making it possible to drive the sensor array at full power for a much larger percentage of time than prior art systems, without having to worry about introducing voltage spikes that can produce an unpleasant sensation on the person being treated. And driving the transducer array at full power can advantageously improve the efficacy of the treatment using TTFields.

[0165] Finally, although the embodiments described above in connection with Figure 18-23 discuss switching the AC voltage between a first pair of transducer arrays positioned at the front / back of the relevant body part and a second pair of transducer arrays positioned at the front / back of the relevant body part, the approach can be extended to more than two pairs of transducer arrays. For example, a third pair of transducer arrays can be positioned above / below the relevant body part, in which case the AC voltage will be switched between the first, second, and third pairs of transducer arrays in a repeating order in a manner similar to the switching described above in connection with Figure 18-23 .

[0166] ​While the application has been disclosed with reference to certain embodiments, various modifications, changes and variations of the described embodiments can be made without departing from the spirit and scope of the application as defined in the following claims. Accordingly, it is intended that the application not be limited to the described embodiments, but that the application has the full scope as defined in the following claims and equivalents thereof.

Claims

1. An apparatus for generating an AC electrical signal applied to a first pair of electrodes and a second pair of electrodes, the apparatus comprising: An AC voltage generator with output; An electronic switch having an input for receiving the output of an AC voltage generator, a first power output, and a second power output, wherein the electronic switch is configured to (a) operate in a first mode that routes the output of the AC voltage generator to the first power output, and (b) operate in a second mode that routes the output of the AC voltage generator to the second power output, and wherein the electronic switch is further configured to cycle through a repeating sequence including the first mode and the second mode; and The controller is configured to synchronize the operation of the AC voltage generator and the electronic switch by controlling the switching timing of the electronic switch so that the switching coincides with the time window during which the instantaneous output amplitude of the AC voltage generator is less than 5V. This ensures that whenever the electronic switch switches to the first or second mode, the instantaneous output amplitude of the AC voltage generator is less than 5V. Within 20ms after the electronic switch is switched to the first or second mode, the output voltage of the AC voltage generator is at least 80% of the steady-state output voltage of the AC voltage generator.

2. The apparatus of claim 1, wherein the electronic switch is further configured to (c) operate in a third mode in which the output of the AC voltage generator is not routed to the first power output or the second power output, and (d) cycle through the first mode, the second mode and the third mode in the following repeating sequence: (1) the first mode, (2) the third mode, (3) the second mode, and (4) the third mode.

3. The apparatus of claim 1, wherein the controller is configured to synchronize the operation of the AC voltage generator and the electronic switch such that whenever the electronic switch switches to the first mode or the second mode, the instantaneous output amplitude of the AC voltage generator is less than 1V.

4. The apparatus according to claim 1, wherein within 5 ms after the electronic switch is switched to the first mode or the second mode, the output voltage of the AC voltage generator is at least 80% of the steady-state output voltage of the AC voltage generator.

5. The apparatus of claim 1, wherein within 1 ms after the electronic switch is switched to the first mode or the second mode, the output voltage of the AC voltage generator is at least 80% of the steady-state output voltage of the AC voltage generator.

6. The apparatus of claim 1, wherein during the transition of the electronic switch to the first mode or the second mode, the AC voltage generator continues to operate at its fully steady-state AC output voltage.

7. The apparatus of claim 1, wherein the controller further synchronizes the operation of the AC voltage generator and the electronic switch by controlling the AC voltage generator such that the output of the AC voltage generator is turned off whenever the electronic switch changes.

8. The apparatus of claim 1, wherein the electronic switch is configured to cycle through a first mode and a second mode in the following repeating sequence: (1) the first mode, (2) the second mode, and wherein the electronic switch is configured to switch directly from the first mode to the second mode and directly from the second mode to the first mode.

9. An apparatus for generating an AC electrical signal applied to a first pair of electrodes and a second pair of electrodes, the apparatus comprising: An AC voltage generator with output; An electronic switch having an input for receiving the output of an AC voltage generator, a first power output, and a second power output, wherein the electronic switch is configured to (a) operate in a first mode that routes the output of the AC voltage generator to the first power output, and (b) operate in a second mode that routes the output of the AC voltage generator to the second power output, and wherein the electronic switch is further configured to cycle through a repeating sequence including the first mode and the second mode. as well as The controller is configured to synchronize the operation of the AC voltage generator and the electronic switch by controlling the switching timing of the electronic switch so that the switching coincides with a time window during which the instantaneous output of the AC voltage generator has an amplitude below a threshold. This ensures that whenever the electronic switch switches to a first mode or a second mode, the instantaneous output of the AC voltage generator has an amplitude below a threshold at which the treated subject begins to experience a perceptible sensation. Within 20ms after the electronic switch is switched to the first or second mode, the output voltage of the AC voltage generator is at least 80% of the steady-state output voltage of the AC voltage generator.

10. The apparatus of claim 9, wherein the electronic switch is further configured to (c) operate in a third mode in which the output of the AC voltage generator is not routed to the first power output or the second power output, and (d) cycle through the first mode, the second mode and the third mode in the following repeating sequence: (1) the first mode, (2) the third mode, (3) the second mode, and (4) the third mode.

11. The apparatus of claim 9, wherein the controller is configured to synchronize the operation of the AC voltage generator and the electronic switch such that whenever the electronic switch switches to the first mode or the second mode, the instantaneous output of the AC voltage generator is less than 1V.

12. The apparatus of claim 9, wherein within 5 ms after the electronic switch is switched to the first mode or the second mode, the output voltage of the AC voltage generator is at least 80% of the steady-state output voltage of the AC voltage generator.

13. The apparatus of claim 9, wherein within 1 ms after the electronic switch is switched to the first mode or the second mode, the output voltage of the AC voltage generator is at least 80% of the steady-state output voltage of the AC voltage generator.

14. The apparatus of claim 9, wherein during the transition of the electronic switch to the first mode or the second mode, the AC voltage generator continues to operate at its fully steady-state AC output voltage.

15. The apparatus of claim 9, wherein the controller further synchronizes the operation of the AC voltage generator and the electronic switch by controlling the AC voltage generator such that the output of the AC voltage generator is turned off whenever the electronic switch changes.

16. The apparatus of claim 9, wherein the electronic switch is configured to cycle through a first mode and a second mode in a repeating sequence of (1) the first mode, (2) the second mode, and wherein the electronic switch is configured to switch directly from the first mode to the second mode and directly from the second mode to the first mode.

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