Deposition of low roughness diamond films

Abstract

A method of depositing a diamond layer is described, which method can be used in the manufacture of integrated circuits. The method includes processing a substrate, wherein nanocrystalline diamond is deposited on the substrate, wherein the processing method produces a nanocrystalline diamond hard mask having a high hardness.

Description

Technical Field

[0001] Embodiments of the present disclosure relate to methods of depositing nanocrystalline diamond films. More particularly, embodiments of the present disclosure relate to deposition of nanocrystalline diamond films during the manufacture of electronic devices, particularly integrated circuits (ICs). Background Art

[0002] As the semiconductor industry introduces new generations of integrated circuits (ICs) with higher performance and greater functionality, the density of components forming these ICs increases, while the size, dimensions, and spacing between individual components or elements are reduced. While in the past, this reduction was limited to the ability to define structures using photolithography, device geometries with dimensions measured in microns or nanometers have created new limiting factors, such as the conductivity of metal elements, the dielectric constant of insulating materials used between elements, or challenges in 3D-NAND or DRAM processes. These limitations can be addressed by more durable and higher hardness hard masks.

[0003] The direct way to reduce the cost per bit and increase chip density in 3D-NAND is to add more layers; but a single layer with higher durability and higher hardness will reduce processing time and cost. Traditionally, very high-quality hard mask films with high etch selectivity, high hardness, and high density are used. Current hard mask films include pure or doped plasma enhanced chemical vapor deposition (PECVD) amorphous carbon (aC:H) based films, which are based on high hardness and modulus properties, film transparency, and easy removal after slit etching. However, PECVD amorphous carbon hard mask films have delamination / peeling problems at the bevel (a major problem in downstream etching processes), the thicker the film, the less transparent it is (photoalignment problems), and poor morphology that causes columnar streaks, one-side bending, and columnar distortion.

[0004] Nanocrystalline diamond is known as a high hardness material and can be used as a hard mask in semiconductor device processing. Although nanocrystalline diamond hard mask films have high hardness and modulus, they have high surface roughness, which can cause diffraction during semiconductor processing lithography. Reducing this roughness can improve the quality of the lithography process and semiconductor device processing methods. Therefore, there is a need for a hard mask with high hardness and modulus but low surface roughness. Summary of the invention

[0005] In one embodiment, a method of depositing a diamond layer on a substrate comprises: generating a pulsed plasma in a gas mixture in a substrate processing chamber, the gas mixture comprising a first gas comprising H2, a second gas comprising CO2, a third gas selected from the group consisting of CH4, C2H2 and C2H4, and a fourth gas comprising an inert gas; and depositing a nanocrystalline diamond layer on the substrate, the nanocrystalline diamond layer having a thickness, roughness, hardness, and modulus.

[0006] In other embodiments, a method includes depositing a diamond layer on a surface of a substrate, the method including depositing a nanocrystalline diamond layer having a thickness, roughness, hardness, and modulus using a microwave plasma enhanced chemical vapor deposition process, wherein the roughness is less than 15 nm rms, and the surface of the substrate does not include a nanocrystalline diamond layer below the nanocrystalline diamond layer formed using the microwave plasma enhanced chemical vapor deposition process.

[0007] Other embodiments relate to a non-transitory computer-readable medium comprising instructions that, when executed by a controller of a substrate processing chamber, cause the substrate processing chamber to deposit a diamond layer on a substrate by a method comprising: generating a pulsed microwave plasma in a gas mixture in the substrate processing chamber, the gas mixture comprising a first gas comprising H2 in a range from 10 vol.% to 90 vol.% (e.g., 10 sccm to 96 sccm), a second gas comprising CO2, a third gas selected from the group consisting of CH4, C2H2, and C2H4, and a fourth gas comprising an inert gas in a range from 10 sccm to 90 sccm, the inert gas being selected from the group consisting of helium (He), nitrogen (N2), neon (Ne), argon (Ar), and combinations thereof, the third gas and the second gas together in a range from 2 vol.% to 10 vol.% (e.g., 2 sccm to 10 sccm); and depositing a nanocrystalline diamond layer on the substrate. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] In order to understand in detail the manner in which the above-mentioned features of the present disclosure are understood, a more specific description of the present disclosure briefly summarized above may be obtained by reference to the embodiments, some of which are shown in the accompanying drawings. However, it should be noted that the accompanying drawings only illustrate typical embodiments of the present disclosure and therefore should not be considered as limiting the scope thereof, as the present disclosure may allow other equivalent embodiments. The embodiments described herein are shown in the accompanying drawings by way of example and not limitation, wherein like reference numerals indicate like elements.

[0009] Figure 1A illustrates a cross-sectional view of a substrate according to one or more embodiments;

[0010] Figure 1B illustrates a cross-sectional view of a substrate according to one or more embodiments;

[0011] Figure 1C illustrates a cross-sectional view of a substrate according to one or more embodiments;

[0012] Figure 1D illustrates a cross-sectional view of a substrate according to one or more embodiments;

[0013] Figure 2 illustrates a cross-sectional view of a substrate processing chamber according to one or more embodiments; and

[0014] Figure 3 A flow chart illustrating a method according to one or more implementations. DETAILED DESCRIPTION

[0015] Before describing several exemplary embodiments of the present disclosure, it should be understood that the present disclosure is not limited to the details of construction or process steps set forth in the following description. The present disclosure is capable of other embodiments and can be practiced or implemented in various ways.

[0016] As used herein, "substrate" refers to any substrate or material surface formed on a substrate on which film processing is performed in a manufacturing process. For example, the substrate surface on which processing can be performed includes materials such as silicon, silicon oxide, strained silicon, silicon on insulator (SOI), carbon-doped silicon oxide, amorphous silicon, doped silicon, germanium, gallium arsenide, gallium nitride, glass, sapphire and any other materials such as metals, metal nitrides, metal alloys and other conductive materials depending on the application. Substrates include, but are not limited to, semiconductor wafers. The substrate may be exposed to a pretreatment process to polish, etch, reduce, oxidize, hydroxylate, anneal and / or bake the substrate surface. In addition to performing film processing directly on the surface of the substrate itself, in the present disclosure, any disclosed film processing steps may also be performed on the bottom layer formed on the substrate, as disclosed in more detail below, and the term "substrate surface" is intended to include the bottom layer indicated by the context. As an example of a film / layer or a portion of a film / layer having been deposited on a substrate surface, the exposed surface of the newly deposited film / layer becomes the substrate surface.

[0017] As used in this specification and the appended claims, the terms "precursor," "reactant," "reactant gas," and similar terms are used interchangeably to refer to any gaseous species that can react with a substrate surface.

[0018] As used herein, the phrase "nanocrystalline diamond" refers to a solid film of diamond typically grown on a substrate such as silicon. In one or more embodiments, nanocrystallinity is the result of an enhanced renucleation reaction in diamond growth, wherein the growth of diamond crystals is interrupted by fluctuations in the surrounding environment such as the amount of free radical species, temperature and pressure. In one or more embodiments, a nanocrystalline diamond layer is primarily composed of small diamond crystals in the form of nanospheres or nanocolumns and amorphous carbon that is typically distributed between surrounding crystals or aggregated in grain boundaries. Nanocrystalline diamond is used as a hard mask material in semiconductor applications because of its chemical inertness, optical transparency and good mechanical properties.

[0019] In one or more embodiments, microwave plasma enhanced chemical vapor deposition (MPECVD) is used to deposit a nanocrystalline diamond layer to solve the problem of providing a nanocrystalline diamond layer exhibiting low roughness and high hardness / modulus. In the MPECVD process, a hydrocarbon source, such as a gaseous hydrocarbon or liquid hydrocarbon vapor entrained in a carrier gas, is introduced into an MPECVD chamber. A plasma is then generated or formed in the chamber to produce excited CH radicals. The excited CH- radicals chemically bond to the surface of a substrate located in the chamber, forming the desired nanocrystalline diamond layer thereon. Any suitable thin film deposition system including a microwave plasma source may be used to perform the embodiments described herein with respect to the MPECVD process. Examples of suitable systems include those that may be used Processing chamber SYSTEM, PRECISION system, system, GTTM system, XP Precision TM system, SETM system, Processing chamber, and Mesa TM Processing chambers, all of which are commercially available from Applied Materials, Inc., Santa Clara, California. Other tools capable of performing the MPECVD process may also be adapted to benefit from the embodiments described herein. In addition, any system capable of performing the MPECVD process described herein may be used. Any equipment descriptions described herein are illustrative and should not be viewed or interpreted as limiting the scope of the embodiments described herein.

[0020] Device manufacturers using carbon-based hard mask layers need to meet the following requirements: (1) high selectivity of the hard mask during dry etching of the underlying material; (2) low film roughness; (3) low film stress; and (4) film stripping. As used herein, the term "dry etching" generally refers to an etching process in which the material is not dissolved by immersion in a chemical solution, and includes methods such as plasma etching, reactive ion etching, sputter etching, and vapor phase etching.

[0021] In one or more embodiments, a nanocrystalline diamond layer is formed on a substrate. The process of one or more embodiments advantageously produces a nanocrystalline diamond layer having high density, high hardness, high etch selectivity, low stress, and excellent thermal conductivity.

[0022] Hardmasks are used as etch stop layers in semiconductor processing. Ashable hardmasks have a chemical composition that allows them to be removed once they have served their purpose by a technique called ashing. Ashable hardmasks are typically composed of carbon and hydrogen, as well as trace amounts of one or more dopants (e.g., nitrogen, fluorine, boron, silicon). In a typical application, after etching, the hardmask has served its purpose and is removed from the underlying layer. This is usually done at least in part by ashing, also known as "plasma ashing" or "dry stripping." The substrate (usually a partially manufactured semiconductor wafer) with the hardmask to be ashed is placed in a chamber under vacuum, oxygen is introduced and subjected to radio frequency power, thereby generating oxygen radicals (plasma). The free radicals react with the hardmask, oxidizing it into water, carbon monoxide and carbon dioxide. In some cases, complete removal of the hardmask can be achieved by performing an additional wet or dry etching process after ashing, such as when the ashing hardmask leaves any residue that cannot be removed by ashing alone.

[0023] Hard mask layers are often used in narrow and / or deep contact etch applications where the photoresist may not be thick enough to mask the underlying layers. This is especially true as critical dimensions shrink.

[0024] V-NAND or 3D-NAND structures are used in flash memory applications. A V-NAND device is a vertically stacked NAND structure in which a large number of cells are arranged in blocks. As used herein, the term "3D-NAND" refers to an electronic (solid-state) non-volatile computer storage memory in which the memory cells are stacked in multiple layers. 3D-NAND memory typically includes multiple memory cells that include floating gate transistors. Traditionally, a 3D-NAND memory cell includes multiple NAND memory structures that are arranged in three dimensions around a bit line.

[0025] An important step in 3D-NAND technology is slit etching. As the number of layers increases in each technology node, in order to control the slit etching profile, the thickness of the hard mask film must be proportionally increased to withstand the high aspect ratio etching profile. Currently, amorphous carbon (aC:H) film is used because of its high hardness and easy peeling after slit etching. However, amorphous carbon hard mask film has delamination and poor morphology at the bevel, resulting in columnar stripes.

[0026] In one or more embodiments, nanocrystalline diamond is advantageously used as a hard mask in place of amorphous carbon. Nanocrystalline diamond hard mask films provide high hardness and high modulus, but can result in a high level of surface roughness. Therefore, in one or more embodiments, a method of processing a substrate is provided, wherein nanocrystalline diamond is used as a hard mask, wherein the processing method produces a smooth surface.

[0027] The processing methods of one or more embodiments advantageously maintain the hardness and modulus of the nanocrystalline diamond hard mask film while maintaining low surface roughness. Because the nanocrystalline diamond hard mask film has high hardness, high modulus and improved surface roughness, the film can be used as a hard mask to overcome the challenges faced by amorphous carbon-based films.

[0028] In one or more embodiments, the density and Young's modulus of the nanocrystalline diamond layer are improved to achieve greater etch selectivity. One of the main challenges in achieving greater etch selectivity and improved Young's modulus is the high compressive stress of such films, which makes them unsuitable for applications due to the resulting high wafer bow. Therefore, it is desirable to have a nanocrystalline diamond layer with high density and modulus (e.g., higher sp 3 content), high etch selectivity, and low stress (e.g., <500 MPa) nanocrystalline diamond films.

[0029] Embodiments described herein include improved methods for making nanocrystalline diamond hard mask films having high density (e.g., >1.8 g / cc), high Young's modulus (e.g., >150 GPa), and low stress (e.g., <-500 MPa). In one or more embodiments, the Young's modulus is measured at room temperature, or ambient temperature, or at a temperature in the range of about 22° C. to about 25° C. In one or more embodiments, the Young's modulus of the nanocrystalline diamond film may be greater than 250 GPa. In other embodiments, the Young's modulus of the nanocrystalline diamond film is greater than 300 GPa, greater than 325 GPa, or greater than 350 GPa.

[0030] In one or more embodiments, the processing chamber used can be any CVD processing chamber with a plasma source (e.g., remote, microwave, capacitively coupled plasma (CCP), or inductively coupled plasma (ICP), such as one of the above-mentioned processing chambers. In some embodiments, the flow rate and other processing parameters described below are for a 300 mm substrate. It should be understood that these parameters can be adjusted based on the size of the substrate being processed and the type of chamber being used without departing from the embodiments disclosed herein. In a specific embodiment, the plasma source is a microwave plasma source to provide a microwave plasma enhanced chemical vapor deposition chamber.

[0031] As used herein, "substrate surface" refers to any substrate or material surface formed on a substrate on which film processing can be performed. For example, substrate surfaces on which processing can be performed include materials such as silicon, silicon oxide, silicon nitride, doped silicon, germanium, gallium arsenide, gallium nitride, glass, sapphire, and any other material such as metals, metal nitrides, metal alloys, and other conductive materials. The substrate surface may also include dielectric materials such as silicon dioxide and carbon-doped silicon oxide. The substrate may have a variety of sizes, such as 200 mm, 300 mm, or other diameter wafers, and rectangular or square panes.

[0032] The deposition gas can then be activated by plasma, in a specific embodiment, by microwave plasma to form an activated deposition gas. The deposition gas can be activated by using a power source to form a plasma. Any power source capable of activating the gas into an active species and maintaining a plasma of the active species can be used. For example, a power discharge technique based on radio frequency (RF), direct current (DC) or microwave (MW) can be used. The power source generates a source plasma power, which is applied to a CVD processing chamber with a plasma source (e.g., remote, microwave, CCP or ICP) to generate and maintain a plasma of the deposition gas. In an embodiment using RF power as the source plasma power, the source plasma power can be transmitted at a frequency of from about 2 MHz to about 170 MHz and at a power level between 500 W and 12,000 W. Other embodiments include transmitting the source plasma power at about 2,000 W to about 12,000 W. The applied power can be adjusted according to the size of the substrate being processed. In one or more embodiments, the microwave plasma is applied as a continuous wave with a power in the range of about 2,000 W to about 12,000 W.

[0033] Based on the pressure in the CVD chamber and other factors, the formation of ionized species will be minimized and free radical formation will be maximized. Without being bound by theory, it is believed that the nanocrystalline diamond layer should be primarily sp 3 key instead of sp2 In addition, it is believed that by increasing the number of radical species relative to the number of ionized species during deposition of the layer, more sp 3 bonds. Ionized species are high energy and require more room to move than free radicals. Once activated, the activated deposition gas produced in the first volume is then transported through a second volume having a second pressure. The second volume can be a second chamber or another confined area between the processing volume and the CVD chamber with the plasma source. In one example, the second volume is a connection between the CVD chamber with the plasma source and the processing volume.

[0034] The deposition gas can then be activated to produce an activated deposition gas. The deposition gas can be activated by forming a plasma using a power source. Any power source capable of activating a gas into an active species and maintaining a plasma of the active species can be used. The power source generates a source plasma power, which is applied to the CVD plasma chamber to generate and maintain a plasma of the deposition gas. In an embodiment using a MW generator as the source plasma power, the source plasma power can be transmitted at a frequency of from about 2 MHz to about 170 MHz and at a power level between 500 W and 12,000 W. Other embodiments include transmitting the source plasma power from about 2,000 W to about 12,000 W. The applied power can be adjusted according to the size of the substrate being processed.

[0035] In specific embodiments, the processes described herein may be used to form a nanocrystalline diamond layer on a substrate. Figures 1A-1D Schematic cross-sectional views of a substrate 102 at various stages of an integrated circuit manufacturing sequence are shown, incorporating a nanocrystalline diamond layer as a hard mask. Figure 1A-Figure 1D In one embodiment, the deposited nanocrystalline diamond layer 108 has a thickness T1, a high modulus (E>250GPa), a low roughness, and a hardness. In one or more embodiments, the first nanocrystalline diamond layer 108 has a thickness T1 in the range of about 250nm to about 650nm. In one or more embodiments, the roughness of the nanocrystalline diamond layer 108 as measured by atomic force microscopy (AFM) is less than 25nm rms.

[0036] Figure 1A A cross-sectional view of the device 100 is shown. In one or more embodiments, the device 100 may be a NAND device. The device 100 includes a substrate 102, a plurality of device layers 104, 106, and a nanocrystalline diamond layer 108 formed on the plurality of device layers 104, 106.

[0037] In one or more embodiments, the substrate 102 may be any semiconductor substrate known in the art, such as single crystal silicon, IV-IV compounds (such as silicon-germanium (Si-Ge) or silicon-germanium-carbon (Si-Ge-C)), III-V compounds, II-VI compounds, epitaxial layers on these substrates, or any other semiconductor or non-semiconductor material (such as silicon oxide, glass, plastic, metal, or ceramic substrates). In one or more embodiments, the substrate 102 may include integrated circuits fabricated thereon, such as driver circuits for a memory device (not shown).

[0038] In one or more embodiments, multiple device layers 104, 106 may be formed over the surface of substrate 102. Multiple device layers 104, 106 may be deposited layers that form components of a 3D vertical NAND structure. Components may be formed from all or part of multiple device layers (e.g., dielectric or discrete charge storage segments). The dielectric portions may be independently selected from any one or more of the same or different electrically insulating materials, such as silicon oxide, silicon nitride, silicon oxynitride, or other high-k insulating materials. In one embodiment, the structure may include silicon oxide / silicon nitride pairs deposited in an alternating manner. The total height of these pairs may be in the range of 100 to 1000. and The number of these pairs can be greater than 10 pairs, such as 32 pairs, 64 pairs or more.

[0039] In some embodiments, the antireflective coating 110 is disposed on the nanocrystalline diamond layer 108, and the photoresist 112 is disposed on the antireflective coating 110. In some embodiments, the antireflective coating 110 is a dielectric antireflective coating (DARC). Figure 1B , the anti-reflective coating 110 is patterned to form openings 113 that expose portions of the top surface of the nanocrystalline diamond layer 108 .

[0040] refer to Figure 1C and Figure 1D , the device 100 includes a channel 114. The channel 114 is formed to pass through the nanocrystalline diamond layer 108 and the plurality of device layers 104, 106. The channel 114 can be substantially perpendicular to the top surface of the substrate 102. For example, the channel 114 can have a columnar shape. The channel 114 can extend substantially perpendicular to the top surface of the substrate 102. In some embodiments, the channel 114 can be a filling feature. In some other embodiments, the channel 114 can be hollow. In such an embodiment, an insulating filling material (not shown) can be formed to fill the hollow portion surrounded by the channel 114. The insulating filling material can include any electrically insulating material, such as silicon oxide, silicon nitride, silicon oxynitride or other high-k insulating materials.

[0041] refer to Figure 1DIn one or more embodiments, after forming the channel 114, the anti-reflective coating 110 can be removed. Any suitable semiconductor material can be used for the channel 114, such as silicon, germanium, silicon germanium or other compound semiconductor materials, such as III-V, II-VI, or conductive or semiconductor oxides, or other materials. The semiconductor material can be amorphous, polycrystalline or single crystal. The semiconductor channel material can be formed by any suitable deposition method. For example, in one embodiment, the semiconductor channel material is deposited by low pressure chemical vapor deposition (LPCVD). In other embodiments, the semiconductor channel material can be a recrystallized polycrystalline semiconductor material formed by recrystallizing the initially deposited amorphous semiconductor material.

[0042] The method described in this article can be used in Figure 2 The process is performed in the substrate processing chamber 200 shown in FIG. Figure 2 A substrate processing chamber 200 is shown including a substrate support 210, which may be a susceptor, such as a rotating susceptor. At least one process gas input 204 is provided to input one or more process gases into the process chamber interior volume 202. A plasma power source 206 inputs power into the chamber, which power generates a plasma 214 in the interior volume 202 of the process chamber 200. In a specific embodiment, the plasma power source 206 is a microwave plasma power source. The gas leaves the chamber through a pump outlet 208.

[0043] Reference now Figure 3 , a method 300 for depositing a diamond layer on a substrate includes placing a substrate as described herein in a substrate processing chamber, such as a plasma enhanced chemical vapor deposition chamber, at 302. At 304, the method includes flowing a first, a second, a third, and a fourth gas into an interior volume of the substrate processing chamber to provide a gas mixture. At 306, a plasma is generated. Generating the plasma may include generating a pulsed plasma in the gas mixture in the substrate processing chamber. In one or more embodiments, the gas mixture includes a first gas comprising H2, a second gas comprising CO2, a third gas selected from the group consisting of CH4, C2H2, and C2H4, and a fourth gas comprising an inert gas. At 308, the method includes depositing a nanocrystalline diamond layer on the substrate, the nanocrystalline diamond layer having a thickness, a roughness, a hardness, and a modulus.

[0044] In one or more embodiments, the inert gas is selected from the group consisting of helium (He), nitrogen (N2), neon (Ne), argon (Ar), and combinations thereof. In a specific embodiment, the gas mixture includes H2 in a range from 10 volume percent (vol.%) to 90 vol.% (e.g., 10 sccm to 96 sccm), a third gas and a second gas in a range from 2 vol.% to 10 vol.% (e.g., 2 sccm to 10 sccm), and argon in a range from 10 vol.% to 90 vol.% (e.g., 10 sccm to 90 sccm). In another specific embodiment, the gas mixture includes H2 in a range from 20 to 80 vol.% (e.g., 20 sccm to 80 sccm), a third gas and a second gas in a range from 3 to 8 vol.% (e.g., 3 sccm to 8 sccm), and argon in a range from 20-80 vol.% (e.g., 20 sccm to 80 sccm). In another specific embodiment, the gas mixture includes H2 in a range from 30-70 vol.% (e.g., 30 sccm to 70 sccm), a third gas and a second gas in a total range from 4 to 6 vol.% (e.g., 4 sccm to 6 sccm), and argon in a range from 30 to 70 vol.% (e.g., 30 sccm to 70 sccm).

[0045] In any of the embodiments described above, generating a pulsed plasma in a gas mixture in a substrate processing chamber occurs using a microwave plasma having a peak power in a range from 2,000 W to 12,000 W, pulsed at a frequency in a range from 10 Hz to 300 Hz and in a range from 10% to 90% of the peak power. In an alternative embodiment, generating a pulsed plasma in a gas mixture in a substrate processing chamber occurs using a microwave plasma having a peak power in a range from 3,000 W to 9,000 W, pulsed at a frequency in a range from 40 Hz to 270 Hz and in a range from 25%-80% of the peak power.

[0046] In any of the above embodiments, the gas mixture in the substrate processing chamber is at a pressure in a range from 0.1 Torr to 1.0 Torr. In an alternative embodiment, the gas mixture in the substrate processing chamber is at a pressure in a range from 0.2 Torr to 0.8 Torr.

[0047] In any of the above embodiments, the gas mixture in the substrate processing chamber is at a temperature in the range of from 450° C. to 600° C. In an alternative embodiment, the gas mixture in the substrate processing chamber is at a temperature in the range of from 500° C. to 550° C.

[0048] In one or more embodiments, the method advantageously forms a nanocrystalline diamond layer, wherein the roughness of the nanocrystalline diamond layer is less than 25 nm rms, less than 24 nm rms, less than 23 nm rms, less than 22 nm rms, less than 21 nm rms, less than 20 nm rms, less than 19 nm rms, less than 18 nm rms, less than 17 nm rms, less than 16 nm rms, less than 15 nm rms, less than 14 nm rms, less than 13 nm rms, less than 12 nm rms, less than 10 nm rms, less than 9 nm rms and greater than 0.5 nm rms.

[0049] In a specific embodiment, the nanocrystalline diamond layer is formed on a substrate surface that does not include an underlying nanocrystalline diamond layer. In some embodiments, the nanocrystalline diamond layer formed by the plasma enhanced CVD process is a single layer, or the single layer is not formed on an underlying nanocrystalline diamond layer.

[0050] The substrate processing chamber can be controlled by a controller. The present disclosure provides that the method described herein can generally be stored in a memory as a software program, and when executed by a controller or a processor, the software program causes the processing chamber to perform the processing of the present disclosure. The software program can also be stored and / or executed by a second controller or processor (not shown) away from the hardware controlled by the processor. Some or all of the methods of the present disclosure can also be executed in hardware. Therefore, the processing can be implemented in software and executed using a computer system, in hardware such as an application-specific integrated circuit or other types of hardware, or in a combination of software and hardware. When executed by a controller or a processor, the software program converts a general-purpose computer into a special-purpose computer (controller) that controls the operation of the chamber, thereby executing the method described herein.

[0051] The controller or processor may include a non-transitory computer-readable medium containing instructions that, when executed by the controller of the substrate processing chamber, cause the substrate processing chamber to deposit a diamond layer on a substrate by the following method, the method comprising: generating a pulsed microwave plasma in a gas mixture in the substrate processing chamber, the gas mixture comprising a first gas containing H2 in a range from 10 to 90 vol.% (e.g., 10 sccm to 96 sccm), a second gas containing CO2, a third gas selected from the group consisting of CH4, C2H2 and C2H4, and a fourth gas containing an inert gas in a range from 10 vol.% to 90 vol.% (e.g., 10 sccm to 90 sccm), the inert gas being selected from the group consisting of helium (He), nitrogen (N2), neon (Ne), argon (Ar) and combinations thereof, the third gas and the second gas together in a range from 2 to 10 vol.% (e.g., 2 sccm to 10 sccm); and depositing a nanocrystalline diamond layer on the substrate.

[0052] In the foregoing description, embodiments of the present disclosure have been described with reference to specific exemplary embodiments of the present disclosure. It will be apparent that various modifications may be made thereto without departing from the broader spirit and scope of the embodiments of the present disclosure as set forth in the following claims. Therefore, the description and drawings are to be regarded as illustrative rather than restrictive.

[0053] References throughout this specification to "one embodiment," "certain embodiments," "one or more embodiments," or "an embodiment" mean that the specific features, structures, materials, or characteristics described in conjunction with the embodiment are included in at least one embodiment of the present disclosure. Thus, the appearance of phrases such as "in one or more embodiments," "certain embodiments," "in an embodiment," or "in an embodiment" in various places throughout this specification does not necessarily refer to the same embodiment of the present disclosure. Furthermore, the specific features, structures, materials, or characteristics may be combined in any suitable manner in one or more embodiments.

[0054] Although the disclosure herein has been described with reference to specific embodiments, it should be understood that these embodiments are merely illustrations of the principles and applications of the disclosure. It will be apparent to those skilled in the art that various modifications and variations may be made to the methods and apparatus of the disclosure without departing from the spirit and scope of the disclosure. Therefore, the disclosure is intended to include modifications and variations within the scope of the appended claims and their equivalents.

Claims

1. A method for depositing a nanocrystalline diamond hard mask layer on a plurality of stacked device layers on a substrate, the method comprising: generating a pulsed microwave plasma in a gas mixture in a substrate processing chamber, the gas mixture comprising a first gas comprising H2, a second gas comprising CO2, a third gas selected from the group consisting of CH4, C2H2, and C2H4, and a fourth gas comprising an inert gas; and The nanocrystalline diamond hard mask layer is deposited on the multiple stacked device layers, the nanocrystalline diamond hard mask layer having a thickness, roughness, hardness and Young's modulus, wherein the pulsed microwave plasma is pulsed at a frequency in the range of 10 Hz to 300 Hz, in the range of 10% to 90% of the peak power in the range of 2,000 W to 12,000 W, and the roughness of the nanocrystalline diamond hard mask layer is less than 10 nm rms, and the Young's modulus of the nanocrystalline diamond hard mask layer is greater than 325 GPa, wherein the gas mixture comprises H2 in the range of 30 vol% to 70 vol%, the second gas and the third gas in the range of 4 vol% to 6 vol% in total, and argon in the range of 30 vol% to 70 vol%, and the gas mixture in the substrate processing chamber is at a pressure in the range of 0.2 Torr to 0.8 Torr.

2. The method of claim 1 , wherein generating a pulsed microwave plasma in the gas mixture in the substrate processing chamber occurs at a peak power in a range from 3 kW to 9 kW, the pulsed microwave plasma being pulsed at a frequency in a range from 40 Hz to 270 Hz.

3. The method of claim 1, wherein the gas mixture in the substrate processing chamber is at a temperature ranging from 450°C to 600°C.

4. The method of claim 1, wherein the gas mixture in the substrate processing chamber is at a temperature ranging from 500°C to 550°C. 5 . The method of claim 1 , wherein the nanocrystalline diamond hard mask layer comprises a single layer formed without forming an underlying nanocrystalline diamond hard mask layer. 6 . The method of claim 1 , wherein the plurality of stacked layers do not include an underlying nanocrystalline diamond layer below the nanocrystalline diamond hard mask layer, and the Young's modulus of the nanocrystalline diamond hard mask layer is greater than 350 GPa. 7 . The method of claim 6 , wherein the roughness of the nanocrystalline diamond hard mask layer is less than 9 nm rms and greater than 0.5 nm rms.

8. A non-transitory computer readable medium comprising instructions that, when executed by a controller of a substrate processing chamber, cause the substrate processing chamber to deposit a nanocrystalline diamond hard mask layer on a plurality of stacked device layers on a substrate by a method comprising: generating a pulsed microwave plasma in a gas mixture in the substrate processing chamber, the gas mixture comprising a first gas comprising H2, a second gas comprising CO2, a third gas selected from the group consisting of CH4, C2H2 and C2H4, and a fourth gas comprising an inert gas, the inert gas selected from the group consisting of helium (He), nitrogen (N2), neon (Ne), argon (Ar), and combinations thereof; and depositing the nanocrystalline diamond hard mask layer on the plurality of stacked device layers, wherein the nanocrystalline diamond hard mask layer has a thickness, a roughness, a hardness, and a Young's modulus, wherein the pulsed microwave plasma is heated in a range from 10 Hz to 300 Hz. The nanocrystalline diamond hard mask layer is pulsed in a range of from 10% to 90% of a peak power in a range of from 2,000 W to 12,000 W at a frequency within a range, and the roughness of the nanocrystalline diamond hard mask layer is less than 10 nmrms, and the Young's modulus of the nanocrystalline diamond hard mask layer is greater than 325 GPa, wherein the gas mixture comprises H2 in a range of from 30 volume % to 70 volume %, the second gas and the third gas in a total range of from 4 volume % to 6 volume %, and argon in a range of from 30 volume % to 70 volume %, and the gas mixture in the substrate processing chamber is at a pressure in a range of from 0.2 Torr to 0.8 Torr.

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