High frequency semiconductor devices

Abstract

The present invention relates to a high-frequency semiconductor device. Conventional high-frequency semiconductor devices with an input double wave matching circuit have the problem of gain reduction. The high-frequency semiconductor device (100) of the present invention has two adjacent unit transistor units (7) and (8) connected to an input double wave matching circuit (19) arranged on the upper surface of a semiconductor substrate (1). The input double wave matching circuit (19) has a first capacitor (13), a first inductor (14), a second capacitor (15) and a second inductor (16). The first capacitor (13) and the first inductor (14) resonate at the frequency of the fundamental wave, and the impedance seen from the input electrodes of the two unit transistor units (7) and (8) is a short circuit at the frequency of the double wave.

Description

Technical Field

[0001] The present disclosure relates to a high-frequency semiconductor device including a harmonic processing circuit. Background Art

[0002] Gain and power added efficiency are indicators that indicate the performance of a high-frequency semiconductor device that performs power amplification at a high frequency.

[0003] When a high-frequency semiconductor device with a high gain is used, a desired output power can be obtained with a weak input power, so the structure of a communication system or a radar system using the high-frequency semiconductor device becomes simple, and cost can be suppressed.

[0004] Furthermore, when a high-frequency semiconductor device with high power added efficiency is used, the heat generation of an amplifier using the high-frequency semiconductor device can be suppressed, thereby simplifying a cooling mechanism used in a communication system or a radar system, thereby achieving cost reduction.

[0005] As one of the methods for improving the power added efficiency of high-frequency semiconductor devices, there is a method of achieving high-efficiency operation by controlling the impedance of the peripheral circuit seen from the semiconductor at a frequency (hereinafter referred to as harmonics) equivalent to a multiple of the frequency of the signal amplified by the semiconductor (hereinafter referred to as the fundamental wave).

[0006] It is known that the power added efficiency can be improved by short-circuiting the input load viewed from the control terminal of the high-frequency semiconductor to the input side, particularly at a frequency equivalent to twice the fundamental wave (hereinafter referred to as double wave).

[0007] For example, Patent Document 1 discloses a high-frequency semiconductor amplifier having a transistor element including a plurality of unit transistors formed by a plurality of multi-finger transistors connected in parallel arranged on a semiconductor substrate, wherein a series resonant circuit is connected in a branch to each control terminal of the unit transistor, and the series resonant circuit is set to resonate at a desired frequency of a second or higher harmonic of an operating frequency.

[0008] In addition, non-patent document 1 discloses a high-frequency semiconductor amplifier, which achieves high efficiency and high output by making a double-wave resonant circuit composed of a MIM (Metal Insulator Metal) capacitor and a spiral inductor on the same semiconductor substrate as a unit transistor, and connecting the double-wave resonant circuit to the control terminals of each unit transistor, thereby controlling the impedance at the double wave with high precision.

[0009] Patent Document 1: Japanese Patent Application Publication No. 2008-109227

[0010] Non-Patent Document 1: 2011 IEEE MTT-S International Microwave Symposium, "A67% PAE, 100W GaN Power Amplifier with On-Chip Harmonic Tuning Circuits for C-bandSpace Applications"

[0011] In the high-frequency semiconductor amplifiers disclosed in Patent Document 1 and Non-Patent Document 1, the input double wave matching circuit formed monolithically on the upper surface of the substrate of the high-frequency semiconductor is directly connected to the gate pad. Therefore, compared with the case where the input double wave matching circuit is provided outside the semiconductor substrate and connected to the gate pad with a bonding wire, the input double wave load can be ideally short-circuited without being affected by the resistance component and inductance of the bonding wire.

[0012] On the other hand, in the input double wave matching circuits shown in Patent Document 1 and Non-Patent Document 1, the load is capacitive rather than open at the fundamental wave. Therefore, there is a problem of characteristic change that causes an increase in parasitic capacitance between the gate and source of the high-frequency semiconductor, resulting in a reduction in gain. Summary of the invention

[0013] The present disclosure has been made to solve the above-mentioned problems, and an object of the present disclosure is to provide a high-frequency semiconductor device having a harmonic processing circuit that can achieve both high power added efficiency and high gain.

[0014] The high-frequency semiconductor device involved in the present disclosure comprises: a semiconductor substrate; a first unit transistor unit and a second unit transistor unit, which are unit transistor units composed of a plurality of multi-finger transistors whose input electrodes and output electrodes are respectively connected in parallel, and are arranged adjacent to each other on the upper surface of the semiconductor substrate; a first capacitor, which is arranged on the upper surface of the semiconductor substrate and has one end connected to the input electrode of the first unit transistor unit; a first inductor, which is arranged on the upper surface of the semiconductor substrate and has one end connected to the input electrode of the second unit transistor unit; a second capacitor, which is arranged on the upper surface of the semiconductor substrate and has one end connected to the other end of the first capacitor and the other end of the first inductor; and a second inductor, which is arranged on the upper surface of the semiconductor substrate and has one end connected to the other end of the second capacitor and the other end connected to the ground terminal.

[0015] Here, the first capacitor and the first inductor resonate at the fundamental frequency, and the impedance viewed from the input electrode of the first unit transistor unit toward the first capacitor and the impedance viewed from the input electrode of the second unit transistor unit toward the first inductor are short-circuited at the double wave.

[0016] In the high-frequency semiconductor device disclosed herein, the impedance viewed from the input electrode of the first unit transistor unit toward the first capacitor side and the impedance viewed from the input electrode of the second unit transistor unit toward the first inductor side become an open circuit at the fundamental wave and a short circuit at the double wave, thereby achieving both high power added efficiency and high gain. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 1 is a plan view of the high-frequency semiconductor device 100 according to the first embodiment.

[0018] Figure 2 1 is an equivalent circuit diagram of the high-frequency semiconductor device 100 according to the first embodiment.

[0019] Figure 3 1 is an equivalent circuit diagram of the high-frequency semiconductor device 110 according to the first embodiment.

[0020] Figure 4 1 is a top view of a high-frequency semiconductor device 201 according to Comparative Example 1.

[0021] Figure 5 1 is a top view of a high-frequency semiconductor device 202 according to Comparative Example 2.

[0022] Figure 6 : is an equivalent circuit diagram of the high-frequency semiconductor device 203 according to Comparative Example 1.

[0023] Figure 7 : is an equivalent circuit diagram of the high-frequency semiconductor device 204 according to the second comparative example.

[0024] Figure 8 This is a diagram showing calculation results of the power added efficiency of the high-frequency semiconductor devices according to Comparative Examples 1 and 2.

[0025] Fig. 9 1 is a diagram showing calculation results of gains of high-frequency semiconductor devices according to Comparative Examples 1 and 2.

[0026] Fig.10 1 is a diagram showing an input double wave matching circuit 84 of Comparative Example 2.

[0027] Fig.11 : is a Smith chart showing the reflection characteristics of the input double wave matching circuit 84.

[0028] Fig.12 : is a graph showing the input load dependency of the gain of the high-frequency semiconductor device 201 according to Comparative Example 1.

[0029] Fig.13: is a graph showing the input load dependency of the gain of the high-frequency semiconductor device 202 according to the second comparative example.

[0030] Fig.14 FIG. 1 is a diagram showing an example of an input double wave matching circuit composed of a lumped constant circuit.

[0031] Fig.15 is from Figure 1 The diagram is shown by extracting the input double wave matching circuit 19.

[0032] Fig.16 It is a Smith chart showing the reflection characteristics of the input double wave matching circuit 19.

[0033] Fig.17 It is a diagram showing the calculation results of the power added efficiency of the high-frequency semiconductor device 110 .

[0034] Fig.18 It is a diagram showing the calculation result of the gain of the high-frequency semiconductor device 110 .

[0035] Fig.19 This is a diagram showing a high-frequency semiconductor device 101 according to a modified example of the first embodiment.

[0036] Fig. 20 This is a diagram showing a high-frequency semiconductor device 102 according to a modified example of the first embodiment.

[0037] Fig.21 It is a top view of the high-frequency semiconductor device 103 according to the second embodiment.

[0038] Fig. 22 : is an equivalent circuit diagram of the high-frequency semiconductor device 120 according to the second embodiment.

[0039] Fig.23 It is a top view of the high-frequency semiconductor device 104 according to the third embodiment.

[0040] Fig.24 : is an equivalent circuit diagram of the high-frequency semiconductor device 130 according to the third embodiment.

[0041] Fig.25 FIG. 1 is a diagram showing a high-frequency semiconductor device 140 according to a modified example of the third embodiment. DETAILED DESCRIPTION

[0042] Implementation Method 1

[0043] The high-frequency semiconductor device according to the first embodiment will be described with reference to the drawings.

[0044] In addition, in the drawings, parts marked with the same reference numerals are the same or equivalent thereto, which is common throughout the entire specification. In addition, the drawings are schematically represented, and the structure is appropriately omitted or simplified for the convenience of explanation. In addition, the size and position of the structures shown in different drawings are not necessarily accurate records and can be appropriately changed.

[0045] Figure 1 1 is a plan view of the high-frequency semiconductor device 100 according to the first embodiment.

[0046] exist Figure 1 In the figure, the semiconductor substrate 1 is a semiconductor substrate constituting the high-frequency semiconductor device 100. As a material of the semiconductor substrate 1, silicon, silicon carbide, gallium arsenide, gallium nitride, etc. can be used. In the case of a silicon substrate, a high-resistance substrate with a small dielectric loss tangent is preferred.

[0047] A multi-finger transistor is provided on the upper surface of the semiconductor substrate 1. The multi-finger transistor may also be a FET including a Metal-Semiconductor Field Effect Transistor (MESFET), a High Electron Mobility Transistor (HEMT), a Metal-Oxide-Semiconductor Field Effect Transistor (MOS FET), etc. In addition, the multi-finger transistor may also be a HBT (Heterojunction Bipolar Transistor). In the first embodiment, the multi-finger transistor is described by taking a FET as an example.

[0048] On the upper surface of the semiconductor substrate 1, a plurality of gate electrodes, source electrodes, and drain electrodes constituting a multi-finger transistor are alternately arranged side by side in a comb shape. For example, a gate electrode 2, a source electrode 3 adjacent to the gate electrode 2, and a drain electrode 4 constitute a transistor 90 corresponding to one finger. The gate electrode is an input electrode for inputting a signal, and the drain electrode is an output electrode for outputting a signal.

[0049] The other gate electrodes and the source electrodes and drain electrodes adjacent to the gate electrodes also constitute one finger of transistors. That is, a plurality of multi-finger transistors are arranged on the upper surface of the semiconductor substrate 1 .

[0050] A metal film (not shown) serving as a ground terminal of the high-frequency semiconductor device 100 is formed on substantially the entire lower surface of the semiconductor substrate 1. The source electrode 3 is connected to the through hole 5. The through hole 5 penetrates the semiconductor substrate 1 to connect the ground terminals on the upper and lower surfaces of the semiconductor substrate 1.

[0051] The gate electrodes of a predetermined number of transistors corresponding to one finger are connected in parallel via a gate feeder 6. The gate feeder 6 is sometimes referred to as a gate bus bar. The gate feeder 6 is a metal signal wiring.

[0052] Hereinafter, in this specification, a group of transistors connected in parallel by the gate feed line 6 is referred to as a unit transistor unit. Figure 1 As shown in FIG. 1 , each of the unit transistor cells 7 and 8 is formed by connecting six fingers of gate electrodes in parallel. The drain electrodes of the unit transistor cells 7 and 8 are connected in parallel via an output bonding pad 10 .

[0053] Unit transistor cells 7 and 8 are arranged adjacent to each other. Unit transistor cell 7 is a first unit transistor cell, and unit transistor cell 8 is a second unit transistor cell. The gate electrodes of unit transistor cells 7 and 8 are connected in parallel through a gate feeder 9. The gate feeder 9 is a metal signal wiring, and a certain resistance value can be maintained by adjusting the thickness and material of the wiring. By connecting the gates of the unit transistor cells to each other using the gate feeder 9 as a resistor, oscillation can be suppressed.

[0054] The gate electrode of the unit transistor cell 7 is connected to a bonding pad 11 provided on the upper surface of the semiconductor substrate 1 via a protruding wiring. The bonding pad 11 is a first bonding pad.

[0055] The gate electrode of the unit transistor cell 8 is connected to a bonding pad 12 provided on the upper surface of the semiconductor substrate 1 via a protruding wiring. The bonding pad 12 is a second bonding pad.

[0056] The capacitor 13 is a first capacitor. The capacitor 13 is a MIM (Metal-Insulator-Metal) capacitor provided on the upper surface of the semiconductor substrate 1. One end of the capacitor 13 is connected to the bonding pad 11 via a protruding wiring.

[0057] The inductor 14 is a first inductor. The inductor 14 is provided on the upper surface of the semiconductor substrate 1 and is a spiral inductor composed of a transmission line. One end of the inductor 14 is connected to the bonding pad 12 .

[0058] The capacitor 15 is a second capacitor and is a MIM capacitor provided on the upper surface of the semiconductor substrate 1. The other end of the capacitor 13 and the other end of the inductor 14 are connected to one end of the capacitor 15.

[0059] The inductor 16 is a second inductor. The inductor 16 is provided on the upper surface of the semiconductor substrate 1 and is a spiral inductor formed of a transmission line. One end of the inductor 16 is connected to the other end of the capacitor 15 , and the other end is connected to the via 5 .

[0060] Figure 2 1 is an equivalent circuit diagram of the high-frequency semiconductor device 100 according to the first embodiment.

[0061] like Figure 2 As shown, the high-frequency semiconductor device 100 has an input double wave matching circuit 19 as a high-order harmonic processing circuit. The capacitor 13 and the inductor 14 constitute a fundamental wave resonant circuit 19a that resonates at the frequency of the fundamental wave. The capacitor 15 and the inductor 16 constitute a double wave resonant circuit 19b that resonates at a frequency exceeding the fundamental wave and less than the double wave. Moreover, the fundamental wave resonant circuit 19a and the double wave resonant circuit 19b constitute the input double wave matching circuit 19.

[0062] In the first embodiment, the inductors 14 and 16 are spiral inductors, but they may be formed of transmission lines, meander lines, or the like as long as desired inductance can be obtained, and are not limited to spiral inductors.

[0063] Figure 3 FIG. 1 is an equivalent circuit diagram of a high-frequency semiconductor device 110 according to Embodiment 1. Parts not important in the description of this disclosure, such as a housing and a bias circuit, are not shown in FIG. Figure 3 is omitted.

[0064] The input matching circuit 22 has an input terminal 21 . The input terminal 21 is an input terminal for inputting a signal from the outside. The input matching circuit 22 is connected to the bonding pads 11 and 12 of the high-frequency semiconductor device 100 via bonding wires 17 .

[0065] The output bonding pad 10 of the high-frequency semiconductor device 100 is connected to the output matching circuit 23 via the bonding wire 18. The output matching circuit 23 has an output terminal 24. A signal input from the input terminal 21 and amplified in the high-frequency semiconductor device 110 is output from the output terminal 24.

[0066] The input matching circuit 22 and the output matching circuit 23 can be planar circuits formed by distributed constant elements on a dielectric thin plate such as ceramics or a printed circuit board, or circuits formed by lumped constant elements such as chip capacitors and chip inductors, or circuits composed of a mixture of these.

[0067] The high-frequency semiconductor device 100 is used by fixing its lower surface to the casing of the high-frequency semiconductor device 110 by bonding materials such as solder or conductive adhesive to achieve electrical connection. The casing of the high-frequency semiconductor device 110 provides a ground potential, so the source electrode 3 is grounded.

[0068] For the high-frequency semiconductor device 110, for example, a hermetic package having a ceramic frame, a resin mold package, or the like may be used as a housing, and the high-frequency semiconductor device 100, the input matching circuit 22, and the output matching circuit 23 may be housed in the housing. Alternatively, a module may be provided in which the high-frequency semiconductor device 100 and the lumped constant element are arranged on a printed circuit board and covered by overmolding. Alternatively, the high-frequency semiconductor device 100 and the lumped constant element may be housed together with a bias circuit, a semiconductor for control, a power supply, and the like.

[0069] Furthermore, the high-frequency semiconductor device 110 may be configured as a MMIC (Monolithic Microwave Integrated Circuit).

[0070] In this case, the input matching circuit 22 and the output matching circuit 23 are formed monolithically on the upper surface of the semiconductor substrate 1 of the high-frequency semiconductor device 100. The bonding pads 11, 12 and the output bonding pad 10 may not be formed. The input matching circuit 22 may be connected to the input electrodes of the unit transistor cells 7 and 8 through wiring provided on the semiconductor substrate 1 instead of the bonding wire 17 and the bonding pads 11 and 12. The output matching circuit 23 may be connected to the output electrodes of the unit transistor cells 7 and 8 through wiring provided on the semiconductor substrate 1 instead of the bonding wire 18 and the output bonding pad 10.

[0071] Here, in order to facilitate understanding of the significance of the high-frequency semiconductor device according to the first embodiment, the operations of the high-frequency semiconductor devices according to the first and second comparative examples and the first embodiment will be examined.

[0072] First, the structures of Comparative Examples 1 and 2 are described, and then calculation results of high-frequency semiconductor devices according to Comparative Examples 1 and 2 are shown to clarify problems of conventional high-frequency semiconductor devices.

[0073] It should be noted that the bonding pads 11 and 12 in the first embodiment and the bonding pad 81 in the first and second comparative examples have different reference numerals for identification, but their specifications are the same.

[0074] Figure 4 1 is a top view of a high-frequency semiconductor device 201 according to Comparative Example 1.

[0075] The high-frequency semiconductor device 201 is a high-frequency semiconductor device that does not include a harmonic processing circuit. The high-frequency semiconductor device 201 of Comparative Example 1 is different from the high-frequency semiconductor device 100 in that it does not include the capacitor 13, the inductor 14, the capacitor 15, and the inductor 16. The other parts are the same.

[0076] Figure 51 is a top view of a high-frequency semiconductor device 202 according to Comparative Example 2.

[0077] The structure of the high-frequency semiconductor device 202 of Comparative Example 2 is based on the high-frequency semiconductor amplifier disclosed in Non-Patent Document 1, and is a high-frequency semiconductor amplifier having a conventional high-order harmonic processing circuit. The high-frequency semiconductor device 202 of Comparative Example 2 is different from the high-frequency semiconductor device 100 in that it does not have the capacitor 13, the inductor 14, the capacitor 15, and the inductor 16, but has the inductor 82 and the capacitor 83. The other parts are the same.

[0078] One end of the inductor 82 is connected to the bonding pad 81, and the other end is connected to one end of the capacitor 83. The other end of the capacitor 83 is connected to the through hole 5. The inductor 82 and the capacitor 83 constitute an input double wave matching circuit 84. The input double wave matching circuit 84 is a resonance circuit that resonates at the double wave, and is a high-order harmonic processing circuit that short-circuits the impedance viewed from the gate electrode of the unit transistor unit 7 or 8 to the bonding pad side at the double wave.

[0079] Figure 6 : is an equivalent circuit diagram of the high-frequency semiconductor device 203 according to Comparative Example 1.

[0080] High frequency semiconductor device 203 inputs a signal from input terminal 21 to input matching circuit 22. Input matching circuit 22 is connected to bonding pad 81 via bonding wire 17. Output bonding pad 10 is connected to output matching circuit 23 via bonding wire 18, and output matching circuit 23 is connected to output terminal 24.

[0081] Figure 7 : is an equivalent circuit diagram of the high-frequency semiconductor device 204 according to the second comparative example.

[0082] High frequency semiconductor device 204 inputs a signal from input terminal 21 to input matching circuit 22. Input matching circuit 22 is connected to bonding pad 81 via bonding wire 17. Output bonding pad 10 is connected to output matching circuit 23 via bonding wire 18, and output matching circuit 23 is connected to output terminal 24.

[0083] In each of the high-frequency semiconductor device 203 and the high-frequency semiconductor device 204 , the input matching circuit 22 and the output matching circuit 23 are optimized.

[0084] Next, calculation results of the performance of the high-frequency semiconductor devices according to Comparative Examples 1 and 2 are shown.

[0085] Figure 8 This is a diagram showing calculation results of the power added efficiency of the high-frequency semiconductor devices according to Comparative Examples 1 and 2. Figure 8The horizontal axis represents input power, and the vertical axis represents power added efficiency. The frequency of the fundamental wave input to the high-frequency semiconductor device is set to 2.7 GHz. Figure 8 In FIG. 1 , the dotted line indicates the calculation result of the high-frequency semiconductor device 203 of Comparative Example 1, and the solid line indicates the calculation result of the high-frequency semiconductor device 204 of Comparative Example 2.

[0086] As a result, the power added efficiency of the high-frequency semiconductor device 203 is approximately 70% at maximum. On the other hand, the power added efficiency of the high-frequency semiconductor device 204 is approximately 80% at maximum. In other words, as a result, the power added efficiency of the high-frequency semiconductor device 204 is approximately 10% higher than that of the high-frequency semiconductor device 203.

[0087] Fig. 9 1 is a diagram showing calculation results of gains of high-frequency semiconductor devices according to Comparative Examples 1 and 2. Fig. 9 The horizontal axis represents input power, and the vertical axis represents gain. Figure 8 Similarly, the frequency of the fundamental wave input to the high-frequency semiconductor device is set to 2.7 GHz. The dotted line represents the calculation result of the high-frequency semiconductor device 203 of Comparative Example 1, and the solid line represents the calculation result of the high-frequency semiconductor device 204 of Comparative Example 2.

[0088] observe Fig. 9 In the range of input power below 20 dBm, the high-frequency semiconductor device 203 shows a gain of about 19 dB. On the other hand, the gain of the high-frequency semiconductor device 204 is about 15 dB. That is, the result is that the gain of the high-frequency semiconductor device 204 is reduced by about 4 dB compared with the high-frequency semiconductor device 203.

[0089] The reason for the above-mentioned gain reduction is that the fundamental wave load of the input double wave matching circuit 84 added to the high-frequency semiconductor device 202 is not an open circuit. Figures 10 to 13 Provide explanation.

[0090] Fig.10 1 is a diagram showing an input double wave matching circuit 84 of Comparative Example 2. Fig.10 The end surface BB' in ' represents a position on the extended wiring near the input electrode of the unit transistor cell 7 and connecting the unit transistor cell 7 to the bonding pad 81. In addition, it represents a position on the extended wiring near the input electrode of the unit transistor cell 7 and connecting the unit transistor cell 8 to the bonding pad 81.

[0091] Fig.11 is a Smith chart showing the reflection characteristics of the input double wave matching circuit 84. This is obtained by electromagnetic field analysis calculation from Fig.10 The calculation result is obtained by looking at the reflection characteristics of the end face BB' in the direction of arrow B into the input double wave matching circuit 84. Fig.11 In the figure, the identifiers are placed at the loads at 2.7 GHz, which is equivalent to the fundamental wave, and 5.4 GHz, which is equivalent to the double wave.

[0092] Reference Fig.11 At 5.4 GHz, which is equivalent to the double wave, the load of the input double wave matching circuit 84 becomes a short circuit, i.e., the left end of the Smith chart. On the other hand, at 2.7 GHz, which is equivalent to the fundamental wave, the load of the input double wave matching circuit 84 is the lower half of the Smith chart, i.e., a capacitive load, rather than the right end of the Smith chart, i.e., an open circuit. That is, the input double wave matching circuit 84 whose load is not an open circuit is connected near the input electrodes of the unit transistor units 7 and 8, respectively. As a result, the input fundamental wave load to the unit transistor units 7 and 8 changes, causing characteristic changes such as an increase in parasitic capacitance on the input side of the high-frequency semiconductor.

[0093] Fig.12 : is a graph showing the input load dependency of the gain of the high-frequency semiconductor device 201 according to Comparative Example 1. Fig.12 The calculation results of the gain based on the source-pull simulation show the maximum value of the gain and the load that indicates the maximum value. The contour lines surrounding the load that obtains the maximum value are the contour lines formed by connecting the loads that obtain the gain decreasing from the maximum value of the gain at 1 dB intervals to 15 dB. In particular, the contour lines indicating the decrease in gain by 15 dB and 7 dB are indicated by arrows.

[0094] The high-frequency semiconductor device 201 can obtain a maximum gain of 24.7 dB when the load of the input matching circuit is set to an optimal load. In addition, the gain decreases as the load of the input matching circuit moves away from the optimal load.

[0095] Fig.13 : is a graph showing the input load dependency of the gain of the high-frequency semiconductor device 202 according to the second comparative example. Fig.13 also with Fig.12 Similarly, the calculation results of the gain based on the source pulling simulation are shown, and the maximum value of the gain and the load that indicates the maximum value are shown. The contour lines surrounding the load that obtains the maximum value are the contour lines formed by connecting the loads that obtain the gain decreasing from the maximum value of the gain at 1 dB intervals to 15 dB. In particular, the contour lines indicating the decrease in gain by 15 dB and 11 dB are shown by arrows.

[0096] like Fig.13 As shown, the high-frequency semiconductor device 202 can obtain a maximum gain of 24.8 dB when the load of the input matching circuit is set to the optimal load. In addition, the gain decreases as the load of the input matching circuit moves away from the optimal load.

[0097] In principle, even if a capacitive circuit is connected to the input side, the original gain can be restored by setting an ideal input matching circuit outside the high-frequency semiconductor. If the absolute value of the reflection coefficient of the input matching circuit (hereinafter referred to as gamma) can be set to 1 or a value close to 1, the same gain as that of Comparative Example 1 can be obtained in Comparative Example 2 by adjusting the reflection phase.

[0098] However, in reality, it is difficult to realize an input matching circuit with low transmission loss and a high reflection coefficient of 1 or close to 1 in an input matching circuit with limited size, and an ideal input matching circuit cannot be made in reality.

[0099] exist Fig.12 The circle indicated by the dotted line in 13 is a circle indicating gamma = 0.72. This is a circle assuming that the maximum value of gamma of the input matching circuit that can take into account both the actual size and low transmission loss is 0.72. That is, the gamma within the dotted circle is the achievable reflection characteristic, and the value of the contour line within the dotted circle is the achievable gain.

[0100] Here, observe Fig.12 , the maximum gain that can be achieved is about 19dB. On the other hand, Fig.13 The contour lines and Fig.12 Since the input double wave matching circuit 84 having a capacitive load close to the short circuit is connected to the bonding pad 81, the load of the input matching circuit outside the matched high frequency semiconductor device must also be close to the short circuit in order to achieve high gain.

[0101] However, since the achievable gamma of the input matching circuit is limited within the dotted circle, the maximum achievable gain is only about 15 dB. This is the main reason why the gain of the high-frequency semiconductor device 204 using the conventional high-frequency semiconductor device 202 having a harmonic processing circuit is reduced.

[0102] In order to solve the problem, an input double wave matching circuit is required in which the load at the fundamental wave is open circuit and the load at the double wave is short circuit. As a general method for realizing such a circuit, a tip short-circuited stub circuit having an electrical length of one quarter of the wavelength at the fundamental wave is known. However, due to size constraints, it is difficult to set such a tip short-circuited stub circuit as a single chip on a high-frequency semiconductor device chip.

[0103] For example, among the silicon, silicon carbide, gallium arsenide, and gallium nitride listed above, gallium arsenide has the largest relative dielectric constant, εr, of 12.8. When the fundamental frequency is set to 2.7 GHz, the spatial wavelength of gallium arsenide with a relative dielectric constant of 12.8 is about 31.1 mm, and the size equivalent to the electrical length of a quarter wavelength is about 7.8 mm.

[0104] On the other hand, the chip size of the high-frequency semiconductor device 100 is about 1 mm square. Therefore, it is difficult to manufacture the stub in a single chip inside the high-frequency semiconductor, and it is even more difficult to provide the stub on all the bonding pads one by one.

[0105] As another method of realizing an input double wave matching circuit in which the load at the fundamental wave is open circuit and the load at the double wave is short circuit, Fig.14 As shown, a scheme using a lumped constant circuit composed of a MIM capacitor, a spiral inductor, etc. can be considered.

[0106] Fig.14 87 is a diagram showing an example of an input double wave matching circuit composed of a lumped constant circuit. The input double wave matching circuit 87 is composed of a capacitor 85a, an inductor 85b, a capacitor 86a, and an inductor 86b. The capacitor 85a and the inductor 85b form a resonant circuit 85c that resonates at the fundamental wave. When the input double wave matching circuit 87 is viewed from the terminal A, the resonant circuit 85c is a parallel resonant circuit at the fundamental wave. Therefore, even if an arbitrary load is connected before the node B, the load of the input double wave matching circuit 87 viewed from the terminal A at the fundamental wave becomes an open circuit.

[0107] Next, the capacitor 86a and the inductor 86b are connected to the node B. By adjusting the inductor 86b, the load of the input double wave matching circuit 87 viewed from the terminal A under the double wave can be short-circuited. The capacitor 86a is a capacitor for DC blocking.

[0108] From the perspective of improving power added efficiency, Figure 5 As shown in the high-frequency semiconductor device 202, it is preferred to provide an input double wave matching circuit 84 for all bonding pads 81. This is because, compared with the case where a matching circuit for optimizing the input double wave load is provided outside the high-frequency semiconductor and connected to the gate pad using a bonding wire, it is easy to achieve a large reflection coefficient and an ideal short-circuit phase by dividing the input double wave matching circuit and arranging it in the vicinity of the unit transistor unit.

[0109] However, for example, when the input double wave matching circuit 84 in the high frequency semiconductor device 202 is replaced by Figure 3In the case of the input double wave matching circuit 87 shown, the chip area of ​​the semiconductor increases significantly. In particular, it is difficult to form a capacitor for DC blocking, which requires a large chip area, for each gate pad from the viewpoint of cost increase.

[0110] Here, the inventor focuses on the fact that even when the two bonding pads 11 and 12 are separated as in the high-frequency semiconductor device 100, assuming that they are connected via a gate feed line 9 having a resistor, if the high-frequency signals input to the two bonding pads are of the same phase, the same action is achieved as if the two bonding pads are connected by a conductor without resistance.

[0111] The spacing of the bonding pads is the product of the width of a finger-sized transistor and the number of transistors that constitute the unit transistor unit. Although the wider the width of a finger-sized transistor is, the more conducive it is to reducing thermal resistance, it is generally set in the range of 20um to 50um because it causes an increase or decrease in the size of the semiconductor. In addition, in order to make the input power in the unit uniform, the number of transistors grouped together is generally set to a maximum of about 10. Therefore, the spacing of the bonding pads is generally set to less than 0.5mm.

[0112] For example, when gallium arsenide with a relative dielectric constant of 12.8 is used as the material of the semiconductor substrate, the interval between the bonding pads is set to 0.5 mm, and the frequency of the fundamental wave is set to 2.7 GHz, the spatial wavelength of gallium arsenide is approximately 31.1 mm. Therefore, the maximum phase difference between the bonding pads separated by 0.5 mm is 5.8 degrees, which can be regarded as approximately the same phase.

[0113] That is, the bonding pads connected to the adjacent unit transistor cells can be considered to be in substantially the same phase. In addition, among silicon, silicon carbide, gallium arsenide, and gallium nitride, gallium arsenide has the largest relative dielectric constant, and the phase difference becomes smaller for other materials.

[0114] Based on the above, the input double wave matching circuit 19 of the high frequency semiconductor device 100 according to the first embodiment will be described.

[0115] Fig.15 is from Figure 1 The figure shows an extracted input double wave matching circuit 19. Fig.15 The end surface AA' in the figure indicates a position on the extended wiring near the input electrode of the unit transistor cell 7 and connecting the unit transistor cell 7 to the bonding pad 11. In addition, the end surface AA' indicates a position on the extended wiring near the input electrode of the unit transistor cell 8 and connecting the unit transistor cell 8 to the bonding pad 12.

[0116] Fig.16is a Smith chart showing the reflection characteristics of the input double wave matching circuit 19. This is obtained by electromagnetic field analysis calculation from Fig.15 The calculation result is obtained by looking at the reflection characteristics of the end face AA' in the direction of arrow A into the input double wave matching circuit 19. Fig.16 In the figure, the load placement identifiers at 2.7 GHz, which is equivalent to the fundamental wave, and 5.4 GHz, which is equivalent to the double wave, are indicated.

[0117] The fundamental wave resonant circuit 19a is Fig.15 The parallel resonant circuit resonates at the fundamental frequency when the end surface A-A' is observed. Therefore, Fig.16 As shown, the phase of the reflection coefficient of the input double wave matching circuit 19 under the fundamental wave (2.7GHz) is 180 degrees, that is, open circuit. In addition, no matter what load is connected to the connection point between the capacitor 15 and the inductor 16, it will not affect the reflection coefficient of the input double wave matching circuit 19 under the fundamental wave.

[0118] Next, the reflection coefficient of the input double wave matching circuit 19 at the double wave (5.4 GHz) becomes short-circuited.

[0119] When the capacitor 15 and the inductor 16 constituting the double wave resonant circuit 19b are made to resonate at the double wave, Fig.15 The phase of the reflection coefficient of the input double wave matching circuit 19 seen from the end face A-A' is different from that of the short circuit mainly due to the influence of the capacitor 13. Therefore, the inductance of the inductor 16 is adjusted so that the reflection coefficient of the input double wave matching circuit 19 under the double wave is different from that under the short circuit mainly due to the influence of the capacitor 13. Fig.15 The reflection coefficient of the input double wave matching circuit 19 viewed from the end face AA' is short-circuited, that is, 180 degrees. As a result, the double wave resonance circuit 19b is set to resonate at a frequency exceeding the fundamental wave and less than the double wave.

[0120] In this specification, the terms "open circuit" and "short circuit" are used conceptually. An open circuit refers to a situation where the phase of the reflection coefficient seen into a certain circuit is approximately 180 degrees and the absolute value of the reflection coefficient is sufficiently large. A short circuit refers to a situation where the phase of the reflection coefficient seen into a certain circuit is approximately 0 degrees and the absolute value of the reflection coefficient is sufficiently large.

[0121] Ideally, an open circuit means an infinite impedance state, and a short circuit means a zero impedance state. However, in actual circuit elements, there are losses, and zero and infinite impedance cannot be achieved. However, even if it is not an ideal short circuit or open circuit, practical effects can be obtained in high-order harmonic processing. The general standard annotation is as follows, that is, the absolute value of the impedance of the high-order harmonic can be less than 1 / 5 times or more than 5 times the impedance of the fundamental wave, and the phase can be plus or minus 15 degrees from the short circuit or open circuit.

[0122] Next, calculation results of the performance of the high-frequency semiconductor device 110 according to the first embodiment are shown.

[0123] Fig.17 It is a diagram showing the calculation results of the power added efficiency of the high-frequency semiconductor device 110 . Fig.17 The horizontal axis represents input power, and the vertical axis represents power added efficiency. The frequency of the fundamental wave input to the high-frequency semiconductor device 110 is set to 2.7 GHz. Fig.17 The solid line in represents the calculation result of the high-frequency semiconductor device 110 , and the dotted line represents the calculation result of the high-frequency semiconductor device 204 (Comparative Example 2).

[0124] The high-frequency semiconductor device 110 shows a maximum efficiency of 81.1% at an input power Pin = 28 dBm. On the other hand, the high-frequency semiconductor device 204 shows a maximum efficiency of 77.9% at an input power Pin = 31 dBm. That is, the high-frequency semiconductor device 110 can obtain a higher power added efficiency than the high-frequency semiconductor device 204.

[0125] Fig.18 It is a diagram showing the calculation result of the gain of the high-frequency semiconductor device 110 . Fig.18 The horizontal axis of represents input power, and the vertical axis represents gain. The frequency of the fundamental wave input to the high-frequency semiconductor device 110 is set to 2.7 GHz. Fig.18 The solid line in represents the calculation result of the high-frequency semiconductor device 110 , and the dotted line represents the calculation result of the high-frequency semiconductor device 204 (Comparative Example 2).

[0126] When the input power is below 20 dBm, the gain of the high-frequency semiconductor device 110 is approximately 19 dB. Fig. 9 The gain of the high-frequency semiconductor device 203 (Comparative Example 1) shown is substantially the same. On the other hand, the gain of the high-frequency semiconductor device 204 (Comparative Example 2) is approximately 15 dB in the range of input power below 20 dBm. That is, the high-frequency semiconductor device 110 can obtain a higher gain than the high-frequency semiconductor device 204.

[0127] As described above, the high-frequency semiconductor device 100 involved in embodiment 1 comprises: a semiconductor substrate 1; a first unit transistor unit 7 and a second unit transistor unit 8, which are unit transistor units composed of a plurality of multi-finger transistors whose input electrodes and output electrodes are respectively connected in parallel, and are arranged adjacent to each other on the upper surface of the semiconductor substrate 1; a first capacitor 13, which is arranged on the upper surface of the semiconductor substrate 1, and one end of which is connected to the input electrode of the first unit transistor unit 7; a first inductor 14, which is arranged on the upper surface of the semiconductor substrate 1, and one end of which is connected to the input electrode of the second unit transistor unit 8 connection; a second capacitor 15, arranged on the upper surface of the semiconductor substrate 1, one end of which is connected to the other end of the first capacitor 13 and the other end of the first inductor 14; and a second inductor 16, arranged on the upper surface of the semiconductor substrate 1, one end of which is connected to the other end of the second capacitor 15, and the other end of which is connected to the ground terminal, the first capacitor 13 and the first inductor 14 resonate at the frequency of the fundamental wave, and the impedance seen from the input electrode of the first unit transistor unit 7 to the first capacitor 13 side and the impedance seen from the input electrode of the second unit transistor unit 8 to the first inductor 14 side are short-circuited at the double wave.

[0128] The high-frequency semiconductor device 100 according to the first embodiment includes a resistor that connects an input electrode of the first unit transistor cell 7 and an input electrode of the second unit transistor cell 8 .

[0129] Furthermore, the high-frequency semiconductor device 100 involved in embodiment 1 comprises: a first bonding pad 11, which is arranged on the upper surface of the semiconductor substrate 1 and is connected between one end of the first capacitor 13 and the input electrode of the first unit transistor unit 7; a second bonding pad 12, which is arranged on the upper surface of the semiconductor substrate 1 and is connected between one end of the first inductor 14 and the input electrode of the second unit transistor unit 8; and an output bonding pad 10, which is arranged on the upper surface of the semiconductor substrate 1 and is connected to the output electrodes of the first unit transistor unit 7 and the second unit transistor unit 8.

[0130] In addition, the high-frequency semiconductor device 110 involved in embodiment 1 further includes: an input matching circuit 22, which has an input terminal 21 for signal input and is connected to the first bonding pad 11 and the second bonding pad 12; and an output matching circuit 23, which has an output terminal 24 for outputting a signal and is connected to the output bonding pad 10.

[0131] With such a configuration, the reflection coefficient of the input double wave matching circuit 19 can be set to open circuit at the fundamental wave and short circuit at the double wave, so that the high-frequency semiconductor device 110 can achieve both high power added efficiency and high gain.

[0132] In addition, one input double wave matching circuit 19 is shared by two adjacent unit transistor cells. In particular, since the capacitor 15 for blocking direct current, which requires a large chip area, is shared, the area of ​​the high-frequency semiconductor device 100 can be reduced.

[0133] In addition, the gate electrodes of the unit transistor cells 7 and 8 are connected in parallel via the gate feeder 9 as a resistor, thereby achieving an oscillation suppression effect. Generally speaking, the higher the gain, the greater the importance of oscillation suppression. As described above, in the high-frequency semiconductor device 110 that achieves a high gain, the oscillation suppression effect based on the gate feeder 9 functions more effectively.

[0134] In the first embodiment, an example of the high-frequency semiconductor device 100 including two unit transistor cells on a semiconductor substrate is described. However, in order to increase output power, the device may be configured to include more unit transistor cells.

[0135] exist Fig.19 as well as Fig. 20 Such a modification example is shown in FIG. Fig.19 1 is a diagram showing a high-frequency semiconductor device 101 according to a modified example of the first embodiment. Fig. 20 FIG. 1 is a diagram showing a high-frequency semiconductor device 102 according to a modified example of the first embodiment. Fig.19 as well as Fig. 20 7a to 7c are first unit transistor cells, and 8a to 8c are second unit transistor cells.

[0136] like Fig.19 As shown, on the semiconductor substrate 1 of the high-frequency semiconductor device 101, six unit transistor cells are arranged adjacent to each other in a straight line in the order of 7a, 8a, 7b, 8b, 7c, and 8c. The gate electrodes of the unit transistor cells 7a and 8a, 7b and 8b, and 8a and 8b are connected by a gate feed line 9. By making the gate feed line 9 have a certain resistance value, oscillations including ring oscillations can be suppressed. The drain electrodes of the unit transistor cells 7a to 7c and 8a to 8c are connected to the output bonding pad 10. In other words, the output bonding pad 10 is shared.

[0137] The gate electrodes of the unit transistor cells 7a to 7c are connected to the bonding pad 11 provided on the upper surface of the semiconductor substrate 1 via the extended wiring, and the bonding pad 11 is connected to the capacitor 13. In addition, the gate electrodes of the unit transistor cells 8a to 8c are connected to the bonding pad 12 provided on the upper surface of the semiconductor substrate 1 via the extended wiring, and the bonding pad 12 is connected to the inductor 14.

[0138] The high frequency semiconductor device 101 includes three capacitors 13 and three inductors 14, which are connected to one end of a capacitor 15. In other words, the capacitor 15 is shared. The other end of the capacitor 15 is connected to one end of three inductors 16.

[0139] In the high-frequency semiconductor device 101, the unit transistor cell 7a as the first unit transistor cell and the unit transistor cell 8a as the second unit transistor cell are arranged adjacent to each other. Similarly, the unit transistor cells 7b and 8b, and 7c and 8c are arranged adjacent to each other. From the perspective of the high-frequency semiconductor device 101 as a whole, the first unit transistor cells 7a to 7c and the second unit transistor cells 8a to 8c are arranged alternately. Other descriptions are omitted.

[0140] On the other hand, Fig. 20 In the high frequency semiconductor device 102 shown in FIG. 1 , six unit transistor cells are arranged adjacent to each other in a straight line in the order of 7a, 8a, 8b, 7b, 7c, and 8c. Fig.19 Similarly to the high-frequency semiconductor device 101 shown in the figure, in the high-frequency semiconductor device 102, the unit transistor cells 7a and 8a, 7b and 8b, and 7c and 8c are also arranged adjacent to each other. However, the unit transistor cells 8a and 8b, and 7b and 7c are arranged adjacent to each other. That is, unlike the high-frequency semiconductor device 101, when the high-frequency semiconductor device 102 is viewed as a whole, the first unit transistor cells and the second unit transistor cells are not arranged alternately.

[0141] Such high-frequency semiconductor devices 101 and 102 perform completely the same operation. In other words, when the first unit transistor cell and the second unit transistor cell are considered as a pair, the orientation of the pair may or may not be the same. Other descriptions are omitted.

[0142] Even the high-frequency semiconductor devices 101 and 102 configured in this way can achieve the effects of achieving both high power added efficiency and high gain, similarly to the high-frequency semiconductor device 110 .

[0143] In addition, although an example in which the high-frequency semiconductor device 100 has two unit transistor cells and an example in which the high-frequency semiconductor devices 101 and 102 have six unit transistor cells are shown, it is obvious that the number of unit transistor cells included in the high-frequency semiconductor device is not limited to two or six.

[0144] Implementation Method 2

[0145] Embodiment 2 will be described. The description of the same parts as those of the configuration and operation described in Embodiment 1 may be omitted. In addition, Embodiment 2 can be implemented in combination with a modification of Embodiment 1.

[0146] Fig.21 It is a top view of the high-frequency semiconductor device 103 according to the second embodiment.

[0147] The high-frequency semiconductor device 103 is different from the high-frequency semiconductor device 100 in that a bonding pad 20 as a third bonding pad is provided on the upper surface of the semiconductor substrate 1 of the high-frequency semiconductor device 103. The bonding pad 20 is connected to one end of the capacitor 15 as the second capacitor. The rest is the same as the high-frequency semiconductor device 100.

[0148] Fig. 22 : is an equivalent circuit diagram of the high-frequency semiconductor device 120 according to the second embodiment.

[0149] The high-frequency semiconductor device 120 is different from the high-frequency semiconductor device 110 and includes a high-frequency semiconductor device 103. One end of a bonding wire 30 serving as an inductor is connected to a bonding pad 20 provided on the high-frequency semiconductor device 103. The other end of the bonding wire 30 is connected to one end of a capacitor 31. The capacitor 31 is arranged near the high-frequency semiconductor device 103 in the housing of the high-frequency semiconductor device 120. The other end of the capacitor 31 is fixed to the housing of the high-frequency semiconductor device 120 by a bonding material such as solder or a conductive adhesive and is connected. The housing of the high-frequency semiconductor device 120 provides a ground potential, and the other end of the capacitor 31 is grounded. The rest is the same as the high-frequency semiconductor device 110.

[0150] However, one of the main uses of high-frequency semiconductor devices is a power amplifier for communication. In communication applications, a carrier is modulated and information is superimposed on the carrier. For example, the modulation frequency in the modulation method used in mobile phones is several MHz to tens of MHz, which is lower than the carrier. In addition, it is known that at the modulation frequency, by short-circuiting the load of the input matching circuit seen from the input of the high-frequency semiconductor, it is possible to suppress unnecessary distorted signals generated from the high-frequency semiconductor device.

[0151] For this reason, in the high-frequency semiconductor device 120, a capacitor 31 with a large capacity, such as a micro-F class, which becomes a short circuit at the modulation frequency is used. Since the capacitor 31 is arranged near the high-frequency semiconductor device 103, the bonding wire 30 is short and its inductance is small enough to be regarded as a short circuit at the modulation frequency. In addition, the inductor 14 formed on the semiconductor substrate 1 is small in size and its inductance has no effect at the modulation frequency and can be regarded as a short circuit. Therefore, the input load seen from the input electrodes of the unit transistor units 7 and 8 to the input double wave matching circuit 19 becomes a short circuit. Therefore, in the high-frequency semiconductor device 120 involved in the second embodiment, it is possible to suppress unnecessary distorted signals generated from the high-frequency semiconductor device 103.

[0152] On the other hand, at the fundamental wave, even if an arbitrary load is connected to the connection point between the capacitor 15 and the inductor 16 as described above, it does not affect the reflection coefficient at the fundamental wave of the input double wave matching circuit 19. In addition, by setting the inductance of the bonding wire 30 to be sufficiently large so that the load of the bonding wire 30 becomes an open circuit at the double wave, the load at the double wave of the input double wave matching circuit 19 does not change and remains short-circuited.

[0153] As described above, the high-frequency semiconductor device 103 involved in the second embodiment comprises: a semiconductor substrate 1; a first unit transistor unit 7 and a second unit transistor unit 8, which are unit transistor units composed of a plurality of multi-finger transistors whose input electrodes and output electrodes are respectively connected in parallel, and are arranged adjacent to each other on the upper surface of the semiconductor substrate 1; a first capacitor 13, which is arranged on the upper surface of the semiconductor substrate 1, and one end of which is connected to the input electrode of the first unit transistor unit 7; a first inductor 14, which is arranged on the upper surface of the semiconductor substrate 1, and one end of which is connected to the input electrode of the second unit transistor unit 8. The first unit transistor unit 7 and the first inductor 14 are connected to the first capacitor 13 and the first inductor 14. The second unit transistor unit 7 and the first inductor 14 are connected to the first capacitor 13 and the first inductor 14. The second unit transistor unit 7 and the first inductor 14 are connected to the first capacitor 13 and the first inductor 14. The first unit transistor unit 7 and the first inductor 14 are connected to the first capacitor 13 and the first inductor 14. The first unit transistor unit 7 and the first inductor 14 are connected to the first capacitor 13 and the first inductor 14. The impedance seen from the input electrode of the first unit transistor unit 7 to the first capacitor 13 and the impedance seen from the input electrode of the second unit transistor unit 8 to the first inductor 14 are short-circuited at the double wave.

[0154] In addition, the high-frequency semiconductor device 103 involved in embodiment 2 comprises: a first bonding pad 11, which is arranged on the upper surface of the semiconductor substrate 1 and is connected between one end of the first capacitor 13 and the input electrode of the first unit transistor unit 7; a second bonding pad 12, which is arranged on the upper surface of the semiconductor substrate 1 and is connected between one end of the first inductor 14 and the input electrode of the second unit transistor unit 8; an output bonding pad 10, which is arranged on the upper surface of the semiconductor substrate 1 and is connected to the output electrodes of the first unit transistor unit 7 and the second unit transistor unit 8; and a third bonding pad 20, which is arranged on the upper surface of the semiconductor substrate 1 and is connected to one end of the second capacitor 15.

[0155] In addition, the high-frequency semiconductor device 120 involved in embodiment 2 also has: an input matching circuit 22, which has an input terminal 21 for signal input and is connected to the first bonding pad 11 and the second bonding pad 12; an output matching circuit 23, which has an output terminal 24 for outputting a signal and is connected to the output bonding pad 10; an inductor 30, one end of which is connected to the third bonding pad 20; and a capacitor 31, one end of which is connected to the other end of the inductor 30 and the other end is grounded.

[0156] Here, the inductor 30 has an inductance that becomes open-circuited at twice the carrier frequency of the signal input to the input terminal 21 and becomes short-circuited at the modulation frequency of the signal input to the input terminal 21 , and the capacitor 31 has a capacitance that becomes short-circuited at the modulation frequency.

[0157] According to such a structure, the phase of the reflection coefficient of the input double wave matching circuit 19 can be set to open circuit at the fundamental wave and short circuit at the double wave. Therefore, similar to the high-frequency semiconductor device 110, the high-frequency semiconductor device 120 achieves the effect of achieving both high power added efficiency and high gain.

[0158] Furthermore, since the capacitor 31 is connected to the input double wave matching circuit 19, the input load seen from the input electrodes of the unit transistor cells 7 and 8 to the input double wave matching circuit 19 becomes a short circuit at the modulation frequency. Therefore, in the high-frequency semiconductor device 120 involved in the second embodiment, it is possible to suppress unnecessary distorted signals generated from the high-frequency semiconductor device 103.

[0159] The load open circuit of the bonding wire 30 means that it only needs to be large enough relative to the double wave resonant circuit 19b. As a rough guideline, the inductance of the bonding wire 30 can be 10 times or more relative to the inductor 16. In addition, if the inductance of the bonding wire 30 alone is insufficient, other inductors can be connected in series to supplement the inductance.

[0160] Implementation 3

[0161] Embodiment 3 will be described. The description of the same parts as those of the configuration and operation described in Embodiment 1 or 2 may be omitted. Embodiment 3 can be implemented in combination with the modification of Embodiment 1.

[0162] Fig.23 It is a top view of the high-frequency semiconductor device 104 according to the third embodiment.

[0163] The high-frequency semiconductor device 104 is different from the high-frequency semiconductor device 103 in that a triple-wave matching circuit 26 is provided on the upper surface of the semiconductor substrate 1, and the other structures are the same as the high-frequency semiconductor device 103. In addition, the high-frequency semiconductor device 104 is different from the high-frequency semiconductor device 100 in that a bonding pad 20 as a third bonding pad and a triple-wave matching circuit 26 are provided on the upper surface of the semiconductor substrate 1, and the other structures are the same as the high-frequency semiconductor device 100.

[0164] The triple wave matching circuit 26 is connected to one end of the capacitor 15 as the second capacitor. In other words, the triple wave matching circuit 26 is connected to the other end of the capacitor 13 and the other end of the inductor 14.

[0165] The circuit constants of the triple wave matching circuit 26 are set so that at the triple wave frequency, the impedance seen from the input electrode of the first unit transistor cell 7 to the first capacitor 13 and the impedance seen from the input electrode of the second unit transistor cell 8 to the first inductor 14 are short-circuited.

[0166] The triple wave matching circuit 26 can also be composed of circuit elements such as MIM, capacitors, inductors, transmission lines, and through holes. The triple wave matching circuit 26 can be configured as a distributed constant circuit, a lumped constant circuit, or a circuit mixed with these. For example, it can be set as a series resonant circuit of a capacitor and an inductor, a parallel resonant circuit, a short-circuited stub, an open-circuited stub, a transmission line, or a combination of these. By manufacturing these on the semiconductor substrate 1 using a semiconductor process with high working accuracy, it is possible to manage impedance with high accuracy even with respect to a triple wave with high frequency.

[0167] Fig.24 1 is an equivalent circuit diagram of a high-frequency semiconductor device 130 according to Embodiment 3. Unlike the high-frequency semiconductor device 110 , the high-frequency semiconductor device 130 includes a high-frequency semiconductor device 104 . The other structures are the same as those of the high-frequency semiconductor device 110 .

[0168] Similar to the high-frequency semiconductor device 100 , the high-frequency semiconductor device 104 includes the input double wave matching circuit 19 . Therefore, similar to the high-frequency semiconductor device 110 , the high-frequency semiconductor device 130 achieves both high power added efficiency and high gain.

[0169] Furthermore, the high-frequency semiconductor device 104 includes a triple wave matching circuit 26, which can short-circuit the impedance seen from the input electrode of the first unit transistor cell 7 to the first capacitor 13 side and the impedance seen from the input electrode of the second unit transistor cell 8 to the first inductor side at both the double wave and triple wave frequencies. Therefore, the high-frequency semiconductor device 130 has the effect of being able to obtain a higher power added efficiency than the high-frequency semiconductor device 110.

[0170] However, in the design of input matching circuits or output matching circuits of high-frequency semiconductor devices, when the load impedance at the fundamental wave, double wave, and triple wave is to be controlled, the optimization of the load at one frequency generally affects the load at other frequencies. Therefore, if the optimization of three frequencies is to be performed simultaneously, there is a possibility that the number of circuit elements increases, the high-frequency semiconductor becomes larger, or the frequency range that can be optimized becomes narrower and cannot be fully optimized with limited circuit elements.

[0171] Here, refer to Fig.24The double wave resonance circuit 19b is connected in parallel with the triple wave matching circuit 26. In addition, the input matching circuit 22 is connected in parallel with the input double wave matching circuit 19 as viewed from the input electrodes of the unit transistor cells 7 and 8.

[0172] However, in the high-frequency semiconductor device 104, since the capacitor 15 and the inductor 16 resonate at the fundamental wave, even if an arbitrary load is connected to the connection point of the capacitor 15 and the inductor 16, the impedance seen from the input electrode of the first unit transistor unit 7 and the input electrode of the second unit transistor unit 8 is not affected at the fundamental wave. Therefore, the double wave resonant circuit 19b and the triple wave matching circuit 26 can optimize the circuit without considering the impedance of the fundamental wave. In addition, the input matching circuit 22 can optimize the circuit without being affected by the double wave resonant circuit 19b and the triple wave matching circuit 26. That is, in the third embodiment, the circuit design becomes easy.

[0173] As described above, the high-frequency semiconductor device 104 involved in the third embodiment comprises: a semiconductor substrate 1; a first unit transistor unit 7 and a second unit transistor unit 8, which are unit transistor units composed of a plurality of multi-finger transistors whose input electrodes and output electrodes are respectively connected in parallel, and are arranged adjacent to each other on the upper surface of the semiconductor substrate 1; a first capacitor 13, which is arranged on the upper surface of the semiconductor substrate 1, and one end of which is connected to the input electrode of the first unit transistor unit 7; a first inductor 14, which is arranged on the upper surface of the semiconductor substrate 1, and one end of which is connected to the input electrode of the second unit transistor unit 8. connection; a second capacitor 15, arranged on the upper surface of the semiconductor substrate 1, one end of which is connected to the other end of the first capacitor 13 and the other end of the first inductor 14; and a second inductor 16, arranged on the upper surface of the semiconductor substrate 1, one end of which is connected to the other end of the second capacitor 15, and the other end of which is connected to the ground terminal, the first capacitor 13 and the first inductor 14 resonate at the frequency of the fundamental wave, and the impedance seen from the input electrode of the first unit transistor unit 7 to the first capacitor 13 side and the impedance seen from the input electrode of the second unit transistor unit 8 to the first inductor 14 side are short-circuited at the double wave.

[0174] In addition, the high-frequency semiconductor device 104 involved in embodiment 3 comprises: a first bonding pad 11, which is arranged on the upper surface of the semiconductor substrate 1 and is connected between one end of the first capacitor 13 and the input electrode of the first unit transistor unit 7; a second bonding pad 12, which is arranged on the upper surface of the semiconductor substrate 1 and is connected between one end of the first inductor 14 and the input electrode of the second unit transistor unit 8; an output bonding pad 10, which is arranged on the upper surface of the semiconductor substrate 1 and is connected to the output electrodes of the first unit transistor unit 7 and the second unit transistor unit 8; and a third bonding pad 20, which is arranged on the upper surface of the semiconductor substrate 1 and is connected to one end of the second capacitor 15.

[0175] In addition, the high-frequency semiconductor device 104 involved in embodiment 3 has a triple wave matching circuit 26, which is arranged on the upper surface of the semiconductor substrate 1, connected to the other end of the first capacitor 13 and the other end of the first inductor 14, and the circuit constants are set in such a way that the impedance seen from the input electrode of the first unit transistor unit 7 to the first capacitor 13 side and the impedance seen from the input electrode of the second unit transistor unit 8 to the first inductor 14 side are short-circuited at the frequency of the triple wave.

[0176] In addition, the high-frequency semiconductor device 130 involved in embodiment 3 also includes: an input matching circuit 22, which has an input terminal 21 for signal input and is connected to the first bonding pad 11 and the second bonding pad 12; and an output matching circuit 23, which has an output terminal 24 for outputting a signal and is connected to the output bonding pad 10.

[0177] As described above, the high-frequency semiconductor device 104 is configured to include an input double wave matching circuit 19 and a triple wave matching circuit 26, so that the impedance seen from the input electrode of the first unit transistor unit 7 to the first capacitor 13 side and the impedance seen from the input electrode of the second unit transistor unit 8 to the first inductor side can be short-circuited at both the double wave and the triple wave frequencies. Therefore, the high-frequency semiconductor device 130 can achieve the effect of both high power added efficiency and high gain, similarly to the high-frequency semiconductor device 100. In addition, the high-frequency semiconductor device 130 has the effect of being able to obtain a higher power added efficiency than the high-frequency semiconductor device 100.

[0178] Furthermore, the high-frequency semiconductor device 130 may be configured such that the triple-wave matching circuit is not provided on the semiconductor substrate 1 but is provided outside the high-frequency semiconductor and is connected to the third bonding pad.

[0179] Fig.25 1 is a diagram showing a high-frequency semiconductor device 140 according to a modification of the third embodiment. For example, the high-frequency semiconductor device 120 according to the second embodiment has a capacitor 31 connected to the bonding pad 20, which is short-circuited at the modulation frequency. Fig.25 As shown, in the high-frequency semiconductor device 140 , one end of a bonding wire 30 as an inductor is connected to the bonding pad 20 . The other end of the bonding wire 30 is connected to the triple-wave matching circuit 27 .

[0180] Taking into account the inductance of the bonding wire 30, by appropriately designing the triple wave matching circuit 27 in such a way that the impedance seen from the input electrode of the first unit transistor unit 7 to the first capacitor 13 side and the impedance seen from the input electrode of the second unit transistor unit 8 to the first inductor 14 side are short-circuited at the frequency of the triple wave, the high-frequency semiconductor device 140 can achieve the same effect as the high-frequency semiconductor device 130.

[0181] In addition, the connection based on the bonding wire in the present disclosure can be replaced by a connection based on a bump. In addition, the present disclosure can freely combine the various embodiments within the scope of the disclosure, and can appropriately change or omit the various embodiments.

[0182] Description of Reference Numerals

[0183] 1...semiconductor substrate; 2...gate electrode; 3...source electrode; 4...drain electrode; 5...through hole; 6, 9...gate feed line; 7, 7a~7c, 8, 8a~8c...unit transistor unit; 10...output bonding pad; 11, 12, 20...bonding pad; 13, 15, 31...capacitor; 14, 16...inductor; 17, 18, 30...bonding wire; 19...input double wave matching circuit; 19a...fundamental wave resonance circuit; 19b...double wave resonance circuit; 21...input terminal; 22...input matching circuit; 23...output matching circuit; 24...output terminal; 26, 27...tripling wave matching circuit; 90...transistor; 100, 101, 102, 103, 104, 110, 120, 130, 140...high frequency semiconductor device.

Claims

1. A high frequency semiconductor device, The high frequency semiconductor device comprises: Semiconductor substrates; The first unit transistor unit and the second unit transistor unit are unit transistor units composed of a plurality of multi-finger transistors whose input electrodes and output electrodes are respectively connected in parallel, and are arranged adjacent to each other on the upper surface of the semiconductor substrate; A first capacitor, disposed on the upper surface of the semiconductor substrate, one end of which is connected to the input electrode of the first unit transistor unit; A first inductor, disposed on the upper surface of the semiconductor substrate, one end of which is connected to the input electrode of the second unit transistor unit; a second capacitor, disposed on the upper surface of the semiconductor substrate, one end of which is connected to the other end of the first capacitor and the other end of the first inductor; as well as A second inductor is disposed on the upper surface of the semiconductor substrate, one end of which is connected to the other end of the second capacitor, and the other end of which is connected to the ground terminal. It is characterized in that The first capacitor and the first inductor resonate at the frequency of the fundamental wave, The impedance viewed from the input electrode of the first unit transistor cell toward the first capacitor and the impedance viewed from the input electrode of the second unit transistor cell toward the first inductor are short-circuited at the frequency of the double wave.

2. The high-frequency semiconductor device according to claim 1, characterized in that The high-frequency semiconductor device includes a resistor connecting an input electrode of the first unit transistor cell and an input electrode of the second unit transistor cell.

3. The high-frequency semiconductor device according to claim 1 or 2, characterized in that: The high frequency semiconductor device comprises: a first bonding pad, disposed on the upper surface of the semiconductor substrate and connected between one end of the first capacitor and an input electrode of the first unit transistor unit; a second bonding pad disposed on the upper surface of the semiconductor substrate and connected between one end of the first inductor and an input electrode of the second unit transistor cell; as well as An output bonding pad is provided on the upper surface of the semiconductor substrate and is connected to an output electrode of the first unit transistor cell and an output electrode of the second unit transistor cell.

4. The high frequency semiconductor device according to claim 3, characterized in that: The high-frequency semiconductor device includes a third bonding pad provided on the upper surface of the semiconductor substrate and connected to one end of the second capacitor.

5. The high-frequency semiconductor device according to claim 1 or 2, characterized in that: The high-frequency semiconductor device has a triple wave matching circuit, which is arranged on the upper surface of the semiconductor substrate, connected to the other end of the first capacitor and the other end of the first inductor, and has circuit constants set in such a way that the impedance seen from the input electrode of the first unit transistor unit to the first capacitor side and the impedance seen from the input electrode of the second unit transistor unit to the first inductor side are short-circuited at the frequency of the triple wave.

6. The high-frequency semiconductor device according to claim 5, characterized in that The high frequency semiconductor device comprises: a first bonding pad, disposed on the upper surface of the semiconductor substrate and connected between one end of the first capacitor and an input electrode of the first unit transistor unit; a second bonding pad disposed on the upper surface of the semiconductor substrate and connected between one end of the first inductor and an input electrode of the second unit transistor cell; as well as An output bonding pad is provided on the upper surface of the semiconductor substrate and is connected to an output electrode of the first unit transistor cell and an output electrode of the second unit transistor cell.

7. The high-frequency semiconductor device according to claim 1 or 2, characterized in that: The high frequency semiconductor device comprises: An input matching circuit, disposed on the upper surface of the semiconductor substrate, having an input terminal for signal input and connected to an input electrode of the first unit transistor unit and an input electrode of the second unit transistor unit; and The output matching circuit is disposed on the upper surface of the semiconductor substrate, has an output terminal for outputting a signal, and is connected to an output electrode of the first unit transistor unit and an output electrode of the second unit transistor unit.

8. The high frequency semiconductor device according to claim 3, characterized in that: The high frequency semiconductor device comprises: an input matching circuit having an input terminal for signal input and connected to the first bonding pad and the second bonding pad; and The output matching circuit has an output terminal for outputting a signal and is connected to the output bonding pad.

9. The high-frequency semiconductor device according to claim 8, characterized in that The high frequency semiconductor device comprises: a third bonding pad, disposed on the upper surface of the semiconductor substrate and connected to one end of the second capacitor; an inductor having one end connected to one end of the third bonding pad; and A capacitor, one end of which is connected to the other end of the inductor and the other end is grounded. The inductor has an inductance that becomes an open circuit at a frequency that is twice a carrier frequency of a signal input to the input terminal and becomes a short circuit at a modulation frequency of the signal input to the input terminal. The capacitor has a capacitance that becomes a short circuit at the modulation frequency.

10. The high frequency semiconductor device according to claim 8, characterized in that The high-frequency semiconductor device has a triple wave matching circuit, which is arranged on the upper surface of the semiconductor substrate, connected to the other end of the first capacitor and the other end of the first inductor, and has circuit constants set in such a way that the impedance seen from the input electrode of the first unit transistor unit to the first capacitor side and the impedance seen from the input electrode of the second unit transistor unit to the first inductor side are short-circuited at the frequency of the triple wave.

11. The high frequency semiconductor device according to claim 8, characterized in that The high frequency semiconductor device comprises: a third bonding pad, disposed on the upper surface of the semiconductor substrate and connected to one end of the second capacitor; and The triple wave matching circuit is connected to the third bonding pad via an inductor, and has circuit constants set in such a way that the impedance viewed from the input electrode of the first unit transistor unit to the first capacitor side and the impedance viewed from the input electrode of the second unit transistor unit to the first inductor side are short-circuited at the frequency of the triple wave.

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