Feedforward amplifier

Abstract

The feedforward amplifier (40) includes: a power amplifier (13) that generates an amplified signal (S a ); an error correction circuit (21) that generates a first error signal (S a ) and a second error signal (S 1e ) based on an error in the amplified signal (S 2e ); and an output circuit (22). The output circuit includes: a first quadrature coupler (23) to which an output terminal of a first error amplifier (24) is connected, and an input terminal of the first error amplifier is configured to receive the first error signal (S 1e ), and an output terminal of a second error amplifier (25) is connected to the quadrature coupler (23), and an input terminal of the second error amplifier is configured to receive the second error signal (S 2e ). The output circuit generates an error compensation signal in the first quadrature coupler (23) according to output signals of the first and second error amplifiers (24, 25).

Description

Technical Field

[0001] The present disclosure relates to a feed - forward amplifier. More specifically, the present invention relates to error correction or control in a feed - forward amplifier. In addition, a radio network node and a user equipment in a wireless communication system, and an electronic device generally including an amplifier circuit are disclosed. Background Art

[0002] Power amplifiers are widely used, for example, in radio base stations and user equipments in a wireless communication system. A power amplifier generally amplifies a high - frequency input signal into an output signal ready for radio transmission. It is generally desirable for a power amplifier to have high efficiency and linearity to reduce power consumption and to minimize errors and / or distortion in the output signal.

[0003] Error or distortion correction techniques generally applicable to power amplifiers include feedback, predistortion, and feed - forward techniques. Among these techniques, for systems with wide bandwidth and strict linearity requirements, only so - called adaptive predistortion and feed - forward techniques are practical.

[0004] Adaptive predistortion, which is commonly used in digital implementations, is a linearization technique that works by providing a reverse - non - linear signal to the input of a non - linear amplifier so that the output signal becomes linear. To shape the non - linear input signal of the amplifier, adaptive predistortion techniques use sampling of the output signal of the amplifier and non - linear modeling and adaptive signal processing. The main benefit of this technique is that the efficiency of the amplifier is hardly affected.

[0005] However, adaptive digital predistortion techniques cannot cancel noise and handle several types of distortion poorly or not at all. The predistortion signal generally has a much higher bandwidth than the final output signal, especially for compression in the transfer function, low or negative gain - slope regions, and sharp kinks. Digital predistortion systems require a correct set of model parameters, which are sometimes difficult to determine. If the behavior of the produced amplifier is different from the model, a particular set of model parameters may not work in practice. For complex error handling, the complexity of the signal processing and the consequent size and power consumption may be high. The requirements for high bandwidth and low distortion exacerbate these problems.

[0006] Feed - forward is a linearization technique that works by injecting a correction signal after the main amplifier to restore linearity.

[0007] The directional coupler has a coupling loss close to zero for an injection signal that is in phase with the output signal of the main amplifier and proportional to the coupling factor, but has a high loss for injection signals far from these conditions. Even if the error in the output signal is zero, the directional coupler dumps a portion of the output signal power of the main amplifier into a resistor. However, this does not impose a specific penalty on signals with low amplitude in the main path because the error amplifier is isolated from the main circuit by the directional coupler. Additionally, if the error in the output signal is small on average compared to the maximum error, the average efficiency of the error amplifier is low.

[0008] Transformer coupling does not have this inherent coupling loss, but it affects the efficiency of the error amplifier and disturbs the correction due to the backward (reverse) wave. The backward wave reflects at the main amplifier and interacts with the main amplifier, which generates new distortion products and ripples in the output. Due to these problems, the transformer coupling method has been largely deprecated in favor of using the directional coupler method.

[0009] Feedforward using the distributed amplifier error injection method overcomes the disadvantages of transformer coupling because of its good directivity and has lower insertion loss compared to traditional directional coupler-based methods. Its main disadvantage is that the number of amplifiers increases with the increase in bandwidth and directivity requirements, especially when only amplifiers of a single size are available. SUMMARY OF THE INVENTION

[0010] An object of the present disclosure is to mitigate, alleviate, or eliminate one or more of the above-mentioned deficiencies and drawbacks in the prior art and at least solve the problems mentioned above. Accordingly, an object of the embodiments herein is to provide an improved amplifier circuit for error or distortion correction of signals output by a circuit such as the main amplifier mentioned above.

[0011] This object is achieved by a feedforward amplifier for amplifying an input signal received at an input port and providing an output signal at an output port. The feedforward amplifier includes: at least one power amplifier configured to receive the input signal and generate an amplified signal; an error correction circuit configured to generate a first error signal and a second error signal based on an error in the amplified signal generated when amplifying the input signal; and an output circuit.

[0012] The output circuit includes: a first quadrature coupler having a first port configured to receive an amplified signal, a second port configured to generate an output signal, a third port, and a fourth port; and a first error amplifier and a second error amplifier. The output terminal of the first error amplifier is configured to be connected to the third port, and the input terminal of the first error amplifier is configured to receive a first error signal. The output terminal of the second error amplifier is configured to be connected to the fourth port, and the input terminal of the second error amplifier is configured to receive a second error signal.

[0013] The output circuit is configured to generate an error compensation signal in the first quadrature coupler based on the output signals of the first error amplifier and the second error amplifier, and the error compensation signal is synchronized with and in antiphase to the error in the amplified signal.

[0014] The advantages of using the feedforward amplifier circuit according to the embodiments herein are as follows: It simultaneously achieves low insertion loss of the transformer-coupled circuit and good large-scale correction ability. It has high efficiency for errors with high peak-to-average power ratio and compression errors. By using a multi-section hybrid coupler, correction over a large bandwidth can be achieved while maintaining directivity. The output circuit uses only two single-size radio frequency (RF) amplifiers, even for a large bandwidth. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] The above will become apparent from a more particular description of the following exemplary embodiments as illustrated in the accompanying drawings, in which like reference numerals refer to the same parts throughout the different views. The drawings are not necessarily to scale, but are focused on illustrating the exemplary embodiments.

[0016] Figure 1 A feedforward amplifier circuit of the prior art is shown.

[0017] Figure 2 A general example of a feedforward amplifier according to the present disclosure is shown.

[0018] Figure 3 An exemplary feedforward amplifier according to an embodiment of the present disclosure is shown.

[0019] Figure 4 An example of a feedforward amplifier having two-step extraction of an error signal is shown.

[0020] Figure 5 An exemplary feedforward amplifier according to another embodiment of the present disclosure is shown.

[0021] Figure 6a and Figure 6b Two example architectures of a 90-degree 3dB hybrid coupler according to an embodiment of the present disclosure are shown.

[0022] Figure 7a and Figure 7b show two example architectures of a 180° directional coupler.

[0023] Figure 8 show the distribution of the desired signal (output), the distorted output of the main amplifier, and the error signal.

[0024] Figure 9 show a comparison of the outputs obtained in a prior art amplifier circuit and in a feed - forward amplifier. DETAILED DESCRIPTION

[0025] The solutions of the present disclosure will be described more fully hereinafter with reference to the accompanying drawings. However, the circuits and methods disclosed herein may be implemented in many different forms and should not be construed as limited to the solutions set forth herein. Throughout the drawings, like reference numerals refer to like elements.

[0026] The terms used herein are for the purpose of describing particular solutions of the present disclosure only and are not intended to limit the invention. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly dictates otherwise.

[0027] Some of the example embodiments presented herein relate to error correction or control in the output of a feed - forward amplifier. As part of the development of the example embodiments presented herein, a problem will first be set forth and discussed.

[0028] Conventional directional coupler methods (such as those described in conjunction with Figure 1 are generally relatively efficient for errors occurring at low output amplitudes, while balanced error amplifiers are more efficient for errors occurring at high output amplitudes. If the ability to handle large errors is required, the conventional methods are inefficient, while the embodiments of the present disclosure are highly efficient provided that the errors at low output amplitudes are small. Thus, balanced error amplifiers and directional coupler methods are complementary to each other, and in many cases, using them together can be more efficient than using either method alone. In such a combination, the embodiments of the present disclosure can be used to remove large errors, such as transients and compression, while the conventional methods can remove small errors at low amplitudes.

[0029] The feedforward of the present disclosure can also be used in conjunction with predistortion. Predistortion generally can handle distortion at low amplitudes well and does not reduce the efficiency of the amplifier. However, it has problems with transient phenomena and large compression, while the present disclosure handles transient phenomena and large compression well. The feedforward amplifier of the present disclosure can be placed inside or outside the predistortion loop. If it is placed inside, for small errors, in the low amplitude region, its error signal can be advantageously suppressed. If it is placed outside the loop, alternatively the predistorter can ignore compression and transients. Since the embodiments of the present disclosure also handle complex small-scale errors, simplification can also be achieved in other ways.

[0030] Of course, any combination of the described combinations can also be supplemented with more error correction stages as needed.

[0031] Figure 1 A prior art feedforward amplifier circuit 10 is shown. The feedforward amplifier circuit 10 is configured to: amplify an input signal S provided to an input port 11 via an initial directional coupler C1 in and output an output signal S at an output port 12 out . The circuit 10 performs an amplification process, which restores linearity by injecting a correction signal via a final directional coupler C4 after a main amplifier 13. It can handle all types of distortion, noise, and other defects, and can achieve this without knowledge of the specific error processes involved. The circuit 10 includes an error extraction circuit, which includes: a first directional coupler C2 configured to sample the amplified signal S a ; an optional adjustment circuit 15 configured to adjust the gain or phase of the sampled amplified signal; and a second directional coupler C3 configured to compare the sampled amplified signal S a with the input signal S in . To maintain synchronization during error extraction, the input signal (S in ) is delayed by a first delay filter L1. This delay ensures that the input signal S in is synchronized with the amplified signal S a to produce an error extraction signal. The error extraction signal is amplified by a secondary amplifier 14 and injected into the final directional coupler C4. A second delay filter (L2) is provided after the main amplifier 13 to keep the amplified signal S a synchronized with the error signal injected before the output port 12.

[0032] However, a disadvantage of the above-described conventional feedforward method is low efficiency, as combined with Figure 9As shown. This is largely due to losses in the error injection coupler and inefficiency in the error amplifier. Generally, if the maximum error signal (voltage or current) that needs to be processed is large, it will cause large losses in the error injection coupler and inefficiency in the error amplifier (i.e., auxiliary amplifier 14). These losses behave differently for transformer couplers and directional couplers. Other causes such as losses and inefficiency are due to the following: delays in the lines after the main amplifier, signal sampling couplers, and limited accuracy of loop balance in terms of gain, phase, and delay. This means that the error amplifier must have margin to accommodate the residual signal, not just the error signal.

[0033] According to some aspects of the feedforward amplifier circuit 20, a feedforward error correction with low insertion loss and good large-scale correction capability is achieved. It has high efficiency for errors with high peak-to-average power ratio and compression errors. By using a multi-section hybrid coupler, correction over a large bandwidth can be achieved while maintaining directivity. It uses only two amplifiers of a single size, even for large bandwidths.

[0034] Figure 2 The circuit for amplifying the input signal S supplied to the input port 11 is shown. in And output the output signal S at the output port 12 out The feedforward amplifier 20 provides a general example of a feedforward amplifier 20 for the input signal S in The feedforward amplifier 20 is configured to receive an input signal S from the input port 11 and to subtract the error signal from the main amplifier 13. The feedforward amplifier 20 includes at least one power amplifier as the main amplifier 13, an error correction circuit 21, and an output circuit 22. The at least one power amplifier 13 is configured to receive an input signal S from the input port 11. in And generate the amplified signal S a .

[0035] The error correction circuit 21 is configured to in and the amplified signal S a Generate a first error signal S 1e and the second error signal S 2e The first error signal S 1e With the amplified signal S a Inverted, the second error signal S 1e The first error signal S 1e The phase difference is 90 degrees. In the present disclosure, the statement about the first signal being in antiphase with the second signal means that the first signal is phase-shifted by 180 degrees compared with the second signal. According to some embodiments, the first error signal S 1e and the second error signal S 2e have the same amplitude, which is either generated within the error correction circuit 21 or using a splitting device (such asFigures 3 to 5 The second orthogonal coupler 32) shown generates from the error signal S err The function of the splitting device is to split the error signal S err into two signals (corresponding to the first error signal S 1e and the second error signal S 2e ), which two signals have the same amplitude and have a 90-degree phase shift between them.

[0036] The output circuit 22 includes a first orthogonal coupler 23 (also known as an unterminated 90-degree 3 dB coupler), and two connected RF amplifiers 24 and 25, which RF amplifiers 24 and 25 serve as error amplifiers. The first orthogonal coupler 23 has: a first port labeled "input", configured to receive the amplified signal S a ; a second port labeled "output", configured to generate the output signal S out ; a third port labeled "0°"; and a fourth port labeled "90°". The output terminal of the first error amplifier 24 is configured to be connected to the third port 0° of the orthogonal coupler, while the input terminal of the first error amplifier 24 is configured to receive the first error signal S 1e . The output terminal of the second error amplifier 25 is configured to be connected to the fourth port 90°, while the input terminal of the second error amplifier 25 is configured to receive the second error signal S 2e .

[0037] According to some embodiments, the feedforward amplifier further includes at least one second delay line L2 for compensating for the delay in the error correction circuit.

[0038] The orthogonal coupler 23 together with the error amplifiers 24 and 25 allows the amplified signal S a to pass through with very little loss. This is due to the fact that the surrounding components, biasing, and signal levels will generally result in a high reflection coefficient at the output side of the error amplifiers, the signal entering the first port "input" will split and reflect at the two amplifier output terminals (which are connected to the third port 0° and the fourth port 90°), and then merge within the orthogonal coupler to exit at the remaining port (i.e., the second port ISO), where the remaining port is coupled to a load (not shown). The function that the combined signal exits at the remaining port and does not reflect back to the same port (the first port "input") is guaranteed by the operation of the orthogonal coupler. In the absence of the correction outputs from the error amplifiers 24 and 25, the output signal of the main amplifier (i.e., the amplified signal) will thus pass through the delay line L2 and the orthogonal coupler 23 (largely unaffected by it, except for filtering effects such as group delay and phase response), and exit at the output port "output".

[0039] According to some embodiments, the reflection coefficient obtained on the output side of the error amplifier is greater than 95%.

[0040] The output circuit is further configured to generate an error compensation signal in the first quadrature coupler 23 according to the output signals of the first error amplifier 24 and the second error amplifier 25. Thus, the error compensation signal is synchronized and in antiphase with the error in the amplified signal S a . When the input signals of the error amplifiers 24 and 25 have a 90-degree phase difference, they will be combined at the output port "Output" of the quadrature coupler 23, thereby generating an error compensation signal when they are combined. However, imperfect phase alignment will cause a portion of the signal to exit at the first port "Input" and return to the main amplifier 13.

[0041] Refer to later Figure 6a and Figure 6b for a detailed description of the architecture and function of the quadrature coupler (e.g., the first quadrature coupler 23). The first quadrature coupler 23 splits the amplified signal S a into two equal parts. This is also referred to as a reverse coupler, which means that the waves coupled from one line (from port 1 to port 3) to another line (from port 2 to port 4) propagate in opposite directions, see Figure 6a . The wave coupled to the other line also has a 90-degree phase delay with respect to the wave propagating along the direct path on the input line. Therefore, a signal entering at one port will be split into two other ports, each having half the power at each port, and having a 90-degree phase difference between them. For example, a signal entering from the first port "Input" will exit with half the power at the third port at 0° and the other half with a 90-degree lag at the fourth port at 90°. In one embodiment, the first quadrature coupler 23 is a branch-line coupler, see Figure 6b . Throughout the specification, the terms quadrature coupler, 90-degree 3dB hybrid coupler, and hybrid coupler will be used interchangeably and refer to the quadrature coupler.

[0042] Figure 3 shows an embodiment of the feedforward amplifier 30, wherein the error correction circuit 21 includes: a digital signal processor DSP configured to obtain samples of the amplified signal using the sensor 31; and at least one digital-to-analog converter DAC for generating an error signal S err . The DSP can generate the error signal S err using the reference input signal REF. In addition, in this example, the corresponding input signal S in is generated using the digital-to-analog converter DAC before being introduced to the input port 11. The sensor 31 can digitally sample the amplified signal S a , and the amplified signal S a is used by the DSP to generate the error signal.

[0043] The error correction circuit 21 further includes a splitting device, which is shown as the second quadrature coupler 32. The second quadrature coupler 32 has: a first port labeled "Input", which is configured to receive the error signal S err ; a second port labeled "ISO", which is grounded via the load 33; a third port labeled "0°", which is configured to provide a first error signal S to the input terminal of the first error amplifier 24 1e ; and a fourth port labeled "90°", which is configured to provide a second error signal S to the input terminal of the second error amplifier 25 2e . The second quadrature coupler 32 splits the error signal S err into two equal parts. When the error signal enters from the first port "Input", the first error signal S will come out at half power at the third port 0° 1e , and the other half that lags by 90 degrees will come out at the fourth port 90° as the second error signal S 2e . The second quadrature coupler 32 is a convenient way to divide a signal into two signals with equal amplitudes and a 90-degree phase difference, but this can be performed in a variety of known ways, which is obvious to those skilled in the art.

[0044] In an alternative embodiment (not shown), the DSP is configured to: digitally generate a first error signal S 1e and a second error signal S 2e , and directly provide the corresponding analog error signals to the corresponding error amplifiers 24 and 25 via the DAC, thus eliminating the need for the second quadrature coupler 32.

[0045] According to some embodiments, it is desirable that: the surrounding components, bias, and signal levels are selected such that the first error amplifier 24 and the second error amplifier 25 are given a high reflection coefficient of more than 95%. In an embodiment, preferably, the first error amplifier 24 and the second error amplifier 25 are the same in configuration and operation to obtain similar results for a given input.

[0046] The error signal can be extracted in a single step, or can be extracted in two separate steps, which will be described later with reference to Figure 4 and Figure 5 .

[0047] Figure 4 An example of a feedforward amplifier 40 with a two-step extraction of the error signal is shown. The feedforward amplifier 40 includes at least one power amplifier 13, an error extraction circuit 41, a first delay line L1 and a second delay line L2, and an output circuit 22. Alternatively, the delay line L2 can be a delay filter (similar to Figure 5is replaced by the delay filter 42) in. The error correction circuit includes: an error extraction circuit 41 configured to sample the amplified signal S a and compare it with the input signal S in to generate an error signal S err . In the error extraction circuit 41, the error is extracted and inserted in two steps. In the first step, a part of the main amplifier signal is tapped out by the first directional coupler C2. This signal is processed by the phase adjustment circuit 15, and the phase adjustment circuit 15 represents other amplitude / phase adjustment devices commonly used in the feedforward system. In the second directional coupler C3, this signal is compared with the input signal S in delayed by the delay line L1. Then, the error signal is fed to a splitting device (e.g., a 90-degree 3dB hybrid coupler 32), and the splitting device splits the error signal to generate a first error signal S 1e and a second error signal S 2e , where the first error signal S 1e is inverted with respect to the amplified signal S a , and the second error signal S 2e is 90 degrees out of phase with the first error signal S 1e .

[0048] The error extraction circuit 41 includes: a first directional coupler C2 configured to sample the amplified signal S a ; an adjustment circuit 15 configured to adjust the gain or phase of the sampled amplified signal; and a second directional coupler C3 configured to compare the sampled amplified signal with the input signal.

[0049] The feedforward amplifier further includes a first delay line L1 for compensating the delay in the main amplifier 13, and a second delay line L2 for compensating the delays in the error extraction circuit 41 and the second quadrature coupler 32. According to some embodiments, the feedforward amplifier includes a delay filter 42, which is another implementation of a delay line. If the delay filter 42 is implemented, the delay line L2 can be omitted.

[0050] According to Figure 4, the output signal of the first error amplifier 24 entering the first quadrature coupler 23 at 90° at the fourth port thus has a direct path to the second port ISO, while the output signal of the second error amplifier 25 entering the first quadrature coupler 23 at 0° at the third port has a coupled path and thus has an additional 90-degree phase shift in its path. If the input signals of amplifiers 24 and 25 are in opposite phases, and the excitation of amplifier 25 lags 90 degrees compared to amplifier 24, then the two output signals of amplifiers 24 and 25 will be in phase at the second port ISO and generate an error compensation signal. Similarly, the two 90-degree phase differences will add up to 180 degrees at the first port "Input", which means that the same signals will cancel each other out, thus minimizing the power part sent back to the main amplifier while maximizing the forward correction ability.

[0051] The low loss in the path from the main amplifier 13 to the output depends on the splitting, reflection, and recombining operations. The amplified signal S a enters the first port "Input" of the hybrid coupler 23. The amplified signal S a is split, and half advances through the direct path to the output of the amplifier 24 at the third port 0°. The other half is coupled backward and reaches the amplifier 25 at the fourth port 90°, with an additional 90-degree phase delay. The reflected signals entering ports 0° and 90° are combined. In summary, this means that the reflected parts are combined in phase at the third port ISO, while they are combined out of phase at the input port "Input".

[0052] Figure 5 An example feedforward amplifier 50 with a single-step extraction of the error signal is shown. The feedforward amplifier 50 includes at least one power amplifier 13. At least one power amplifier 13 receives the input signal S in to generate the amplified signal S a .

[0053] The feedforward amplifier 50 includes an error extraction circuit 51, a second quadrature coupler 32 (i.e., a splitting device), and an output circuit 22. The error extraction circuit 51 includes a 180° directional coupler (as Figure 7a and Figure 7b shown), the 180° directional coupler having: a first port labeled "+", configured to receive the amplified signal S a ; a second port labeled "Δ", configured to output the amplified signal to the first port "Input" of the first quadrature coupler 23; a third port labeled "-", configured to receive the input signal S in via the delay line L1; and a fourth port labeled Σ, configured to output the error signal S err to the first port "Input" of the second quadrature coupler 32 (optionally via the delay filter 42).

[0054] In this embodiment, the error correction circuit includes an error extraction circuit, a second quadrature coupler 32, and an optional delay filter 42. As described above, single-step extraction typically uses a single 180-degree directional coupler instead of the two directional couplers C2 and C3 used in the error extraction circuit 41 in Figure 4 . Depending on the relative phase of the output and the reference, the 0-degree (labeled Σ) or 180-degree (labeled Δ) port output is used as the error signal S err .

[0055] The purpose of the delay filter 42 is to make the amplified first error correction signal S at the output of the first error amplifier 24 1e inverted with the amplified signal S at the 0° of the third port of the first quadrature coupler 23 a . In an embodiment, depending on the implementation, synchronization or matching can be achieved in different ways (e.g., delay line, inverter, gain-phase adjuster).

[0056] Figure 6a and Figure 6b show two example architectures of a quadrature coupler or a 90-degree 3dB hybrid coupler according to an embodiment of the present disclosure. Figure 6a A quadrature coupler using coupled lines is disclosed, while Figure 6b shows a quadrature coupler implemented using transmission lines, also known as a branch-line coupler. A quadrature coupler (e.g., the quadrature couplers used in the output circuit and the error correction circuit) is a four-port device that is either used to equally divide an input signal between the output ports and produce a 90° phase shift or used to combine two signals while maintaining a high degree of isolation between the ports.

[0057] When power is introduced at the "input" of the first port, half of the power (3dB) flows to the third port 0°, while the other half of the power (in the opposite direction) is coupled to the fourth port 90°. Reflections fed back to the third and fourth ports due to mismatch will flow directly to the second port ISO or cancel out at the first port. A signal applied to any port will produce two orthogonal (90° apart) signals of the same amplitude. It doesn't matter which port is used as the input port because, due to the electrical and mechanical symmetry of these devices, the relationship at the output remains the same, which is why a 90-degree 3dB hybrid coupler is also called a quadrature coupler.

[0058] Figure 7a and Figure 7bShows two example architectures of a 180° directional coupler (e.g., a 3 dB, 180° hybrid ring coupler). A 180° hybrid ring coupler (also known as a "rat-race" coupler) is a four-port device that either splits an input signal equally or adds two combined signals. The hybrid ring provides output signals that are equally divided but have a 180° phase shift. The circumference of the central conductor ring is 11 / 2 wavelengths (or 6 quarter-wavelengths), and each port is separated by 90°. This configuration results in a lossless device with a low voltage standing wave ratio (VSWR), excellent phase and amplitude balance, high output isolation, and a matched output impedance. The low-loss transmission line structure also makes the device a perfect choice for combining high-power hybrid signals.

[0059] Figure 7b Shows a 180° directional coupler implemented using transmission lines, where each transmission line has an impedance. If it is desired to split the input signal equally at the "+" port, then the impedances Z1 and Z2 should be the same. This means that in a 50 Ω system, each impedance is 70.7 Ω ( Ω). In the present disclosure, the split is uneven, where only a portion of the input signal at the + port is coupled to the Σ port compared to the portion coupled to the Δ port. In general, the transmission line impedance Z1 is determined using the following equation:

[0060]

[0061]

[0062] where Z0 is 50 Ω in a 50 Ω system, and p div is the power ratio of the power at the Σ port to the power at the Δ port. If the power at the Σ port should be 13 dB lower than the power at the Δ port (representing 1 / 20 of the power of the input signal), then the first transmission impedance Z1 is 51.24 Ω, and the second transmission impedance Z2 is 228.9 Ω.

[0063] Figure 8 Shows a graph where the input amplitude (of the input signal) is a function of the output amplitude (of the output signal). This graph shows the normalized distribution of the following signals: the desired output signal 80, the distorted output signal 81 corresponding to the amplified signal S a output from the main amplifier, and the error compensation signal 82 generated by combining the amplified first error signal and the amplified second error signal in the quadrature coupler 23. The compression of the amplified signal S a starts at 0.71 of the full amplitude, as shown by 81.

[0064] Figure 9 Shows a graph where the input amplitude (of the input signal) is a function of the efficiency η. This graph shows the combinedFigure 1 Comparison of the efficiency 90 of the described prior art amplifier circuit with the efficiency 91 of the feedforward amplifier described in any of Figures 2 to 5 Thus, the feedforward amplifier according to the described embodiments provides a situation where the advantages of the feedforward amplifier with the output circuit 22 are quite high over the full amplitude range, especially in the lower amplitude range of 0 to 0.7.

[0065] The top curve 91 shows the efficiency of the feedforward amplifier according to the present disclosure over the full amplitude range, while the bottom curve 90 shows the efficiency of the prior art feedforward amplifier (without over-sizing). The main amplifier is modeled to have a constant 70% efficiency at all amplitudes, while the error amplifier is modeled to have an efficiency proportional to the RF voltage amplitude, with a maximum efficiency of 70%. The top curve 91 shows a small downward shift in the upper amplitude range of 0.7 to 1, which is due to the amplification error being carried out at a lower RF voltage than the maximum in the balanced error amplifier. The efficiency at the maximum amplitude returns to 70%.

[0066] One advantage common to the present disclosure and the directional error amplifier is that the coupler loss is minimized compared to prior art feedforward amplifiers. This is a significant advantage when large-scale errors such as compression need to be corrected. In the case where the component amplifiers have the same size and the same intrinsic efficiency, the efficiency of the embodiments described in the present disclosure is the same as that of the feedforward based on the directional error amplifier. The relative applicability of the embodiments of the present disclosure depends on the frequency range, the availability of transistors, and the manufacturability and availability of couplers and other passive structures and components.

[0067] Due to the large size of the expected error, the coupler loss of the prior art feedforward amplifier is very high, which severely reduces the efficiency at low amplitudes. The efficiency linearly increases in the upper amplitude range where the error signal increases and reaches 70% only at the maximum amplitude where perfect merging occurs in the coupler.

[0068] The present disclosure relates to a feedforward amplifier for amplifying an input signal received at an input port and providing an output signal at an output port. The feedforward amplifier includes: at least one power amplifier configured to receive the input signal and generate an amplified signal; an error correction circuit configured to generate a first error signal and a second error signal based on an error in the amplified signal generated when amplifying the input signal; and an output circuit.

[0069] The output circuit includes: a first quadrature coupler having a first port configured to receive an amplified signal, a second port configured to generate an output signal, a third port, and a fourth port; and a first error amplifier and a second error amplifier. The output terminal of the first error amplifier is configured to be connected to the third port, and the input terminal of the first error amplifier is configured to receive a first error signal, and the output terminal of the second error amplifier is configured to be connected to the fourth port, and the input terminal of the second error amplifier is configured to receive a second error signal.

[0070] The output circuit is configured to generate an error compensation signal in the first quadrature coupler based on the output signals of the first error amplifier and the second error amplifier, and the error compensation signal is synchronized with and inverted from the error in the amplified signal.

[0071] According to some embodiments, the error correction circuit includes a splitting device configured to: receive an error signal and split it into a first error signal and a second error signal, and provide the first error signal to the input terminal of the first error amplifier and provide the second error signal to the input terminal of the second error amplifier.

[0072] According to some embodiments, the splitting device includes a second quadrature coupler having: a first port configured to receive the error signal; a second port grounded via a load; a third port configured to provide the first error signal to the input terminal of the first error amplifier; and a fourth port configured to provide the second error signal to the input terminal of the second error amplifier.

[0073] According to some embodiments, the feedforward amplifier further includes at least one first delay line for compensating for the delay in at least one power amplifier.

[0074] According to some embodiments, the error correction circuit further includes an error extraction circuit configured to sample the amplified signal and compare it with the input signal to generate an error signal.

[0075] According to some embodiments, the feedforward amplifier further includes at least one second delay line for compensating for the delay in the error correction circuit.

[0076] According to some embodiments, the error extraction circuit includes: a first directional coupler configured to sample the amplified signal; an adjustment circuit configured to adjust the gain or phase of the sampled amplified signal; and a second directional coupler configured to compare the sampled amplified signal with the input signal.

[0077] According to some embodiments, the error extraction circuit includes a 180° directional coupler having: a first port configured to receive an amplified signal; a second port configured to output the amplified signal to a first quadrature coupler; a third port configured to receive an input signal; and a fourth port configured to output an error signal to a second quadrature coupler.

[0078] According to some embodiments, the error correction circuit further includes: a digital signal processor (DSP) configured to obtain samples of the amplified signal using a sensor; and at least one digital-to-analog converter (DAC) for generating a first error signal and a second error signal.

[0079] The various aspects of the present disclosure are described with reference to the accompanying drawings (e.g., block diagrams). It should be understood that several entities in the drawings (e.g., blocks in a block diagram) and combinations of entities in the drawings can be implemented by computer program instructions, which can be stored in a computer-readable memory and loaded into a computer or other programmable data processing apparatus. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, and / or other programmable data processing apparatus for generating a machine, such that the instructions, when executed via the processor of the computer and / or other programmable data processing apparatus, create means for implementing the functions / actions specified in the block diagram or block.

[0080] In the drawings and the specification, example aspects of the present disclosure have been disclosed. However, many variations and modifications can be made to these aspects without significantly departing from the principles of the present disclosure. Accordingly, the present disclosure should be considered illustrative rather than restrictive and is not limited to the specific aspects discussed above. Thus, although specific terms are used, they are used in a general or descriptive sense only and not for purposes of limitation.

[0081] The description of the example embodiments provided herein has been for illustrative purposes. The description is not intended to be exhaustive or to limit the example embodiments to the precise form disclosed, and modifications and variations are possible in light of the above teachings and can be obtained by implementing multiple alternative ways of the provided embodiments. The example embodiments discussed herein are selected and described to explain the principles and properties of the example embodiments and their practical applications, such that those skilled in the art can use the example embodiments in multiple ways and with multiple modifications suitable for the particular use contemplated. The features of the embodiments described herein can be combined in all possible combinations of methods, apparatus, modules, systems, and computer program products. It should be understood that the example embodiments presented herein can be practiced in any combination with each other.

[0082] It should be noted that the word "comprising" does not necessarily exclude the presence of other elements or steps than those listed, and the word "a" or "an" preceding an element does not exclude the presence of a plurality of such elements. It should also be noted that any reference signs do not limit the scope of the claims, that the exemplary embodiments may be implemented at least in part by means of hardware and software, and that a plurality of "means", "units" or "devices" may be represented by the same item of hardware.

[0083] Various example embodiments described herein are described in the general context of method steps or processes, which may be implemented in one aspect by a computer program product embodied in a computer-readable medium, the computer-readable medium including computer-executable instructions such as program code executed by a computer in a network environment. Computer-readable media may include removable and non-removable storage devices, including but not limited to read-only memory (ROM), random access memory (RAM), compact disk (CD), digital versatile disk (DVD), etc. In general, program modules may include routines, programs, objects, components, data structures, etc. that perform specific tasks or implement specific abstract data types. Computer-executable instructions, associated data structures, and program modules represent examples of program codes for performing the steps of the methods disclosed herein. A specific sequence of these executable instructions or associated data structures represents an example of corresponding actions for performing the functions described in these steps or processes.

[0084] In the drawings and the specification, example embodiments have been disclosed. However, many variations and modifications may be made to these embodiments. Therefore, although specific terms are used, they are used in a general or descriptive sense and not for limiting purposes, and the scope of the embodiments is defined by the following claims. The embodiments herein are not limited to the above-described embodiments. Therefore, the above-described embodiments should not be construed as limiting the scope of the invention or the disclosure, and the scope of the invention is defined by the appended claims.

Claims

1. A feed - forward amplifier (20; 30; 40; 50) for amplifying an input signal (S in ) received at an input port (11) and providing an output signal (S out ) at an output port (12), wherein, The feedforward amplifier includes: - At least one power amplifier (13), configured to receive the input signal (S in ) and generate an amplified signal (S a ); - An error correction circuit (21), configured to generate a first error signal (S in ), and a second error signal (S a ) based on an error in an amplified signal (S 1e ) generated when amplifying the input signal (S 2e ), wherein the second error signal (S 2e ) has a 90-degree phase difference from the first error signal (S 1e ); and - An output circuit (22), including: - A first orthogonal coupler (23) having a first port configured to receive the amplified signal (S a ), a second port configured to generate the output signal (S out ), a third port, and a fourth port; and - A first error amplifier (24) and a second error amplifier (25), wherein an output terminal of the first error amplifier (24) is configured to be connected to the third port, and an input terminal of the first error amplifier is configured to receive the first error signal (S 1e ), and wherein an output terminal of the second error amplifier is configured to be connected to the fourth port, and an input terminal of the second error amplifier is configured to receive the second error signal (S 2e ); Wherein, the output circuit is configured to generate an error compensation signal in the first quadrature coupler (23) according to the output signal of the first error amplifier (24) and the output signal of the second error amplifier (25), and the error compensation signal is synchronized with and inverted with respect to the error in the amplified signal (S a ) 2. The feed - forward amplifier according to claim 1, wherein, The error correction circuit includes a splitting device configured to receive an error signal (S err ) and split it into the first error signal (S 1e ) and the second error signal (S 2e ), and supply the first error signal (S 1e ) to the input terminal of the first error amplifier (24) and supply the second error signal (S 2e ) to the input terminal of the second error amplifier (25).

3. The feed - forward amplifier according to claim 2, wherein, The splitting device includes a second quadrature coupler (32), and the second quadrature coupler (32) has: a first port configured to receive the error signal (S err ); a second port grounded via a load (33); a third port configured to provide the first error signal (S 1e ) to the input end of the first error amplifier (24); and , a fourth port, is configured to provide the second error signal (S 2e ) to an input terminal of the second error amplifier (25).

4. The feed - forward amplifier according to any one of claims 1 to 3, wherein, The feedforward amplifier further includes at least a first delay line (L1) for compensating for the delay in the at least one power amplifier (13).

5. The feed - forward amplifier according to any one of claims 1 to 4, wherein, The error correction circuit further includes an error extraction circuit (41; 51), and the error extraction circuit (41; 51) is configured to sample the amplified signal (S a ) and compare it with the input signal (S in ) to generate the error signal (S err ).

6. The feed - forward amplifier according to claim 5, wherein, The feedforward amplifier further includes at least a second delay line (L2) for compensating for the delay in the error correction circuit.

7. The feed - forward amplifier according to any one of claims 5 and 6, wherein, The error extraction circuit (41) includes: a first directional coupler (C2) configured to sample the amplified signal (S a ); an adjustment circuit (15) configured to adjust the gain or phase of the sampled amplified signal; and a second directional coupler (C3) configured to compare the sampled amplified signal with the input signal.

8. The feed - forward amplifier according to claim 3, wherein, The error correction circuit further includes an error extraction circuit (41; 51), and the error extraction circuit (41; 51) is configured to sample the amplified signal (S a ) and compare it with the input signal (S in ) to generate the error signal (S err ). Moreover, the error extraction circuit (51) includes a 180° directional coupler, and the 180° directional coupler has: a first port configured to receive the amplified signal (S a ); a second port configured to output the amplified signal to the first quadrature coupler (23); a third port configured to receive the input signal (S in ); and a fourth port configured to output the error signal (S err ) to the second quadrature coupler (32).

9. The feed - forward amplifier according to claim 8, wherein, The feedforward amplifier further includes at least a second delay line (L2) for compensating for the delay in the error correction circuit.

10. The feed - forward amplifier according to any one of claims 1 to 3, wherein, The error correction circuit (21) further includes: a digital signal processor DSP configured to obtain samples of the amplified signal using the sensor (31); and at least one digital-to-analog converter DAC for generating the first error signal (S 1e ), and the second error signal (S 2e ).

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