An interface detection method, apparatus, electronic device, system, and medium

Abstract

Embodiments of the present application disclose an interface detection method and device, electronic equipment, system and medium. The method comprises: linkage configuration of an input interface of the to-be-tested equipment and an output interface of the to-be-tested equipment; input of a detection signal to the input interface of the to-be-tested equipment through an output interface of the signal transceiving module; acquisition of a linkage signal output by the output interface of the to-be-tested equipment through an input interface of the signal transceiving module; and determination of a detection result of the input interface of the to-be-tested equipment and the output interface of the to-be-tested equipment according to a comparison result of the linkage signal and a theoretical signal. The above scheme can realize automatic detection of the interface, and improve the efficiency and accuracy of interface detection.

Description

Technical Field

[0001] This application relates to the field of automatic detection technology, and in particular to an interface detection method, apparatus, electronic device, system and medium. Background Technology

[0002] The alarm circuit includes alarm input and alarm output interfaces, serving as an essential external interface for alarm linkage in security equipment. A complete alarm circuit involves the design of peripheral hardware circuits and software driver modules; any flawed design in any part can lead to alarm malfunctions, emergency alarm failure, and incalculable losses.

[0003] Currently, while ensuring that there are no abnormalities in the development and design phase of the alarm circuit, it is also necessary to detect probabilistic abnormalities in the alarm circuit, and to test the working status of the numerous input and output interfaces of the alarm circuit in order to test whether probabilistic occasional abnormalities will occur.

[0004] However, current alarm circuit interface testing solutions generally require manual configuration and testing, which is inefficient and inaccurate, and makes it difficult to achieve rapid testing of large amounts of data from multiple alarm circuits and multiple interfaces. Summary of the Invention

[0005] This application provides an interface testing method, apparatus, electronic device, system, and medium to enable rapid and accurate testing of the input and output interfaces of the device under test.

[0006] In one embodiment, this application provides an interface testing method, wherein the input interface of the device under test (DUT) is connected to the output interface of the signal transceiver module, and the output interface of the DUT is connected to the input interface of the signal transceiver module. The method includes:

[0007] The input interface of the device under test and the output interface of the device under test are configured to work together.

[0008] The detection signal is input to the input interface of the device under test through the output interface of the signal transceiver module;

[0009] The linkage signal output by the output interface of the device under test is obtained through the input interface of the signal transceiver module.

[0010] Based on the comparison results between the linkage signal and the theoretical signal, the detection results of the input interface and the output interface of the device under test are determined.

[0011] In another embodiment, this application also provides an interface testing device, wherein the input interface of the device under test is connected to the output interface of the signal transceiver module, and the output interface of the device under test is connected to the input interface of the signal transceiver module. The device includes:

[0012] The configuration module is used to configure the input interface of the device under test in conjunction with the output interface of the device under test.

[0013] The signal input module is used to input a detection signal to the input interface of the device under test through the output interface of the signal transceiver module;

[0014] The signal acquisition module is used to acquire the linkage signal output by the output interface of the device under test through the input interface of the signal transceiver module;

[0015] The detection result determination module is used to determine the detection results of the input interface and the output interface of the device under test based on the comparison results of the linkage signal and the theoretical signal.

[0016] In yet another embodiment, this application also provides an electronic device, including: one or more processors;

[0017] Memory, used to store one or more programs;

[0018] When the one or more programs are executed by the one or more processors, the one or more processors implement the interface detection method described in any one of the embodiments of this application.

[0019] In one embodiment, this application also provides an interface detection system, the system comprising:

[0020] A signal transceiver module, wherein the output interface of the signal transceiver module is used to interface with the input interface of the device under test, and the input interface of the signal transceiver module is used to interface with the output interface of the device under test.

[0021] An electronic device is used to communicate with the device under test and the signal transceiver module respectively, and the electronic device can implement the interface detection method described in any one of the embodiments of this application.

[0022] In one embodiment, this application also provides a computer-readable storage medium having a computer program stored thereon that, when executed by a processor, implements the interface detection method as described in any one of the embodiments of this application.

[0023] In this embodiment, the input interface and output interface of the device under test (DUT) are linked and configured; a detection signal is input to the input interface of the DUT through the output interface of the signal transceiver module; the linkage signal output by the output interface of the DUT is obtained through the input interface of the signal transceiver module; and the detection results of the input interface and output interface of the DUT are determined based on the comparison results of the linkage signal and the theoretical signal. This achieves automatic detection of the input and output interfaces of the DUT, solving the problems of low efficiency and accuracy, cumbersome process, and difficulty in meeting the real-time requirements of large-scale data testing of multiple interfaces of multiple DUTs. This improves the efficiency and accuracy of large-scale data testing of multiple interfaces of multiple DUTs, enabling accurate verification of the reproduction of low-probability problems through automatic detection of large-scale data, and reducing the operational skill requirements of technicians and the workload of manual operation. Attached Figure Description

[0024] Figure 1 This is a system environment structure diagram provided in one embodiment of the present application;

[0025] Figure 2 A flowchart of an interface detection method provided in one embodiment of this application;

[0026] Figure 3 This is a structural diagram showing a connection via a signal detection module according to one embodiment of this application;

[0027] Figure 4 This is a circuit diagram of a signal detection module provided in one embodiment of this application;

[0028] Figure 5 A flowchart of an interface detection method provided in another embodiment of this application;

[0029] Figure 6 A flowchart of an interface detection method provided in another embodiment of this application;

[0030] Figure 7 A flowchart illustrating the specific implementation of the interface detection method provided in another embodiment of this application;

[0031] Figure 8 This is a schematic diagram of the structure of an interface detection device provided in one embodiment of this application;

[0032] Figure 9 This is a schematic diagram of the structure of an electronic device provided in one embodiment of this application;

[0033] Figure 10 This is a schematic diagram of the structure of an interface detection system provided in one embodiment of this application. Detailed Implementation

[0034] The present application will now be described in further detail with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the application and not intended to limit it. Furthermore, it should be noted that, for ease of description, the accompanying drawings show only the parts relevant to the present application, not the entire structure.

[0035] Figure 1 This is a flowchart illustrating an interface detection method provided in one embodiment of this application. The interface detection method provided in this embodiment is applicable to detecting the input and output interfaces of the device under test. Typically, this embodiment is applicable to automatically detecting anomalies in the input and output interfaces of alarm circuits. Specifically, this method can be executed by an interface detection device, which can be implemented in software and / or hardware, and can be integrated into an electronic device capable of implementing the interface detection method.

[0036] In this embodiment of the application, the system environment for implementing the method can be: the input interface of the device under test (DUT) is connected one-to-one with the output interface of the signal transceiver module, and the output interface of the DUT is connected one-to-one with the input interface of the signal transceiver module. For example... Figure 1 As shown, the device under test (DUT) has input and output interfaces. The input interfaces of the DUT are paired one-to-one with the output interfaces of the transceiver module to receive signals from the transceiver module. Similarly, the output interfaces of the DUT are paired one-to-one with the input interfaces of the transceiver module to input signals to the input interfaces. The specific form of this pairing is not limited; for example, it can be a direct wired or wireless connection, or it can be connected through other modules. The transceiver module communicates with the electronic device, allowing the electronic device to control the transceiver module to send and receive signals.

[0037] See Figure 2 The method in this application embodiment specifically includes:

[0038] S110. Configure the input interface of the device under test and the output interface of the device under test in a coordinated manner.

[0039] The device under test (DUT) can be a device with input and output interfaces, such as an alarm device. The linkage configuration can be such that if the signal at the DUT's input interface changes, the signal at the DUT's output interface also changes. For example, if the input signal changes from low to high, the output signal also changes from low to high. Alternatively, if the input signal changes from low to high, the output signal changes from high to low. It should be noted that the relationship between the input and output signals of the DUT can be configured according to actual conditions and is not limited. Furthermore, the number of linked input and output interfaces of the DUT is not specifically limited and can be set according to actual conditions, such as the number of interfaces to be tested during interface detection.

[0040] In this embodiment of the application, the linkage configuration can be controlled by the electronic device sending a configuration command to the device under test to control the device under test to perform the configuration, or it can be automatically configured through the configuration interface on the electronic device.

[0041] In this embodiment of the application, the input interface and output interface of the device under test are configured to be linked, including:

[0042] On the web page, the management interface of the device under test is accessed through the management address of the device under test; a configuration request is sent to the web page through the automatic request sending module, so as to configure the input interface and output interface of the device under test in a coordinated manner through the management interface of the device under test.

[0043] The automatic request sending module can be a software module capable of automatically sending requests to a web page, performing operations such as login verification and proxy settings, such as the Python 3 request module. For example, on the electronic device's web page, the management address of the device under test (DUT) can be entered to access its management interface. The automatic request sending module automatically sends configuration requests to the web page, enabling linked configuration of the DUT's input and output interfaces. The linked configuration results are then visually displayed on the web page, allowing control over the linked configuration of the DUT's input and output interfaces.

[0044] S120. Input a detection signal to the input interface of the device under test through the output interface of the signal transceiver module.

[0045] For example, the electronic device control signal transceiver module outputs a detection signal through its output interface. Since the input interface of the device under test is connected to the output interface of the signal transceiver module, the input interface of the device under test can acquire the detection signal output by the output interface of the signal transceiver module.

[0046] Specifically, the number of output interfaces of the signal transceiver module that outputs the detection signal, and which signal transceiver module output interfaces to output the detection signal, can be determined according to the actual situation. For example, based on the input interface and output interface and number of the device under test (DUT) being tested, it can be determined which signal transceiver module output interfaces to output the detection signal.

[0047] The beneficial effects of the above solution are that the electronic device inputs detection signals to the input interface of the device under test (DUT) through the signal transceiver module, thereby realizing the automatic execution of inputting detection signals to the DUT, solving the problem of low efficiency in manual control, and improving the efficiency of large-scale data detection for multiple devices or multiple interfaces. Furthermore, by inputting detection signals to the DUT through the signal transceiver module, it is possible to selectively control which output interfaces of the signal transceiver module input detection signals to the DUT, thereby achieving targeted detection of specific interfaces of the DUT and improving the efficiency and accuracy of interface detection.

[0048] S130. Obtain the linkage signal output by the output interface of the device under test through the input interface of the signal transceiver module.

[0049] For example, after a detection signal is input to the input interface of the device under test (DUT) through the signal transceiver module, the signal of the output interface of the DUT, which is configured to be linked with the input interface of the DUT that received the detection signal, will change accordingly, generating a linkage signal. Therefore, the linkage signal output by the output interface of the DUT can be obtained through the input interface of the signal transceiver module.

[0050] Specifically, there may be at least one output interface of the device under test (DUT) that is linked to the input interface of the DUT that receives the detection signal. Therefore, there may also be at least one linkage signal of the at least one DUT output interface. By detecting each linkage signal, it is possible to specifically determine the output interface of the DUT that is abnormal, or to determine the input interface of the DUT that is abnormal.

[0051] S140. Based on the comparison results of the linkage signal and the theoretical signal, determine the detection results of the input interface and the output interface of the device under test.

[0052] The theoretical signal can be determined based on the linkage configuration between the input interface and output interface of the device under test (DUT), and the signal conversion relationship when the output interface of the DUT is connected to the input interface of the transceiver module. For example, if the output interface of the DUT is directly connected to the input interface of the transceiver module, when a detection signal is input to the input interface of the DUT through the transceiver module, this detection signal is converted according to the linkage configuration between the input and output interfaces of the DUT to determine the theoretical signal theoretically obtained through the input interface of the transceiver module. Then, the linkage signal actually obtained through the input interface of the transceiver module is compared with the theoretical signal. Based on the comparison result, the detection results of the input and output interfaces of the DUT are determined. If the output interface of the device under test (DUT) is connected to the input interface of the signal transceiver module through other modules, when a detection signal is input to the DUT's input interface through the signal transceiver module, this detection signal undergoes a linkage conversion based on the interlocking configuration between the DUT's input and output interfaces, and then undergoes signal conversion by other modules to determine the theoretical signal that can be theoretically obtained through the signal transceiver module's input interface. The actual linkage signal obtained by the signal transceiver module's input interface is then compared with the theoretical signal. Based on the comparison result, the detection results of the DUT's input and output interfaces are determined. The linkage signal is not limited to a specific value and can also be a level change signal, etc.

[0053] In this embodiment, by configuring the input interface of the device under test (DUT) to be connected one-to-one with the output interface of the signal transceiver module, and the output interface of the DUT to be connected one-to-one with the input interface of the signal transceiver module, the input and output interfaces of the DUT are linked. A detection signal is input to the input interface of the DUT through the output interface of the signal transceiver module. The linked signal output by the output interface of the DUT is obtained through the input interface of the signal transceiver module. Based on the comparison result of the linked signal and the theoretical signal, the detection results of the input and output interfaces of the DUT are determined. This achieves automatic detection of the input and output interfaces of the DUT, solving the problems of low efficiency and accuracy, cumbersome process, and difficulty in meeting the real-time requirements of large-scale data testing of multiple interfaces of multiple DUTs. This improves the efficiency and accuracy of large-scale data testing of multiple interfaces of multiple DUTs, enabling accurate verification of the reproduction of low-probability problems through automatic detection of large data volumes, and reducing the operational skill requirements of technicians and the workload of manual operation.

[0054] In this embodiment, the output interface of the device under test (DUT) and the input interface of the signal transceiver module are connected one-to-one through a signal detection module to adjust the initial signal of the input interface of the signal transceiver module. Based on the comparison result of the linkage signal and the theoretical signal, the detection results of the input interface and the output interface of the DUT are determined, including: if the linkage signal and the theoretical signal match, it is determined that the input interface and the output interface of the DUT are detected normally; if the linkage signal and the theoretical signal do not match, it is determined that the input interface and / or the output interface of the DUT are detected abnormally; wherein, the theoretical signal is determined based on the linkage relationship of the linkage configuration and the signal conversion relationship of the signal detection module.

[0055] For example, such as Figure 3 As shown, the output interface of the device under test (DUT) and the input interface of the signal transceiver module are connected one-to-one through a signal detection module. Since the input interface of the signal transceiver module may be in a floating state (neither high nor low level) when the output interface of the DUT is connected to the input interface of the signal transceiver module, it is difficult for the input interface of the signal transceiver module to determine whether a half-high level (e.g., 1 volt) is received, it is therefore difficult to determine whether it is a high or low level. Therefore, in this embodiment, the output interface of the DUT and the input interface of the signal transceiver module are connected one-to-one through a signal detection module. The circuit diagram of the signal detection module can be shown as follows. Figure 4 As shown, ALARM_INPUT_1 connects to the output interface 1 of the receiving device, and ALARM_IN_1 connects to the input interface 1 of the signal transceiver. By connecting a 3.3V voltage to the VDD terminal, the initial level of the signal transceiver module is pulled high or low, thereby identifying the high or low level of the subsequently received signal.

[0056] For example, when a detection signal is input to the input interface of the device under test (DUT) via a signal transceiver module, the detection signal undergoes a linkage configuration between the DUT's input and output interfaces, and is then converted by the signal detection module to determine the theoretical signal that can be theoretically acquired through the input interface of the signal transceiver module. The actual linkage signal acquired by the input interface of the signal transceiver module is then compared with the theoretical signal. Based on the comparison result, the detection results of the DUT's input and output interfaces are determined. If the linkage signal and the theoretical signal are consistent, the DUT's input and output interfaces are considered to be functioning normally; if they are inconsistent, the DUT's input and / or output interfaces are considered to be malfunctioning. This solution automatically and intelligently checks the DUT's input and output interfaces by comparing the linkage signal and the theoretical signal, thus efficiently and specifically identifying abnormal interfaces without requiring manual inspection.

[0057] Figure 5 This is a flowchart illustrating an interface detection method provided in another embodiment of this application. This embodiment is a further optimization of the above embodiments; details not described in detail in this embodiment are provided in the above embodiments. See also... Figure 5 The interface detection method provided in this application embodiment may include:

[0058] S210. Traverse the output interfaces of the device under test.

[0059] For example, to iterate through the output interfaces of the device under test, S220-S260 can be executed once from the first output interface to the last output interface of the device under test. When executing S220-S260 for each output interface, they are not executed simultaneously. Instead, S220-S260 is executed for the first output interface first. After the execution is completed, S220-S260 is executed for the second output interface. After the execution is completed, S220-S260 is executed for the third output interface, and so on, until the last output interface has completed S220-S260.

[0060] S220. Configure the output interface of the currently traversed device under test (DUT) in conjunction with at least one input interface of the DUT to perform the step of inputting a detection signal to the input interface of the DUT through the output interface of the signal transceiver module.

[0061] For example, the output interface of the currently traversed device under test (DUT) is configured to be linked with at least one input interface of the DUT. The number of input interfaces linked can be set according to actual needs. For instance, the output interface of the currently traversed DUT can be linked with all input interfaces of the DUT, thereby detecting both the output interface and all input interfaces of the DUT. Alternatively, the output interface of the currently traversed DUT can be linked with some of the input interfaces of the DUT, allowing detection of both the output interface and the linked portion of the input interfaces.

[0062] S230, Traverse at least one output interface of the signal transceiver module that is connected to at least one input interface of the device under test.

[0063] For example, traversing at least one output interface of a signal transceiver module that is connected to at least one input interface of the device under test can be performed by executing S240-S260 for the first output interface of the signal transceiver module. After execution, S240-S260 is executed for the second output interface of the signal transceiver module. After execution, S240-S260 is executed for the third output interface of the signal transceiver module, and so on, until S240-S260 is completed for the last output interface of the signal transceiver module.

[0064] S240. Input a detection signal to the input interface of the device under test that is connected to the target output interface through the target output interface of the currently traversed signal transceiver module, so as to execute the step of obtaining the linkage signal output by the output interface of the device under test through the input interface of the signal transceiver module.

[0065] The detection signal is different from the signal output interface of the signal transceiver module other than the target output interface.

[0066] For example, the output interface of the currently traversed signal transceiver module is used as the target output interface. A detection signal is then input to the input interface of the device under test (DUT) connected to this target output interface. The output interface of the DUT, which is linked to the input interface of the DUT that receives the detection signal, generates a linkage signal based on the detection signal. This linkage signal is then acquired to determine whether there is an anomaly in either the input interface or the output interface of the DUT.

[0067] S250. Obtain the linkage signal output by the output interface of the device under test through the input interface of the signal transceiver module.

[0068] S260. Based on the comparison results of the linkage signal and the theoretical signal, determine the detection results of the input interface and the output interface of the device under test.

[0069] To illustrate the above scheme in detail, the target output interface of the currently traversed signal transceiver module is used to input a high-level signal to the input interface of the connected device under test (DUT). Conversely, the output interfaces of other signal transceiver modules are used to input a low-level signal to the DUT's input interface. The linkage signal generated by the output interface linked to the DUT's input interface is then acquired. If the linkage signal matches the theoretical signal, the DUT's input and output interfaces are normal; otherwise, they are abnormal. The process then continues traversing the output interfaces of the next signal transceiver module, executing the step of inputting a high-level signal to the DUT's input interface. During this traversal, if the linkage signal matches the theoretical signal, the DUT's input and output interfaces are normal. If the linkage signal did not match the theoretical signal in the previous traversal but matches it in this traversal, the input interface of the previously traversed DUT was abnormal. If the linkage signal was inconsistent with the theoretical signal during the previous iteration, and it remains inconsistent during the current iteration, it indicates that either the input interface of the device under test (DUT) in the previous iteration or the input interface in the current iteration is faulty, or the output interface of the DUT is faulty. To determine whether the fault lies in either the input interface of the DUT in the previous iteration or the input interface in the current iteration, we can proceed by iterating through the next output interface of the DUT. If, during the iteration through the next output interface of the DUT, the linkage signal is consistent with the theoretical signal while iterating through the output interface of the first signal transceiver module, it indicates that the previous output interface of the DUT is faulty. If, while iterating through some output interfaces of the signal transceiver module, the linkage signal consistently differs from the theoretical signal, it indicates that the input interface of the DUT connected to that part of the signal transceiver module's output interface is faulty. This process can be repeated to troubleshoot each input and output interface of the DUT.

[0070] In this embodiment, steps S230-S260 can be executed multiple times to determine probabilistic anomalies of the interface through multiple checks. The specific number of executions can be set according to actual conditions.

[0071] The above-described solution in this application embodiment can automatically input detection signals to the device under test through a traversal process, and automatically check the input and output interfaces of the device under test based on the comparison of the linkage signal and the theoretical signal, so as to efficiently and accurately determine whether there are any abnormalities in the input and output interfaces of the device under test.

[0072] Figure 6 This is a flowchart illustrating an interface detection method provided in another embodiment of this application. This embodiment is a further optimization of the above embodiments; details not described in detail in this embodiment are provided in the above embodiments. See also... Figure 6 The interface detection method provided in this application embodiment may include:

[0073] S310. Traverse the input interfaces of the device under test.

[0074] For example, to iterate through the input interfaces of the device under test, S320-S350 can be executed once from the first input interface to the last input interface of the device under test. When executing S320-S350 for each input interface, they are not executed simultaneously. Instead, S320-S350 is executed for the first input interface first. After the execution is completed, S320-S350 is executed for the second input interface. After the execution is completed, S320-S360 is executed for the third input interface, and so on, until the last input interface has completed S320-S350.

[0075] S320. Configure the input interface of the currently traversed device under test (DUT) with at least one output interface of the DUT in a linked manner to execute the step of inputting a detection signal to the input interface of the DUT through the output interface of the signal transceiver module.

[0076] For example, the input interface of the currently traversed device under test (DUT) is configured to be linked with at least one output interface of the DUT. The number of output interfaces linked can be set according to actual needs. For instance, the input interface of the currently traversed DUT can be linked with all output interfaces of the DUT, thereby detecting both the input interface and all output interfaces of the DUT. Alternatively, the input interface of the currently traversed DUT can be linked with some of the output interfaces of the DUT, allowing detection of both the input interface and the linked portion of the output interfaces.

[0077] S330. Input a detection signal to the input interface of the currently traversed device under test through the output interface of the signal transceiver module that is connected to the input interface of the device under test, so as to execute the step of obtaining the linkage signal output by the output interface of the device under test through the input interface of the signal transceiver module.

[0078] For example, a detection signal is input to the input interface of the currently traversed device under test (DUT) through the output interface of the signal transceiver module connected to the input interface of the DUT. The output interface of the DUT, which is linked to the input interface of the DUT that receives the detection signal, generates a linkage signal based on the detection signal. This linkage signal is then acquired to determine whether there is an anomaly in either the input interface or the output interface of the DUT.

[0079] S340. Obtain the linkage signal output by the output interface of the device under test through the input interface of the signal transceiver module.

[0080] S350. Based on the comparison results of the linkage signal and the theoretical signal, determine the detection results of the input interface and the output interface of the device under test.

[0081] To illustrate the above scheme in detail, a high-level signal is input to the input interface of the currently traversed device under test (DUT) through the output interface of the signal transceiver module connected to the input interface of the DUT. The linkage signal generated by the output interface linked to the input interface of the currently traversed DUT is acquired. If the linkage signal matches the theoretical signal, the input and output interfaces of the DUT are normal; otherwise, the input and / or output interfaces of the DUT are abnormal. If the input interface of the DUT is linked to one output interface, the abnormal input and / or output interface of the DUT is determined by comparing the linkage signal obtained when the input interface is linked to other input interfaces with the theoretical signal. If the input interface of the DUT is linked to at least two output interfaces, and the linkage signal obtained through some output interfaces of the DUT is inconsistent with the theoretical signal, then some output interfaces of the DUT are determined to be abnormal. If the linkage signal obtained through all output interfaces of the DUT is inconsistent with the theoretical signal, then the input interface or all output interfaces of the DUT are determined to be abnormal. If the linkage signals obtained through all output interfaces of the device under test (DUT) are inconsistent with the theoretical signals, it is determined that the input interface or all output interfaces of the DUT are abnormal. If, when traversing to other input interfaces of the DUT, a high-level signal is input to other input interfaces through the signal transceiver module, and the linkage signals obtained through the output interfaces configured to be linked with other input interfaces are consistent with the theoretical signals, it indicates that the input interface of the DUT was abnormal during the previous traversal. If the linkage signals obtained through all output interfaces of the DUT are inconsistent with the theoretical signals, it indicates that all output interfaces of the DUT are abnormal.

[0082] In this embodiment, steps S330-S350 can be executed multiple times to determine probabilistic anomalies of the interface through multiple checks. The specific number of executions can be set according to actual conditions.

[0083] The above-described solution in this application embodiment can automatically input detection signals to the device under test through a traversal process, and automatically check the input and output interfaces of the device under test based on the comparison of the linkage signal and the theoretical signal, so as to efficiently and accurately determine whether there are any abnormalities in the input and output interfaces of the device under test.

[0084] This application embodiment describes the specific implementation process of the interface detection method in conjunction with an actual interface detection system structure diagram, as shown in the following figure. Figure 3 As shown. Figure 7 A flowchart illustrating the specific implementation of the interface detection method provided in another embodiment of this application is shown below. Figure 7 As shown, the device under test can be an alarm circuit. Specifically, it can be:

[0085] S1: Determine the input interface N and output interface M of the device under test, and set the initial m=1 and n=1.

[0086] S2: Determine if m is greater than M. If yes, end the process; otherwise, execute S3.

[0087] S3: Call the web page to configure the N input interfaces of the device under test to be linked to the output interface m.

[0088] S4: Input a high-level signal to the input interface n of the device under test through the output interface of the main chip.

[0089] S5: Obtain the linkage signal of the output interface m of the device under test through the output interface of the main chip, and determine the interface test result.

[0090] S6: Determine if n is greater than N. If yes, execute S8; otherwise, execute S7.

[0091] S7: Execute n = n + 1, then execute S4.

[0092] S8: Restore n to its initial value of 1, execute m = m + 1, and then execute S2.

[0093] The above process will be explained in detail as follows:

[0094] S10: Use the Python 3 request module to make network requests to the device's web page, configure the device's web page information, and link the input interfaces 1 to N of the device under test to the first output interface of the device under test.

[0095] S20: Keep GPIO_1 to GPIO_N low. Configure the register of GPIO_1 on the main chip to high. At this time, the input interface 1 of the device under test (DUT) receives a high-level input, which is linked to the output interface 1 of the DUT. The output interface 1 of the DUT outputs the corresponding high / low level logic change. Since the output interface 1 of the DUT is connected to IN_1*, the logic level is transmitted to GPIO_1* through the signal detection module 1. The actual level of GPIO_1* is compared with the theoretical level. If they are the same, the test result is OK, indicating that the interface of the DUT is normal; otherwise, the test result is NG, indicating that the interface of the DUT is abnormal.

[0096] S30: Restore the GPIO_1 register to its default low-level state and configure GPIO_2 to high-level. At this time, the input interface 2 of the device under test (DUT) receives a high-level input, which is linked to the output interface 1 of the DUT. The output interface 1 of the DUT outputs the corresponding high-low level logic change, thereby transmitting the logic level to GPIO_1* through the signal detection module 1. Compare the actual level of GPIO_1* with the theoretical level. If they are the same, the test result is OK, indicating that the interface of the DUT is normal; otherwise, the test result is NG, indicating that the interface of the DUT is abnormal.

[0097] S40: Restore GPIO_2 to its default state and set GPIO_3 to high level in sequence. Perform test steps according to S20 and S30 until GPIO_N is set to high level, at which point the test steps will end.

[0098] S50: Use the Python 3 request module to make network requests to the device's web page, configure the device's web page information, and link the input interfaces 1 to N of the device under test to the output interface 2 of the device under test. Repeat steps S20-S40 until the verification of the Mth output interface of the device under test is complete. At this point, M verifications of each input interface of the device under test and N verifications of each output interface of the device under test have been completed.

[0099] S60: Considering the product lifecycle and the probability of alarm triggering by the alarm circuit, S20-S40 are set to require X times in total. After the entire test and verification is completed, the input interfaces of each device under test are verified X*M times, and the output interfaces are verified X*N times. By examining the rationality of the triggering logic of each input and output interface of the device under test, it is determined whether there are defects in the alarm circuit design, and which specific interface the defect is located on, which facilitates subsequent problem localization.

[0100] It should be noted that the above specific implementation methods are only specific examples of the technical solutions in the above embodiments, and are not a limitation on the detection process traversal method. In fact, the specific settings for traversing the detection, such as traversing the linkage process and traversing the input detection signal process, can be set according to the actual situation.

[0101] Figure 8 This is a schematic diagram of an interface detection device provided in one embodiment of this application. The device is applicable to detecting the input and output interfaces of the device under test. Typically, embodiments of this application are applicable to automatically detecting anomalies in the input and output interfaces of alarm circuits. The device can be implemented in software and / or hardware and can be integrated into an electronic device. See also... Figure 8 The device specifically includes:

[0102] Configuration module 410 is used to configure the input interface of the device under test and the output interface of the device under test in a coordinated manner.

[0103] The signal input module 420 is used to input a detection signal to the input interface of the device under test through the output interface of the signal transceiver module;

[0104] The signal acquisition module 430 is used to acquire the linkage signal output by the output interface of the device under test through the input interface of the signal transceiver module;

[0105] The detection result determination module 440 is used to determine the detection results of the input interface and the output interface of the device under test based on the comparison results of the linkage signal and the theoretical signal.

[0106] In this embodiment of the application, the configuration module 410 includes:

[0107] The interface entry unit is used on a web page to access the management interface of the device under test through the management address of the device under test;

[0108] The request sending unit is used to send a configuration request to the WEB page through the automatic request sending module, so as to configure the input interface and output interface of the device under test in a coordinated manner through the device under test management interface.

[0109] In this embodiment of the application, the configuration module 410 includes:

[0110] The first output interface traversal unit is used to traverse the output interfaces of the device under test.

[0111] The first linkage configuration unit is used to link the output interface of the currently traversed device under test with at least one input interface of the device under test, so as to perform the step of inputting a detection signal to the input interface of the device under test through the output interface of the signal transceiver module.

[0112] In this embodiment of the application, the signal input module 420 includes:

[0113] The second output interface traversal unit is used to traverse at least one output interface of the signal transceiver module that is connected to at least one input interface of the device under test.

[0114] The first detection signal input unit is used to input a detection signal to the input interface of the device under test that is connected to the target output interface through the target output interface of the currently traversed signal transceiver module, so as to perform the step of obtaining the linkage signal output by the output interface of the device under test through the input interface of the signal transceiver module;

[0115] The detection signal is different from the signal output interface of the signal transceiver module other than the target output interface.

[0116] In this embodiment of the application, the configuration module 410 includes:

[0117] The input interface traversal unit is used to traverse the input interfaces of the device under test.

[0118] The second linkage configuration unit is used to link the input interface of the currently traversed device under test with at least one output interface of the device under test, so as to execute the step of inputting a detection signal to the input interface of the device under test through the output interface of the signal transceiver module.

[0119] In this embodiment of the application, the signal input module 420 includes:

[0120] The second detection signal input unit is used to input a detection signal to the input interface of the currently traversed device under test through the output interface of the signal transceiver module that is connected to the input interface of the currently traversed device under test, so as to perform the step of obtaining the linkage signal output by the output interface of the device under test through the input interface of the signal transceiver module.

[0121] In this embodiment of the application, the output interface of the device under test and the input interface of the signal transceiver module are connected one by one through the signal detection module, so as to adjust the initial signal of the input interface of the signal transceiver module through the signal detection module.

[0122] In this embodiment of the application, the detection result determination module 440 includes:

[0123] The first comparison unit is used to determine that the input interface and output interface of the device under test are detected normally if the linkage signal and the theoretical signal are consistent.

[0124] The second comparison unit is used to determine that the input interface and / or output interface of the device under test are abnormal if the linkage signal and the theoretical signal are inconsistent.

[0125] The theoretical signal is determined based on the linkage relationship of the linkage configuration and the signal conversion relationship of the signal detection module.

[0126] The interface detection device provided in this application embodiment can execute the interface detection method provided in any embodiment of this application, and has the corresponding functional modules and beneficial effects of the execution method.

[0127] Figure 9 This is a schematic diagram of the structure of an electronic device provided in one embodiment of this application. Figure 9 A block diagram is shown that is suitable for implementing an exemplary electronic device 512 according to embodiments of this application. Figure 9 The electronic device 512 shown is merely an example and should not impose any limitations on the functionality and scope of use of the embodiments of this application.

[0128] like Figure 9 As shown, the electronic device 512 may include: one or more processors 516; and a memory 528 for storing one or more programs, which, when executed by the one or more processors 516, cause the one or more processors 516 to implement the interface detection method provided in this application embodiment, including:

[0129] The input interface of the device under test and the output interface of the device under test are configured to work together.

[0130] The detection signal is input to the input interface of the device under test through the output interface of the signal transceiver module;

[0131] The linkage signal output by the output interface of the device under test is obtained through the input interface of the signal transceiver module.

[0132] Based on the comparison results between the linkage signal and the theoretical signal, the detection results of the input interface and the output interface of the device under test are determined.

[0133] The components of the electronic device 512 may include, but are not limited to: one or more processors or processor 516, memory 528, and bus 518 connecting different device components (including memory 528 and processor 516).

[0134] Bus 518 represents one or more of several bus architectures, including a memory bus or memory controller, a peripheral bus, a graphics acceleration port, a processor, or a local bus using any of the various bus architectures. For example, these architectures include, but are not limited to, the Industry Standard Architecture (ISA) bus, the Micro Channel Architecture (MAC) bus, the Processor ISA bus, the Video Electronics Standards Association (VESA) local bus, and the Peripheral Component Interconnect (PCI) bus.

[0135] Electronic device 512 typically includes a variety of computer-readable storage media. These storage media can be any available storage media that can be accessed by electronic device 512, including volatile and non-volatile storage media, removable and non-removable storage media.

[0136] Memory 528 may include computer device readable storage media in the form of volatile memory, such as random access memory (RAM) 530 and / or cache memory 532. Electronic device 512 may further include other removable / non-removable, volatile / non-volatile computer device storage media. By way of example only, storage system 534 may be used to read and write non-removable, non-volatile magnetic storage media (…). Figure 9 Not shown; usually referred to as a "hard drive"). Although Figure 9 Not shown, a disk drive for reading and writing to a removable non-volatile disk (e.g., a "floppy disk") and an optical disk drive for reading and writing to a removable non-volatile optical disk (e.g., a CD-ROM, DVD-ROM, or other optical storage medium) may be provided. In these cases, each drive may be connected to bus 518 via one or more data storage medium interfaces. Memory 528 may include at least one program product having a set (e.g., at least one) of program modules configured to perform the functions of the embodiments of this application.

[0137] A program / utility 540 having a set (at least one) of program modules 542 may be stored, for example, in memory 528. Such program modules 542 include, but are not limited to, operating devices, one or more application programs, other program modules, and program data. Each or some combination of these examples may include an implementation of a network environment. Program modules 542 typically perform the functions and / or methods described in the embodiments of this application.

[0138] Electronic device 512 can also communicate with one or more external devices 514 (e.g., keyboard, pointing device, display 524, etc.), and with one or more devices that enable a user to interact with the electronic device 512, and / or with any device that enables the electronic device 512 to communicate with one or more other computing devices (e.g., network card, modem, etc.). This communication can be performed through input / output (I / O) interface 522. Furthermore, electronic device 512 can also communicate with one or more networks (e.g., local area network (LAN), wide area network (WAN), and / or public networks, such as the Internet) through network adapter 520. Figure 9 As shown, network adapter 520 communicates with other modules of electronic device 512 via bus 518. It should be understood that, although... Figure 9 As not shown, other hardware and / or software modules may be used in conjunction with electronic device 512, including but not limited to: microcode, device drivers, redundant processing units, external disk drive arrays, RAID devices, tape drives, and data backup storage devices.

[0139] The processor 516 executes various functional applications and data processing by running at least one of the multiple programs stored in the memory 528, such as implementing an interface detection method provided in the embodiments of this application.

[0140] Figure 10 This is a schematic diagram of the structure of an interface detection system provided in one embodiment of this application. Details not described in detail in the embodiments of this application can be found in the above embodiments. The interface detection system provided in this embodiment includes:

[0141] The signal transceiver module 610 has an output interface for docking with the input interface of the device under test, and an input interface for docking with the output interface of the device under test.

[0142] Electronic device 620 is used to communicate with the device under test and the signal transceiver module respectively, and the electronic device can implement the interface detection method described in any one of the embodiments of this application.

[0143] The device under test (DUT) can be a device with input and output interfaces, such as an alarm device. The signal transceiver module may include a main chip with input and output interfaces, controlled by electronic equipment to output and receive signals.

[0144] The interface detection system provided in this application can execute the interface detection method provided in any embodiment of this application, and has the corresponding functional modules and beneficial effects of the execution method.

[0145] One embodiment of this application provides a storage medium containing computer-executable instructions, which, when executed by a computer processor, are used to perform an interface detection method, including:

[0146] The input interface of the device under test and the output interface of the device under test are configured to work together.

[0147] The detection signal is input to the input interface of the device under test through the output interface of the signal transceiver module;

[0148] The linkage signal output by the output interface of the device under test is obtained through the input interface of the signal transceiver module.

[0149] Based on the comparison results between the linkage signal and the theoretical signal, the detection results of the input interface and the output interface of the device under test are determined.

[0150] The computer storage medium in this application embodiment can be any combination of one or more computer-readable storage media. The computer-readable storage medium can be a computer-readable signal storage medium or a computer-readable storage medium in general. For example, a computer-readable storage medium can be—but is not limited to—an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor device, or any combination thereof. More specific examples of computer-readable storage media (a non-exhaustive list) include: an electrical connection having one or more wires, a portable computer disk, a hard disk, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fiber, portable compact disk read-only memory (CD-ROM), optical storage device, magnetic storage device, or any suitable combination thereof. In this application embodiment, the computer-readable storage medium can be any tangible storage medium containing or storing a program that can be used by or in conjunction with an instruction execution device, apparatus, or device.

[0151] Computer-readable signal storage media may include data signals propagated in baseband or as part of a carrier wave, carrying computer-readable program code. Such propagated data signals may take various forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination thereof. Computer-readable signal storage media may also be any computer-readable storage medium other than a computer-readable storage medium that can transmit, propagate, or transfer a program for use by or in connection with an instruction execution device, apparatus, or apparatus.

[0152] Program code contained on a computer-readable storage medium may be transmitted using any suitable storage medium, including—but not limited to—wireless, wire, optical fiber, RF, etc., or any suitable combination thereof.

[0153] Computer program code for performing the operations of this application can be written in one or more programming languages ​​or a combination thereof, including object-oriented programming languages ​​such as Java, Smalltalk, and C++, and conventional procedural programming languages ​​such as the "C" language or similar programming languages. The program code can be executed entirely on the user's computer, partially on the user's computer, as a standalone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or device. In cases involving remote computers, the remote computer can be connected to the user's computer via any type of network—including a local area network (LAN) or a wide area network (WAN)—or can be connected to an external computer (e.g., via the Internet using an Internet service provider).

[0154] Note that the above are merely preferred embodiments and the technical principles employed in this application. Those skilled in the art will understand that this application is not limited to the specific embodiments described herein, and various obvious changes, readjustments, and substitutions can be made without departing from the scope of protection of this application. Therefore, although this application has been described in detail through the above embodiments, this application is not limited to the above embodiments, and may include many other equivalent embodiments without departing from the concept of this application, the scope of which is determined by the scope of the appended claims.

Claims

1. An interface detection method, characterized in that, The method includes: The input interface of the device under test (DUT) and the output interface of the DUT are configured to be linked; the linkage configuration is used to indicate that when the signal of the input interface of the DUT changes, the signal of the output interface of the DUT will be linked to the change. The detection signal is input to the input interface of the device under test through the output interface of the signal transceiver module; The linkage signal output by the output interface of the device under test is obtained through the input interface of the signal transceiver module. Based on the comparison results of the linkage signal and the theoretical signal, the detection results of the input interface and the output interface of the device under test are determined; wherein, the theoretical signal is determined based on the linkage relationship between the input interface and the output interface of the device under test, and the signal conversion relationship when the output interface of the device under test is connected to the input interface of the signal transceiver module.

2. The method according to claim 1, characterized in that, The linkage configuration between the input interface and the output interface of the device under test includes: On the web page, access the management interface of the device under test through the management address of the device under test; The automatic request sending module sends a configuration request to the web page to configure the input interface and output interface of the device under test in a coordinated manner through the device under test management interface.

3. The method according to claim 1 or 2, characterized in that, The linkage configuration between the input interface and the output interface of the device under test includes: Iterate through the output interfaces of the device under test; The output interface of the device under test currently being traversed is linked with at least one input interface of the device under test to perform the step of inputting a detection signal to the input interface of the device under test through the output interface of the signal transceiver module.

4. The method according to claim 3, characterized in that, The detection signal is input to the input interface of the device under test through the output interface of the signal transceiver module, including: Iterate through at least one output interface of the signal transceiver module that is connected to at least one input interface of the device under test; By using the target output interface of the currently traversed signal transceiver module, a detection signal is input to the input interface of the device under test that is connected to the target output interface, so as to execute the step of obtaining the linkage signal output by the output interface of the device under test through the input interface of the signal transceiver module; The detection signal is different from the signal output interface of the signal transceiver module other than the target output interface.

5. The method according to claim 1 or 2, characterized in that, The linkage configuration between the input interface and the output interface of the device under test includes: Iterate through the input interfaces of the device under test; The input interface of the device under test (DUT) currently being traversed is linked with at least one output interface of the DUT to perform the step of inputting a detection signal to the input interface of the DUT through the output interface of the signal transceiver module.

6. The method according to claim 5, characterized in that, The detection signal is input to the input interface of the device under test through the output interface of the signal transceiver module, including: By inputting a detection signal to the input interface of the signal transceiver module that is connected to the input interface of the currently traversed device under test, a step is performed to obtain the linkage signal output by the output interface of the device under test through the input interface of the signal transceiver module.

7. The method according to claim 1, characterized in that, The output interface of the device under test (DUT) and the input interface of the signal transceiver module are connected one-to-one through the signal detection module, so as to adjust the initial signal of the input interface of the signal transceiver module through the signal detection module, and the input interface of the DUT and the output interface of the signal transceiver module are connected one-to-one.

8. The method according to claim 7, characterized in that, Based on the comparison results between the linkage signal and the theoretical signal, the detection results for the input interface and the output interface of the device under test are determined, including: If the linkage signal and the theoretical signal are consistent, it is determined that the input interface and the output interface of the device under test are functioning normally. If the linkage signal and the theoretical signal are inconsistent, it is determined that the input interface and / or output interface of the device under test are abnormal. The theoretical signal is determined based on the linkage relationship of the linkage configuration and the signal conversion relationship of the signal detection module.

9. An interface testing device, characterized in that, The device includes: The configuration module is used to configure the linkage between the input interface and the output interface of the device under test; the linkage configuration is used to indicate that when the signal of the input interface of the device under test changes, the signal of the output interface of the device under test will be affected accordingly. The signal input module is used to input a detection signal to the input interface of the device under test through the output interface of the signal transceiver module; The signal acquisition module is used to acquire the linkage signal output by the output interface of the device under test through the input interface of the signal transceiver module; The detection result determination module is used to determine the detection results of the input interface and the output interface of the device under test based on the comparison results of the linkage signal and the theoretical signal; wherein, the theoretical signal is determined based on the linkage relationship between the input interface and the output interface of the device under test, and the signal conversion relationship when the output interface of the device under test is connected to the input interface of the signal transceiver module.

10. An electronic device, characterized in that, The electronic device includes: One or more processors; Memory, used to store one or more programs; When the one or more programs are executed by the one or more processors, the one or more processors implement the interface detection method as described in any one of claims 1-8.

11. An interface testing system, characterized in that, The system includes: A signal transceiver module, wherein the output interface of the signal transceiver module is used to interface with the input interface of the device under test, and the input interface of the signal transceiver module is used to interface with the output interface of the device under test. An electronic device is used to communicate with the device under test and the signal transceiver module respectively, and the electronic device can implement the interface detection method as described in any one of claims 1-8.

12. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the program is executed by the processor, it implements the interface detection method as described in any one of claims 1-8.

Images