An inductor current zero-crossing detection device for a switching power supply

Abstract

The present invention relates to a device for detecting zero-crossing of an inductor current of a switching power supply, the device comprising: a capacitive coupling circuit, a primary pre-comparator, an automatic zeroing capacitor network, a secondary comparator and a tertiary comparator connected in sequence; the device also comprises a timing control circuit and a switch network. The present invention adopts a capacitive coupling method to detect the decreasing change of the output node VSW of the inductor of the switching power supply itself instead of the node voltage change at both ends of the inductor, overcomes the technical defect that the changes of the VSW node and the VIN node are not completely synchronized, adopts a four-input comparator, and adopts an automatic zeroing capacitor network to reduce the offset voltage and delay caused by the comparator, and the present invention improves the accuracy of the detection of zero-crossing of the inductor current.

Description

Technical Field

[0001] The invention relates to the technical field of switching power supplies, and in particular to an inductor current zero-crossing detection device for a switching power supply. Background Art

[0002] For switching power supplies, such as Buck (step-down converter circuit), Boost (step-up converter circuit), Buck-Boost (step-down-boost converter circuit), PFC (Power Factor Correction), Flyback (flyback converter), etc., topologies that require inductor components are required. When these topologies are actually applied, it is necessary to perform zero detection on the inductor current and adjust the control logic based on the detection results to optimize the output stability, efficiency, power factor and other indicators.

[0003] In a switching power supply topology, the inductor current rises and falls as the charge and discharge process proceeds. The control part needs to detect the state of the inductor current and make necessary adjustments to the control logic to meet the indicator requirements of different topologies.

[0004] by Figure 1 Take the application in the PFC topology shown in the figure as an example. In the discontinuous conduction mode, when the inductor current drops to zero, the current will reverse. In this way, after M1 is turned on, the input current starts to rise from a negative current value, which will not only affect the average value of the input current, but also cause harmonic distortion of the input current. To optimize this phenomenon, it is necessary to adjust the on-time of M1 and increase the inductor peak current to weaken this adverse effect. In order to achieve reasonable control of the on-time of M1, zero-crossing detection of the inductor current is an indispensable link. The system can optimize the on-off control of M1 based on the result of zero-crossing detection. Therefore, the speed and accuracy of the zero-crossing detection of the inductor current will affect the total harmonic distortion and power factor of the entire system.

[0005] The existing zero-crossing detection circuit is implemented by using a comparator to detect the relative change and voltage difference of the nodes at both ends of the inductor to determine whether the inductor current is reversed. Figure 1 For example, the nodes at both ends of the inductor are VIN and VSW. The existing zero-crossing detection method is to compare the voltage difference between VSW and VIN. However, the changes of the VSW node and the VIN node are not completely synchronized. At the same time, due to the offset voltage and delay of the comparator itself, the traditional method is not accurate enough in detecting the zero-crossing point. Summary of the invention

[0006] In view of this, the present invention provides an inductor current zero-crossing detection device for a switching power supply to improve the accuracy of the inductor current zero-crossing detection.

[0007] To achieve the above object, the present invention provides the following solutions:

[0008] An inductor current zero-crossing detection device for a switching power supply, the device comprising: a capacitive coupling circuit, a primary pre-comparator, an automatic zeroing capacitor network, a secondary comparator and a tertiary comparator connected in sequence; the device also comprises a timing control circuit and a switch network;

[0009] The timing control circuit is connected to the control end of the switch network;

[0010] The switch network includes a first switch, a second switch, a third switch, a fourth switch and a fifth switch;

[0011] The first switch is arranged between the threshold voltage input terminal and the non-inverting input terminal of the first-stage pre-comparator;

[0012] The second switch is arranged between the output node of the inductor of the switching power supply device and the inverting input terminal of the first-stage pre-comparator;

[0013] The third switch is arranged between the non-inverting input terminal and the output terminal of the secondary comparator;

[0014] The fourth switch is arranged between the inverting input terminal and the output terminal of the secondary comparator;

[0015] The fifth switch is arranged between the output terminal of the three-stage comparator and the detection signal output terminal.

[0016] Optionally, the first-stage pre-comparator is a four-input comparator, the non-inverting input of the four-input comparator is connected to the threshold voltage input through the first switch, the inverting input of the four-input comparator is connected to the output node of the inductor of the switching power supply through the second switch, and the other two inputs of the four-input comparator are grounded.

[0017] Optionally, the first-level pre-comparator includes a first current source, a second current source, a MOS tube M1, a MOS tube M2, a MOS tube M3, a MOS tube M4 and a load network;

[0018] The source end of the MOS tube M1 and the source end of the MOS tube M2 are both connected to the first current source, and the source end of the MOS tube M3 and the source end of the MOS tube M4 are both connected to the second current source;

[0019] The drain end of the MOS tube M2 and the drain end of the MOS tube M3 are both connected to the first end of the load network, and the common point where the drain end of the MOS tube M2 and the drain end of the MOS tube M3 are connected serves as the in-phase output end of the first-stage pre-comparator;

[0020] The drain ends of the MOS tube M1 and the MOS tube M4 are both connected to the second end of the load network, and the common point where the drain end of the MOS tube M1 and the drain end of the MOS tube M4 are connected serves as the inverting output end of the first-stage pre-comparator;

[0021] The other two ends of the load network are grounded;

[0022] The gate end of the MOS tube M1 is used as the inverting input end of the first-stage pre-comparator, and the gate end of the MOS tube M4 is used as the non-inverting input end of the first-stage pre-comparator; the gate ends of the MOS tube M2 and the MOS tube M3 are used as the other two input ends of the first-stage pre-comparator respectively;

[0023] The non-inverting input terminal of the first-level pre-comparator is connected to the threshold voltage input terminal through the first switch, the inverting input terminal of the first-level pre-comparator is connected to the output node of the inductor of the switching power supply through the second switch, and the other two input terminals of the first-level pre-comparator are grounded.

[0024] Optionally, the load network is a resistor array or a MOS tube with a preset bias.

[0025] Optionally, a filter circuit is further provided between the capacitive coupling circuit and the first-level pre-comparator.

[0026] Optionally, the first switch, the second switch and the fifth switch are all dual-input single-output electronic switches;

[0027] The output end and one input end of the dual-input single-output electronic switch serve as the output end and the input end of the dual-input single-output electronic switch respectively, the other input end of the dual-input single-output electronic switch is grounded, and the control end of the dual-input single-output electronic switch is connected to the timing control circuit.

[0028] Optionally, the dual-input single-output electronic switch includes a first electrically controlled switch, a second electrically controlled switch and an inverter;

[0029] One end of the first electronically controlled switch serves as one input end of the dual-input single-output electronic switch, and one end of the second electronically controlled switch serves as the other input end of the dual-input single-output electronic switch;

[0030] The other end of the first electronically controlled switch is connected to the other end of the second electronically controlled switch, and a common point where the other end of the first electronically controlled switch and the other end of the second electronically controlled switch are connected serves as an output end of the dual-input single-output electronic switch;

[0031] The control end of the second electronically controlled switch serves as the control end of the dual-input single-output electronic switch; the control end of the second electronically controlled switch is connected to the input end of the inverter, and the output end of the inverter is connected to the control end of the first electronically controlled switch.

[0032] Optionally, the first electrically controlled switch and the second electrically controlled switch are triodes or MOS tubes.

[0033] Optionally, the timing control circuit is used to generate a first control signal, a second control signal and a third control signal according to a driving signal of a power tube gate of a switching power supply;

[0034] The rising edges of the first control signal, the second control signal and the third control signal are synchronized with the rising edge of the driving signal; the falling edge of the first control signal is delayed by a first time relative to the falling edge of the driving signal; the falling edge of the second control signal is delayed by a second preset time relative to the falling edge of the first control signal; the falling edge of the third control signal is delayed by a third preset time relative to the falling edge of the second control signal;

[0035] The first control signal is used to control the states of the first switch, the third switch and the fourth switch; the second control signal is used to control the state of the second switch; and the third control signal is used to control the state of the fifth switch.

[0036] Optionally, the capacitive coupling circuit includes a charging and discharging capacitor, and the capacitive coupling circuit is used to transmit the signal of the output node of the inductor of the switching power supply to the first-level pre-comparator through the charging and discharging process of the charging and discharging capacitor.

[0037] According to the specific embodiments provided by the present invention, the present invention discloses the following technical effects:

[0038] The present invention discloses an inductor current zero-crossing detection device for a switching power supply, the device comprising: a capacitor coupling circuit, a primary pre-comparator, an automatic zero-adjusting capacitor network, a secondary comparator and a tertiary comparator connected in sequence; the device also comprises a timing control circuit and a switch network; the timing control circuit is connected to the control end of the switch network; the switch network comprises a first switch, a second switch, a third switch, a fourth switch and a fifth switch; the first switch is arranged between a threshold voltage input end and a non-inverting input end of the primary pre-comparator; the second switch is arranged between an output node of an inductor of the switching power supply and an inverting input end of the primary pre-comparator; the third switch is arranged between the non-inverting input end and the output end of the secondary comparator; the fourth switch is arranged between the inverting input end and the output end of the secondary comparator; the fifth switch is arranged between the output end of the tertiary comparator and a detection signal output end. The present invention utilizes a capacitive coupling circuit and adopts a capacitive coupling method to detect the drop variation of the output node VSW of the inductor of the switching power supply rather than the node voltage variation at both ends of the inductor, thereby overcoming the technical defect that the changes of the VSW node and the VIN node are not completely synchronized, and adopts an automatic zeroing capacitor network to reduce the offset voltage and time delay caused by the comparator. The present invention improves the accuracy of the inductor current zero-crossing detection. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0040] Figure 1 This is the topological structure diagram of PFC;

[0041] Figure 2 The waveform diagram of the PFC inductor circuit and the VSW node voltage;

[0042] Figure 3 A topological structure diagram of an inductor current zero-crossing detection device for a switching power supply provided by an embodiment of the present invention;

[0043] Figure 4 A circuit design diagram of an inductor current zero-crossing detection device for a switching power supply provided by an embodiment of the present invention;

[0044] Figure 5 A control timing diagram of an inductor current zero-crossing detection device for a switching power supply provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0045] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0046] The object of the present invention is to provide an inductor current zero-crossing detection device for a switching power supply, so as to improve the accuracy of the inductor current zero-crossing detection.

[0047] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, the present invention is further described in detail below with reference to the accompanying drawings and specific embodiments.

[0048] according to Figure 1 and Figure 2 It can be seen that when the inductor current is zero, the current has a reverse trend. Due to the blocking effect of the diode D1, the inductor will draw current from the capacitor Csw, thus forming an LC loop and causing slight oscillation at the VSW node. Therefore, by detecting whether the oscillation of the VSW node occurs, it can be determined whether the inductor current has passed zero.

[0049] like Figure 3 and 4 As shown, an embodiment of the present invention provides an inductor current zero-crossing detection device for a switching power supply, the device comprising: a capacitive coupling circuit, a primary pre-comparator, an automatic zero-adjusting capacitor network, a secondary comparator and a tertiary comparator connected in sequence; the device also comprises a timing control circuit and a switch network; the timing control circuit is connected to the control end of the switch network; the switch network comprises a first switch S1, a second switch S2, a third switch S3, a fourth switch S4 and a fifth switch S5; the first switch S1 is arranged between the threshold voltage input end and the non-inverting input end of the primary pre-comparator; the second switch S2 is arranged between the output node of the inductor of the switching power supply and the inverting input end of the primary pre-comparator; the third switch S3 is arranged between the non-inverting input end and the output end of the secondary comparator; the fourth switch S4 is arranged between the inverting input end and the output end of the secondary comparator; the fifth switch S5 is arranged between the output end of the tertiary comparator and the detection signal output end.

[0050] The automatic zeroing capacitor network of the present invention can be exemplarily configured as a capacitor array controlled by a specific timing sequence, and is used to reset the offset voltage of the primary pre-comparator and the secondary comparator to zero.

[0051] The present invention sets a first switch for switching the transmission among GND, Vref and the output voltage of the coupling circuit; sets a third switch and a fourth switch across the input and output ends of the secondary comparator for controlling the charge information on the automatic zeroing capacitor network, so as to achieve the purpose of returning the offset voltage of the primary pre-comparator and the secondary comparator to zero; sets a fifth switch between the output of the tertiary comparator and ZCD_OUT for controlling the output of ZCD_OUT in a time sequence, eliminating the occurrence of false detection and preventing the subsequent circuit control from being chaotic.

[0052] Exemplarily, the first-stage pre-comparator is a four-input comparator, the non-inverting input terminal of the four-input comparator is connected to the threshold voltage input terminal through the first switch, the inverting input terminal of the four-input comparator is connected to the output node of the inductor of the switching power supply through the second switch, and the other two input terminals of the four-input comparator are grounded. The first-stage pre-comparator of the present invention is set as a four-input comparator, and the method and structure for suppressing even-order nonlinear interference terms.

[0053] For example, Figure 4 As shown, the first-stage pre-comparator includes a first current source I1, a second current source I2, a MOS tube M1, a MOS tube M2, a MOS tube M3, a MOS tube M4 and a load network; the source end of the MOS tube M1 and the source end of the MOS tube M2 are both connected to the first current source, and the source end of the MOS tube M3 and the source end of the MOS tube M4 are both connected to the second current source; the drain end of the MOS tube M2 and the drain end of the MOS tube M3 are both connected to the first end of the load network, and the common point where the drain end of the MOS tube M2 and the drain end of the MOS tube M3 are connected is used as the in-phase output end of the first-stage pre-comparator; the drain ends of the MOS tube M1 and the MOS tube M4 are both connected to the load network. The second end of the network, the common point connected by the drain end of MOS tube M1 and the drain end of MOS tube M4 is used as the inverting output end of the first-level pre-comparator; the other two ends of the load network are grounded; the gate end of MOS tube M1 is used as the inverting input end of the first-level pre-comparator, and the gate end of MOS tube M4 is used as the non-inverting input end of the first-level pre-comparator; the gate ends of MOS tube M2 and MOS tube M3 are used as the other two input ends of the first-level pre-comparator respectively; the non-inverting input end of the first-level pre-comparator is connected to the threshold voltage input end through the first switch, the inverting input end of the first-level pre-comparator is connected to the output node of the inductor of the switching power supply through the second switch, and the other two input ends of the first-level pre-comparator are grounded. Wherein, the load network is a resistor array or a MOS tube with a preset bias (MOS tube with a specific bias). The capacitive coupling circuit includes a charging and discharging capacitor, and the capacitive coupling circuit is used to transmit the signal of the output node of the inductor of the switching power supply to the first-level pre-comparator through the charging and discharging process of the charging and discharging capacitor.

[0054] Exemplarily, a filter circuit is further provided between the capacitive coupling circuit and the first-stage pre-comparator.

[0055] Among them, the capacitive coupling circuit transmits the change of the VSW signal to the subsequent circuit by charging and discharging the internal control capacitor. The filter circuit is used to filter out the high-frequency spikes and glitches that may exist on the signal. The automatic zeroing capacitor network can process and eliminate the error of the comparator to a certain extent. The timing control circuit controls the on and off of the switch network according to a specific timing.

[0056] The first switch, the second switch and the fifth switch of the present invention can be exemplarily set as a dual-input single-output electronic switch; the output end and one input end of the dual-input single-output electronic switch serve as the output end and the input end of the dual-input single-output electronic switch, respectively, the other input end of the dual-input single-output electronic switch is grounded, and the control end of the dual-input single-output electronic switch is connected to the timing control circuit.

[0057] The implementation method of the dual-input single-output electronic switch of the present invention can be exemplarily set to include a first electrically controlled switch, a second electrically controlled switch and an inverter; one end of the first electrically controlled switch serves as an input end of the dual-input single-output electronic switch, and one end of the second electrically controlled switch serves as another input end of the dual-input single-output electronic switch; the other end of the first electrically controlled switch is connected to the other end of the second electrically controlled switch, and the common point where the other end of the first electrically controlled switch and the other end of the second electrically controlled switch are connected serves as the output end of the dual-input single-output electronic switch; the control end of the second electrically controlled switch serves as the control end of the dual-input single-output electronic switch; the control end of the second electrically controlled switch is connected to the input end of the inverter U, and the output end of the inverter U is connected to the control end of the first electrically controlled switch. Figure 4 As shown, for the first switch, the first electrically controlled switch, the second electrically controlled switch and the inverter are respectively Figure 4 In S1-A, S1-B and U1, for the first switch, the first electrically controlled switch, the second electrically controlled switch and the inverter are respectively Figure 4 In S2-A, S2-B and U3, for the fifth switch, the first electrically controlled switch, the second electrically controlled switch and the inverter are respectively Figure 4 S5-A, S5-B and U2 in.

[0058] The first electric-controlled switch Sa and the second electric-controlled switch Sb of the present invention can be exemplarily configured as a triode or a MOS tube.

[0059] The timing control circuit is used to generate a first control signal P1, a second control signal P2 and a third control signal P3 according to a driving signal GON of a power tube gate of a switching power supply; Figure 5As shown, the rising edges of the first control signal P1, the second control signal P2 and the third control signal P3 are synchronized with the rising edge of the driving signal GON; the falling edge of the first control signal P1 is delayed by a first time relative to the falling edge of the driving signal GON; the falling edge of the second control signal P2 is delayed by a second preset time relative to the falling edge of the first control signal P1; the falling edge of the third control signal P3 is delayed by a third preset time relative to the falling edge of the second control signal P2; the first control signal P1 is used to control the states of the first switch, the third switch and the fourth switch; the second control signal P2 is used to control the state of the second switch; and the third control signal P3 is used to control the state of the fifth switch.

[0060] The present invention sets a timing control circuit to control the switch network, and determines the voltage value of each point according to the timing. The timing of the operation of the entire structure is controlled according to the gate voltage GON. When GON is high, the inductor current is in a charging state and the current is rising, so when the GON signal is high, the zero-crossing detection part is shielded. Only when GON is low, the zero-crossing detection part will be enabled. The GON signal is used to ensure the speed and accuracy of the entire zero-crossing detection process and prevent false triggering of zero-crossing detection.

[0061] The working process of the inductor current zero-crossing detection device of the switching power supply of the present invention is as follows:

[0062] When GON is high, the inductor current zero-crossing detection device of the entire switching power supply is shielded and is in a disabled state, thereby avoiding false triggering of the ZCD detection signal.

[0063] When GON is low, the inductor current zero-crossing detection device of the switching power supply starts working:

[0064] In the first stage, the timing control circuit controls the switch S2 to be grounded, and VSW charges and maintains the capacitor coupling circuit; the first switch S1 is grounded, the second switch S2 is grounded, and the third switch S3 and the fourth switch S4 are turned on, ensuring that the offset voltage information on the first-level pre-comparator CMP1 and the second-level comparator CMP2 begins to be stored in the automatic zeroing capacitor network; the fifth switch S5 is grounded, ZCD_OUT and the third-level comparator output D are disconnected, and the level is low.

[0065] The second stage timing control circuit controls the first switch S1 to connect to the threshold voltage input terminal Vref, and determines the threshold value of the drop amount to connect to the first-level pre-comparator. The second switch S2 is grounded, the third switch S3 and the fourth switch S4 are disconnected, and the offset voltage information on the first-level pre-comparator CMP1 and the second-level comparator CMP2 is stored and maintained on the automatic zeroing capacitor network. The fifth switch S5 is grounded, and ZCD_OUT and the third-level comparator output D are disconnected, and the level is low.

[0066] The third stage timing control circuit controls the first switch S1 to connect to the threshold voltage input terminal Vref, and determines the threshold value of the drop amount to access the comparator. The second switch S2 is connected to the capacitive coupling circuit to ensure that VSW is connected to the filter circuit after passing through the capacitive coupling circuit. At this time, the left potential of the capacitive coupling circuit is VSW, and the right potential is 0. The rise in VSW potential corresponds to the positive potential at the second switch S2, and the drop in VSW potential corresponds to the negative potential at the second switch S2. The third switch S3 and the fourth switch S4 are disconnected, and the offset voltage information on the first-level pre-comparator CMP1 and the second-level comparator CMP2 is stored and maintained on the automatic zeroing capacitor network. At this time, the first-level pre-comparator CMP1 and the second-level comparator CMP2 start the comparison action. However, the fifth switch S5 is grounded, ZCD_OUT and the point D at the output of the third-level comparator are disconnected, and the level is still low.

[0067] The fourth stage: Based on the third stage, the switch S5 is connected to the D point, and the comparison result of the three-level comparator is transmitted to ZCD_OUT in real time.

[0068] The whole comparison process continues until the GON signal is high.

[0069] Combination Figure 4 and Figure 5 , when GON is high, P1, P2, and P3 are all high. Figure 5 The A region in the Figure 4 It can be seen that at this time, GON is high, the automatic zeroing capacitor network starts to work, and the offset information of the amplifier is stored on the automatic zeroing capacitor network; P1 is high, IN2 point is grounded; P2 is high, IN1 point is grounded, VSW charges the capacitor coupling network, and the charged voltage is VSW0; P3 is high, and the ZCD_OUT signal output is zero.

[0070] exist Figure 5 In the B area, GON is low, and the process of storing offset information on the automatic zeroing capacitor network in the A area is completed; the status of P1, P2, and P3 is consistent with that in the A area.

[0071] exist Figure 5 In the C region, P1 decreases based on the B region. At this time, the voltage of Vref is transmitted to the IN2 point, and the value of Vref marks the threshold of the drop amount of VSW. The states of P2 and P3 remain unchanged.

[0072] exist Figure 5 In the D region, P2 is lowered based on the C region. At this time, the IN1 point is disconnected from the ground, and the voltage of the capacitive coupling network is connected to the IN1 point, whose voltage is VSW0. At this time, the voltage of the IN1 point is VSW-VSW0. The comparison process has begun, but the comparison result is not allowed to be output.

[0073] exist Figure 5 In the E region, P3 decreases based on the D region, and the output is released. ZCD_OUT flips with the change of the input terminal. When the value of VSW0-VSW is less than Vref, the output of ZCD_OUT is low. When the value of VSW0-VSW is greater than Vref, the output of ZCD_OUT is high. This indicates that the decrease of VSW compared with the initial sampling value VSW0 exceeds Vref. The moment when ZCD_OUT changes from low to high is the moment when the inductor current passes zero.

[0074] According to the specific embodiments provided by the present invention, the present invention discloses the following technical effects:

[0075] 1. Using the capacitive coupling method, the detection is the drop change of the switch node VSW itself rather than the node voltage change at both ends of the inductor.

[0076] 2. Use a four-input comparator to suppress the errors caused by even-order nonlinear interference terms and improve the accuracy of the comparison results.

[0077] 3. Use automatic zeroing capacitor network to greatly reduce offset voltage.

[0078] 4. Use the GON signal (i.e., the driving signal of the power tube gate) to unify the timing of control signal detection and comparison to avoid false detection.

[0079] 5. No complex detection and compensation circuit is required, which saves costs and is also beneficial to the stability of the system.

[0080] The various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referenced to each other.

[0081] The principles and implementation methods of the present invention are described in this article using specific examples. The description of the above embodiments is only used to help understand the method and core idea of ​​the present invention. At the same time, for those skilled in the art, according to the idea of ​​the present invention, there will be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as limiting the present invention.

Claims

1. An inductor current zero-crossing detection device for a switching power supply, characterized in that: The device comprises: a capacitive coupling circuit, a primary pre-comparator, an automatic zeroing capacitor network, a secondary comparator and a tertiary comparator connected in sequence; the device also comprises a timing control circuit and a switch network; The timing control circuit is connected to the control end of the switch network; the timing control circuit is used to control the state of the switch network; The switch network includes a first switch, a second switch, a third switch, a fourth switch and a fifth switch; The first switch is arranged between the threshold voltage input terminal and the non-inverting input terminal of the first-stage pre-comparator; The second switch is arranged between the output node of the inductor of the switching power supply and the inverting input terminal of the first-stage pre-comparator; The third switch is arranged between the non-inverting input terminal and the output terminal of the secondary comparator; The fourth switch is arranged between the inverting input terminal and the output terminal of the secondary comparator; The fifth switch is arranged between the output terminal of the three-stage comparator and the detection signal output terminal.

2. The inductor current zero-crossing detection device of the switching power supply according to claim 1, characterized in that: The first-stage pre-comparator is a four-input comparator, the non-inverting input terminal of the four-input comparator is connected to the threshold voltage input terminal through the first switch, the inverting input terminal of the four-input comparator is connected to the output node of the inductor of the switching power supply through the second switch, and the other two input terminals of the four-input comparator are grounded.

3. The inductor current zero-crossing detection device of a switching power supply according to claim 1 or 2, characterized in that: The first-level pre-comparator includes a first current source, a second current source, a MOS tube M1, a MOS tube M2, a MOS tube M3, a MOS tube M4 and a load network; The source end of the MOS tube M1 and the source end of the MOS tube M2 are both connected to the first current source, and the source end of the MOS tube M3 and the source end of the MOS tube M4 are both connected to the second current source; The drain end of the MOS tube M2 and the drain end of the MOS tube M3 are both connected to the first end of the load network, and the common point where the drain end of the MOS tube M2 and the drain end of the MOS tube M3 are connected serves as the in-phase output end of the first-stage pre-comparator; The drain ends of the MOS tube M1 and the MOS tube M4 are both connected to the second end of the load network, and the common point where the drain end of the MOS tube M1 and the drain end of the MOS tube M4 are connected serves as the inverting output end of the first-stage pre-comparator; The other two ends of the load network are grounded; The gate end of the MOS transistor M1 serves as the inverting input end of the first-stage pre-comparator, and the gate end of the MOS transistor M4 serves as the non-inverting input end of the first-stage pre-comparator; the gate ends of the MOS transistor M2 and the MOS transistor M3 serve as the other two input ends of the first-stage pre-comparator respectively; The non-inverting input terminal of the first-level pre-comparator is connected to the threshold voltage input terminal through the first switch, the inverting input terminal of the first-level pre-comparator is connected to the output node of the inductor of the switching power supply through the second switch, and the other two input terminals of the first-level pre-comparator are grounded.

4. The inductor current zero-crossing detection device of the switching power supply according to claim 3, characterized in that: The load network is a resistor array or a MOS tube with a preset bias.

5. The inductor current zero-crossing detection device of a switching power supply according to claim 1, characterized in that: A filter circuit is also provided between the capacitive coupling circuit and the first-stage pre-comparator.

6. The inductor current zero-crossing detection device of a switching power supply according to claim 1, characterized in that: The first switch, the second switch and the fifth switch are all dual-input single-output electronic switches; The output end and one input end of the dual-input single-output electronic switch serve as the output end and the input end of the dual-input single-output electronic switch respectively, the other input end of the dual-input single-output electronic switch is grounded, and the control end of the dual-input single-output electronic switch is connected to the timing control circuit.

7. The inductor current zero-crossing detection device of a switching power supply according to claim 6, characterized in that: The dual-input single-output electronic switch comprises a first electrically controlled switch, a second electrically controlled switch and an inverter; One end of the first electronically controlled switch serves as one input end of the dual-input single-output electronic switch, and one end of the second electronically controlled switch serves as the other input end of the dual-input single-output electronic switch; The other end of the first electronically controlled switch is connected to the other end of the second electronically controlled switch, and a common point where the other end of the first electronically controlled switch and the other end of the second electronically controlled switch are connected serves as an output end of the dual-input single-output electronic switch; The control end of the second electronically controlled switch serves as the control end of the dual-input single-output electronic switch; the control end of the second electronically controlled switch is connected to the input end of the inverter, and the output end of the inverter is connected to the control end of the first electronically controlled switch.

8. The inductor current zero-crossing detection device of a switching power supply according to claim 7, characterized in that: The first electrically controlled switch and the second electrically controlled switch are triodes or MOS tubes.

9. The inductor current zero-crossing detection device of a switching power supply according to claim 1, characterized in that: The timing control circuit is used to generate a first control signal, a second control signal and a third control signal according to a driving signal of a power tube gate of a switching power supply; The rising edges of the first control signal, the second control signal and the third control signal are synchronized with the rising edge of the driving signal; the falling edge of the first control signal is delayed by a first time relative to the falling edge of the driving signal; the falling edge of the second control signal is delayed by a second preset time relative to the falling edge of the first control signal; The falling edge of the third control signal is delayed by a third preset time relative to the falling edge of the second control signal; The first control signal is used to control the states of the first switch, the third switch and the fourth switch; The second control signal is used to control the state of the second switch; and the third control signal is used to control the state of the fifth switch.

10. The inductor current zero-crossing detection device of a switching power supply according to claim 1, characterized in that: The capacitive coupling circuit includes a charging and discharging capacitor, and the capacitive coupling circuit is used to transmit a signal of an output node of an inductor of a switching power supply to the first-level pre-comparator through a charging and discharging process of the charging and discharging capacitor.

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