Low resistivity tungsten film and manufacturing method

Abstract

An apparatus and method for providing an electronic device including a tungsten film stack are provided. A tungsten liner formed by physical vapor deposition is filled with a tungsten film formed directly on the tungsten liner by chemical vapor deposition.

Description

Technical Field

[0001] Embodiments of the present disclosure are in the field of electronic device manufacturing, and more particularly, in the field of integrated circuit (IC) manufacturing. In particular, embodiments of the present disclosure relate to low-resistivity tungsten films and methods of manufacturing low-resistivity tungsten films. Background Art

[0002] Integrated circuits can be made by processing layers of material that create intricate patterns on substrate surfaces. Producing patterned materials on substrates requires controlled methods for depositing the desired materials. Depositing films selectively on one surface relative to a different surface is useful for patterning and other applications.

[0003] In conventional fill schemes utilizing tungsten deposition processes, a titanium nitride (TiN) layer is deposited on a dielectric substrate as a barrier and liner layer, followed by a nucleation or seed layer for a bulk CVD tungsten (W) film. The resistivity of the TiN layer is high, and reducing the resistivity of the bulk CVD tungsten grown on the nucleation layer is challenging. Due to the increase in aspect ratio (the ratio of the height of the trench or via relative to the width of the trench or via and / or smaller feature dimensions such as the width of a feature structure), conventional processes produce tungsten film stacks with unacceptably high linear resistance or via contact resistance.

[0004] Therefore, a need exists for improved methods for forming tungsten layers, films, and materials, and devices incorporating such tungsten layers, films, and materials. Summary of the Invention

[0005] Apparatus and methods for depositing metal films are described herein. In one embodiment, a method for forming a tungsten stack on a substrate includes forming a tungsten liner layer on a surface of the substrate using a physical vapor deposition process; and forming a tungsten film directly on the tungsten liner layer using a chemical vapor deposition process.

[0006] One or more embodiments relate to a method of forming a tungsten stack on a substrate, the method comprising: placing the substrate on a substrate support in a physical vapor deposition process chamber; forming a tungsten liner layer on a surface of the substrate using a physical vapor deposition process; controlling the grain size of the tungsten liner layer to be greater than 100 angstroms ( ); and forming a tungsten film directly on the tungsten liner layer using a chemical vapor deposition process.

[0007] In another aspect, an electronic device includes: a tungsten liner layer deposited by physical vapor deposition on a surface; and a film deposited by chemical vapor deposition directly on the tungsten liner layer. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] With the above-listed features of the present disclosure now understood in detail, a more particular description of the disclosure, briefly summarized above, can be obtained by reference to embodiments, some of which are illustrated in the accompanying drawings. It should be noted, however, that the drawings illustrate only typical embodiments of the disclosure and, therefore, are not to be considered limiting of the scope of the disclosure, as the disclosure admits to other equally effective embodiments. The embodiments as described herein are illustrated by way of example and not limitation in the figures of the accompanying drawings, in which like reference numerals represent similar elements.

[0009] Figure 1 A schematic cross-sectional view illustrating a semiconductor device according to one or more embodiments of the present disclosure;

[0010] Figure 2 A schematic cross-sectional view illustrating a semiconductor device according to one or more embodiments of the present disclosure; and

[0011] Figure 3 A flow chart of a method according to one embodiment is shown.

[0012] In the drawings, similar components and / or features may have the same reference label. Furthermore, various components of the same type may be distinguished by a reference label followed by a dash and a second label that distinguishes the similar components. If only the first reference label is used in the specification, the description applies to any similar component having the same first reference label without regard to the second reference label. DETAILED DESCRIPTION

[0013] Before describing several exemplary embodiments of the present disclosure, it should be understood that the present disclosure is not limited to the details of construction or processing steps mentioned in the following description. The present disclosure is capable of other embodiments and can be implemented or practiced in various ways.

[0014] As used herein, "substrate" refers to any substrate or material surface formed on a substrate on which film processing is performed during the manufacturing process. For example, substrate surfaces on which processing may be performed include materials such as silicon, silicon oxide, strained silicon, silicon on insulator (SOI), carbon-doped silicon oxide, amorphous silicon, doped silicon, germanium, gallium arsenide, glass, sapphire, and any other materials such as metals, metal nitrides, metal alloys, and other conductive materials, depending on the application. Substrates include, but are not limited to, semiconductor wafers. Substrates may be exposed to a pretreatment process for polishing, etching, reducing, oxidizing, hydroxylating, annealing, and / or baking the substrate surface. In addition to performing film processing directly on the surface of the substrate itself, in the present disclosure, as disclosed in more detail below, any disclosed film processing step may also be performed on an underlying layer formed on the substrate, and the term "substrate surface" is intended to include such underlying layers as indicated by the context. Thus, for example, where a film / layer or portion of a film / layer has been deposited onto a substrate surface, the exposed surface of the newly deposited film / layer becomes the substrate surface.

[0015] As used in this specification and the appended claims, the terms "precursor," "reactant," "reactant gas," and similar terms are used interchangeably to refer to any gaseous species that can react with a substrate surface.

[0016] As used herein, the term "liner" refers to a layer that conformably forms along at least a portion of the lower surface and / or sidewalls of an opening, such that a substantial portion of the opening remains unfilled after deposition of the layer. In some embodiments, the liner may be formed along the entirety of the lower surface and sidewalls of the opening. The liner may also be formed on a planar surface of a planar substrate.

[0017] Advantageously, the PVD-deposited tungsten liner layer, comprising a tungsten film deposited by CVD directly on a PVD-deposited tungsten liner layer, exhibits a clear stack resistance benefit compared to conventional devices comprising a TiN layer plus a nucleation layer followed by tungsten deposited by CVD. In some embodiments, there can be an air break or exposure of the substrate to ambient conditions between the deposition of the tungsten liner layer by PVD and the deposition of the tungsten film by CVD. However, in a unique embodiment, there is no air break between the formation of the tungsten liner layer by the PVD process and the formation of the tungsten film by the CVD process. In other words, both processes are performed under vacuum or load lock conditions. In some embodiments, the process comprising depositing the tungsten liner layer using PVD without bias power applied to a substrate support on which the substrate is supported results in improved characteristics in terms of grain size and orientation to improve the stack resistivity of the tungsten stack comprising the tungsten liner layer and the tungsten film. In some embodiments, a Kr process gas is used for the PVD process to further tailor the device characteristics. In one or more embodiments, the tungsten liner layer includes alpha-W and no beta-W is present in the tungsten liner layer.

[0018] Reference Figure 1-3 , describing an apparatus and method for depositing a metal film. In one embodiment, method 200 includes forming a tungsten stack on a substrate 102. The method includes forming a tungsten liner layer 106 on a surface of the substrate 102 using a physical vapor deposition process, and then forming a tungsten film 108 directly on the tungsten liner layer using a chemical vapor deposition process. In one or more embodiments, the tungsten liner layer 106 is substantially free of tungsten oxide. In some embodiments, the tungsten stack including the tungsten liner layer 106 and the tungsten film 108 formed by the method does not include a TiN layer or a nucleation layer. In one or more embodiments, method 200 includes forming a dielectric layer 110 on the surface of the substrate before forming the tungsten liner layer 106.

[0019] In some embodiments, the substrate surface includes a feature. In one embodiment, the feature is selected from a trench, a via, or a spike. In a unique embodiment, the feature includes a trench. In some embodiments, method 200 further includes: at 202, forming a tungsten liner layer in a PVD chamber; and at 206, removing the substrate from the PVD chamber, exposing the substrate to an ambient atmosphere, and treating the tungsten liner layer to remove tungsten oxide from the tungsten liner layer. As used herein, "ambient atmosphere" refers to an environment that is not under vacuum and is exposed to air. In some embodiments, treating the tungsten liner layer includes exposing the tungsten liner layer to hydrogen gas and exposing the tungsten liner layer to WF6 gas.

[0020] In other embodiments, method 200 further includes forming a tungsten liner layer in a PVD chamber at 204; removing the substrate from the PVD chamber at 206; and placing the substrate in a CVD chamber without exposing the substrate to the ambient atmosphere at 208. At 210, a tungsten film 108 is deposited directly on the tungsten liner layer 106 to form a W film stack. In some embodiments, the channel has a width W greater than or equal to 5 nm and less than or equal to 65 nm, greater than or equal to 5 nm and less than or equal to 55 nm, greater than or equal to 5 nm and less than or equal to 45 nm, greater than or equal to 5 nm and less than or equal to 35 nm, greater than or equal to 5 nm and less than or equal to 32 nm, greater than or equal to 5 nm and less than or equal to 25 nm, or greater than or equal to 5 nm and less than or equal to 22 nm.

[0021] In some embodiments, the method 200 further includes, at 202 , placing a substrate on a substrate support in a physical vapor deposition chamber without applying a bias voltage to the substrate support.

[0022] Another aspect of the present disclosure pertains to a method for forming a tungsten stack on a substrate, the method comprising: placing a substrate on a substrate support in a physical vapor deposition (PVD) process chamber, forming a tungsten liner layer on a surface of the substrate using a PVD process, controlling the grain size of the tungsten liner layer to be greater than 100 angstroms, and forming a tungsten film directly on the tungsten liner layer using a chemical vapor deposition (CVD) process. In some embodiments, controlling the grain size of the tungsten liner layer comprises not applying a bias voltage to the substrate support during the PVD process. In some embodiments, the tungsten film deposited by CVD has a grain size greater than 250 angstroms. In some embodiments, the tungsten liner layer deposited by PVD has a grain size greater than 100 angstroms, and the tungsten film has a grain size greater than 250 angstroms. In one or more embodiments, the tungsten stack has a resistivity less than 13 μohm-cm, less than 12.5 μohm-cm, less than 12 μohm-cm, less than 11.5 μohm-cm, or less than 11 μohm-cm. In some embodiments, using Kr as a process gas during a PVD process has the beneficial effect of increasing the grain size of the tungsten liner layer. Experimental data has shown that using Ar as a process gas for the PVD process at room temperature (approximately 25° C.), the W liner layer grain size is 137 angstroms, while using Ar as a process gas for the PVD process at 325° C. increases the W liner layer grain size to 180 angstroms. However, using Kr as a process gas for the PVD process at room temperature (approximately 25° C.) increases the W liner layer grain size to 210 angstroms. For a tungsten stack including a CVD-deposited film on each of these liner layers, using Ar as a process gas for the PVD process at room temperature (approximately 25° C.), the W liner layer grain size is 137 angstroms, and the stack resistivity is approximately 11 μohm-cm. Using Ar as the process gas for the PVD process at 325° C. increased the W liner layer grain size to 180 angstroms and resulted in a stack resistivity of approximately 9.8 μohm-cm for the stack comprising a CVD-deposited film on the tungsten liner layer. Using Kr as the process gas for the PVD process at room temperature (approximately 25° C.) increased the W liner layer grain size to 210 angstroms and resulted in a stack resistivity of approximately 9.6 μohm-cm for the stack comprising a CVD-deposited film on the tungsten liner layer.

[0023] Another aspect of the present disclosure pertains to an electronic device comprising: a tungsten liner layer deposited by physical vapor deposition on a surface; and a tungsten film deposited by chemical vapor deposition on the tungsten liner layer. In some embodiments, the tungsten liner deposited by physical vapor deposition has a grain size greater than 100 angstroms. In some embodiments, the tungsten film deposited by chemical vapor deposition has a grain size greater than 250 angstroms. In one or more embodiments, the substrate surface comprises a feature selected from the group consisting of a channel, a via, and a spike. In one or more embodiments, the feature is a channel having a width less than 65 nm.

[0024] In some embodiments, the W liner layer has a grain size greater than 100 angstroms, greater than 150 angstroms, or greater than 200 angstroms, and a tungsten film stack including the tungsten liner layer and the tungsten film has a stack resistivity less than 10 μohm-cm. In some embodiments, the device includes a channel having a width W greater than or equal to 5 nm and less than or equal to 65 nm, greater than or equal to 5 nm and less than or equal to 55 nm, greater than or equal to 5 nm and less than or equal to 45 nm, greater than or equal to 5 nm and less than or equal to 35 nm, greater than or equal to 5 nm and less than or equal to 32 nm, greater than or equal to 5 nm and less than or equal to 25 nm, or greater than or equal to 5 nm and less than or equal to 22 nm. In some embodiments, the channel has an aspect ratio of depth or height H to width W greater than or equal to approximately 5:1, 10:1, 15:1, 20:1, 25:1, 30:1, 35:1, or 40:1. In one or more embodiments, the aspect ratio is greater than 10:1.

[0025] In some embodiments, a tungsten film formed on a PVD-deposited liner layer is formed by exposing the substrate to a plasma formed from a first gas. In some embodiments, the first gas comprises a tungsten precursor gas. In some embodiments, the first gas comprises a fluorine-free tungsten halogenide precursor, such as tungsten pentachloride (WCl5) or tungsten hexachloride (WCl6). In other embodiments, the first gas comprises a fluorine-free tungsten oxyhalide precursor, such as WOCl4 or WO2Cl2. In other embodiments, the first gas is selected from the group consisting of a fluorine-free halide precursor, a chlorine-free tungsten halide precursor (such as tungsten pentabromide (WBr5) or tungsten hexabromide (WBr6)). In some embodiments, in addition to comprising a tungsten precursor gas, the first gas further comprises: a reactive gas, such as a hydrogen-containing gas (such as hydrogen (H2) or ammonia (NH3) or hydrazine (N2H4)); and a carrier gas, such as argon (Ar), helium (He) or nitrogen (N2). In some embodiments, the carrier gas is an inert gas. In some embodiments, the first gas consists of or consists essentially of a tungsten precursor gas, a reaction gas, and a carrier gas. In some embodiments, the first gas consists of or consists essentially of the following: a chlorine-free, fluorine-free tungsten halide precursor; a hydrogen-containing gas; and an inert gas. The carrier gas may be provided at a flow rate of about 10 seem to about 10 slm.

[0026] The methods of the present invention may be used with any device node, but may be particularly advantageous for device nodes of about 25 nm or less, such as device nodes of about 5 nm to about 25 nm.

[0027] For illustrative purposes, these figures show a substrate having a single feature; however, those skilled in the art will appreciate that there may be more than one feature. The feature may have any suitable shape, including, but not limited to, a spike, a trench, and a cylindrical via. In a particular embodiment, the feature is a trench. In other particular embodiments, the feature is a via. As used herein, the term "feature" means any intentionally formed surface irregularity. Suitable examples of features include, but are not limited to, a trench having a top, two sidewalls, and a bottom; a spike having a top and two sidewalls extending upward from the surface; and a via having sidewalls extending downward from the surface with an open bottom. The feature may have any suitable aspect ratio (the ratio of the depth of the feature's height H to the width of the feature). In some embodiments, the aspect ratio is greater than or equal to approximately 5:1, 10:1, 15:1, 20:1, 25:1, 30:1, 35:1, or 40:1. In one or more embodiments, the aspect ratio is greater than 10:1.

[0028] In one or more embodiments, at least one feature extends a depth or height H from the top surface of the substrate or the top surface of the tungsten liner layer to the bottom surface. The at least one feature has a width W defined by a first sidewall and a second sidewall. A tungsten film is deposited on the tungsten layer to fill the at least one feature and extend above the top surface of the tungsten layer. The tungsten film may be recessed to lower the top of the metal film to a height equal to or lower than the top surface of the tungsten liner layer to form a recessed metal film. The tungsten film may be expanded to form a pillar extending from the at least one feature.

[0029] Reference Figure 1 and Figure 2 One or more embodiments are directed to a method of forming a semiconductor device 100. A substrate 102 is provided with a feature 104, which is filled with a tungsten film 108. The feature 104 shown is in the form of a trench having a width W and a depth or height H.

[0030] In one or more embodiments, the tungsten film 108 is a tungsten film deposited by CVD. In one embodiment, the tungsten film is a gap fill layer. Figure 1 As shown in FIG, in one embodiment, a tungsten film 108 is deposited on a tungsten liner layer 106 that is on a top portion 114 of the feature 104, on sidewalls 116 of the feature 104, and on a top portion 118 of the dielectric layer 110.

[0031] In one or more embodiments, the tungsten film 108 is a seed gap filler layer. In one embodiment, the seed gap filler layer is a selectively grown seed film. Figure 1 As shown in FIG, in one embodiment, a tungsten film 108 is deposited on a tungsten liner layer 106 that is on a top portion 114 of the feature 104, on sidewalls 116 of the feature 104, and on a top portion 118 of the dielectric layer 110.

[0032] like Figure 2 As shown in FIG, in another embodiment, a tungsten film 108 is deposited on a tungsten liner layer 106 that is on a top portion 114 of the feature 104, sidewalls 116 of the feature 104, and a top surface 120 of the substrate 102.

[0033] In one or more embodiments, the tungsten film 108 is a tungsten layer. In one or more embodiments, the tungsten layer is a tungsten gap-fill layer.

[0034] In one or more embodiments, a dielectric layer 110 is formed on the substrate 102. The dielectric layer can be any suitable dielectric material, including but not limited to titanium or silicon nitride, oxide, or carbide. The dielectric layer 110 can be formed on the substrate 102 conformally or non-conformally.

[0035] In one embodiment, dielectric layer 110 comprises a dielectric material having a k value less than 5. In one embodiment, dielectric layer 110 comprises a dielectric material having a k value less than 2. In at least some embodiments, dielectric layer 110 comprises an oxide, a carbon-doped oxide, porous silicon dioxide, a carbide, an oxycarbide, a nitride, an oxynitride, an oxycarbonitride, a polymer, phosphosilicate glass, fluorosilicate (SiOF) glass, organosilicate glass (SiOCH), or any combination thereof. In at least some embodiments, dielectric layer 110 may comprise polyimide, epoxy, a photodefinable material such as benzocyclobutene (BCB), a WPR series material, or spin-on-glass.

[0036] In one embodiment, the thickness of dielectric layer 110 is in a range from about 10 nanometers (nm) to about 2 micrometers (μm). In one embodiment, dielectric layer 110 is deposited using a deposition technique such as, but not limited to, chemical vapor deposition ("CVD"), physical vapor deposition ("PVD"), molecular beam epitaxy ("MBE"), metal-organic chemical vapor deposition ("MOCVD"), atomic layer deposition ("ALD"), spin coating, or other insulating deposition techniques known to those skilled in the art of microelectronic device fabrication.

[0037] In one embodiment, a tungsten liner layer 106 is deposited on the dielectric layer 110. In one embodiment, the tungsten liner layer 106 is a conductive liner. In some embodiments, the tungsten liner layer 106 is formed by a PVD process.

[0038] In one embodiment, the tungsten liner layer 106 is deposited to a depth from about to about In one embodiment, the tungsten liner layer 106 is deposited to a thickness of about to about The thickness is in the range of .

[0039] Although the present disclosure has been described herein with reference to specific embodiments, it should be understood that these embodiments are merely illustrative of the principles and applications of the present disclosure. It will be apparent to those skilled in the art that various modifications and variations may be made to the methods and apparatus of the present disclosure without departing from the spirit and scope of the present disclosure. Therefore, the present disclosure is intended to encompass modifications and variations within the scope of the appended claims and their equivalents.

Claims

1. A method for forming a tungsten stack on a substrate and filling a trench, the method comprising the following steps: placing the substrate on a substrate support in a physical vapor deposition chamber without applying a bias voltage to the substrate support, and forming a tungsten liner layer on the trench including a dielectric material, two sidewalls, and a bottom, the tungsten liner layer covering the two sidewalls and the bottom and being formed using a physical vapor deposition process using Kr as a process gas; and forming a tungsten film directly on the tungsten liner layer to form the tungsten stack having a stack resistivity, the tungsten film being formed using a chemical vapor deposition process and filling the trench, wherein the forming of the tungsten film does not include forming a nucleation layer on the tungsten liner layer, and wherein the trench has a width of less than 65 nm, Wherein not applying the bias voltage to the substrate support controls the grain size of the tungsten liner layer to be greater than 200 angstroms and improves the resistivity of the stack. The method of claim 1 , wherein the tungsten liner layer does not contain tungsten oxide. 3 . The method of claim 2 , wherein the tungsten stack formed by the method does not include a TiN layer.

4. The method of claim 2, wherein forming the tungsten liner layer on the trench using Kr as the process gas is performed at 25°C.

5. The method of claim 1, wherein the tungsten stack has a stack resistivity of less than 10 μOhm-cm. The method of claim 1 , wherein the trench comprises an aspect ratio of height to width, the aspect ratio being greater than or equal to 5:

1. The method of claim 6 , wherein the channel has a width less than 25 nm.

8. The method of claim 2, wherein the method further comprises the steps of forming the tungsten liner layer in the physical vapor deposition chamber, removing the substrate from the physical vapor deposition chamber, exposing the substrate to ambient atmosphere, and treating the tungsten liner layer to remove tungsten oxide from the tungsten liner layer.

9. The method of claim 8, wherein treating the tungsten liner layer comprises exposing the tungsten liner layer to hydrogen gas and exposing the tungsten liner layer to WF6 gas.

10. The method of claim 2, further comprising forming the tungsten liner layer in the physical vapor deposition chamber, removing the substrate from the physical vapor deposition chamber, and placing the substrate in a chemical vapor deposition chamber without exposing the substrate to ambient atmosphere.

11. The method of claim 1, wherein the tungsten film has a grain size exceeding 250 angstroms.

12. An electronic device comprising a tungsten stack formed by the method of claim 1, the electronic device comprising: a tungsten liner layer deposited by physical vapor deposition on the trench; and A tungsten film is deposited by chemical vapor deposition directly on the tungsten liner layer.

13. The electronic device of claim 12, wherein the tungsten film has a grain size exceeding 250 angstroms.

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