Display panel and manufacturing method thereof

Abstract

The application discloses a display panel and a manufacturing method thereof. The display panel comprises a display area and a non-display area adjacent to the display area; the display panel further comprises a conduction layer; the conduction layer comprises a first undercut unit arranged in the display area, a second undercut unit arranged in the non-display area, a first test terminal and a second test terminal; wherein the first undercut unit comprises a first undercut opening, the second undercut unit comprises a second undercut opening, and the first test terminal and the second test terminal are electrically connected with the second undercut unit. The application can effectively measure the depth of the second undercut opening, obtain the depth of the first undercut opening, and reduce the production cost.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of display, in particular to a display panel and a manufacturing method thereof. BACKGROUND

[0002] Currently, mainstream organic light-emitting diode (OLED) displays are mostly of top emission structure, which requires the face cathode in the OLED to have sufficient light transmission characteristics. This requirement leads to the use of special materials or relatively thin film thickness for the face cathode, thereby causing the resistance of the face cathode to increase and the IR drop phenomenon of the display to be serious. To solve the voltage drop caused by this situation, the top emission structure OLED mostly uses an in-plane auxiliary cathode to reduce the voltage drop caused by the face cathode by being connected in parallel with the face cathode through lapping.

[0003] Generally, side etching needs to be performed in the film layer above the auxiliary electrode to form an undercut opening structure so that the face cathode can extend into the undercut opening and be lapped with the auxiliary electrode. However, the current method for measuring the side etching depth is to scrap the product and then use a measuring instrument to measure the depth of side etching. This method has a long test cycle and cannot timely find the abnormal situation of the side etching depth, thereby causing production waste. SUMMARY

[0004] Embodiments of the present application provide a display panel and a manufacturing method thereof, which can effectively measure the depth of a first undercut opening and reduce production cost.

[0005] Embodiments of the present application provide a display panel, which comprises a display area and a non-display area adjacent to the display area.

[0006] The display panel further comprises:

[0007] A conductive layer comprising a first undercut unit arranged in the display area, a second undercut unit arranged in the non-display area, a first test terminal and a second test terminal.

[0008] The first undercut unit comprises a first undercut opening, the second undercut unit comprises a second undercut opening, and the first test terminal and the second test terminal are electrically connected with the second undercut unit.

[0009] In an embodiment of the present application, the first undercut unit comprises a first sub-layer, a second sub-layer and a third sub-layer arranged in layers, the second sub-layer is located between the first sub-layer and the third sub-layer, and the first undercut opening is arranged in the second sub-layer between the first sub-layer and the third sub-layer.

[0010] The second undercut unit includes a fourth sub-layer, a fifth sub-layer and a sixth sub-layer which are stacked, the fifth sub-layer is located between the fourth sub-layer and the sixth sub-layer, and the fifth sub-layer is provided with the second undercut opening between the fourth sub-layer and the sixth sub-layer.

[0011] In an embodiment of the present application, the material of the second sub-layer is the same as that of the fifth sub-layer, and the second sub-layer and the fifth sub-layer are both conductive.

[0012] In an embodiment of the present application, the depth of the first undercut opening is equal to the depth of the second undercut opening.

[0013] In an embodiment of the present application, the display panel further includes a substrate and an insulating layer, and the conductive layer is arranged between the substrate and the insulating layer, the insulating layer includes a first opening corresponding to the first undercut unit and a second opening corresponding to the second undercut unit.

[0014] The orthogonal projection of the first opening on the substrate partially overlaps the orthogonal projection of the first undercut unit on the substrate, and the first opening and the first undercut opening are in communication, and the orthogonal projection of the second opening on the substrate partially overlaps the orthogonal projection of the second undercut unit on the substrate, and the second opening and the second undercut opening are in communication.

[0015] According to the above-mentioned purpose of the present application, the embodiment of the present application further provides a manufacturing method of a display panel, the display panel including a display area and a non-display area adjacent to the display area.

[0016] The manufacturing method of the display panel includes the following steps:

[0017] forming a conductive layer, the conductive layer including a first undercut unit arranged in the display area, a second undercut unit arranged in the non-display area, a first test terminal and a second test terminal, and the first test terminal and the second test terminal are both electrically connected to the second undercut unit;

[0018] performing etching treatment on the conductive layer to form a first undercut opening in the first undercut unit and a second undercut opening in the second undercut unit;

[0019] obtaining the etching resistance between the first test terminal and the second test terminal through the first test terminal and the second test terminal to determine the depth of the second undercut opening.

[0020] In one embodiment of the present application, the first undercut unit comprises a first sub-layer, a second sub-layer and a third sub-layer stacked together, the second sub-layer is between the first sub-layer and the third sub-layer, the second undercut unit comprises a fourth sub-layer, a fifth sub-layer and a sixth sub-layer stacked together, the fifth sub-layer is between the fourth sub-layer and the sixth sub-layer.

[0021] In the step of etching the conductive layer, the first undercut opening is formed in the second sub-layer between the first sub-layer and the third sub-layer, and the second undercut opening is formed in the fifth sub-layer between the fourth sub-layer and the sixth sub-layer.

[0022] In one embodiment of the present application, the step of obtaining the post-etching resistance between the first test terminal and the second test terminal through the first test terminal and the second test terminal to determine the depth of the second undercut opening further comprises the following steps:

[0023] obtaining the width of the fifth sub-layer along a first direction and the thickness of the fifth sub-layer, the first direction is perpendicular to the longitudinal direction of the second undercut opening;

[0024] obtaining the pre-etching resistance between the first test terminal and the second test terminal through the first test terminal and the second test terminal before the conductive layer is etched;

[0025] The step of obtaining the post-etching resistance between the first test terminal and the second test terminal through the first test terminal and the second test terminal to determine the depth of the second undercut opening further comprises the following steps:

[0026] determining the depth of the second undercut opening according to the width of the fifth sub-layer along the first direction, the thickness of the fifth sub-layer, the pre-etching resistance and the post-etching resistance.

[0027] In one embodiment of the present application, the step of obtaining the pre-etching resistance between the first test terminal and the second test terminal through the first test terminal and the second test terminal before the conductive layer is etched comprises the following steps:

[0028] connecting two probes of a resistance testing instrument to the first test terminal and the second test terminal respectively to measure the pre-etching resistance between the first test terminal and the second test terminal before the conductive layer is etched.

[0029] In an embodiment of the present application, the determining the depth of the second undercut opening according to the width of the fifth sub-layer along the first direction, the thickness of the fifth sub-layer, the pre-etching resistance, and the post-etching resistance further comprises the following steps:

[0030] After the etching treatment of the conductive layer, two probes of a resistance testing instrument are connected to the first test terminal and the second test terminal respectively to measure the post-etching resistance between the first test terminal and the second test terminal.

[0031] An etching resistance is obtained according to the pre-etching resistance and the post-etching resistance.

[0032] The depth of the second undercut opening is obtained according to the following formula:

[0033]

[0034] wherein W is the depth of the second undercut opening, R is the etching resistance, d is the thickness of the fifth sub-layer, k is the resistivity of the material of the fifth sub-layer, and L is the width of the fifth sub-layer along the first direction.

[0035] The present application has the following beneficial effects: the present application sets the first undercut unit in the display area and the second undercut unit in the non-display area in the conductive layer, and the first undercut unit has a first undercut opening and the second undercut unit has a second undercut opening; meanwhile, the present application sets the first test terminal and the second test terminal in the non-display area and electrically connected to the second undercut unit, and then the resistance between the first test terminal and the second test terminal is obtained through the first test terminal and the second test terminal, the resistance of the etching removed part in the second undercut opening is obtained according to the difference of the resistance between the first test terminal and the second test terminal before and after the etching of the conductive layer, and the depth of the second undercut opening is obtained according to the resistance calculation formula; since the second undercut opening and the first undercut opening belong to the same layer and are prepared in the same layer, the depth of the second undercut opening can be regarded as the depth of the first undercut opening, and the depth of the first undercut opening can be obtained without the scrap processing of the display panel, thereby reducing the production cost. BRIEF DESCRIPTION OF DRAWINGS

[0036] The technical scheme and other beneficial effects of the present application will be apparent through the following detailed description of the specific embodiments of the present application with reference to the accompanying drawings.

[0037] Figure 1 A structural schematic diagram of the display panel provided by the embodiment of the present application;

[0038] Figure 2A structure schematic diagram of a second undercut unit, a first test terminal and a second test terminal of a display panel provided by an embodiment of the present application is shown in FIG. 1;

[0039] Figure 3 A plane structure schematic diagram of a second undercut unit, a first test terminal and a second test terminal provided by an embodiment of the present application is shown in FIG. 2;

[0040] Figure 4 A flow chart of a manufacturing method of a display panel provided by an embodiment of the present application is shown in FIG. 3;

[0041] Figure 5 A depth measurement system module schematic diagram of a first undercut opening and a second undercut opening of a display panel provided by an embodiment of the present application is shown in FIG. 4. DETAILED DESCRIPTION

[0042] The technical solutions in the embodiments of the present application will be clearly and completely described with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by a person skilled in the art without creative work fall within the scope of protection of the present application.

[0043] The following disclosure provides many different embodiments, or examples, for implementing different structures of the present application. For the purpose of simplicity, the components and arrangements of the particular examples are shown in the following description. These are, of course, merely examples and are not intended to limit the application in any way. Furthermore, the application can be used in various environments and / or with various modifications, which will be apparent to those of skill in the art. Like reference numerals have been used throughout the several figures to designate like parts. Further, the application provides examples of various specific processes and materials. However, one skilled in the art will recognize that other processes and / or materials can be used.

[0044] An embodiment of the present application provides a display panel, please refer to Figure 1 The display panel includes a display area AA and a non-display area BA adjacent to the display area AA.

[0045] Further, the display panel further includes a conductive layer 10; the conductive layer 10 includes a first undercut unit 11 disposed in the display area AA, and a second undercut unit 12, a first test terminal 13 and a second test terminal 14 disposed in the non-display area BA.

[0046] The first undercut unit 11 includes a first undercut opening 110, the second undercut unit 12 includes a second undercut opening 120, and the first test terminal 13 and the second test terminal 14 are electrically connected to the second undercut unit 12.

[0047] It can be understood that the material of the conductive layer 10 is a material that can conduct electricity, that is, the conductive layer 10 has conductivity, and both the first undercut unit 11 and the second undercut unit 12 belonging to the conductive layer 10 have conductivity.

[0048] In the implementation process, the embodiment of the present application sets the first undercut unit 11 in the display area AA and the second undercut unit 12 in the non-display area BA in the conductive layer 10, and the first undercut unit 11 has a first undercut opening 110, and the second undercut unit 12 has a second undercut opening 120. At the same time, the embodiment of the present application also sets the first test terminal 13 and the second test terminal 14 electrically connected with the second undercut unit 12 in the non-display area BA, so that the resistance between the first test terminal 13 and the second test terminal 14 can be tested through the first test terminal 13 and the second test terminal 14, and the resistance of the etched removed part in the second undercut opening 120 can be obtained according to the difference of the resistance between the first test terminal 13 and the second test terminal 14 before and after etching of the conductive layer 10, and the depth of the second undercut opening 120 can be obtained according to the resistance calculation formula. Since the second undercut opening 120 and the first undercut opening 110 both belong to the conductive layer 10 and are prepared in the same layer, the depth of the second undercut opening 120 can be regarded as the depth of the first undercut opening 110, and the depth of the first undercut opening 110 can be obtained without scrapping and breaking the display panel, thereby reducing the production cost.

[0049] Specifically, please continue to refer to Figure 1 The display panel provided by the embodiment of the present application includes a display area AA and a non-display area BA adjacent to the display area AA.

[0050] The display panel further includes a substrate 31, a buffer layer 32 disposed on the substrate 31, a light shielding layer 41 disposed on the buffer layer 32, a passivation layer 33 disposed on the buffer layer 32 and covering the light shielding layer 41, an active layer 42 disposed on the passivation layer 33 and above the light shielding layer 41, a gate insulating layer 43 disposed on the active layer 42, a gate 44 disposed on the gate insulating layer 43, an interlayer dielectric layer 34 disposed on the passivation layer 33 and covering the active layer 42, the gate insulating layer 43 and the gate 44, a conductive layer 10 disposed on the interlayer dielectric layer 34, an insulating layer 20 disposed on the interlayer dielectric layer 34 and covering the conductive layer 10, a planarization layer 51 disposed on the insulating layer 20, an anode 52 disposed on the planarization layer 51, and a pixel definition layer 53 disposed on the planarization layer 51, and the pixel definition layer 53 includes a pixel opening corresponding to the anode 52.

[0051] The conductive layer 10 includes the first undercut unit 11, the source 15 and the drain 16 arranged in the display area AA, and further includes the second undercut unit 12, the first test terminal 13 and the second test terminal 14 arranged in the non-display area BA.

[0052] It should be noted that the source 15 and the drain 16 are connected to both sides of the active layer 42 through the via holes passing through the interlayer dielectric layer 34, and the source 15, the drain 16, the active layer 42 and the gate 44 together form a thin film transistor, and the anode 52 is connected to the drain 16 in the thin film transistor through the via hole passing through the planarization layer 51 and the insulating layer 20 to realize signal transmission. The display panel further includes an organic functional layer and a cathode layer arranged on the pixel definition layer 53 in sequence, and a cathode connection terminal (not shown in the figure) arranged in the non-display area BA, and the organic functional layer is located on the upper surface of the anode 52 in the pixel opening, the cathode layer continuously covers the organic functional layer and extends into the non-display area BA to be connected with the cathode connection terminal to provide an electric signal for the cathode layer, and then the cathode layer provides electrons for the organic functional layer, and the anode 52 provides holes for the organic functional layer to realize light emission of the organic functional layer.

[0053] In the embodiment of the present application, the conductive layer 10 is a laminated structure of three metal thin films, and the metal thin film in the middle is more easily etched than the metal thin films on the upper and lower sides, for example, the conductive layer 10 can be a laminated structure of Al / Mo / Al three metal thin films.

[0054] As described above, the first undercut unit 11 includes the first sub-layer 111, the second sub-layer 112 and the third sub-layer 113 arranged in layers, and the second sub-layer 112 is located between the first sub-layer 111 and the third sub-layer 113, and the first sub-layer 111 is located between the second sub-layer 112 and the interlayer dielectric layer 34; the second undercut unit 12 includes the fourth sub-layer 121, the fifth sub-layer 122 and the sixth sub-layer 123 arranged in layers, and the fifth sub-layer 122 is located between the fourth sub-layer 121 and the sixth sub-layer 123, and the fourth sub-layer 121 is located between the fifth sub-layer 122 and the interlayer dielectric layer 34; the first test terminal 13 includes the seventh sub-layer 131, the eighth sub-layer 132 and the ninth sub-layer 133 arranged in layers, and the eighth sub-layer 132 is located between the seventh sub-layer 131 and the ninth sub-layer 133, and the seventh sub-layer 131 is located between the eighth sub-layer 132 and the interlayer dielectric layer 34; the second test terminal 14 includes the tenth sub-layer 141, the eleventh sub-layer 142 and the twelfth sub-layer 143 arranged in layers, and the eleventh sub-layer 142 is located between the tenth sub-layer 141 and the twelfth sub-layer 143, and the tenth sub-layer 141 is located between the eleventh sub-layer 142 and the interlayer dielectric layer 34.

[0055] Further, the first sub-layer 111, the fourth sub-layer 121, the seventh sub-layer 131 and the tenth sub-layer 141 are made of the same material and are prepared in the same layer, for example, the material is Al; the second sub-layer 112, the fifth sub-layer 122, the eighth sub-layer 132 and the eleventh sub-layer 142 are made of the same material and are prepared in the same layer, for example, the material is Mo; the third sub-layer 113, the sixth sub-layer 123, the ninth sub-layer 133 and the twelfth sub-layer 143 are made of the same material and are prepared in the same layer, for example, the material is Al; and the first sub-layer 111, the second sub-layer 112, the third sub-layer 113, the fourth sub-layer 121, the fifth sub-layer 122, the sixth sub-layer 123, the seventh sub-layer 131, the eighth sub-layer 132, the ninth sub-layer 133, the tenth sub-layer 141, the eleventh sub-layer 142 and the twelfth sub-layer 143 all have conductivity.

[0056] In the embodiment of the present application, the first undercut unit 11 comprises a first undercut opening 110, and the second undercut unit 12 comprises a second undercut opening 120. Specifically, the first undercut opening 110 is arranged in the second sub-layer 112 between the first sub-layer 111 and the third sub-layer 113, and the second undercut opening 120 is arranged in the fifth sub-layer 122 between the fourth sub-layer 121 and the sixth sub-layer 123.

[0057] It should be noted that the insulating layer 20 comprises a first opening 201 corresponding to the first undercut unit 11, a second opening 202 corresponding to the second undercut unit 12, a third opening 203 corresponding to the first test terminal 13, and a fourth opening 204 corresponding to the second test terminal 14. The first opening 201 has a projection on the substrate 31 that partially overlaps the projection of the first undercut unit 11 on the substrate 31, and the first opening 201 is in communication with the first undercut opening 110. The second opening 202 has a projection on the substrate 31 that partially overlaps the projection of the second undercut unit 12 on the substrate 31, and the second opening 202 is in communication with the second undercut opening 120. The third opening 203 exposes part of the upper surface of the first test terminal 13, and the fourth opening 204 exposes part of the upper surface of the second test terminal 14. In addition, the planar layer 51 and the pixel definition layer 53 both have openings corresponding to the first opening 201 and are in communication with the first opening 201 to expose the side of the first undercut unit 11 where the first ground and the opening 110 are arranged. Furthermore, in the embodiment of the present application, the organic functional layer extends into the first opening 201 and is interrupted at the first undercut opening 110 to expose the first undercut opening 110. The cathode layer extends into the first opening 201 and overlaps the first undercut unit 11 in the first opening 201, i.e., the first undercut unit 11 can be an auxiliary cathode, so as to reduce the surface resistance of the cathode layer, improve the voltage drop phenomenon of the display panel, and improve the display uniformity of the display panel.

[0058] The conductive layer 10 is side-etched to obtain the first undercut unit 11 and the second undercut unit 12. Since the first undercut unit 11 and the second undercut unit 12 belong to the conductive layer 10, and the second sub-layer 112 and the fifth sub-layer 122 are prepared in the same layer and have the same material and are prepared in the same process, the depth of the first undercut opening 110 and the depth of the second undercut opening 120 are not much different, and can be regarded as equal. The depth of the second undercut opening 120 can be regarded as the depth of the first undercut opening 110.

[0059] Preferably, the depth of the second undercut opening 120 is equal to the depth of the first undercut opening 110.

[0060] In the embodiments of the present application, please refer to Figure 1 , Figure 2 and Figure 3 , the first test terminal 13 and the second test terminal 14 are both electrically connected to the second undercut unit 12, and the resistance value between the first test terminal 13 and the second test terminal 14 can be measured by the first test terminal 13 and the second test terminal 14, that is, the sum of the resistance values of the first test terminal 13, the second test terminal 14 and the second undercut unit 12. It can be understood that the first test terminal 13 and the second test terminal 14 are both electrically connected to the second undercut unit 12, which can be at least one of the seventh sub-layer 131 and the tenth sub-layer 141 being electrically connected to the fourth sub-layer 121, the eighth sub-layer 132 and the eleventh sub-layer 142 being electrically connected to the fifth sub-layer 122, and the ninth sub-layer 133 and the twelfth sub-layer 143 being electrically connected to the sixth sub-layer 123.

[0061] Further, the sum of the resistance values of the first test terminal 13, the second test terminal 14 and the second undercut unit 12 can be measured by a resistance testing instrument before the conductive layer 10 is side-etched, which can be recorded as the pre-etching resistance. The sum of the resistance values of the first test terminal 13, the second test terminal 14 and the second undercut unit 12 can be measured by a resistance testing instrument after the conductive layer 10 is side-etched, which can be recorded as the post-etching resistance. The difference between the pre-etching resistance and the post-etching resistance is the resistance of the etched removed part of the second undercut unit 12, which can be recorded as the etching resistance. According to the resistance calculation formula, the size of the etched removed part of the second undercut unit 12 can be obtained, that is, the depth of the second undercut opening 120 can be obtained to obtain the depth of the first undercut opening 110.

[0062] In the related art, the undercut opening is generally obtained by side etching, and the side etching depth of the undercut opening needs to be tested. A common testing method is to scrap the display panel, and then use a measuring instrument to measure the side etching depth. This method has a long testing period, and cannot timely find the abnormal condition of the side etching depth, and causes production waste. In the embodiment of the present application, the resistance between the first test terminal 13 and the second test terminal 14 is tested, and the resistance of the etched removed part in the second undercut opening 120 is obtained according to the difference of the resistance between the first test terminal 13 and the second test terminal 14 before and after etching of the conductive layer 10, and the depth of the second undercut opening 120 is obtained according to the resistance calculation formula. Since the second undercut opening 120 and the first undercut opening 110 both belong to the conductive layer 10 and are prepared in the same layer, the depth of the second undercut opening 120 can be regarded as the depth of the first undercut opening 110, and the depth of the first undercut opening 110 can be obtained without scrapping the display panel, thereby reducing the production cost.

[0063] In addition, the embodiment of the present application also provides a manufacturing method of the above display panel, which is combined with Figure 1 、 Figure 2 、 Figure 3 and Figure 4 The display panel includes a display area AA and a non-display area BA, and the manufacturing method of the display panel includes the following steps:

[0064] S10, forming a conductive layer, the conductive layer includes a first undercut unit arranged in the display area, a second undercut unit arranged in the non-display area, a first test terminal and a second test terminal, and the first test terminal and the second test terminal are electrically connected with the second undercut unit.

[0065] A substrate 31 is provided, a buffer layer 32 is formed on the substrate 31, a light shielding layer 41 is formed on the buffer layer 32, a passivation layer 33 covering the light shielding layer 41 is formed on the buffer layer 32, an active layer 42 located above the light shielding layer 41 is formed on the passivation layer 33, a gate insulating layer 43 is formed on the active layer 42, a gate 44 is formed on the gate insulating layer 43, an interlayer dielectric layer 34 covering the active layer 42, the gate insulating layer 43 and the gate 44 is formed on the passivation layer 33, a conductive layer 10 is formed on the interlayer dielectric layer 34, and an insulating layer 20 covering the conductive layer 10 is formed.

[0066] The conductive layer 10 includes the first undercut unit 11, the source electrode 15 and the drain electrode 16 arranged in the display area AA, and further includes the second undercut unit 12, the first test terminal 13 and the second test terminal 14 arranged in the non-display area BA. It should be noted that the source electrode 15 and the drain electrode 16 are connected to both sides of the active layer 42 through the via holes penetrating through the interlayer dielectric layer 34, and the source electrode 15, the drain electrode 16, the active layer 42 and the gate electrode 44 together form a thin film transistor.

[0067] In the embodiment of the present application, the conductive layer 10 is a three-layer metal thin film laminated structure, and the metal thin film in the middle is more easily etched than the metal thin films on both sides, for example, the conductive layer 10 can be a three-layer metal thin film laminated structure of Al / Mo / Al.

[0068] As described above, the first undercut unit 11 includes the first sub-layer 111, the second sub-layer 112 and the third sub-layer 113 arranged in layers, and the second sub-layer 112 is located between the first sub-layer 111 and the third sub-layer 113, and the first sub-layer 111 is located between the second sub-layer 112 and the interlayer dielectric layer 34; the second undercut unit 12 includes the fourth sub-layer 121, the fifth sub-layer 122 and the sixth sub-layer 123 arranged in layers, and the fifth sub-layer 122 is located between the fourth sub-layer 121 and the sixth sub-layer 123, and the fourth sub-layer 121 is located between the fifth sub-layer 122 and the interlayer dielectric layer 34; the first test terminal 13 includes the seventh sub-layer 131, the eighth sub-layer 132 and the ninth sub-layer 133 arranged in layers, and the eighth sub-layer 132 is located between the seventh sub-layer 131 and the ninth sub-layer 133, and the seventh sub-layer 131 is located between the eighth sub-layer 132 and the interlayer dielectric layer 34; the second test terminal 14 includes the tenth sub-layer 141, the eleventh sub-layer 142 and the twelfth sub-layer 143 arranged in layers, and the eleventh sub-layer 142 is located between the tenth sub-layer 141 and the twelfth sub-layer 143, and the tenth sub-layer 141 is located between the eleventh sub-layer 142 and the interlayer dielectric layer 34.

[0069] Further, the first sub-layer 111, the fourth sub-layer 121, the seventh sub-layer 131 and the tenth sub-layer 141 are made of the same material and are prepared in the same layer, for example, the material is Al; the second sub-layer 112, the fifth sub-layer 122, the eighth sub-layer 132 and the eleventh sub-layer 142 are made of the same material and are prepared in the same layer, for example, the material is Mo; the third sub-layer 113, the sixth sub-layer 123, the ninth sub-layer 133 and the twelfth sub-layer 143 are made of the same material and are prepared in the same layer, for example, the material is Al.

[0070] A plurality of openings are formed in the insulating layer 20, including a first opening 201 corresponding to the first undercut unit 11, a second opening 202 corresponding to the second undercut unit 12, a third opening 203 corresponding to the first test terminal 13, a fourth opening 204 corresponding to the second test terminal 14, and a fifth opening corresponding to the drain electrode 16. The first opening 201 has a projection on the substrate 31 that partially overlaps the projection of the first undercut unit 11 on the substrate 31, and the first opening 201 is in communication with the first undercut opening 110. The second opening 202 has a projection on the substrate 31 that partially overlaps the projection of the second undercut unit 12 on the substrate 31, and the second opening 202 is in communication with the second undercut opening 120. The third opening 203 exposes a portion of the upper surface of the first test terminal 13. The fourth opening 204 exposes a portion of the upper surface of the second test terminal 14. The fifth opening exposes a portion of the upper surface of the drain electrode 16.

[0071] S20, etching the conductive layer to form a first undercut opening in the first undercut unit and a second undercut opening in the second undercut unit.

[0072] The conductive layer 10 is subjected to a side etching process to form a first undercut opening 110 in the first undercut unit 11 and a second undercut opening 120 in the second undercut unit 12, i.e., the first undercut opening 110 is formed in the second sub-layer 112 between the first sub-layer 111 and the third sub-layer 113, and the second undercut opening 120 is formed in the fifth sub-layer 122 between the fourth sub-layer 121 and the sixth sub-layer 123.

[0073] In the embodiment of the present application, since the first undercut unit 11 and the second undercut unit 12 belong to the same conductive layer 10, and the second sub-layer 112 and the fifth sub-layer 122 are prepared in the same layer and have the same material, and are prepared in the same process, the depth of the first undercut opening 110 and the depth of the second undercut opening 120 are not much different, and can be considered equal. The depth of the second undercut opening 120 can be considered as the depth of the first undercut opening 110.

[0074] Preferably, the depth of the second undercut opening 120 is equal to the depth of the first undercut opening 110.

[0075] S30, obtaining the etched resistance between the first test terminal and the second test terminal through the first test terminal and the second test terminal to determine the depth of the second undercut opening.

[0076] First, the width of the fifth sub-layer 122 along the first direction X and the thickness of the fifth sub-layer 122 need to be obtained, wherein the first direction X is perpendicular to the longitudinal direction of the second undercut opening 120, as shown in FIG. 2B. Figure 3

[0077] ​Before the etching process is performed on the conductive layer 10, two probes of a resistance testing instrument are connected to the first test terminal 13 and the second test terminal 14 respectively to measure the pre-etching resistance between the first test terminal 13 and the second test terminal 14, i.e. the sum of the resistance values of the first test terminal 13, the second test terminal 14 and the second undercut unit 12 before side etching.

[0078] After the etching process is performed on the conductive layer 10, two probes of a resistance testing instrument are connected to the first test terminal 13 and the second test terminal 14 respectively to measure the post-etching resistance between the first test terminal 13 and the second test terminal 14, i.e. the sum of the resistance values of the first test terminal 13, the second test terminal 14 and the second undercut unit 12 after side etching.

[0079] Then, the etching resistance of the second undercut unit 12 is obtained by subtracting the post-etching resistance from the pre-etching resistance.

[0080] Then, the depth of the second undercut opening 120 is obtained according to the following formula.

[0081]

[0082] wherein W is the depth of the second undercut opening 120, R is the etching resistance, d is the thickness of the fifth sub-layer 122, k is the resistivity of the material of the fifth sub-layer 122, and L is the width of the fifth sub-layer 122 along the first direction X.

[0083] The depth of the first undercut opening 110 can be considered equal to the depth of the second undercut opening 120, and after the depth of the second undercut opening 120 is obtained, the depth of the first undercut opening 110 can be considered as the depth of the second undercut opening 120.

[0084] It should be noted that in the embodiments of the present application, a first test terminal 13, a second test terminal and a second undercut unit 12 can form a test unit, and the test unit can be located in the non-display area BA and distributed on the side of the display area AA. Optionally, the number of test units can be multiple, and the depths of the second undercut openings 120 obtained by testing multiple test units can be averaged, and the depth of the first undercut opening 110 can be considered as the average of the depths of the multiple second undercut openings 120.

[0085] In other embodiments of the present application, the non-display area BA of the display panel further includes a cutting area of the display panel in the process, i.e. the above-mentioned test unit can be prepared in the cutting area of the display panel, and after the depth of the second undercut opening 120 (i.e. the first undercut opening 110) is obtained, the above-mentioned test unit can be cut off in the cutting process to reduce the occupied area of the non-display area BA of the subsequent display panel, i.e. to improve the screen-to-body ratio of the display panel.

[0086] Further, please refer to Figure 5 , a measuring system for measuring the depth of the second undercut opening 120 (i.e. the first undercut opening 110) in the display panel described in the above embodiments is provided.

[0087] Specifically, please combine Figure 1 , Figure 2 , Figure 3 and Figure 5 , the measuring system can include a measuring unit 61, a storage unit 62 and a computing unit 63, wherein the measuring unit 61 can include the resistance testing instrument in the above embodiments, wherein the thickness d, the width L and the resistivity k can be obtained and stored in the storage unit 62 in advance by process preset parameters, and the resistance testing instrument can obtain the pre-etching resistance and the post-etching resistance by measurement, and then the above measured or stored data can be transmitted to the computing unit 63, and the computing unit 63 obtains the depth W of the second undercut opening 120 (i.e. the first undercut opening 110) according to the pre-etching resistance, the post-etching resistance, the thickness d, the width L and the resistivity.

[0088] It should be noted that the thickness d and the width L can be obtained according to the process preset parameters, or can be measured by a measuring instrument during the manufacturing process and stored in the storage unit 62, which is not limited here.

[0089] In summary, in the embodiment of the present application, the first undercut unit 11 located in the display area AA and the second undercut unit 12 located in the non-display area BA are arranged in the conductive layer 10, and the first undercut unit 11 has a first undercut opening 110, and the second undercut unit 12 has a second undercut opening 120; at the same time, the first test terminal 13 and the second test terminal 14 electrically connected with the second undercut unit 12 are arranged in the non-display area BA, and then the resistance between the first test terminal 13 and the second test terminal 14 can be tested through the first test terminal 13 and the second test terminal 14, and the resistance of the etched removed part in the second undercut opening 120 can be obtained according to the difference of the resistance between the first test terminal 13 and the second test terminal 14 before and after etching of the conductive layer 10, and the depth of the second undercut opening 120 can be obtained according to the resistance calculation formula; since the second undercut opening 120 and the first undercut opening 110 both belong to the conductive layer 10 and are prepared in the same layer, the depth of the second undercut opening 120 can be regarded as the depth of the first undercut opening 110, and the depth of the first undercut opening 110 can be obtained without scrapping and slicing the display panel, thereby reducing the production cost.

[0090] In the above embodiments, the description of each embodiment has its own emphasis, and the parts not described in detail in a certain embodiment can be referred to the related description of other embodiments.

[0091] The display panel and the manufacturing method thereof provided by the embodiments of the present application are described in detail above, and the principles and the implementation manners of the present application are described by using specific examples in this paper, and the above description of the embodiments is only used to help understand the technical solutions of the present application and the core ideas thereof; the ordinary skilled in the art should understand that the technical solutions recorded in the foregoing embodiments can still be modified, or some technical features thereof can be replaced equivalently; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A display panel, characterized in that, The display panel includes a display area and a non-display area adjacent to the display area; The display panel also includes: The conductive layer includes a first undercut unit disposed in the display area, a second undercut unit disposed in the non-display area, a first test terminal, and a second test terminal; The first undercut unit includes a first undercut opening, the second undercut unit includes a second undercut opening, and both the first test terminal and the second test terminal are electrically connected to the second undercut unit. The first undercut unit includes a first sub-layer, a second sub-layer, and a third sub-layer stacked together. The second sub-layer is located between the first sub-layer and the third sub-layer, and the second sub-layer is provided with the first undercut opening located between the first sub-layer and the third sub-layer. The second undercut unit includes a fourth sub-layer, a fifth sub-layer, and a sixth sub-layer stacked together. The fifth sub-layer is located between the fourth sub-layer and the sixth sub-layer, and the fifth sub-layer has a second undercut opening located between the fourth sub-layer and the sixth sub-layer. The material of the first sublayer is the same as that of the fourth sublayer, the material of the second sublayer is the same as that of the fifth sublayer, and the material of the third sublayer is the same as that of the sixth sublayer.

2. The display panel according to claim 1, characterized in that, Both the second sublayer and the fifth sublayer are conductive.

3. The display panel according to claim 1, characterized in that, The depth of the first undercut opening is equal to the depth of the second undercut opening.

4. The display panel according to claim 1, characterized in that, The display panel further includes a substrate and an insulating layer, and the conductive layer is disposed between the substrate and the insulating layer. The insulating layer includes a first opening corresponding to the first undercut unit and a second opening corresponding to the second undercut unit. Wherein, the orthographic projection of the first opening on the substrate partially overlaps with the orthographic projection of the first undercut unit on the substrate, and the first opening is connected to the first undercut opening; the orthographic projection of the second opening on the substrate partially overlaps with the orthographic projection of the second undercut unit on the substrate, and the second opening is connected to the second undercut opening.

5. A method for manufacturing a display panel, characterized in that, The display panel includes a display area and a non-display area adjacent to the display area; The method for manufacturing the display panel includes the following steps: A conductive layer is formed, the conductive layer including a first undercut unit disposed in the display area, a second undercut unit disposed in the non-display area, a first test terminal and a second test terminal, and the first test terminal and the second test terminal are both electrically connected to the second undercut unit; The conductive layer is etched to form a first undercut opening in the first undercut unit and a second undercut opening in the second undercut unit; The depth of the second undercut opening is determined by obtaining the post-etch resistance between the first test terminal and the second test terminal through the first test terminal and the second test terminal. In the step of forming the conductive layer, the first undercut unit includes a first sub-layer, a second sub-layer and a third sub-layer stacked together, with the second sub-layer located between the first sub-layer and the third sub-layer; the second undercut unit includes a fourth sub-layer, a fifth sub-layer and a sixth sub-layer stacked together, with the fifth sub-layer located between the fourth sub-layer and the sixth sub-layer. The material of the first sublayer is the same as that of the fourth sublayer, the material of the second sublayer is the same as that of the fifth sublayer, and the material of the third sublayer is the same as that of the sixth sublayer.

6. The method for manufacturing a display panel according to claim 5, characterized in that, In the step of etching the conductive layer, a first undercut opening is formed in the second sub-layer between the first sub-layer and the third sub-layer, and a second undercut opening is formed in the fifth sub-layer between the fourth sub-layer and the sixth sub-layer.

7. The method for manufacturing a display panel according to claim 6, characterized in that, Before the step of obtaining the post-etch resistance between the first test terminal and the second test terminal through the first test terminal and the second test terminal to determine the depth of the second undercut opening, the following steps are also included: Obtain the width of the fifth sub-layer along the first direction and the thickness of the fifth sub-layer, wherein the first direction is perpendicular to the depth direction of the second bottom cut opening; Before etching the conductive layer, the pre-etch resistance between the first test terminal and the second test terminal is obtained through the first test terminal and the second test terminal. The step of obtaining the post-etch resistance between the first test terminal and the second test terminal through the first test terminal and the second test terminal to determine the depth of the second undercut opening further includes the following steps: The depth of the second undercut opening is determined based on the width of the fifth sublayer along the first direction, the thickness of the fifth sublayer, the resistance before etching, and the resistance after etching.

8. The method for manufacturing a display panel according to claim 7, characterized in that, The step of obtaining the pre-etch resistance between the first test terminal and the second test terminal through the first test terminal and the second test terminal before etching the conductive layer includes the following steps: Before etching the conductive layer, two probes of a resistance testing instrument are connected to the first test terminal and the second test terminal, respectively, to measure the pre-etch resistance between the first test terminal and the second test terminal.

9. The method for manufacturing a display panel according to claim 7, characterized in that, Determining the depth of the second undercut opening based on the width of the fifth sub-layer along the first direction, the thickness of the fifth sub-layer, the resistance before etching, and the resistance after etching further includes the following steps: After etching the conductive layer, the two probes of the resistance testing instrument are connected to the first test terminal and the second test terminal respectively to measure the etched resistance between the first test terminal and the second test terminal. The etching resistance is obtained based on the resistance before etching and the resistance after etching. The depth of the second undercut opening is obtained according to the formula shown below; Wherein, W is the depth of the second undercut opening, R is the etching resistance, d is the thickness of the fifth sub-layer, k is the resistivity of the material of the fifth sub-layer, and L is the width of the fifth sub-layer along the first direction.

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