Harmonic compensation method, device and terminal equipment for three-phase PFC circuit

Abstract

The present invention is applicable to the field of power electronics technology, and in particular, relates to a harmonic compensation method, device and terminal equipment of a three-phase PFC circuit, the method comprising: obtaining a three-phase input current and a three-phase given current of a three-phase PFC circuit; extracting a specified harmonic current in the three-phase input current in a DQ coordinate system, calculating a three-phase compensation voltage of each harmonic corresponding to the three-phase PFC circuit; then compensating the three-phase modulation wave of the three-phase PFC circuit according to the three-phase compensation voltage of each harmonic; and finally generating a PWM signal according to the compensated three-phase modulation wave. The method provided by the present application can quickly extract harmonics in the current and compensate them, and has a fast response speed; and can compensate for a single harmonic, thereby ensuring the stability of the system.

Description

Technical Field

[0001] The present invention belongs to the technical field of power electronics, and in particular relates to a harmonic compensation method, device and terminal equipment for a three-phase PFC circuit. Background Art

[0002] PFC (Power Factor Correction) circuits are currently widely used in the field of power supplies, so the control requirements for PFC circuits are getting higher and higher. Currently, there are two key indicators for the control of PFC circuits, namely power factor and harmonic distortion rate of input current. For power factor, the method of independent control of active / reactive power in the prior art can achieve good results.

[0003] In the prior art, a repetitive control method is usually used to adjust the harmonic distortion rate of the input current. However, the repetitive control method is computationally complex and occupies a large amount of memory space. In addition, based on its control characteristics, the repetitive control method will compensate for all harmonics. Under the condition of a weak power grid, this method may amplify a certain current harmonic and cause system instability. Summary of the invention

[0004] In view of this, an embodiment of the present invention provides a harmonic compensation method, apparatus and terminal device for a three-phase PFC circuit to solve the problem that the control method of the input current harmonic distortion rate in the prior art affects the stability of the system.

[0005] A first aspect of an embodiment of the present invention provides a harmonic compensation method for a three-phase PFC circuit, comprising:

[0006] Obtain three-phase input current, three-phase given current and three-phase input voltage of a three-phase PFC circuit;

[0007] Extracting a specified harmonic in the three-phase input current in the DQ coordinate system, and calculating a three-phase compensation voltage corresponding to each harmonic in the three-phase PFC circuit according to each harmonic extracted in the DQ coordinate system;

[0008] Calculating a three-phase modulation degree of the three-phase PFC circuit according to the three-phase given current, the three-phase input current and the three-phase input voltage;

[0009] The three-phase modulation degree is superimposed on the three-phase compensation voltage of each harmonic corresponding to the three-phase PFC circuit to obtain a compensated three-phase modulation wave;

[0010] A PWM signal is generated according to the compensated three-phase modulation wave, and the target PFC circuit is controlled according to the PWM control signal.

[0011] A second aspect of an embodiment of the present invention provides a harmonic compensation device for a three-phase PFC circuit, including:

[0012] An acquisition module, used for acquiring a three-phase input current, a three-phase given current and a three-phase input voltage of a three-phase PFC circuit;

[0013] A compensation voltage acquisition module, used to extract the specified harmonics in the three-phase input current in the DQ coordinate system, and calculate the three-phase compensation voltage corresponding to each harmonic of the three-phase PFC circuit according to each harmonic current extracted in the DQ coordinate system;

[0014] A modulation degree calculation module, used for calculating the three-phase modulation degree of the three-phase PFC circuit according to the three-phase given current, the three-phase input current and the three-phase input voltage;

[0015] A three-phase modulation amount compensation module, used for superimposing the three-phase modulation amount and the three-phase compensation voltage of each harmonic corresponding to the three-phase PFC circuit to obtain a compensated three-phase modulation wave;

[0016] The PWM signal generating module is used to generate a PWM signal according to the compensated three-phase modulation wave, and the PWM signal is used to control the switch tube in the three-phase PFC circuit.

[0017] A third aspect of an embodiment of the present invention provides a terminal device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements the steps of the harmonic compensation method for the three-phase PFC circuit as described above when executing the computer program.

[0018] A fourth aspect of an embodiment of the present invention provides a computer-readable storage medium, wherein the computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps of the harmonic compensation method for the three-phase PFC circuit as described above are implemented.

[0019] Compared with the prior art, the embodiments of the present invention have the following beneficial effects: the embodiments of the present invention first extract the specified harmonic current in the three-phase input current in the DQ coordinate system, and calculate the three-phase compensation voltage of each harmonic corresponding to the three-phase PFC circuit; then compensate the three-phase modulation wave of the three-phase PFC circuit according to the three-phase compensation voltage of each harmonic; finally generate a PWM signal according to the compensated three-phase modulation wave. The method provided by this embodiment can quickly extract the harmonics in the current and compensate them, and has a fast response speed; and can compensate for a single harmonic, thereby ensuring the stability of the system. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.

[0021] Figure 1 It is a flow chart of a harmonic compensation method for a three-phase PFC circuit provided by an embodiment of the present invention;

[0022] Figure 2 is a circuit diagram of a three-phase PFC circuit provided by an embodiment of the present invention;

[0023] Figure 3 is a flowchart of a three-phase compensation voltage calculation method provided by an embodiment of the present invention;

[0024] Figure 4 It is a flowchart of a harmonic compensation method for a three-phase PFC circuit provided by an embodiment of the present invention;

[0025] Figure 5 is a flowchart of a harmonic compensation method for a three-phase PFC circuit provided by another embodiment of the present invention;

[0026] Figure 6 It is a structural schematic diagram of a harmonic compensation device for a three-phase PFC circuit provided by an embodiment of the present invention;

[0027] Figure 7 It is a schematic diagram of a terminal device provided in an embodiment of the present invention. DETAILED DESCRIPTION

[0028] In the following description, specific details such as specific system structures, technologies, etc. are provided for the purpose of illustration rather than limitation, so as to provide a thorough understanding of the embodiments of the present invention. However, it should be clear to those skilled in the art that the present invention may be implemented in other embodiments without these specific details. In other cases, detailed descriptions of well-known systems, devices, circuits, and methods are omitted to prevent unnecessary details from obstructing the description of the present invention.

[0029] In order to illustrate the technical solution of the present invention, a specific embodiment is provided below for illustration.

[0030] In one embodiment, Figure 1 As shown, Figure 1 The implementation process of the harmonic compensation method of the three-phase PFC circuit provided by the embodiment of the present invention is shown, and the process is described in detail as follows:

[0031] S101: Acquire a three-phase input current, a three-phase given current, and a three-phase input voltage of a three-phase PFC circuit.

[0032] S102: extracting a specified harmonic current from the three-phase input current in a DQ coordinate system, and calculating a three-phase compensation voltage corresponding to each harmonic in the three-phase PFC circuit according to each harmonic extracted in the DQ coordinate system.

[0033] S103: Calculating a three-phase modulation degree of the three-phase PFC circuit according to the three-phase given current, the three-phase input current and the three-phase input voltage.

[0034] S104: superimposing the three-phase modulation index and the three-phase compensation voltage of each harmonic corresponding to the three-phase PFC circuit to obtain a compensated three-phase modulation wave.

[0035] S105: Generate a PWM signal according to the compensated three-phase modulation wave, wherein the PWM signal is used to control a switch tube in the three-phase PFC circuit.

[0036] The method provided in this embodiment is specifically applied to Figure 2 The three-phase Vienna PFC circuit is shown.

[0037] It can be seen from the above embodiments that the embodiment of the present invention first extracts the specified harmonic current in the three-phase input current in the DQ coordinate system, and calculates the three-phase compensation voltage of each harmonic corresponding to the three-phase PFC circuit; then compensates the three-phase modulation wave of the three-phase PFC circuit according to the three-phase compensation voltage of each harmonic; finally, generates a PWM signal according to the compensated three-phase modulation wave. The method provided by this embodiment can quickly extract the harmonics in the current and compensate them, and has a fast response speed; and can compensate for a single harmonic, thereby ensuring the stability of the system. In addition, the method of this embodiment, because it is to compensate the voltage amount and then perform PWM modulation, compared with the method of directly compensating the current amount and then performing PWM modulation, avoids the limitation that each phase current is affected by the unbalanced load and needs to be modulated by a PWM modulator with a beat adjustment function, so after adopting the method of this embodiment, the use range of the PWM modulator is wider.

[0038] In one embodiment, Figure 1 The specific implementation process of S102 includes:

[0039] S201: Performing an ABC / DQ transformation of the Nth harmonic of the three-phase input current to obtain an Nth harmonic current component in a DQ coordinate system; wherein N∈a, a represents a set of harmonic orders of the three-phase input current.

[0040] In one embodiment, the specific implementation process of S201 includes:

[0041] S301: Acquire a three-phase input voltage of the three-phase PFC circuit, input the three-phase input voltage into a phase-locked loop controller, and output a fundamental voltage phase.

[0042] S302: Determine a trigonometric constructor of the Nth harmonic according to the fundamental voltage phase and angle multiplication formula.

[0043] S303: Determine the Nth harmonic current component in the DQ coordinate system according to the Nth harmonic triangular construction method and the three-phase input current.

[0044] S202: Inputting the Nth harmonic current component in the DQ coordinate system into a first PI controller, and outputting a voltage compensation amount in the DQ coordinate system.

[0045] S203: Perform DQ / ABC transformation on the voltage compensation amount in the DQ coordinate system to obtain a three-phase compensation voltage corresponding to the Nth harmonic.

[0046] In one embodiment, before the above S202, the method further includes: performing low-pass filtering on the Nth harmonic current component in the DQ coordinate system to obtain the Nth harmonic current component in the DQ coordinate system after filtering;

[0047] Correspondingly, S202 includes: inputting the Nth harmonic current component in the DQ coordinate system after the filtering process into a first PI controller, and outputting a voltage compensation amount in the DQ coordinate system.

[0048] In this embodiment, for the orders with higher harmonic content in the input current, the corresponding harmonics are first extracted. For example, if the 5th, 7th and 11th harmonic contents in the input current are higher, the 5th, 7th and 11th harmonic components are extracted from the input current; if the 5th harmonic content in the input current is higher, only the 5th harmonic component is extracted from the input current.

[0049] Specifically, the three-phase input current is i a 、i b and i cFirst, it is necessary to convert from the ABC coordinate system to the DQ coordinate system through ABC / DQ transformation. After obtaining the three-phase input current and three-phase input voltage of the three-phase PFC circuit, first input the three-phase input voltage to the phase-locked loop controller to output the fundamental voltage phase θ. The fundamental voltage phase takes the phase of any phase voltage in the three-phase fundamental voltage. Then, according to the fundamental voltage phase and the frequency multiplication formula, determine the trigonometric constructors sin(-5θ) and cos(-5θ) of the 5th harmonic, sin(7θ) and cos(7θ) of the 7th harmonic, and sin(-11θ) and cos(-11θ) of the 11th harmonic. The trigonometric constructors corresponding to each harmonic are used to extract the harmonic current in the three-phase input current in the DQ coordinate system.

[0050] For example, when it is necessary to obtain the trigonometric constructor corresponding to the seventh harmonic, it can be obtained by the following double angle formula:

[0051] sin(2θ)=2*sin(θ)*cos(θ)

[0052] cos(2θ)=cos(θ)*cos(θ)-sin(θ)*sin(θ)

[0053] sin(3θ)=sin(θ)*cos(2θ)+cos(2θ)*sin(2θ)

[0054] cos(3θ)=cos(θ)*cos(2θ)-sin(θ)*sin(2θ)

[0055] sin(5θ)=sin(2θ)*cos(3θ)+cos(2θ)*sin(3θ)

[0056] cos(5θ)=cos(2θ)*cos(3θ)-sin(2θ)*sin(3θ)

[0057] sin(7θ)=sin(2θ)*cos(5θ)+cos(2θ)*sin(5θ)

[0058] cos(7θ)=cos(2θ)*cos(5θ)-sin(2θ)*sin(5θ)

[0059] By using the above method of determining the triangular constructor, each harmonic in the three-phase input current in the DQ coordinate system can be quickly extracted.

[0060] In this embodiment, if Figure 3 As shown, Figure 3 The signal block diagram of the acquisition process of the three-phase compensation voltage is shown; wherein, Figure 3(a) shows the compensation voltage acquisition signal block diagram corresponding to the 5th harmonic, Figure 3 (b) shows the compensation voltage acquisition signal block diagram corresponding to the 7th harmonic. Figure 3 (c) shows the block diagram of the compensation voltage acquisition signal corresponding to the 11th harmonic.

[0061] like Figure 3 As shown in (a), firstly, the 5th harmonic current D-axis component i 5D and the 5th harmonic current Q-axis component i 5Q Input low-pass filter, and then filter the 5th harmonic current D-axis component i 5D and the 5th harmonic current Q-axis component i 5Q Input the first PI controller respectively to obtain the voltage compensation D-axis component and voltage compensation Q-axis component corresponding to the 5th harmonic. Finally, the voltage compensation D-axis component and voltage compensation Q-axis component corresponding to the 5th harmonic are transformed by DQ / ABC to obtain the three-phase compensation voltage u corresponding to the 5th harmonic. 5A 、u 5B and u 5C .

[0062] like Figure 3 As shown in (b), firstly, the 7th harmonic current D-axis component i 7D and the 7th harmonic current Q-axis component i 7Q Input low-pass filter, and then filter the 7th harmonic current D-axis component i 7D and the 7th harmonic current Q-axis component i 7Q Input the first PI controller respectively to obtain the voltage compensation D-axis component and voltage compensation Q-axis component corresponding to the 7th harmonic. Finally, the voltage compensation D-axis component and voltage compensation Q-axis component corresponding to the 7th harmonic are transformed by DQ / ABC to obtain the three-phase compensation voltage u corresponding to the 7th harmonic. 7A 、u 7B and u 7C .

[0063] like Figure 3 As shown in (c), firstly, the 11th harmonic current D-axis component i 11D and the 11th harmonic current Q-axis component i 11Q Input low-pass filter, and then filter the 11th harmonic current D-axis component i 11D and the 11th harmonic current Q-axis component i 11Q The voltage compensation D-axis component and the voltage compensation Q-axis component corresponding to the 11th harmonic are respectively input into the first PI controller to obtain the voltage compensation D-axis component and the voltage compensation Q-axis component corresponding to the 11th harmonic. Finally, the voltage compensation D-axis component and the voltage compensation Q-axis component corresponding to the 11th harmonic are transformed by DQ / ABC to obtain the three-phase compensation voltage u corresponding to the 11th harmonic. 11A 、u 11B and u11C .

[0064] In one embodiment, Figure 1 S103 specifically includes:

[0065] S401: Perform ABC / DQ transformation on the three-phase given current, the three-phase input current and the three-phase input voltage respectively to obtain the given current, input current and input voltage in the DQ coordinate system.

[0066] S402: Subtract the input current in the DQ coordinate system from the given current in the DQ coordinate system to obtain a current deviation in the DQ coordinate system.

[0067] S403: Input the current deviation in the DQ coordinate system into a second PI controller, and output a first control variable in the DQ coordinate system.

[0068] S404: Add the first control amount in the DQ coordinate system to the input voltage in the DQ coordinate system to obtain a second control amount in the DQ coordinate system.

[0069] S405: Perform DQ / ABC transformation on the second control variable in the DQ coordinate system to obtain the three-phase modulation degree.

[0070] In one embodiment, the input current in the DQ coordinate system includes an input current D-axis component and an input current Q-axis component; the given current in the DQ coordinate system includes a given current D-axis component and a given current Q-axis component; the current deviation includes a current deviation D-axis component and a current deviation Q-axis component;

[0071] The specific implementation process of the above S402 includes:

[0072] S501: Subtract the input current D-axis component from the given current D-axis component to obtain the current deviation D-axis component.

[0073] S502: Subtract the input current Q-axis component from the given current Q-axis component to obtain the current deviation Q-axis component.

[0074] In this embodiment, if Figure 4 As shown, Figure 4 A flow chart of a harmonic compensation method for a three-phase PFC circuit is shown.

[0075] like Figure 4 As shown, firstly, the three-phase input current and the three-phase given current are transformed from the ABC coordinate system to the DQ coordinate system, and then the given current D-axis component i dref Subtract the input current D-axis component i d , get the current deviation D-axis component, and set the given current Q-axis component iqref Subtract the Q-axis component of the input current i q , obtain the current deviation Q-axis component, then input the current deviation D-axis component and the current deviation Q-axis component into the second PI controller respectively, obtain the first D-axis control amount and the first Q-axis control amount, then add the input voltage D-axis component of the three-phase PFC circuit to the first D-axis control amount to obtain the second D-axis control amount, add the input voltage Q-axis component of the three-phase PFC circuit to the first Q-axis control amount to obtain the second Q-axis control amount, finally convert the second D-axis control amount and the second Q-axis control amount from the ABC coordinate system to the DQ coordinate system to obtain the three-phase modulation degree.

[0076] In another embodiment, if Figure 5 As shown, S103 specifically includes:

[0077] Perform ABC / DQ transformation on the three-phase given current, the three-phase input current and the three-phase input voltage respectively to obtain the given current, input current and input voltage in the DQ coordinate system.

[0078] The input current in the DQ coordinate system, the given current in the DQ coordinate system, and the highest-order harmonic current among the harmonics in the DQ coordinate system are subtracted to obtain the current deviation in the DQ coordinate system.

[0079] The current deviation in the DQ coordinate system is input into a second PI controller, and a first control variable in the DQ coordinate system is output.

[0080] The first control amount in the DQ coordinate system is added to the input voltage in the DQ coordinate system, and then added to the voltage compensation amount corresponding to the lowest-order harmonic among the harmonics in the DQ coordinate system to obtain the second control amount in the DQ coordinate system.

[0081] The second control quantity in the DQ coordinate system is transformed into DQ / ABC to obtain the three-phase modulation degree.

[0082] It can be seen that since the present invention is a harmonic compensation method based on compensating voltage, in the process of generating the basic three-phase modulation degree, the present embodiment introduces the harmonic current of the highest order harmonic in the DQ coordinate system when calculating the current deviation stage, and introduces the voltage compensation amount of the lowest order harmonic in the DQ coordinate system when calculating the voltage deviation stage. In this way, the problem of the long compensation time of the highest order harmonic to be compensated is considered in advance, so that the first control amount after PI control can be farthest from the highest order harmonic current, thereby improving the compensation speed. Subsequently, in the stage of calculating the voltage deviation, the problem of over-compensation caused by the lowest order is fully considered, so after adding it to the input voltage and the first control amount, the second control amount obtained is relatively close to the lowest order harmonic voltage. The three-phase modulation degree obtained on this basis, when performing the corresponding voltage compensation, can solve the problems of too slow compensation of high-order harmonics and over-compensation of low-order harmonics when performing harmonic compensation of different orders at the same time, and bring better system stability and compensation accuracy.

[0083] like Figure 4 or Figure 5 As shown in the figure, after obtaining the three-phase modulation degree of the three-phase PFC circuit, the three-phase compensation voltage corresponding to each harmonic is superimposed on the modulation degree of the corresponding phase to obtain the three-phase modulation amount, thereby obtaining the compensated three-phase modulation wave, and then generating the SVPWM signal through the compensated three-phase modulation wave. The three-phase PFC circuit is controlled according to the SVPWM signal, thereby reducing the input current harmonic distortion rate of the three-phase PFC circuit.

[0084] In order to verify the effectiveness of the harmonic compensation method of the three-phase PFC circuit, this embodiment applies the repeated control harmonic compensation method and the harmonic compensation method provided by this embodiment to the three-phase PFC circuit respectively, and conducts a comparative experiment. The experimental results are shown in Table 1.

[0085] Table 1

[0086]

[0087] Specifically, as shown in Table 2, Table 2 shows the total harmonic current distortion rate of no harmonic compensation, repeated control and the harmonic compensation method provided by this embodiment at different load rates. As shown in Table 3, Table 3 shows the total harmonic current distortion rate of no harmonic compensation, repeated control and the harmonic compensation method provided by this embodiment for each harmonic at different load rates.

[0088] Table 2

[0089]

[0090] Table 3

[0091]

[0092] It can be seen from the experimental results of Tables 1 to 3 above that the repetitive control method in the prior art has a short execution time, but occupies a large memory space; and due to its control characteristics, all harmonics will be compensated. Under the condition of a weak power grid, a certain current harmonic may be amplified, affecting the stability of the system; in addition, repetitive control can only compensate for periodic error signals, and its response speed is very slow; and the harmonic compensation scheme provided in this embodiment occupies a small space, has good real-time performance, can quickly detect current harmonics and compensate, and because a certain harmonic can be compensated separately, the system stability is stronger.

[0093] It should be understood that the order of execution of the steps in the above embodiment does not necessarily mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiment of the present invention.

[0094] In one embodiment, Figure 6 As shown, Figure 6 The structure of a harmonic compensation device 100 for a three-phase PFC circuit provided by an embodiment of the present invention is shown, and includes:

[0095] An acquisition module 110 is used to acquire a three-phase input current, a three-phase given current and a three-phase input voltage of a three-phase PFC circuit;

[0096] A compensation voltage acquisition module 120, used to extract a specified harmonic current from the three-phase input current in a DQ coordinate system, and calculate a three-phase compensation voltage corresponding to each harmonic in the three-phase PFC circuit according to each harmonic extracted in the DQ coordinate system;

[0097] A modulation degree calculation module 130, configured to calculate the three-phase modulation degree of the three-phase PFC circuit according to the three-phase given current and the three-phase input current;

[0098] A three-phase modulation amount compensation module 140, used to superimpose the three-phase modulation amount and the three-phase compensation voltage of each harmonic corresponding to the three-phase PFC circuit to obtain a compensated three-phase modulation wave;

[0099] The PWM signal generating module 150 is used to generate a PWM signal according to the compensated three-phase modulation wave, and the PWM signal is used to control the switch tube in the three-phase PFC circuit.

[0100] It can be seen from the above embodiments that the embodiment of the present invention first extracts each harmonic current in the three-phase input current in the DQ coordinate system, and calculates the three-phase compensation voltage of each harmonic corresponding to the three-phase PFC circuit; then compensates the three-phase modulation wave of the three-phase PFC circuit according to the three-phase compensation voltage of each harmonic; finally, generates a PWM signal according to the compensated three-phase modulation wave. The method provided in this embodiment can quickly extract harmonics in the current and compensate them, and has a fast response speed; and can compensate for a single harmonic, thereby ensuring the stability of the system.

[0101] In one embodiment, the compensation voltage acquisition module 120 includes:

[0102] A first ABC / DQ conversion unit, configured to perform an ABC / DQ conversion of an Nth harmonic of the three-phase input current to obtain an Nth harmonic current component in a DQ coordinate system; wherein N∈a, a represents a set of harmonic orders of the three-phase input current;

[0103] A compensation amount calculation unit, used for inputting the Nth harmonic current component in the DQ coordinate system into a first PI controller, and outputting a voltage compensation amount in the DQ coordinate system;

[0104] The three-phase compensation voltage calculation unit is used to perform DQ / ABC transformation on the voltage compensation amount in the DQ coordinate system to obtain the three-phase compensation voltage corresponding to the Nth harmonic.

[0105] In one embodiment, the first ABC / DQ conversion unit includes:

[0106] A phase acquisition subunit, used for acquiring a three-phase input voltage of the three-phase PFC circuit, and inputting the three-phase input voltage into a phase-locked loop controller to output a fundamental voltage phase;

[0107] A trigonometric constructor calculation subunit, used for determining a trigonometric constructor of the Nth harmonic according to the fundamental voltage phase and the angle multiplication formula;

[0108] The transformation subunit is used to determine the Nth harmonic current component in the DQ coordinate system according to the triangular construction function of the Nth harmonic and the three-phase input current.

[0109] In one embodiment, the compensation voltage acquisition module 120 further includes:

[0110] A filtering unit, configured to perform low-pass filtering on the Nth harmonic current component in the DQ coordinate system to obtain the Nth harmonic current component in the DQ coordinate system after filtering;

[0111] Correspondingly, the compensation amount calculation unit includes: inputting the Nth harmonic current component in the DQ coordinate system after the filtering process into a first PI controller, and outputting the voltage compensation amount in the DQ coordinate system.

[0112] In one embodiment, the modulation calculation module 130 includes:

[0113] A second ABC / DQ conversion unit is used to perform ABC / DQ conversion on the three-phase given current and the three-phase input current respectively to obtain the given current and the input current in the DQ coordinate system;

[0114] a current deviation calculation unit, configured to subtract the input current in the DQ coordinate system from the given current in the DQ coordinate system to obtain the current deviation in the DQ coordinate system;

[0115] A first control amount calculation unit, used for inputting the current deviation in the DQ coordinate system into a second PI controller, and outputting a first control amount in the DQ coordinate system;

[0116] A second control amount calculation unit is used to obtain the input voltage of the three-phase PFC circuit in the DQ coordinate system; and add the first control amount in the DQ coordinate system to the input voltage in the DQ coordinate system to obtain a second control amount in the DQ coordinate system;

[0117] The three-phase modulation degree calculation subunit is used to perform DQ / ABC transformation on the second control quantity in the DQ coordinate system to obtain the three-phase modulation degree.

[0118] In one embodiment, the input current in the DQ coordinate system includes an input current D-axis component and an input current Q-axis component; the given current in the DQ coordinate system includes a given current D-axis component and a given current Q-axis component; the current deviation includes a current deviation D-axis component and a current deviation Q-axis component;

[0119] The current deviation calculation unit comprises:

[0120] A first current deviation calculation subunit, configured to subtract the input current D-axis component from the given current D-axis component to obtain the current deviation D-axis component;

[0121] The second current deviation calculation subunit is used to subtract the input current Q-axis component from the given current Q-axis component to obtain the current deviation Q-axis component.

[0122] Figure 7 Schematic diagram of a terminal device provided by an embodiment of the present invention. Figure 7As shown, the terminal device 6 of this embodiment includes: a processor 60, a memory 61, and a computer program 62 stored in the memory 61 and executable on the processor 60. When the processor 60 executes the computer program 62, the steps in the above-mentioned various method embodiments are implemented, for example Figure 1 Alternatively, when the processor 60 executes the computer program 62, the functions of each module / unit in the above-mentioned device embodiments are realized, for example, Figure 6 The functions of the modules 110 to 150 are shown.

[0123] The computer program 62 may be divided into one or more modules / units, which are stored in the memory 61 and executed by the processor 60 to implement the present invention. The one or more modules / units may be a series of computer program instruction segments capable of implementing specific functions, which are used to describe the execution process of the computer program 62 in the terminal device 6.

[0124] The terminal device 6 may be a computing device such as a desktop computer, a notebook, a PDA, or a cloud server. The terminal device may include, but is not limited to, a processor 60 and a memory 61. Those skilled in the art will appreciate that Figure 7 It is only an example of the terminal device 6 and does not constitute a limitation on the terminal device 6. It may include more or fewer components than shown in the figure, or a combination of certain components, or different components. For example, the terminal device may also include input and output devices, network access devices, buses, etc.

[0125] The processor 60 may be a central processing unit (CPU), other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), field-programmable gate arrays (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. A general-purpose processor may be a microprocessor or any conventional processor, etc.

[0126] The memory 61 may be an internal storage unit of the terminal device 6, such as a hard disk or memory of the terminal device 6. The memory 61 may also be an external storage device of the terminal device 6, such as a plug-in hard disk, a smart media card (SMC), a secure digital (SD) card, a flash card, etc. equipped on the terminal device 6. Further, the memory 61 may also include both an internal storage unit and an external storage device of the terminal device 6. The memory 61 is used to store the computer program and other programs and data required by the terminal device. The memory 61 may also be used to temporarily store data that has been output or is to be output.

[0127] The technicians in the relevant field can clearly understand that for the convenience and simplicity of description, only the division of the above-mentioned functional units and modules is used as an example for illustration. In practical applications, the above-mentioned function allocation can be completed by different functional units and modules as needed, that is, the internal structure of the device can be divided into different functional units or modules to complete all or part of the functions described above. The functional units and modules in the embodiment can be integrated in a processing unit, or each unit can exist physically separately, or two or more units can be integrated in one unit. The above-mentioned integrated unit can be implemented in the form of hardware or in the form of software functional units. In addition, the specific names of the functional units and modules are only for the convenience of distinguishing each other, and are not used to limit the scope of protection of this application. The specific working process of the units and modules in the above-mentioned system can refer to the corresponding process in the aforementioned method embodiment, which will not be repeated here.

[0128] In the above embodiments, the description of each embodiment has its own emphasis. For parts that are not described or recorded in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0129] Those skilled in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of the present invention.

[0130] In the embodiments provided by the present invention, it should be understood that the disclosed devices / terminal equipment and methods can be implemented in other ways. For example, the device / terminal equipment embodiments described above are only schematic. For example, the division of the modules or units is only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0131] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0132] In addition, each functional unit in each embodiment of the present invention may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit. The above-mentioned integrated unit may be implemented in the form of hardware or in the form of software functional units.

[0133] If the integrated module / unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the present invention implements all or part of the processes in the above-mentioned embodiment method, and can also be completed by instructing the relevant hardware through a computer program. The computer program can be stored in a computer-readable storage medium, and the computer program can implement the steps of the above-mentioned various method embodiments when executed by the processor. . Wherein, the computer program includes computer program code, and the computer program code can be in source code form, object code form, executable file or some intermediate form. The computer-readable medium may include: any entity or device capable of carrying the computer program code, recording medium, U disk, mobile hard disk, disk, optical disk, computer memory, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), electric carrier signal, telecommunication signal and software distribution medium. It should be noted that the content contained in the computer-readable medium can be appropriately increased or decreased according to the requirements of legislation and patent practice in the jurisdiction. For example, in some jurisdictions, according to legislation and patent practice, computer-readable media do not include electric carrier signals and telecommunication signals.

[0134] The embodiments described above are only used to illustrate the technical solutions of the present invention, rather than to limit the same. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that the technical solutions described in the aforementioned embodiments may still be modified, or some of the technical features may be replaced by equivalents. Such modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention, and should all be included in the protection scope of the present invention.

Claims

1. A harmonic compensation method for a three-phase PFC circuit, characterized in that: include: Obtain three-phase input current, three-phase given current and three-phase input voltage of a three-phase PFC circuit; Extracting a specified harmonic in the three-phase input current in the DQ coordinate system, and calculating a three-phase compensation voltage corresponding to each harmonic in the three-phase PFC circuit according to each harmonic extracted in the DQ coordinate system; Calculating a three-phase modulation degree of the three-phase PFC circuit according to the three-phase given current, the three-phase input current and the three-phase input voltage; The three-phase modulation degree is superimposed on the three-phase compensation voltage of each harmonic corresponding to the three-phase PFC circuit to obtain a compensated three-phase modulation wave; Generating a PWM signal according to the compensated three-phase modulation wave, and controlling the three-phase PFC circuit according to the PWM signal; The extracting the specified harmonics in the three-phase input current in the DQ coordinate system, and calculating the three-phase compensation voltage corresponding to each harmonic in the three-phase PFC circuit according to each harmonic extracted in the DQ coordinate system, includes: The three-phase input current is N The ABC / DQ transformation of subharmonics gives the DQ coordinate system. N Subharmonic current components; among them, , represents a set of harmonic orders of the three-phase input current; The DQ coordinate system N The subharmonic current component is input into the first PI controller, and the voltage compensation amount in the DQ coordinate system is output; Perform DQ / ABC transformation on the voltage compensation amount in the DQ coordinate system to obtain N Three-phase compensation voltage corresponding to subharmonics; The calculating the three-phase modulation degree of the three-phase PFC circuit according to the three-phase given current, the three-phase input current and the three-phase input voltage comprises: Performing ABC / DQ transformation on the three-phase given current, the three-phase input current and the three-phase input voltage respectively to obtain the given current, input current and input voltage in the DQ coordinate system; Subtracting the input current in the DQ coordinate system from the given current in the DQ coordinate system to obtain a current deviation in the DQ coordinate system; Inputting the current deviation in the DQ coordinate system into a second PI controller, and outputting a first control variable in the DQ coordinate system; Adding the first control amount in the DQ coordinate system to the input voltage in the DQ coordinate system to obtain a second control amount in the DQ coordinate system; The second control quantity in the DQ coordinate system is transformed into DQ / ABC to obtain the three-phase modulation degree.

2. The harmonic compensation method of the three-phase PFC circuit according to claim 1, characterized in that: The three-phase input current is N The ABC / DQ transformation of subharmonics gives the DQ coordinate system. N Subharmonic current components include: Acquire a three-phase input voltage of the three-phase PFC circuit, and input the three-phase input voltage into a phase-locked loop controller to output a fundamental voltage phase; Determine according to the fundamental voltage phase and angle multiple formula N Trigonometric constructors for subharmonics; according to N The trigonometric constructor of subharmonics and the three-phase input current are determined in the DQ coordinate system N Subharmonic current components.

3. The harmonic compensation method of the three-phase PFC circuit according to claim 1, characterized in that: In the DQ coordinate system N Before the subharmonic current component is input into the first PI controller, the method further includes: For the DQ coordinate system N The subharmonic current component is low-pass filtered to obtain the DQ coordinate system after filtering. N Subharmonic current components; Accordingly, the DQ coordinate system N The subharmonic current component is input into the first PI controller, and the voltage compensation amount in the DQ coordinate system is output, including: The DQ coordinate system after the filtering process N The subharmonic current component is input into the first PI controller, and the voltage compensation amount in the DQ coordinate system is output.

4. The harmonic compensation method of the three-phase PFC circuit according to claim 1, characterized in that: The input current in the DQ coordinate system includes an input current D-axis component and an input current Q-axis component; the given current in the DQ coordinate system includes a given current D-axis component and a given current Q-axis component; the current deviation includes a current deviation D-axis component and a current deviation Q-axis component; Subtracting the input current in the DQ coordinate system from the given current in the DQ coordinate system to obtain the current deviation in the DQ coordinate system includes: Subtract the input current D-axis component from the given current D-axis component to obtain the current deviation D-axis component; The current deviation Q-axis component is obtained by subtracting the input current Q-axis component from the given current Q-axis component.

5. The harmonic compensation method of the three-phase PFC circuit according to claim 1, characterized in that: Subtracting the input current in the DQ coordinate system from the given current in the DQ coordinate system to obtain the current deviation in the DQ coordinate system includes: Subtracting the input current in the DQ coordinate system, the given current in the DQ coordinate system, and the highest-order harmonic current among the harmonics in the DQ coordinate system to obtain a current deviation in the DQ coordinate system; The adding the first control amount in the DQ coordinate system to the input voltage in the DQ coordinate system to obtain the second control amount in the DQ coordinate system includes: The first control amount in the DQ coordinate system is added to the input voltage in the DQ coordinate system, and then added to the voltage compensation amount corresponding to the lowest-order harmonic among the harmonics in the DQ coordinate system to obtain the second control amount in the DQ coordinate system.

6. A harmonic compensation device for a three-phase PFC circuit, characterized in that: include: An acquisition module, used for acquiring a three-phase input current, a three-phase given current and a three-phase input voltage of a three-phase PFC circuit; A compensation voltage acquisition module, used to extract the specified harmonics in the three-phase input current in the DQ coordinate system, and calculate the three-phase compensation voltage corresponding to each harmonic in the three-phase PFC circuit according to the harmonics extracted in the DQ coordinate system; A modulation degree calculation module, used for calculating the three-phase modulation degree of the three-phase PFC circuit according to the three-phase given current, the three-phase input current and the three-phase input voltage; A three-phase modulation amount compensation module, used for superimposing the three-phase modulation amount and the three-phase compensation voltage of each harmonic corresponding to the three-phase PFC circuit to obtain a compensated three-phase modulation wave; A PWM signal generating module, used to generate a PWM signal according to the compensated three-phase modulation wave, wherein the PWM signal is used to control the switch tube in the three-phase PFC circuit; The compensation voltage acquisition module comprises: The three-phase input current is N The ABC / DQ transformation of subharmonics gives the DQ coordinate system. N Subharmonic current components; among them, , represents a set of harmonic orders of the three-phase input current; The DQ coordinate system N The subharmonic current component is input into the first PI controller, and the voltage compensation amount in the DQ coordinate system is output; Perform DQ / ABC transformation on the voltage compensation amount in the DQ coordinate system to obtain N Three-phase compensation voltage corresponding to subharmonics; The modulation degree calculation module includes: Performing ABC / DQ transformation on the three-phase given current, the three-phase input current and the three-phase input voltage respectively to obtain the given current, input current and input voltage in the DQ coordinate system; Subtracting the input current in the DQ coordinate system from the given current in the DQ coordinate system to obtain a current deviation in the DQ coordinate system; Inputting the current deviation in the DQ coordinate system into a second PI controller, and outputting a first control variable in the DQ coordinate system; Adding the first control amount in the DQ coordinate system to the input voltage in the DQ coordinate system to obtain a second control amount in the DQ coordinate system; The second control quantity in the DQ coordinate system is transformed into DQ / ABC to obtain the three-phase modulation degree.

7. A terminal device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that: When the processor executes the computer program, the steps of the method according to any one of claims 1 to 5 are implemented.

8. A computer-readable storage medium storing a computer program, characterized in that: When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 5 are implemented.

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