A fast recovery diode structure and a method for manufacturing the same
By employing an interleaved resistive region and guard ring structure in the fast recovery diode, the fabrication process is simplified, achieving a low-resistance and high-efficiency process flow, thus solving the problems of numerous process steps and long processing time in existing technologies.
Patent Information
- Application Number
- CN202210870462.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-07-22
- Publication Date
- 2025-12-05
- Estimated Expiration
- 2042-07-22
AI Technical Summary
The existing fast recovery diode fabrication process involves many steps and takes a long time. In particular, the formation of the anode edge resistance region requires two photolithography and impurity implantation processes, resulting in low efficiency.
The fast recovery diode structure is formed by simultaneously forming the anode region and the resistor region on the front side of the N-type drift region, and by designing multiple resistor regions with spacing, combined with the photolithography, etching or corrosion of the P-type guard ring, field plate steps, polycrystalline field plate and metal field plate. The metal field plate is formed by photolithography, etching or corrosion, which simplifies the process steps and time.
This technology achieves low resistance while reducing process steps and time, thus solving the problems of numerous process steps and long processing time in existing technologies.
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Figure CN115020477B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to a fast recovery diode structure and a preparation method thereof, and belongs to the technical field of power semiconductor devices. BACKGROUND
[0002] In the prior art, an anode, a resistance region and a protection ring region are arranged on a drift region, and a cathode region or a field termination layer is arranged below the drift region, and a long resistance region is required for the anode edge of the fast recovery diode to reduce the edge current during reverse recovery, and two times of photolithography, implantation and pushing are required, which has the defects of many process steps and long process time. SUMMARY
[0003] The present application aims to overcome the defects of the prior art and provide a fast recovery diode structure and a preparation method thereof.
[0004] To achieve the above-mentioned purpose, the present application provides a fast recovery diode structure, which comprises an N-type drift region, an anode region and a resistance region, the anode region and the resistance region are fixedly arranged on the front surface of the N-type drift region, the anode region is located on the left side of the resistance region, and a plurality of resistance regions are distributed at intervals, photolithography is performed on the front surface of the N-type drift region to form the anode region and the resistance region, and P-type impurities are implanted into the anode region and the resistance region for impurity doping.
[0005] Preferably, a P-type protection ring region is included, the P-type protection ring region is fixedly arranged on the front surface of the N-type drift region, and the P-type protection ring region is located on the right side of the resistance region.
[0006] The P-type impurities are implanted and pushed on the front surface of the N-type drift region to obtain the P-type protection ring region.
[0007] Preferably, a field plate step is included, the field plate step is fixedly arranged on the front surface of the N-type drift region, and the field plate step is located on the right side of the P-type protection ring region.
[0008] An oxide layer is grown on the front surface of the N-type drift region.
[0009] The oxide layer is subjected to photolithography to form the field plate step.
[0010] Preferably, a polycrystalline field plate is included, the polycrystalline field plate is fixedly arranged on the field plate step.
[0011] A gate oxide layer is grown on the front surface of the N-type drift region, the anode region, the resistance region, the P-type protection ring region and the field plate step, and then polycrystalline silicon is deposited on the gate oxide layer to obtain the polycrystalline field plate.
[0012] A dielectric layer is deposited on the front surface of the N-type drift region, the anode region, the resistance region, the P-type protection ring region, the field plate step and the polycrystalline field plate, and the dielectric layer is subjected to photolithography and etching to form a contact hole on the dielectric layer.
[0013] Preferably, a metal field plate is fixedly arranged on the front surface of the P-type guard ring region and the front surface of the polycrystalline field plate;
[0014] Metal sputtering is performed on the P-type guard ring region;
[0015] Photolithography, etching or corrosion is performed on the anode region to form an anode;
[0016] Photolithography, etching or corrosion is performed on the region between the P-type guard ring region, the dielectric layer, the field plate step and the polycrystalline field plate to form a metal field plate.
[0017] Preferably, a cathode region is fixedly arranged on the back surface of the N-type drift region;
[0018] N-type impurities are injected into the back surface of the N-type drift region and activated by laser annealing to form a cathode region, and metal sputtering is performed on the back surface of the cathode region to form a cathode.
[0019] A fast recovery diode structure preparation method is used to prepare the fast recovery diode structure of any one of the above, which is realized by the following steps:
[0020] Step 1, the substrate is used as an N-type drift region;
[0021] Step 2, photolithography is performed on the front surface of the N-type drift region to form an anode region and a plurality of spaced distributed resistance regions, and P-type impurities are injected into the anode region and the resistance regions for impurity doping;
[0022] Step 3, photolithography, injection and promotion of P-type impurities are performed on the right part of the front surface of the N-type drift region to obtain a P-type guard ring region;
[0023] Step 4, an oxide layer is grown on the front surface of the N-type drift region;
[0024] The oxide layer is subjected to photolithography to form a field plate step;
[0025] Step 5, a gate oxide layer is grown on the front surface of the N-type drift region, the anode region, the resistance region, the P-type guard ring region and the field plate step, and then polycrystalline silicon is deposited on the gate oxide layer to obtain a polycrystalline field plate;
[0026] Step 6, a dielectric layer is deposited on the front surface of the N-type drift region, the anode region, the resistance region, the P-type guard ring region, the field plate step and the polycrystalline field plate, and the dielectric layer is subjected to photolithography and etched to form a contact hole on the dielectric layer;
[0027] Step 7, metal sputtering is performed on the P-type guard ring region;
[0028] Photolithography, etching or corrosion is performed on the anode region to form an anode;
[0029] The area between the P-type guard ring region, the dielectric layer, the field plate step and the polycrystalline field plate is subjected to photoetching, etching or corrosion to form a metal field plate.
[0030] Step 8: N-type impurities are injected into the back of the N-type drift region and activated by laser annealing to form a cathode region.
[0031] Step 9: Metal sputtering is performed on the back of the cathode region to form a cathode 0.
[0032] Preferably, the thickness of the oxide layer is 1-2um.
[0033] Preferably, the thickness of the gate oxide layer is 500A-3000A.
[0034] Preferably, the thickness of the polycrystalline silicon is 0.5-1um, the thickness of the dielectric layer is 0.5-2um, and 1-7um of metal sputtering is performed on the P-type guard ring region.
[0035] The present application has the following advantages:
[0036] Steps 2 of the anode region and the resistance region are formed at the same time, and since the resistance region is composed of multiple strip regions separated by intervals, the resistance is low. While achieving low resistance, the process steps and time are reduced, solving the problems of multiple process steps and long process time in the prior art. BRIEF DESCRIPTION OF DRAWINGS
[0037] Figure 1 is a schematic diagram of step 1 of the present application;
[0038] Figure 2 is a schematic diagram of step 2 of the present application;
[0039] Figure 3 is a schematic diagram of step 3 of the present application;
[0040] Figure 4 is a schematic diagram of step 4 of the present application;
[0041] Figure 5 is a schematic diagram of step 5 of the present application;
[0042] Figure 6 is a schematic diagram of step 6 of the present application;
[0043] Figure 7 is a schematic diagram of step 7 of the present application;
[0044] Figure 8 is a schematic diagram of step 8 of the present application;
[0045] Figure 9 is a schematic diagram of step 9 of the present application.
[0046] The reference signs mean: 1-N-type drift region; 2-anode region; 3-resistance region; 4-P-type guard ring region; 5-field plate step; 6-polycrystalline field plate; 7-anode; 8-metal field plate; 9-cathode region; 10-cathode; 11-dielectric layer. DETAILED DESCRIPTION
[0047] The following examples are only used to more clearly illustrate the technical solutions of the present application, and cannot be used to limit the protection scope of the present application.
[0048] It should be noted that if there is a directional indication (such as up, down, left, right, front, back, etc.) in the embodiments of the present application, it is only used to explain the relative position relationship and movement condition between components in a certain posture, and if the certain posture changes, the directional indication also changes accordingly.
[0049] A fast recovery diode structure, comprising an N-type drift region 1, an anode region 2 and a resistance region 3, the anode region 2 and the resistance region 3 are fixedly arranged on the front surface of the N-type drift region 1, the anode region 2 is located on the left side of the resistance region 3, a plurality of resistance regions are distributed at intervals, the anode region 2 and the resistance region 3 are formed by photoetching on the front surface of the N-type drift region 1, and P-type impurities are injected into the anode region 2 and the resistance region 3 for impurity doping.
[0050] Further, the present embodiment comprises a P-type guard ring region 4, the P-type guard ring region 4 is fixedly arranged on the front surface of the N-type drift region 1, and the P-type guard ring region 4 is located on the right side of the resistance region 3.
[0051] The P-type guard ring region 4 is obtained by photoetching, injecting and advancing P-type impurities on the front surface of the N-type drift region 1.
[0052] Further, the present embodiment comprises a field plate step 5, the field plate step 5 is fixedly arranged on the front surface of the N-type drift region 1, and the field plate step 5 is located on the right side of the P-type guard ring region 4.
[0053] An oxide layer is grown on the front surface of the N-type drift region 1.
[0054] The oxide layer is photoetched to form the field plate step 5.
[0055] Further, the present embodiment comprises a polycrystalline field plate 6, the polycrystalline field plate 6 is fixedly arranged on the field plate step 5.
[0056] A gate oxide layer is grown on the front surface of the N-type drift region 1, the anode region 2, the resistance region 3, the P-type guard ring region 4 and the field plate step 5, then polycrystalline silicon is deposited on the gate oxide layer to obtain the polycrystalline field plate 6.
[0057] A dielectric layer 11 is deposited on the front surface of the N-type drift region 1, the anode region 2, the resistance region 3, the P-type guard ring region 4, the field plate step 5 and the polycrystalline field plate 6. The dielectric layer 11 is subjected to photoetching, and a contact hole is formed on the dielectric layer 11 by etching.
[0058] Further, the embodiment includes a metal field plate 8 fixedly arranged on the front surface of the P-type guard ring region 4 and the front surface of the polycrystalline field plate 6.
[0059] Metal sputtering is performed on the P-type guard ring region 4.
[0060] Photoetching, etching or corrosion is performed on the anode region 2 to form an anode 7.
[0061] Photoetching, etching or corrosion is performed on the region between the P-type guard ring region 4, the dielectric layer 11, the field plate step 5 and the polycrystalline field plate 6 to form the metal field plate 8.
[0062] Further, the embodiment includes a cathode region 9 fixedly arranged on the back surface of the N-type drift region 1.
[0063] N-type impurities are injected on the back surface of the N-type drift region 1 and activated by laser annealing to form the cathode region 9. Metal sputtering is performed on the back surface of the cathode region 9 to form a cathode 10.
[0064] The application adopts the following steps:
[0065] Step 1, N-type silicon substrate preparation, obtaining an N-type drift region, the N-type silicon substrate includes an epitaxial substrate, a chemical vapor doped substrate and a neutron transmutation doped substrate; (see Figure 1 )
[0066] Step 2, photoetching is performed on the front surface of the N-type drift region to form an anode region and a plurality of spaced resistance regions. P-type impurities are injected into the anode region and the resistance regions for impurity doping of the anode region and the resistance regions; (see Figure 2 )
[0067] Step 3. Photoetching, injection and P-type impurity promotion are performed on the right side of the front surface of the N-type drift region to obtain a P-type guard ring region; (see Figure 3 )
[0068] Step 4. An oxide layer with a thickness of 1-2um is grown on the front surface of the N-type drift region, and the oxide layer is silicon dioxide. The oxide layer is subjected to photoetching to form a field plate step; (see Figure 4 )
[0069] Step 5. A gate oxide layer with a thickness of 500A-3000A is grown on the front surface of the N-type drift region, the anode region, the resistance region, the P-type guard ring region and the field plate step, and the gate oxide layer is silicon dioxide. Then, a polycrystalline silicon with a thickness of 0.5-1um is deposited on the gate oxide layer to obtain a polycrystalline field plate; (see Figure 5 )
[0070] Step 6. Depositing a 0.5-2um thick dielectric layer 11 on the N-type drift region, anode region, resistance region, P-type guard ring region, field plate step and polycrystalline field plate; performing photoetching on the dielectric layer 11, and etching a contact hole on the dielectric layer 11; the dielectric layer 11 includes silicon dioxide and / or silicon dioxide doped with phosphorus and boron; (see Figure 6 )
[0071] Step 7. Performing 1-7um metal sputtering on the P-type guard ring region;
[0072] Performing photoetching, etching or corrosion on the anode region to form an anode;
[0073] Performing photoetching, etching or corrosion on the region between the P-type guard ring region, dielectric layer 11, field plate step and polycrystalline field plate to form a metal field plate, the metal field plate being composed of aluminum or aluminum silicon or aluminum silicon copper; (see Figure 7 )
[0074] Step 8. Injecting N-type impurities on the back surface of the N-type drift region and activating by laser annealing to form a cathode region; (see Figure 8 )
[0075] Step 9. Performing metal sputtering on the back surface of the cathode region to form a cathode; (see Figure 9 )
[0076] Compared with the prior art of simultaneously injecting and advancing the resistance region and the anode region, the prior art of separately injecting and advancing the resistance region and the anode region, and the resistance region of the present application which is simultaneously injected and advanced with the anode region by using multiple separated injection strips, the comparison results of the three kinds of guard ring structures are shown in Table 1:
[0077] Table 1
[0078]
[0079] The above only describes the preferred embodiments of the present application, and it should be noted that for those skilled in the art, several improvements and modifications can be made without departing from the technical principles of the present application, and these improvements and modifications should also be considered as the protection scope of the present application.
Claims
1. A fast recovery diode structure, characterized by, It comprises N-type drift region (1), anode region (2) and multiple resistance regions (3), the anode region (2) and the resistance region (3) are fixedly arranged on the front surface of the N-type drift region (1), the anode region (2) is located on the left side of the resistance region (3), and the multiple resistance regions (3) are distributed at intervals; the anode region (2) and the resistance region (3) are formed by photoetching on the front surface of the N-type drift region (1), and P-type impurities are injected into the anode region (2) and the resistance region (3) for impurity doping; It comprises a polycrystalline field plate (6), and the polycrystalline field plate (6) is fixedly arranged on the field plate step (5); A gate oxide layer is grown on the front surface of the N-type drift region (1), the anode region (2), the resistance region (3), the P-type guard ring region (4) and the field plate step (5), and then polycrystalline silicon is deposited on the gate oxide layer to obtain the polycrystalline field plate (6).
2. A fast recovery diode structure according to claim 1, wherein It comprises a P-type guard ring region (4), and the P-type guard ring region (4) is fixedly arranged on the front surface of the N-type drift region (1) and located on the right side of the resistance region (3); The P-type guard ring region (4) is obtained by photoetching, injection and promotion of P-type impurities on the front surface of the N-type drift region (1).
3. A fast recovery diode structure according to claim 2, wherein It comprises a field plate step (5), and the field plate step (5) is fixedly arranged on the front surface of the N-type drift region (1) and located on the right side of the P-type guard ring region (4); An oxide layer is grown on the front surface of the N-type drift region (1); The field plate step (5) is formed by photoetching on the oxide layer.
4. The fast recovery diode structure according to claim 3, wherein, A dielectric layer (11) is deposited on the front surface of the N-type drift region (1), the anode region (2), the resistance region (3), the P-type guard ring region (4), the field plate step (5) and the polycrystalline field plate (6), the dielectric layer (11) is photoetched, and a contact hole is formed by etching on the dielectric layer (11).
5. A fast recovery diode structure according to claim 4, wherein It comprises a metal field plate (8), and the metal field plate (8) is fixedly arranged on the front surface of the P-type guard ring region (4) and the front surface of the polycrystalline field plate (6); Metal sputtering is performed on the P-type guard ring region (4); Photoetching, etching or corrosion is performed on the anode region (2) to form an anode (7); Photoetching, etching or corrosion is performed on the region between the P-type guard ring region (4), the dielectric layer (11), the field plate step (5) and the polycrystalline field plate (6) to form the metal field plate (8).
6. A fast recovery diode structure according to claim 5, wherein It comprises a cathode region (9), and the cathode region (9) is fixedly arranged on the back surface of the N-type drift region (1); The cathode region (9) is formed by injection of N-type impurities and laser annealing activation on the back surface of the N-type drift region (1); and the cathode (10) is formed by metal sputtering on the back surface of the cathode region (9).
7. A method for fabricating a fast recovery diode structure, characterized in that, The fast recovery diode structure is prepared by the following steps: Step 1, the substrate is used as the N-type drift region (1); Step 2, the anode region (2) and multiple resistance regions (3) distributed at intervals are formed by photoetching on the front surface of the N-type drift region (1), and P-type impurities are injected into the anode region (2) and the resistance regions (3) for impurity doping; Step 3, the P-type guard ring region (4) is obtained by photoetching, injection and promotion of P-type impurities on the right part of the front surface of the N-type drift region (1) Step 4, an oxide layer is grown on the front surface of the N-type drift region (1); Photoetching the oxide layer to form the field plate step (5); Step 5: growing a gate oxide layer on the front surface of the N-type drift region (1), anode region (2), resistance region (3), P-type guard ring region (4) and field plate step (5), and then depositing polysilicon on the gate oxide layer to obtain a polysilicon field plate (6); Step 6: depositing a dielectric layer (11) on the front surface of the N-type drift region (1), anode region (2), resistance region (3), P-type guard ring region (4), field plate step (5) and polysilicon field plate (6), photoetching the dielectric layer (11), and etching the dielectric layer (11) to form a contact hole; Step 7: performing metal sputtering on the P-type guard ring region (4); Photoetching, etching or corroding the anode region (2) to form an anode (7); Photoetching, etching or corroding the region between the P-type guard ring region (4), dielectric layer (11), field plate step (5) and polysilicon field plate (6) to form a metal field plate (8); Step 8: implanting N-type impurities on the back surface of the N-type drift region (1) and activating by laser annealing to form a cathode region (9); Step 9: performing metal sputtering on the back surface of the cathode region (9) to form a cathode (10).
8. The method of claim 7, wherein the step of forming the fast recovery diode structure is performed by a method comprising: The thickness of the oxide layer is 1-2um. 9. The method of claim 7, wherein the step of forming the first and second regions is performed by implanting ions into the substrate. The thickness of the gate oxide layer is 500A-3000A.
10. The method of claim 7, wherein the method further comprises: The thickness of the polysilicon is 0.5-1um, the thickness of the dielectric layer (11) is 0.5-2um, and the metal sputtering on the P-type guard ring region (4) is 1-7um.
Citation Information
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