Light receiving device and light receiving circuit

Abstract

[Problem] To provide a light receiving device and a light receiving circuit capable of high-precision ranging in a wide field of view (FOV). [Solution] The light receiving device includes: a light detector array including a plurality of pixels, each pixel being configured to output a pulse in response to a reaction of the light detector to a photon; a counter circuit configured to count pulses output from at least one pixel of the light detector array; and a control circuit configured to select pixels to be enabled and pixels to be disabled from the light detector array based on the number of pulses counted by the counter circuit.

Description

Technical Field

[0001] The present disclosure relates to a light receiving device and a light receiving circuit. Background Art

[0002] In many fields such as vehicle installation, mobile phones, FA, etc., technology for measuring the distance to an object based on time of flight (ToF), which is the time taken for light output from a light source to return to a light detector after being reflected on an object, has been increasingly applied. These applications require ranging of objects at a farther distance with a wide field of view (FOV) capable of ranging. For example, an array single photon avalanche diode (SPAD array) is used to detect reflected light.

[0003] [Citation List]

[0004] [Patent Document]

[0005] [PTL 1]

[0006] Japanese Patent Publication No. 2019-32305 Summary of the invention

[0007] [Technical issues]

[0008] In order to obtain an increased field of view, the light source (Tx) includes a wide-angle collimating lens. However, due to aberrations (e.g., coma), deterioration of off-axis characteristics occurs. It is usually difficult to completely correct the off-axis aberration of the lens. In contrast, the light detector (Rx) includes a condenser lens with a short focal length and a small F value to ensure the field of view and the amount of light. The condenser lens with a short focal length has an enhanced perspective. This causes the spot diameter of the light to increase as the distance from the center of the field of view increases.

[0009] Therefore, while ensuring a wide field of view, imaging performance near the periphery of the field of view deteriorates. Specifically, near the periphery of the SPAD array, the amount of incident light decreases compared to the central portion of the SPAD array, so the ranging accuracy and the maximum ranging distance decrease.

[0010] Therefore, the present disclosure provides a light receiving device and a light receiving circuit capable of performing high-precision ranging with an increased field of view (FOV).

[0011] [Solution to the problem]

[0012] According to one aspect of the present disclosure, a light receiving device may include: a light detector array including a plurality of pixels, each pixel being configured to output a pulse in response to a reaction of the light detector to a photon; a counter circuit configured to count pulses output from at least one pixel of the light detector array; and a control circuit configured to select pixels to be enabled and pixels to be disabled from the light detector array based on the counted number of pulses from the counter circuit.

[0013] The control circuit may be configured to enable pixels within the photodetector array where the number of counts of pulses exceeds a threshold value, and to disable pixels where the number of counts of pulses is equal to or less than the threshold value.

[0014] The light receiving device may further include a TDC, and the plurality of pixels may be connected to each other through a common lead and coupled to the TDC via a hard-wired OR.

[0015] Multiple pixels that are not adjacent to each other in the photodetector array may be connected via a common lead.

[0016] The TDC may be coupled to a plurality of pixels in even columns or a plurality of pixels in odd columns.

[0017] Multiple leads may be coupled to the TDC via an OR gate.

[0018] The light receiving device may further include a one-shot circuit coupled between the pixels or between the input terminal of the OR gate and the pixel.

[0019] The one-shot circuit may include an AND gate and an inverter chain coupled to one input terminal of the AND gate.

[0020] The photodetectors of the photodetector array may include avalanche photodiodes.

[0021] The avalanche photodiode may be configured to operate in Geiger mode, and the pixels in the photodetector array may each include a quenching circuit.

[0022] According to one aspect of the present disclosure, an optical receiving circuit may include: a photodetector; a load element coupled between the photodetector and a first reference potential; a latch circuit configured to output a first voltage corresponding to a state; and a first inverter configured to turn on and invert and output an output voltage of the photodetector in response to a second voltage applied to a control terminal, wherein the second voltage applied to the control terminal may vary according to the first voltage.

[0023] The light receiving circuit may further include an AND gate having a first input terminal coupled to the output side of the latch circuit, a second input terminal coupled to the enable line, and an output terminal coupled to the control terminal of the first inverter.

[0024] The light receiving circuit may further include: a NAND gate having a first input terminal coupled to the output side of the latch circuit and a second input terminal coupled to the enable line; and a second inverter coupled between the NAND gate and the control terminal.

[0025] The optical receiving circuit may further include: a NAND gate having a first input terminal coupled to the output side of the latch circuit and a second input terminal coupled to the enable line; a first transistor of a first conductivity type, the first transistor being coupled between a first reference potential and a load element and being turned on in response to an output voltage of the NAND gate; a second transistor of a second conductivity type, the second transistor being coupled between the output side of the optical detector and a second reference potential and being turned on in response to an output voltage of the NAND gate; and a second inverter coupled between the output terminal of the NAND gate and a control terminal of the first inverter.

[0026] The photodetector may include an avalanche photodiode.

[0027] A light receiving device according to an aspect of the present disclosure may include: a light detector array in which a plurality of light receiving circuits are arranged; and a control circuit configured to change a state of a latch circuit of at least one of the light receiving circuits within the light detector array.

[0028] The light receiving device may further include a counter circuit configured to count the number of pulses output from at least one of the light receiving circuits within the light detector array, wherein the control circuit may be configured to change the state of the latch circuit based on the number of pulses.

[0029] The control circuit can be configured to set a latch circuit of one of the light receiving circuits in which the count number of pulses exceeds a threshold in a selected state, and set a latch circuit of one of the light receiving circuits in which the count number of pulses is equal to or less than the threshold in an unselected state.

[0030] The optical receiving device may further include a TDC, wherein the plurality of optical receiving circuits may be connected by a common lead and coupled to the TDC via a hard-wired OR.

[0031] A plurality of light receiving circuits that are not adjacent to each other within the photodetector array may be connected via a common lead. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] Figure 1 is a diagram schematically illustrating an example of a distance measuring device according to the present disclosure.

[0033] Figure 2 is a block diagram illustrating an example of a light source device and a light receiving device.

[0034] Figure 3 is a plan view showing an arrangement example of light emitting elements of the light source device.

[0035] Figure 4 is a plan view showing an example of a pattern of light incident on a SPAD array.

[0036] Figure 5is a plan view showing an example of a spot diameter of light and a macro pixel.

[0037] Figure 6 is a plan view showing an example of a spot diameter of light and a macro pixel.

[0038] Figure 7 is a graph showing an example of the relationship between the spot diameter of light and the maximum ranging distance.

[0039] Figure 8 is a diagram showing an example of a case where TDCs are allocated one-to-one to pixels of a SPAD array.

[0040] Fig. 9 is a diagram showing an example of a case where TDCs are allocated one-to-one to pixels of a SPAD array.

[0041] Fig.10 is a diagram showing an example of a coupling relationship between a pixel and a TDC in a light receiving device according to the present disclosure.

[0042] Fig.11 is a table showing examples of expected values ​​of photon detection probabilities.

[0043] Fig.12 is a graph showing an example of the relationship between the expected value of photon detection counts and the distance.

[0044] Fig.13 is a diagram showing an example of a method of specifying a macro pixel.

[0045] Fig.14 is a diagram showing an example of a method of specifying a macro pixel.

[0046] Fig.15 is a diagram showing an example of connection between pixels of a SPAD array and a TDC.

[0047] Fig.16 is a circuit diagram showing an example of a light receiving circuit according to the present disclosure.

[0048] Fig.17 is a table showing an example of operating conditions of the light receiving circuit according to the present disclosure.

[0049] Fig.18 is a diagram showing an example of connection in a light receiving device according to Modification 1.

[0050] Fig.19 is a diagram showing an example of a one-shot circuit and a signal waveform according to Modification 1.

[0051] Fig. 20is a graph showing an example of a signal waveform according to Modification 1.

[0052] Fig.21 is a circuit diagram showing an example of a light receiving circuit according to Modification 2.

[0053] Fig. 22 is a plan view showing an example of the shape of a macro pixel.

[0054] Fig.23 is a plan view showing an example of the shape of a macro pixel.

[0055] Fig.24 is a plan view showing an example of the shape of a macro pixel.

[0056] Fig.25 is a diagram showing components related to a macro-pixel setting process.

[0057] Fig.26 is a flowchart illustrating an example of a macropixel setting process.

[0058] Fig. 27 is a diagram showing an example of the number of photon counts during full-pixel scanning.

[0059] Fig.28 is a block diagram depicting an example of a schematic configuration of a vehicle control system.

[0060] Fig.29 1 is a diagram of assistance in explaining an example of the installation positions of the vehicle exterior information detection unit and the imaging portion. DETAILED DESCRIPTION

[0061] [Description of Embodiments]

[0062] The preferred embodiments of the present invention are described in detail below in conjunction with the accompanying drawings. It should be noted that components having substantially the same functional configuration are denoted by the same reference numerals and their redundant descriptions are omitted accordingly.

[0063] Figure 1 is a diagram schematically illustrating an example of a distance measuring device according to the present disclosure. Figure 1 The distance measuring device 1 in the embodiment includes a light source device 2, a collimating lens 3, a focusing lens 4, a bandpass filter 5, and a light receiving device 10. The light receiving device 10 includes a SPAD array 11. The SPAD array 11 is an example of a light detector array. In addition, for example, the light source device 2 includes a light emitting element such as a vertical cavity surface emitting laser (VCSEL) and a driving circuit for the light emitting element.

[0064] The light source device 2 outputs light EM to the object OBJ. The collimating lens 3 converts the light EM into a parallel light beam. The light EM is partially reflected by the object OBJ and becomes the reflected light RL incident on the light receiving device 10. The focusing lens 4 focuses the reflected light RL onto the surface of the SPAD array 11. The bandpass filter 5 selectively allows light corresponding to the wavelength band output from the light source device 2 to pass. It should be noted that a focusing lens with a bandpass filter function integrated therein can be used. Alternatively, the bandpass filter of the light receiving device can be omitted.

[0065] For example, the distance measuring device 1 measures the time difference between the time t0 when the trigger signal for emitting light is input to the light source device 2 and the time t1 when the SPAD of the SPAD array 11 reacts. Then, the distance measuring device 1 can calculate the distance between the distance measuring device 1 and the object OBJ based on the time difference. For example, the distance between the distance measuring device 1 and the object OBJ can be calculated by the expression L=c / 2(t1-t0), where c is the speed of light. This method is generally referred to as time-of-flight (ToF) ranging.

[0066] Figure 2 The block diagram shows an example of the light source device 2 and the light receiving device 10. Figure 2 The light source device 2 in the embodiment includes a driving circuit 6 and a light source unit 7 . Figure 3 1 shows an example of a light source section in a plan view. As the light source section 7, for example, an array light source 7A including a plurality of light emitting elements 8 arranged therein can be used. For example, the array light source 7A can be formed by arranging a plurality of light emitting elements 8 in a grid (such as a rectangular grid, a parallelogram grid, or a triangular grid) on substantially the same plane. Figure 2 The description will be given by taking the case where the array light source 7A in FIG. 1 is used as the light source section 7 as an example. However, the arrangement manner of the light emitting elements 8 of the array light source 7A and the number of the light emitting elements 8 are not specified.

[0067] It should be noted that the light source 7B ( Figure 3 ) can be used as the light source section 7. For example, VCSEL can be used as the light emitting element 8. However, the type of the light emitting element 8 is not limited. For example, an edge emitting semiconductor laser can be used as the light emitting element 8. It should be noted that Figure 3 The configuration of the light source section shown in FIG. 1 is by way of example only. For example, an LED light source, an organic EL light source, or the like that emits light over its entire surface may be used as the light source section.

[0068] Figure 2The optical receiving device 10 in the embodiment includes a SPAD array 11, a readout circuit 12, a TDC block 13, a calculation circuit 14, a control circuit 16, a trigger generation circuit 18, and an interface circuit 19. The calculation circuit 14 includes a histogram generator 15 as an internal component. In addition, the control circuit 16 includes a register 17 as an internal component.

[0069] The SPAD array 11 includes a plurality of SPADs arranged in substantially the same plane. For example, a plurality of SPADs may be arranged in a grid, such as a rectangular grid, a parallelogram grid, or a triangular grid. Here, a SPAD array including a plurality of SPADs arranged in a square grid is used as an example for description. However, the arrangement of the SPADs of the SPAD array is not limited.

[0070] In response to the SPADs in the SPAD array 11 reacting with photons, the readout circuit 12 outputs a pulse to a circuit downstream thereof. For example, the readout circuit 12 may include at least one of a quenching circuit that stops the avalanche phenomenon of the SPAD or a recharging circuit that resets the voltage level. For example, a readout circuit 12 is installed for each SPAD in the SPAD array 11. In this case, each pixel in the SPAD array 11 includes a SPAD and a readout circuit 12 corresponding to the SPAD. It will be described here assuming that the SPAD array 11 includes substantially square pixels in a plan view. However, the shape of the pixels in the SPAD array 11 may be different from the above.

[0071] The following description will be made by taking SPAD (Single Photon Avalanche Diode) as an example of a light detector. However, a light detector of a different type may be used. For example, any other type of photodiode, phototube, etc. may be used as a light detector.

[0072] The TDC block 13 is a circuit block including a plurality of TDCs (time-to-digital converters). For example, each TDC in the TDC block 13 is coupled to at least one pixel in the SPAD array 11. Each TDC measures, for example, the time difference between the time t1 of a pulse output from the readout circuit 12 (pixel) and the time t0 at which the trigger generation circuit 18 outputs the trigger signal LT to the drive circuit 6.

[0073] The calculation circuit 14 performs various calculation processes and the like based on the signal input from the TDC block 13. For example, in the case where the light receiving device 10 performs ranging, the calculation circuit 14 may calculate the distance between the object OBJ and the light receiving device 10. However, an external device may perform the calculation of the distance between the object OBJ and the light receiving device 10. For example, a hardware circuit such as a microprocessor, an ASIC, or an FPGA may be used as the calculation circuit 14. It should be noted that the calculation circuit 14 may include a combination of a hardware circuit and a program running on the hardware circuit.

[0074] The histogram generator 15, for example, accumulates the results of the flight time measured multiple times by the TDC in the TDC block 13 and generates a histogram. By measuring the flight time multiple times, it is possible to distinguish between background light (interference light) and the reflected light RL of the light output from the light source section 7. It should be noted that the histogram generator 15 can average the flight time measured multiple times to generate a histogram. As long as the peak value of the histogram is obtained, the distance from the distance measuring device 1 to the object OBJ can be calculated by the above expression L=c / 2(t1-t0). It should be noted that the histogram generator can be omitted in the case where the histogram generation process is to be performed by an external device.

[0075] For example, the control circuit 16 enables / disables pixels of the SPAD array 11. For example, the control circuit 16 can set a macropixel by enabling multiple adjacent pixels among multiple pixels within the SPAD array 11. The pixel (macropixel) to be enabled can be determined according to the position and range of the light spot (spotlight) incident on the SPAD array 11, as described later. The light spot on the SPAD array 11 corresponds one-to-one to the light ray of the reflected light RL of the light output from the light emitting element 8 of the light source section 7. For example, the calculation circuit 14 can calculate the distance to each ranging point in the distance image based on the signal output from the pixel within the macropixel.

[0076] In addition, the control circuit 16 controls the trigger generation circuit 18 so that the light EM is output toward the object OBJ at a predetermined timing. In response to receiving the control signal from the control circuit 16, the trigger generation circuit 18 provides a trigger signal LT to the drive circuit 6 of the light source device 2. Then, the drive circuit 6 operates the light emitting element 8 of the light source section 7 based on the trigger signal LT.

[0077] It should be noted that the control circuit 16 may also have a register 17. The register 17 may be used to set the operating conditions of the pixels within the SPAD array 11. Examples of the operating conditions of the pixels include the bias voltage of the photodiode, the sampling frequency within the SPAD array 11, the recharge current, the delay in generating a pulse for quenching, and the delay in generating a pulse for recharging. In addition, the light emission timing or light emission conditions of the light source device 2 may also be set by the register 17.

[0078] As the control circuit 16, a hardware circuit such as a microprocessor, ASIC, FPGA, etc. can be used. Alternatively, the control circuit 16 may include a combination of a hardware circuit and a program running on the hardware circuit. The control circuit 16 and the above-mentioned calculation circuit 14 may be provided by a common circuit or separate circuits.

[0079] The interface circuit 19 implements data communication between the optical receiving device 10 and an external device. For example, the control circuit 16 can receive a control signal from the external device via the interface circuit 19. In addition, the calculation circuit 14 can transmit measurement data to the external device via the interface circuit 19. It should be noted that the type of communication standard and communication protocol applied to the interface circuit 19 is not specified.

[0080] Figure 4 The plan view of shows an example of a light pattern incident on the SPAD array 11. In order to increase the field of view (FOV) of detectable photons, in some cases, a wide-angle collimating lens is located on the light source side (Tx), and a condenser lens with a short focal length and a small F value is located on the light detector (Rx) side. However, the off-axis characteristics of the lens system deteriorate, which causes the light spot SL corresponding to the reflected light RL incident on the SPAD array 11 to be deformed.

[0081] For example, Figure 4 Comparing the light spot at position L1 near the middle of the SPAD array 11 in FIG. 1 and the light spot at position L2 near the periphery of the SPAD array 11 in FIG. 1 , the latter has a larger light spot diameter due to the degradation of the imaging performance. Therefore, assuming that the output light amounts of the plurality of light emitting elements 8 of the array light source 7A are approximately equal, the amount of light incident on each pixel decreases as the distance from the middle of the SPAD array 11 increases.

[0082] In the case where the number of pixels included in the macro pixel is set equal regardless of the position within the SPAD array 11, the amount of light incident on the macro pixel at position L2 is smaller than the amount of light on the macro pixel at position L1. Therefore, in the case of generating a range image using the SPAD array 11, the ranging accuracy and the maximum ranging distance (ranging performance) at the ranging point near the periphery of the field of view are reduced.

[0083] Figure 5 and Figure 6 The plan view of exemplifies the positional relationship between the light spot and the plurality of pixels 11P within the SPAD array 11 . Figure 5 is an enlarged view showing the portion where the light spot SL1 is incident on the SPAD array 11. Figure 6 1 is an enlarged view showing a portion where the light spot SL2 is incident on the SPAD array 11. The degradation of the imaging performance results in that the light spot SL2 is larger than the light spot SL1.

[0084] The control circuit 16 may adjust at least any one of the position, size, and shape of the macro pixel by enabling freely selected pixels in the pixels within the SPAD array 11. For example, the macro pixel may be set based on the corresponding spot diameter at each position within the SPAD array 11. For example, a macro pixel MP1 having 2×2=4 pixels is set at position L1 according to the spot diameter of the light ( Figure 5 ). In addition, at the position L2, the spot diameter of the light is larger than the spot diameter at the position L1, and therefore, a macro pixel MP2 having 4×4=16 pixels may be set ( Figure 6 ). By increasing the size of macro pixels, high ranging performance can be achieved while securing the necessary amount of light without causing a decrease in imaging performance.

[0085] Figure 7 The graph of φ shows an example of the relationship between the light spot incident on the SPAD array 11 and the maximum ranging distance. Figure 7 The horizontal axis in represents the spot diameter Φ of the light in micrometers (μm). In addition, Figure 7 The vertical axis in represents the maximum ranging distance in meters (m). At the position L1, a light spot with a diameter of Φ=20 μm is incident, and therefore, photon detection is performed using a macro pixel including four 10 μm square pixels.

[0086] In contrast, a light spot with a diameter of Φ=40 μm is incident at position L2. If a macro pixel including four pixels is used to perform photon detection at position L2 as at position L1, the maximum ranging distance will be reduced by about 40% compared to that at position L1. Therefore, photon detection is performed at position L2 using a macro pixel MP2 including 16 (4×4) pixels, as shown by L2′ in the figure, which makes it possible to ensure a maximum ranging distance comparable to the ranging distance at position L1.

[0087] Different types of lenses are contemplated depending on the field of view required for the distance measuring device 1. For example, the imaging performance on the SPAD array 11 varies with the focal length of the optical system. Therefore, the user can adjust the macropixel depending on the type of lens used.

[0088] Figure 8 and Fig. 9 Each shows an example of a case where TDCs are assigned one-to-one to pixels of a SPAD array. Figure 8 In FIG. 1 , a separate TDC 13A is allocated to the corresponding four pixels of the macro pixel MP1. However, in the case where the separate TDC 13A is allocated to the corresponding pixels, the increase in the number of pixels of the macro pixel requires an increase in the necessary number of TDCs 13A. Fig. 9 In the case of the macro pixel MP2 in FIG. 1, 16 TDCs become necessary. As the number of TDCs 13A installed in the TDC block 13 increases, the circuit area and power consumption inevitably increase. Therefore, as in the light receiving device according to the present disclosure, the TDCs can be installed in a manner capable of reducing the necessary number of TDCs regardless of the increase in the number of pixels included in the macro pixel.

[0089] Fig.10An example of the coupling relationship between the pixel and the TDC in the light receiving device according to the present disclosure is shown. Fig.10 As shown, the TDC 13A can be shared by a plurality of pixels that are not adjacent in the row direction or the column direction within the SPAD array 11. Fig.10 The output sides of the pixels arranged in even columns among the pixels in each row in the macro pixel MP3 are coupled to one OR gate 32. Furthermore, the output sides of the pixels arranged in odd columns among the pixels belonging to each row in the macro pixel MP3 are coupled to one OR gate 32. Furthermore, the output sides of the OR gates 32 are coupled to the corresponding TDCs 13A. In other words, a signal corresponding to the OR between the signals output from the pixels in even columns or odd columns arranged in one row of pixels will be input to each TDC. It should be noted that a hard-line OR can be formed by connection between signal lines instead of using an OR gate.

[0090] Fig.10 The macropixel MP3 contains Fig. 9 The macro pixel MP2 in FIG. 1 has 16 similar pixels. However, in Fig.10 In, with Fig. 9 Compared to , the necessary number of TDCs is reduced by half. Fig.10 In the example in , the pixels sharing the TDC are divided by even columns / odd columns to share the TDS. However, the TDC may be shared in a pattern different from this. For example, in each row, the TDC may be shared by pixels in columns whose number is a multiple of n (n is an integer of 2 or greater). In addition, in each row within the SPAD array 11, the coupling relationship between multiple pixels and the TDC may be different.

[0091] The following description will be made by taking as an example the case where pixels that are not adjacent to each other in the SPAD array 11 share the TDC. However, it is not prohibited to share the TDC by adjacent pixels in the SPAD array 11. In addition, the coupling relationship between the plurality of pixels and the TDC in the SPAD array in the light receiving device according to the present disclosure may be different from the style described herein.

[0092] Fig.11 The table of indicates an example of expected values ​​of the probability of photon detection in the case where two pixels (pixel A and pixel B) share one TDC. The p in the table corresponds to the probability of photon detection per pixel at a single pulse repetition interval (PRI). The photon detection probability p can be calculated, for example, by dividing the count rate by the PRI frequency. In the case where no OR is taken between the signals output from the two pixels, the expected value of the photon detection probability is 2p. In contrast, in the case where an OR is taken between the signals output from the two pixels, the expected value of the photon detection probability is 2p-p 2 .

[0093] Fig.12The graph of shows an example of the relationship between the expected value of photon detection counts and distance. Fig.12 The horizontal axis of the curve graph represents the distance between the distance measuring device 1 and the object. Fig.12 The vertical axis of the graph of represents the expected value of the photon detection count. The solid line represents data related to the case where the OR is not taken between the signals output from the two pixels. Meanwhile, the dotted line represents data related to the case where the OR is taken between the signals output from the two pixels.

[0094] For example, in the case where a sufficient amount of reflected light RL can be detected, the value of p is large. In the case where an OR is taken between the signals output from two pixels, as Fig.12 As shown in the graph of , at high photon detection probability (larger p value), the photon detection count decreases. At larger p values, the photon detection count increases significantly. Even if the photons are partially not counted when the photon detection count increases significantly, the ranging performance is affected to a limited extent due to a sufficient amount of photons.

[0095] On the contrary, when the amount of reflected light RL incident on the SPAD array 11 is small, the value of p is small. For example, when the distance between the distance measuring device 1 and the object is large or when the reflectivity of the light EM on the object is low, the value of p is small. Fig.12 As shown in the graph, even if the OR is taken between the signals output from two pixels, the photon detection count hardly decreases as long as the value of p is not large. Therefore, when measuring the distance of an object at a certain distance, the effect of taking the OR between the signals output from multiple pixels can be ignored.

[0096] Therefore, using the light receiving device according to the present disclosure enables the number of TDCs to be reduced while maintaining high ranging performance. Next, an example of a method of specifying a macro pixel by the control circuit 16 will be described.

[0097] Fig.13 and Fig.14 Each shows an example of a method of specifying a macropixel. In the case where an address is assigned to each pixel within the SPAD array 11, the control circuit 16 can specify the macropixel based on the address. For example, in the case of using a rectangular-shaped macropixel, the macropixel can be specified by using (1) a base address, (2) the number of pixels in the horizontal direction (column direction), and (3) the number of pixels in the vertical direction (row direction). For example, the address of a pixel corresponding to one of the corners of the macropixel can be used as the base address. Fig.13 and Fig.14 In the example of , the address of the pixel located at the corner with the smallest row number and column number is used as the base address. However, the address of any pixel different from this can be used as the base address. Fig.13 and Fig.14The reference pixel in each of refers to a pixel corresponding to a base address. Here, it is assumed that the address is expressed as "(column number, row number)".

[0098] Fig.13 The macro pixel MP4 in includes a macro pixel having a base address (reference pixel) of (2, 1), a number of pixels in the horizontal direction of 2, and a number of pixels in the vertical direction of 3. In comparison, Fig.14 The macropixel MP5 in φ includes a macropixel whose base address (reference pixel) is (2, 2), the number of pixels in the horizontal direction is 4, and the number of pixels in the vertical direction is 4.

[0099] It should be noted that the control circuit 16 may specify a macro pixel of any shape other than a rectangular shape. For example, the control circuit 16 may not select any pixel in the area of ​​the rectangular shape corresponding to the pixels at the four corners. In addition, the control circuit 16 may specify the macro pixel so that the enabled pixels are distributed around the disabled pixels. In addition, the macro pixel specified by the control circuit 16 may be an asymmetric shape.

[0100] Fig.15 An example of connection between pixels of the SPAD array 11 and the TDC is shown. Fig.15 Signal line (lead) pairs PXOUT[0,2], PXOUT[1,3], PXOUT[4,6], PXOUT[5,7], PXOUT[8,10], and PXOUT[9,11] are shown. Among them, the signal line pairs PXOUT[0,2], PXOUT[4,6], and PXOUT[8,10] are coupled to the output side of the pixels in the even columns. In contrast, the signal line pairs PXOUT[1,3], PXOUT[5,7], and PXOUT[9,11] are coupled to the output side of the pixels in the odd columns.

[0101] exist Fig.15 In the example of FIG. 1 , the signal lines each connect multiple pixels in the same row to adopt a hard-wired OR. Here, the multiple pixels correspond to columns c. i +4n(c i =0, 1, 2, or 3, n=0, 1, 2, ...). However, the signal lines may be connected to a plurality of pixels in a pattern different from this. The paired signal lines are all coupled to the input end of the same OR gate 32. In addition, the TDC 13A is coupled downstream of each OR gate 32. Therefore, each OR gate 32 inputs a signal corresponding to the OR between the signals output from the pixels in the odd columns or the pixels in the even columns in one of the rows to a corresponding one of the TDCs 13A.

[0102] Next, an example of a light receiving circuit corresponding to each pixel of the SPAD array 11 will be described.

[0103] Fig.16 The circuit diagram shows an example of a light receiving circuit according to the present disclosure. Fig.16 The light receiving circuit 20 in the embodiment includes a photodiode PD, a transistor M1, a transistor M2, a transistor M3, a latch circuit 21, a NAND gate 22, an inverter 23, and an inverter 24. The transistor M1 and the transistor M2 are PMOS transistors. On the contrary, the transistor M3 is an NMOS transistor. The photodiode PD is, for example, an avalanche photodiode. For example, a digital circuit including a logic gate, a trigger, etc. can be used as a latch circuit. However, the configuration of the latch circuit is not limited.

[0104] A voltage Van is applied to the anode of the photodiode PD. The voltage Van can be set to apply a reverse voltage equal to or greater than the breakdown voltage between the terminals of the photodiode PD. In contrast, the cathode of the photodiode PD is coupled to the input side of the inverter 24, the drain of the transistor M2, and the drain of the transistor M3. The source of the transistor M3 is coupled to the ground potential. The ground potential is, for example, a reference potential of a signal, a reference potential of a substrate, or a ground potential. However, the type of potential used as the ground potential is not specified. A bias voltage VB is applied to the gate of the transistor M2. The source of the transistor M2 is coupled to the drain of the transistor M1. In addition, the source of the transistor M1 is coupled to the power supply potential VDDH.

[0105] Transistor M2 corresponds to the load element LE of the quenching photodiode PD. Fig.16 In the light receiving circuit 20 in FIG. 1 , a transistor is used as a load element; however, any other type of element may be used as a load element. For example, the load element may include a resistor or a combination of a resistor and a transistor.

[0106] The output terminal of the latch circuit 21 is coupled to the first input terminal of the NAND gate 22 through the signal line PXSEL. At the same time, the enable line YE of the column is coupled to the second input terminal of the NAND gate 22. In addition, the output terminal of the NAND gate 22 is coupled to the gate of the transistor M1, the gate of the transistor M3, and the input terminal of the inverter 23 through the signal line Len. In addition, the output terminal of the inverter 23 is coupled to the control terminal of the inverter 24. The output terminal of the inverter 24 is coupled to the signal line (lead) PXOUT. The output terminal of the inverter 24 corresponds to the output side of the optical receiving circuit 20. The signal line PXOUT is connected to the output sides of the plurality of optical receiving circuits 20 to take a hard-line OR of the output signals from the plurality of optical receiving circuits 20. The inverter 24 is configured to be turned on / off in response to the voltage applied to the control terminal.

[0107] Next, the operation of the light receiving circuit 20 will be described.

[0108] The control circuit 16 sets the voltage of the enable line YE of the column having the pixel to be enabled to high. In addition, the control circuit 16 sets the latch circuit 21 of the receiving circuit 20 corresponding to the pixel to be enabled to the selection state, and sets the latch circuit 21 of the light receiving circuit 20 corresponding to the pixel to be disabled to the non-selection state. The latch circuit 21 is configured to apply a high voltage to the signal line PXSEL in the selection state and a low voltage to the signal line PXSEL in the non-selection state.

[0109] First, the case where the pixel is enabled (activated) by the control circuit 16 and the voltage of the signal line PXSEL becomes high will be described. At this time, the voltage of the enable line YE of the column is also set to high, which causes the output voltage of the NAND gate 22 to become low. The low voltage is applied to the gate of the transistor M1 through the signal line Len, which turns on the source / drain portion of the transistor M1. In addition, the low voltage is applied to the gate of the transistor M3, which turns off the drain / source portion of the transistor M3. In addition, the input voltage of the inverter 23 becomes low, which causes a high voltage to be applied to the control terminal of the inverter 24.

[0110] This causes the voltage at the source terminal of transistor M2 to rise from the power supply potential VDDH. In addition, the cathode potential VC of the photodiode PD is separated from the ground potential, thereby enabling an excess bias to be applied between the terminals of the photodiode PD. This allows photon detection in Geiger mode. In addition, the inverter 24 is turned on, which makes it possible to output a pulse to the signal line PXOUT in response to the detection of a photon.

[0111] In response to photons being incident on the photodiode PD, the current flowing between the terminals of the photodiode PD increases due to avalanche multiplication. At this time, as the current increases, a voltage drop occurs in the drain / source portion of the transistor M2 or the load element. The avalanche phenomenon stops in response to the voltage between the terminals of the photodiode PD dropping to the breakdown voltage, resulting in a decrease in the current flowing between the terminals of the photodiode PD. In response to the voltage between the terminals of the photodiode PD reaching a value equal to or greater than the breakdown voltage, photon detection may become possible again.

[0112] The current flowing between the terminals of the photodiode PD increases so that the cathode potential VC changes from high to low. At this time, the voltage of the signal line PXOUT corresponding to the output of the inverter 24 changes from low to high. Then, in response to the cathode potential VC returning to high with the cessation of the avalanche phenomenon, the inverter 24 outputs a low voltage to the signal line PXOUT. Therefore, the light receiving circuit 20 outputs a pulse to the signal line PXOUT in response to the reaction of the photodiode PD with the photon.

[0113] Fig.16The optical receiving circuit 20 in the embodiment outputs a pulse having a positive polarity to the signal line PXOUT. However, the polarity of the pulse output from the optical receiving circuit according to the present disclosure is not specified as such. In addition, a circuit in which the polarity of the optical receiving circuit 20 is reversed may also be used. In the case of polarity reversal, it is sufficient to replace the NMOS transistor and the PMOS transistor in the optical receiving circuit 20 with a PMOS transistor and an NMOS transistor, respectively. In this case, a positive bias voltage is applied to the cathode of the photodiode and the anode of the photodiode is coupled to the output side of the inverter. In addition to the optical receiving circuit 20, the configuration of polarity reversal is also applicable to the optical receiving circuit described later.

[0114] Fig.16 The light receiving circuit 20 in the embodiment is configured to perform passive quenching; however, the quenching method of the photodiode PD is not limited thereto. For example, a low voltage may be applied to the gate of the transistor M2 when a pulse is output to the signal line PXSEL to perform active quenching. In addition, the light receiving circuit according to the present disclosure does not have to be coupled to the enable line. Therefore, a light receiving device having a configuration in which the enable line is omitted may be used.

[0115] Next, the operation will be described in the case where the pixel is deactivated (non-activated) by the control circuit 16 and the voltage of the signal line PXSEL becomes low. It should be noted that the operation in the case where the voltage of the enable line YE becomes low is similar. In this case, the output voltage of the NAND gate 22 becomes high. The high voltage is applied to the gate of the transistor M1 through the signal line Len, which causes the source / drain portion of the transistor M1 to be disconnected. In addition, a high voltage is applied to the gate of the transistor M3, which causes the drain / source portion of the transistor M3 to be turned on. In addition, the input voltage of the inverter 23 becomes high, which causes a low voltage to be applied to the control terminal of the inverter 24.

[0116] This separates the source of transistor M2 from the power supply potential VDDH. In addition, the cathode of the photodiode PD is coupled to the ground potential. Thus, no excessive bias is applied between the terminals of the photodiode PD. In addition, the inverter 24 is disconnected so that no signal is output to the signal line PXOUT. The output impedance of the inverter 24 in the off state becomes high. This makes it possible to minimize electrical interference with any other light receiving circuit 20 (pixel) coupled to the signal line PXOUT. This allows the same signal line PXOUT to be used as the lead of multiple light receiving circuits 20. Fig.17 The table lists the operation of the light receiving circuit 20.

[0117] In the above Fig.10 or Fig.15In the case of adopting a connection in which output signals from a plurality of light receiving circuits (pixels) are ORed and input to the TDC 13A as in the example, even if a plurality of reactions occur, the sequential reactions of the SPADs in the plurality of light receiving circuits sharing the same TDC 13A may achieve a reduction in the number of output pulses. Therefore, the light receiving device according to the present disclosure may be equipped with a function of preventing a plurality of pulses from overlapping.

[0118] Fig.18 FIG. 2 shows an example of connection in the optical receiving device according to Modification 1. By adding a plurality of one-shot circuits 26 to the optical receiving device 26, Fig.15 The light receiving device 10 is provided Fig.18 For example, the one-shot circuit 26 may be located in each signal line PXOUT. In the optical receiving device 10A, the one-shot circuit 26 is coupled between the plurality of optical receiving circuits and the input terminal of the OR gate 32. However, the one-shot circuit 26 may be coupled at a position different from this. For example, the one-shot circuit 26 may be coupled between the optical receiving circuit 20 and the optical receiving circuit 20. In addition, the number of the one-shot circuit 26 may be different from Fig.18 For example, a plurality of one-shot circuits 26 may be coupled to each of the signal lines PXOUT.

[0119] Fig.19 An example of a one-shot circuit and a signal waveform according to Modification 1 is shown. Fig.19 (a) is a circuit diagram showing an example of a one-shot circuit. Fig.19 The one-shot circuit 26 in (a) includes an AND gate 27 and an inverter chain 28. The input side signal line Lin of the one-shot circuit 26 is coupled to one of the input terminals of the AND gate 27. In addition, the inverter chain 28 is coupled between the branch point of the signal line Lin and the other input terminal of the AND gate 27. Fig.19 In the inverter chain 28 in (a), three inverters are connected in series. However, the number of inverters in the inverter chain may be different from this. For example, the number of inverters can be determined according to the pulse width required in the downstream circuit such as the TDC 13A.

[0120] Here, the operation of each one-shot circuit 26 is described by taking the case where a pulse having a positive polarity is generated in the light receiving circuit as an example.

[0121] In response to the pulse output from the light receiving circuit, the voltage of one of the input terminals of the AND gate 27 changes from low to high. Then, the voltage of the other input terminal of the AND gate changes from low to high with a delay due to the inverter chain 28. When the voltages of both input terminals of the AND gate 27 change to high, the output voltage of the AND gate 27 changes from low to high. Moreover, in response to the voltage of one of the input terminals of the AND gate 27 changing from high to low after the pulse time has passed, the output voltage of the AND gate 27 also changes from low to high.

[0122] Therefore, the width of the pulse output by the one-shot circuit 26 is shorter than the width of the input pulse, as shown in FIG. Fig.19 As shown in the graph of (b). That is, the one-shot circuit 26 converts the pulse generated in the optical receiving circuit into a pulse with a short width. This makes it possible to reduce the probability of pulses generated in multiple optical receiving circuits overlapping in the signal line PXOUT to maintain the ranging performance.

[0123] Fig. 20 The graph of FIG. 1 shows an example of a signal waveform in a light receiving device. Fig. 20 In the example in , the SPAD of each of the optical receiving circuit coupled to the signal line PXOUT[0] and the optical receiving circuit coupled to the signal line PXOUT[1] reacts to the photon. Therefore, pulses overlapping in duration are output to the signal line PXOUT[0] and the signal line PXOUT[1]. Without setting a one-shot circuit, the pulse in the signal line PXOUT[0] and the pulse in the signal line PXOUT[1] are ORed by the OR gate 32. Therefore, the two pulses are synthesized into a single pulse, and the number of photon counts in the downstream circuit becomes "1".

[0124] On the contrary, in Fig.18 In the case where the one-shot circuit 26 is coupled upstream of the OR gate 32 in the optical receiving device 10A, the pulse in the signal line PXOUT[0] and the pulse in the signal line PXOUT[1] are respectively converted into pulses having shorter widths before being input to the OR gate 32. This prevents the two pulses from overlapping even when the two signals are ORed by the OR gate 32, which makes it possible to obtain the correct count number "2" of photons in the downstream circuit.

[0125] Fig.21 The circuit diagram shows an example of a light receiving circuit according to Modification 2. Fig.21 The light receiving circuit 20A in the embodiment corresponds to the omitted Fig.16 The circuit of the transistor M1 and the transistor M3 of the light receiving circuit 20. Fig.21 The light receiving circuit 20A in FIG. 1 includes a photodiode PD, a transistor M2, a latch circuit 21, a NAND gate 22, an inverter 23, and an inverter 24. The transistor M2 includes a PMOS transistor. The photodiode PD includes, for example, an avalanche photodiode.

[0126] The voltage Van is applied to the anode of the photodiode PD. The voltage Van can be set to apply a reverse voltage equal to or greater than the breakdown voltage between the terminals of the photodiode PD. At the same time, the cathode of the photodiode PD is coupled to the input side of the inverter 24 and the drain of the transistor M2. The source of the transistor M2 is coupled to the power supply potential VDDH. The bias voltage VB is applied to the gate of the transistor M2.

[0127] The output terminal of the latch circuit 21 is coupled to the first input terminal of the NAND gate 22 through the signal line PXSEL. At the same time, the enable line YE of the column is coupled to the second input terminal of the NAND gate 22. In addition, the output terminal of the NAND gate 22 is coupled to the input terminal of the inverter 23. In addition, the output terminal of the inverter 23 is coupled to the control terminal of the inverter 24. The output terminal of the inverter 24 is coupled to the signal line (lead) PXOUT. The output terminal of the inverter 24 corresponds to the output side of the optical receiving circuit 20A. The signal line PXOUT is coupled to the output sides of multiple optical receiving circuits to take a hard-line OR of the output signals from the multiple optical receiving circuits. The inverter 24 is configured to be turned on / off in response to the voltage applied to the control terminal. It should be noted that in Fig.21 In the light receiving circuit 20A in FIG. 1 , an AND gate 22A may be used instead of the NAND gate 22 and the inverter 23 .

[0128] Next, the operation of the light receiving circuit 20A will be described.

[0129] The control circuit 16 sets the voltage of the enable line YE of the column having the pixel to be enabled to high. In addition, the control circuit 16 sets the latch circuit 21 of the light receiving circuit 20A corresponding to the pixel to be enabled to the selection state, and sets the latch circuit 21 of the light receiving circuit 20A corresponding to the pixel to be disabled to the non-selection state. The latch circuit 21 is configured to apply a high voltage to the signal line PXSEL in the selection state and a low voltage to the signal line PXSEL in the non-selection state.

[0130] First, a case will be described where the pixel is enabled (activated) by the control circuit 16 and the voltage of the signal line PXSEL becomes high. At this time, the voltage of the enable line YE of the column is also set to high, which causes the output voltage of the NAND gate 22 to become low. The input voltage of the inverter 23 becomes low, which causes a high voltage to be applied to the control terminal of the inverter 24. The inverter 24 is turned on, which makes it possible to output a pulse to the signal line PXOUT in response to the detection of a photon.

[0131] In response to photons being incident on the photodiode PD, the current flowing between the terminals of the photodiode PD increases due to avalanche multiplication. At this time, as the current increases, a voltage drop occurs in the drain / source portion of the transistor M2 or the load element. The avalanche phenomenon stops in response to the voltage between the terminals of the photodiode PD dropping to the breakdown voltage, resulting in a decrease in the current flowing between the terminals of the photodiode PD. Photon detection may become possible again in response to the voltage between the terminals of the photodiode PD reaching a value equal to or greater than the breakdown voltage.

[0132] The current flowing between the terminals of the photodiode PD increases, causing the cathode potential VC to change from high to low. At this time, the voltage of the signal line PXOUT corresponding to the output of the inverter 24 changes from low to high. Then, in response to the cathode potential VC returning to high with the cessation of the avalanche phenomenon, the inverter 24 outputs a low voltage to the signal line PXOUT. This allows the light receiving circuit 20 to output a pulse with positive polarity to the signal line PXOUT in response to the reaction of the photodiode PD with the photon.

[0133] Next, the operation will be described in the case where the pixel is deactivated (not activated) by the control circuit 16 and the voltage of the signal line PXSEL becomes low. It should be noted that the operation in the case where the voltage of the enable line YE becomes low is similar to this. In this case, the output voltage of the NAND gate 22 becomes high. The input voltage of the inverter 23 becomes high, which causes a low voltage to be applied to the control terminal of the inverter 24. The inverter 24 is disconnected so that no signal is output to the signal line PXOUT. The output impedance of the inverter 24 in the disconnected state becomes high, which makes it possible to minimize electrical interference with any other light receiving circuits (pixels) coupled to the signal line PXOUT. This allows the same signal line PXOUT to be used as the lead of multiple light receiving circuits.

[0134] Due to omission Fig.16 The transistor M1 and transistor M3 in Fig.21 The light receiving circuit 20A in the embodiment can have a simplified circuit configuration with a reduced mounting area. However, in the case of using the light receiving circuit 20A, even in the light receiving circuit corresponding to the pixel deactivated by the control circuit 16, an excessive bias voltage is kept applied between the terminals of the photodiode PD. Therefore, power is consumed when the photodiode PD reacts with photons.

[0135] It should be noted that the pixels of the SPAD array 11 may each include a mixture of the above-described light receiving circuit 20 and the light receiving circuit 20A. In addition, the above-described light receiving circuits 20 and 20A are merely examples of circuits that can be used as each pixel of the SPAD array 11. Therefore, a light receiving circuit having a configuration different from that of the above-described light receiving circuits 20 and 20A may be installed as each pixel of the SPAD array 11.

[0136] Here, the configuration of the light receiving circuit according to the present disclosure will be organized.

[0137] The optical receiving circuit according to the present disclosure may include a photodetector, a load element, a latch circuit and a first inverter. The load element is coupled between the photodetector and a first reference potential. The latch circuit is configured to output a first voltage corresponding to a state. The first inverter is configured to turn on and invert and output an output voltage of the photodetector in response to a second voltage applied to a control terminal. The second voltage to be applied to the control terminal may vary according to the first voltage.

[0138] The above-mentioned photodiode PD is an example of a photodetector. The load element LE or the transistor M2 is an example of a load element. The inverter 24 is an example of a first inverter. The power supply potential VDDH is an example of a first reference potential.

[0139] The optical receiving circuit according to the present disclosure may further include an AND gate having a first input terminal coupled to the output side of the latch circuit, a second input terminal coupled to the enable line, and an output terminal coupled to the control terminal of the first inverter. Fig.21 The AND gate 22A in FIG. 1 is an example of an AND gate. The enable line YE of the column is an example of an enable line.

[0140] The optical receiving circuit according to the present disclosure may further include: a NAND gate having a first input terminal coupled to the output side of the latch circuit and a second input terminal coupled to the enable line; and a second inverter coupled between the NAND gate and the control terminal. The NAND gate 22 is an example of a NAND gate. The inverter 23 is an example of a second inverter.

[0141] In addition, the optical receiving circuit according to the present disclosure may further include a NAND gate, a first transistor of a first conductivity type, a second transistor of a second conductivity type, and a second inverter. The NAND gate has a first input terminal coupled to the output side of the latch circuit and a second input terminal coupled to the enable line. The first transistor is coupled between the first reference potential and the load element, and is turned on in response to the output voltage of the NAND gate. The second transistor is coupled between the output side of the photodetector and the second reference potential, and is turned on in response to the output voltage of the NAND gate. The second inverter is coupled between the output terminal of the NAND gate and the control terminal of the first inverter.

[0142] The PMOS transistor can be used as a transistor of the first conductivity type, and the NMOS transistor can be used as a transistor of the second conductivity type. In this case, the power supply potential can be used as the first reference potential and the ground potential can be used as the second reference potential. In addition, it is also acceptable to use the NMOS transistor as the transistor of the first conductivity type and the PMOS transistor as the transistor of the second conductivity type. In this case, the ground potential can be used as the first reference potential, and the power supply potential can be used as the second reference potential. Fig.16 The transistor M1 in FIG. 5 is an example of a first transistor. Fig.16 The transistor M3 in is an example of a second transistor. In addition, the photodetector may be an avalanche photodiode.

[0143] By using the light receiving circuit according to the present disclosure, only necessary pixels among the pixels within the SPAD array 11 can be enabled, while the remaining pixels are disabled. This makes it possible to reduce the power consumption of the light receiving device. For example, the control circuit 16 can enable pixels with a large amount of reflected light RL and disable pixels with a small amount of reflected light RL. This makes it possible to minimize the influence of background light (interference light) to increase the brightness dynamic range and the ranging distance at which ranging can be performed. Therefore, the shape of the macro pixel that can be set according to the light spot will be described below.

[0144] Figure 22 to Figure 24 The plan views each show an example of the shape of a macro pixel. Fig. 22 The light spot SL3 in the image is circular. In this case, if a square-shaped or rectangular-shaped macro pixel is set, a pixel with a small amount of reflected light RL is unintentionally enabled. Fig. 22 In the example in FIG. 1 , the control circuit 16 may set the macro pixel MP6 to be a cross shape.

[0145] The shape of the light spot on the SPAD array 11 may be deformed due to factors such as misalignment of the optical system. For example, an elliptical light spot may be formed, for example, Fig.23 In this case, the control circuit 16 may set the macro pixel to a polygonal shape covering the area of ​​the light spot, such as Fig.23 Macropixel MP7.

[0146] The amount of light in the area illuminated by the light spot on the SPAD array 11 is not always constant. For example, the illuminated area may have a portion with a smaller amount of light. Fig.24 The light spot SL5 in FIG. 1 is in a ring shape. In this case, the control circuit 16 may set the macro pixel MP8 in which the deactivated pixel region is surrounded by the activated pixel region.

[0147] Figure 22 to Figure 24The shapes of the macro pixels shown in are only by way of example. Therefore, the control circuit 16 can set the macro pixels to a shape different from these pixels. As described above, the control circuit 16 can set the macro pixels according to the shape or amount of the light spot. This makes it possible to reduce power consumption and perform highly accurate ranging with less noise. The use of the light receiving device according to the present disclosure enables flexible activation / deactivation of individual pixels regardless of the output side connection of multiple pixels (light receiving circuits).

[0148] Next, a macro-pixel setting process in the light receiving device according to the present disclosure will be described in detail.

[0149] Fig.25 An example of components associated with enabling and disabling pixels is shown. Fig.25 As shown, the optical receiving device according to the present disclosure may further include a counter circuit 30 and a storage unit 31. For example, the counter circuit 30 may be coupled downstream of at least one of the multiple optical receiving circuits (pixels) within the SPAD array 11. The counter circuit 30 counts the number of photons detected by the optical receiving circuit. The counter circuit 30 enables the storage unit 31 to store the number of photon counts and information related to the address of the optical receiving circuit. The control circuit 16 is able to access the storage unit 31 and refer to the number of photons of the optical receiving circuit (pixel) at each address.

[0150] Fig.26 The table in shows an example of the number of photon counts in a plurality of light receiving circuits (pixels) within the SPAD array 11. For example, the control circuit 16 may obtain photon count data during a predetermined period of time by enabling all or at least one pixel within the SPAD array 11.

[0151] like Fig.25 In the example in , a counter circuit 30 may be prepared for each light receiving circuit. However, the counter circuit may be shared by a plurality of light receiving circuits. For example, a single counter circuit may count the number of photons detected in a plurality of light receiving circuits. In this case, the counter circuit may count the total number of photons detected in a plurality of light receiving circuits (pixels) to which the counter circuit is coupled. Alternatively, the counter circuit may count the number of photons detected in each light receiving circuit (pixel).

[0152] The register 17 of the control circuit 16 can be used as the above-mentioned storage unit 31. Alternatively, the storage unit 31 can be any other volatile memory, non-volatile memory, or storage device. Examples of non-volatile memories are NOR flash memory, NAND flash memory, resistance random access memory, or magnetoresistive random access memory. In addition, examples of volatile memories are SRAM or DRAM. Examples of storage devices are hard disk drives, magnetic tapes, or optical chips. However, the type of memory / storage device used in the storage unit 31 is not specified.

[0153] It should be noted that for ease of explanation, Fig.25 A part of the components of the light receiving device is omitted. Therefore, the light receiving device according to the present disclosure may further include Figure 2 , Fig.15 and Fig.18 Another component is shown by way of example in FIG.

[0154] Fig. 27 The flowchart of FIG. 1 shows an example of a macro pixel setting process. Fig. 27 The process is described in the flowchart of FIG.

[0155] The control circuit 16 first enables the pixels within the SPAD array 11 that are the targets of photon counting (step S101). In step S101, the control circuit 16 may enable all pixels within the SPAD array 11 or a portion of the pixels within the SPAD array 11. For example, the control circuit 16 may enable pixels that have an optically unshielded upper surface and into which reflected light RL may be incident. However, the range of pixels to be enabled in step S101 is not limited. In the case where the macro pixel setting process is performed in multiple timing portions, the control circuit 16 may enable a portion of the divided area within the SPAD array 11.

[0156] The light receiving device then performs photon counting during a predetermined period of time and detects the position and range of the light spot (step S102). Photon counting is performed during a predetermined period of time and the photon counting data (e.g., Fig.26 ) is stored in the storage unit 31. The length of the period in which photon counting is to be performed is not specified. The control circuit 16 may determine in step S102 that the light spot is incident on a pixel whose photon count number exceeds the threshold value th. Fig.26 In the example of , 250 is used as the threshold value th. The threshold value th used by the control circuit 16 is not necessarily a fixed value.

[0157] For example, the control circuit 16 can adjust the threshold value th according to the number of counts in the photon count data so that consecutive pixels in the pixels in the SPAD array 11 can be selected as enabled pixels (macro pixels). It should be noted that it is assumed that pixels with a small number of counts mainly react to photons of background light (interference light).

[0158] Next, the control circuit 16 identifies the address of the pixel corresponding to the light spot (step S103). For example, the control circuit 16 may identify the address of the pixel whose count number exceeds the threshold value th. Fig.26 In the example in FIG. 1 , the control circuit 16 identifies the macropixel MP9 corresponding to the continuous pixel area in the SPAD array 11 where the count number in step S103 exceeds the threshold value th.

[0159] Finally, the control circuit 16 enables the pixels corresponding to the light spots in the SPAD array 11 and disables the remaining pixels (step S104). Fig.26 In the example in FIG. 1 , the control circuit 16 may enable the pixel corresponding to the macro pixel MP9 and disable the remaining pixels. It should be noted that the control circuit 16 may select one of the predefined macro pixel shapes and enable the pixels corresponding to the shape according to the distribution of pixels whose count number exceeds the threshold value th.

[0160] The control circuit 16 may enable / disable pixels within the SPAD array 11 by, for example, the method described in the above description of the receiving circuits 20 and 20A. However, pixels may be enabled / disabled by any other method. The light receiving device may be configured to enable / disable individual pixels within the SPAD array 11. Alternatively, the light receiving device may enable / disable pixels within the SPAD array 11 in groups.

[0161] Fig.26 A portion of a pixel within the SPAD array 11 is shown. Fig.26 Therefore, it is shown that there are no macro pixels other than the macro pixel MP9. However, it is needless to say that a plurality of macro pixels can be set simultaneously in the light receiving device according to the present disclosure. In the area near the periphery of the SPAD array 11, it is possible to perform Fig. 27 to set the macropixel whose position, size or shape corresponds to the spot aberration.

[0162] For example, Fig. 27The process of the flowchart may be performed (1) during adjustment before shipment of the light receiving device, (2) when the light receiving device is turned on, (3) when a user provides a test command during operation of the light receiving device, or (4) at a predetermined cycle during operation of the light receiving device. The pixels and light spots enabled within the SPAD array 11 may be misaligned due to factors such as component changes due to vibration, shock, or temperature, or changes in components over time after product shipment. Therefore, by performing the above-mentioned timings (2) to (4) Fig. 27 The processing of the flowchart can prevent the ranging performance from being degraded.

[0163] Here, the configuration of the light receiving device according to the present disclosure will be organized.

[0164] The optical receiving device according to the present disclosure may include an optical detector array in which a plurality of the above optical receiving circuits are arranged and a control circuit configured to change the state of a latch circuit in at least one of the optical receiving circuits within the optical detector array. The above SPAD array 11 is an example of an optical detector array.

[0165] In addition, the optical receiving device according to the present disclosure may further include a counter circuit configured to count the number of pulses output from at least one of the optical receiving circuits within the optical detector array. The control circuit may be configured to change the state of the latch circuit based on the number of pulses. In addition, the control circuit may be configured to set the latch circuit of the optical receiving circuit in which the counted number of pulses exceeds the threshold value in a selected state (enabled), and to set the latch circuit of the optical receiving circuit in which the counted number of pulses is equal to or less than the threshold value in a non-selected state (disabled).

[0166] In addition, the optical receiving device according to the present disclosure may further include a TDC. A plurality of optical receiving circuits may be connected to each other via a common lead and coupled to the TDC via a hard-wired OR. In addition, a plurality of optical receiving circuits that are not adjacent to each other in the optical detector array may be connected via a common lead. The above-mentioned signal line PXOUT is an example of a lead.

[0167] The light receiving device according to the present disclosure may include a photodetector array, a counter circuit, and a control circuit. The photodetector array may include a plurality of pixels, each pixel being configured to output a pulse in response to a reaction of the photodetector with a photon. The counter circuit is configured to count pulses output from at least one of the pixels of the photodetector array. The control circuit is configured to select pixels to be enabled and pixels to be disabled from the photodetector array based on the number of pulse counts counted by the counter circuit.

[0168] Additionally, the control circuit may be configured to enable one of the pixels within the photodetector array whose counted number of pulses exceeds a threshold and disable one of the pixels whose counted number of pulses is equal to or less than the threshold.

[0169] In addition, the light receiving device according to the present disclosure may further include a TDC. A plurality of pixels may be connected to each other via a common lead and coupled to the TDC via a hard-wired OR. A plurality of pixels that are not adjacent to each other in the photodetector array may be connected via a common lead. The TDC may be coupled to a plurality of pixels in an even column or a plurality of pixels in an odd column. A plurality of leads may be coupled to the TDC via an OR gate.

[0170] In addition, the light receiving device according to the present disclosure may further include a one-shot circuit coupled between pixels or between an input terminal of an OR gate and a pixel. The one-shot circuit may include an AND gate and an inverter chain coupled to one input terminal of the AND gate.

[0171] The photodetectors of the photodetector array may include avalanche photodiodes. Furthermore, the avalanche photodiodes may be configured for operation in Geiger mode, and the pixels in the photodetector array may each include a quenching circuit.

[0172] When performing ranging with a large field of view (FOV), the imaging performance near the periphery of the field of view deteriorates due to limitations on the optical system. As the spot diameter of the reflected light increases, this reduces the amount of light incident near the periphery of the photodetector array compared to the central portion of the photodetector array. In the case where the effective pixels or enabled pixels in the photodetector array are fixed to pixels at predetermined positions and areas within the photodetector array, ranging performance including ranging accuracy and maximum ranging distance is reduced.

[0173] In the light receiving device according to the present disclosure, a light receiving circuit capable of performing activation / deactivation provides pixels in a light detector array. This makes it possible to set a macro pixel by enabling one of these pixels according to the position, shape and size of the light spot corresponding to the incident reflected light. This makes it possible to minimize the influence of background light (interference light) to increase the brightness dynamic range and the possible distance of ranging. In other words, by using the light receiving device and the light receiving circuit according to the present disclosure, long-distance ranging can be performed with a large field of view (FOV).

[0174] In addition, in the light receiving device according to the present disclosure, a plurality of pixels (light receiving circuits) can share a TDC downstream thereof. For example, by using pixels that are not adjacent to each other and sharing a TDC downstream thereof, even if the number of pixels included in a macro pixel increases, the necessary number of TDCs can be reduced. This makes it possible to maintain ranging performance and reduce costs such as circuit size.

[0175] The technology according to the present disclosure (the present technology) can be applied to various products. For example, the technology according to the present disclosure can be implemented as a device installed in any type of mobile body, such as a car, an electric vehicle, a hybrid electric vehicle, a motorcycle, a bicycle, personal mobility, an airplane, a drone, a ship, a robot, etc.

[0176] Fig.28 : is a block diagram showing an example of a schematic configuration of a vehicle control system as an example of a moving body control system to which the technology according to the embodiment of the present disclosure can be applied.

[0177] The vehicle control system 12000 includes a plurality of electronic control units connected to each other via a communication network 12001. Fig.28 In the example shown, the vehicle control system 12000 includes a drive system control unit 12010, a body system control unit 12020, an external information detection unit 12030, an internal information detection unit 12040, and an integrated control unit 12050. In addition, as a functional structure of the integrated control unit 12050, a microcomputer 12051, a sound / image output unit 12052, and an in-vehicle network interface (I / F) 12053 are exemplified.

[0178] The drive system control unit 12010 controls the operation of devices related to the drive system of the vehicle according to various programs. For example, the drive system control unit 12010 serves as a control device for a drive force generating device (such as an internal combustion engine, a drive motor, etc.) for generating a drive force of the vehicle, a drive force transmission mechanism for transmitting the drive force to the wheels, a steering mechanism for adjusting the steering angle of the vehicle, a braking device for generating a braking force of the vehicle, and the like.

[0179] The body system control unit 12020 controls the operation of various devices provided on the vehicle body according to various programs. For example, the body system control unit 12020 functions as a control device for a keyless entry system, a smart key system, a power window device, or various lights such as a headlight, a backup light, a brake light, a turn signal light, a fog light, etc. In this case, a radio wave or a signal of various switches transmitted from a mobile device as a substitute for a key may be input to the body system control unit 12020. The body system control unit 12020 receives these input radio waves or signals, and controls a door lock device, a power window device, lights, etc. of the vehicle.

[0180] The vehicle exterior information detection unit 12030 detects information outside the vehicle including the vehicle control system 12000. For example, the vehicle exterior information detection unit 12030 is connected to an imaging unit 12031. The vehicle exterior information detection unit 12030 causes the imaging unit 12031 to capture an image outside the vehicle and receive the captured image. In addition, the vehicle exterior information detection unit 12030 may also detect objects such as people, vehicles, obstacles, signs, text on the road surface, etc., or detect their distances based on the received images.

[0181] The imaging unit 12031 is an optical sensor that receives light and outputs an electrical signal corresponding to the amount of light received. The imaging unit 12031 may output the electrical signal as an image, or may output the electrical signal as information about the measured distance. In addition, the light received by the imaging unit 12031 may be visible light, or may be invisible light such as infrared rays.

[0182] The in-vehicle information detection unit 12040 detects information about the interior of the vehicle. The in-vehicle information detection unit 12040 is connected to, for example, a driver state detection unit 12041 that detects the state of the driver. The driver state detection unit 12041 includes, for example, a camera that photographs the driver. Based on the detection information input from the driver state detection unit 12041, the in-vehicle information detection unit 12040 can calculate the driver's fatigue or the driver's concentration, or can determine whether the driver is dozing off.

[0183] The microcomputer 12051 can calculate a control target value for a driving force generating device, a steering mechanism, or a braking device based on information about the interior or exterior of the vehicle obtained by the exterior information detecting unit 12030 or the interior information detecting unit 12040, and output a control command to the driving system control unit 12010. For example, the microcomputer 12051 can perform cooperative control aimed at realizing functions of an advanced driver assistance system (ADAS), including collision prevention or shock absorption for the vehicle, follow-up driving based on a following distance, maintaining the vehicle speed for driving, warning of vehicle collision, warning of vehicle deviation from a lane, and the like.

[0184] In addition, the microcomputer 12051 can perform collaborative control for automatic driving by controlling the driving force generating device, steering mechanism, braking device, etc. based on information about outside or inside the vehicle obtained by the outside information detection unit 12030 or the inside information detection unit 12040, thereby enabling the vehicle to drive autonomously without relying on the driver's operation, etc.

[0185] In addition, the microcomputer 12051 can output a control command to the body system control unit 12020 based on the information about the outside of the vehicle obtained by the vehicle outside information detection unit 12030. For example, the microcomputer 12051 can perform cooperative control aimed at preventing glare by controlling the headlights to change from high beam to low beam according to the position of the front vehicle or the oncoming vehicle detected by the vehicle outside information detection unit 12030.

[0186] The sound / image output unit 12052 sends an output signal of at least one of sound and image to an output device, which can visually or auditorily notify the occupants of the vehicle or the outside of the vehicle of information. Fig.28 In the example of FIG. 1 , an audio speaker 12061, a display portion 12062, and a dashboard 12063 are shown as output devices. For example, the display portion 12062 may include at least one of an on-board display and a head-up display.

[0187] Fig.29 is a diagram showing an example of the installation position of the imaging unit 12031.

[0188] exist Fig.29 In the figure, vehicle 12100 includes imaging units 12101, 12102, 12103, 12104 and 12105 as imaging unit 12031.

[0189] The imaging units 12101, 12102, 12103, 12104 and 12105 are, for example, disposed at positions on the front nose, side mirrors, rear bumper and rear door of the vehicle 12100 and at positions on the upper portion of the windshield inside the vehicle. The imaging unit 12101 disposed at the front nose and the imaging unit 12105 disposed at the upper portion of the windshield inside the vehicle mainly obtain images in front of the vehicle 12100. The imaging units 12102 and 12103 disposed to the side mirrors mainly obtain images on the sides of the vehicle 12100. The imaging unit 12104 disposed to the rear bumper or rear door mainly obtains images of the rear portion of the vehicle 12100. The front images obtained by the imaging units 12101 and 12105 are mainly used to detect front vehicles, pedestrians, obstacles, signals, traffic signs, lanes, etc.

[0190] By the way, Fig.29An example of the shooting range of the imaging units 12101 to 12104 is described. The imaging range 12111 represents the imaging range of the imaging unit 12101 set to the front nose. The imaging ranges 12112 and 12113 respectively represent the imaging ranges of the imaging units 12102 and 12103 set to the side mirrors. The imaging range 12114 represents the imaging range of the imaging unit 12104 set to the rear bumper or the rear door. For example, a bird's-eye view image of the vehicle 12100 viewed from above is obtained by superimposing the image data imaged by the imaging units 12101 to 12104.

[0191] At least one of the imaging units 12101 to 12104 may have a function of obtaining distance information. For example, at least one of the imaging units 12101 to 12104 may be a stereo camera composed of a plurality of imaging elements, or may be an imaging element having pixels for phase difference detection.

[0192] For example, the microcomputer 12051 can determine the distance to each three-dimensional object within the imaging ranges 12111 to 12114 and the time change of the distance (relative speed relative to the vehicle 12100) based on the distance information obtained from the imaging units 12101 to 12104, and thereby extract the nearest three-dimensional object as the leading vehicle, which specifically exists on the driving path of the vehicle 12100 and travels at a predetermined speed (e.g., equal to or greater than 0 km / hour) in the substantially same direction as the vehicle 12100. In addition, the microcomputer 12051 can pre-set the following distance maintained with the leading vehicle, and perform automatic braking control (including follow-up stop control), automatic acceleration control (including follow-up start control), etc. Therefore, cooperative control for automatic driving can be performed, which allows the vehicle to travel autonomously without relying on the driver's operation, etc.

[0193] For example, the microcomputer 12051 can classify the three-dimensional object data related to the three-dimensional object into three-dimensional object data of a two-wheeled vehicle, a standard vehicle, a large vehicle, a pedestrian, a utility pole, and other three-dimensional objects based on the distance information obtained from the imaging units 12101 to 12104, extract the classified three-dimensional object data, and use the extracted three-dimensional object data for automatic obstacle avoidance. For example, the microcomputer 12051 identifies obstacles around the vehicle 12100 as obstacles that can be visually recognized by the driver of the vehicle 12100 and obstacles that are difficult for the driver of the vehicle 12100 to visually recognize. Then, the microcomputer 12051 determines a collision risk indicating the risk of collision with each obstacle. In the case where the collision risk is equal to or higher than the set value and therefore there is a possibility of collision, the microcomputer 12051 outputs a warning to the driver via the audio speaker 12061 or the display unit 12062, and performs forced deceleration or evasive steering via the drive system control unit 12010. The microcomputer 12051 can thereby assist driving to avoid collisions.

[0194] At least one of the imaging units 12101 to 12104 may be an infrared camera that detects infrared rays. The microcomputer 12051 may, for example, identify a pedestrian by determining whether a pedestrian exists in the captured images of the imaging units 12101 to 12104. This identification of a pedestrian is performed, for example, by a process of extracting feature points in the imaged images of the imaging units 12101 to 12104 as infrared cameras and by performing pattern matching processing on a series of feature points representing the outline of an object to determine whether it is a pedestrian. When the microcomputer 12051 determines that a pedestrian exists in the imaged images of the imaging units 12101 to 12104 and thus identifies the pedestrian, the sound / image output unit 12052 controls the display unit 12062 so that a square outline for emphasis is displayed as superimposed on the identified pedestrian. The sound / image output unit 12052 may also control the display unit 12062 so that an icon representing a pedestrian or the like is displayed at a desired position.

[0195] In the above, an example of a vehicle control system to which the technology according to the present disclosure is applicable is described. The technology according to the present disclosure can be applied to the components explained above, for example, the imaging unit 12031. Specifically, the imaging unit 12031 can be equipped with the above-mentioned light receiving circuit, light receiving device or distance measuring device. By applying the technology according to the present disclosure to the imaging unit 12031, accurate distance information can be obtained over a large FOV (field of view) and the function and safety of the vehicle 12100 can be enhanced.

[0196] It should be noted that the present technology can take the following configurations.

[0197] (1) A light receiving device comprising:

[0198] a photodetector array comprising a plurality of pixels, each pixel configured to output a pulse in response to a reaction of the photodetector to a photon;

[0199] a counter circuit configured to count pulses output from at least one of the pixels of the photodetector array; and

[0200] A control circuit is configured to select pixels to be enabled among the plurality of pixels and pixels to be disabled among the plurality of pixels from the photodetector array based on the counted number of pulses from the counter circuit.

[0201] (2) The light receiving device according to (1), wherein:

[0202] The control circuit is configured to enable pixels in the photodetector array whose count number of pulses exceeds a threshold value, and disable pixels whose count number of pulses is equal to or less than the threshold value.

[0203] (3) The optical receiving device according to (1) or (2), further comprising:

[0204] TDC, where

[0205] Multiple pixels are connected to each other through a common lead and coupled to the TDC via a hard-line OR.

[0206] (4) The light receiving device according to (3), wherein

[0207] A plurality of pixels that are not adjacent to each other in the photodetector array are connected by a common lead.

[0208] (5) The light receiving device according to (3) or (4), wherein:

[0209] The TDC is coupled to a plurality of pixels in even columns or a plurality of pixels in odd columns.

[0210] (6) The light receiving device according to any one of (3) to (5), wherein

[0211] Multiple leads are connected to the TDC through an OR gate.

[0212] (7) The optical receiving device according to (6), further comprising:

[0213] The one-shot circuit is at least coupled between pixels or between the input terminal of the OR gate and the pixel.

[0214] (8) The light receiving device according to (7), wherein:

[0215] The one-shot circuit includes an AND gate and an inverter chain coupled to one input terminal of the AND gate.

[0216] (9) The light receiving device according to any one of (1) to (8), wherein

[0217] The photodetectors of the photodetector array include avalanche photodiodes.

[0218] (10) The light receiving device according to (9), wherein:

[0219] The avalanche photodiode is configured to operate in Geiger mode, and the pixels in the photodetector array each include a quenching circuit.

[0220] (11) An optical receiving circuit comprising:

[0221] Light detector;

[0222] A load element coupled between the photodetector and the first reference potential;

[0223] a latch circuit configured to output a first voltage corresponding to the state; and

[0224] A first inverter is configured to turn on and invert and output the output voltage of the photodetector in response to a second voltage being applied to the control terminal, wherein

[0225] The second voltage applied to the control terminal is variable according to the first voltage.

[0226] (12) The optical receiving circuit according to (11), further comprising:

[0227] The AND gate has a first input terminal coupled to the output side of the latch circuit, a second input terminal coupled to the enable line, and an output terminal coupled to the control terminal of the first inverter.

[0228] (13) The optical receiving circuit according to (11), further comprising:

[0229] A NAND gate having a first input terminal coupled to the output side of the latch circuit and a second input terminal coupled to the enable line; and

[0230] The second inverter is coupled between the NAND gate and the control terminal.

[0231] (14) The optical receiving circuit according to (11), further comprising:

[0232] a NAND gate having a first input terminal coupled to the output side of the latch circuit and a second input terminal coupled to the enable line;

[0233] a first transistor of a first conductivity type, the first transistor being coupled between the first reference potential and the load element and being turned on in response to the output voltage of the NAND gate;

[0234] a second transistor of a second conductivity type, the second transistor being coupled between the output side of the photodetector and the second reference potential and being turned on in response to the output voltage of the NAND gate; and

[0235] The second inverter is coupled between the output terminal of the NAND gate and the control terminal of the first inverter.

[0236] (15) The optical receiving circuit according to any one of (11) to (14), wherein:

[0237] The photodetector includes an avalanche photodiode.

[0238] (16) A light receiving device comprising:

[0239] a photodetector array in which a plurality of light receiving circuits according to any one of (11) to (15) are arranged; and

[0240] The control circuit is configured to change a state of a latch circuit of at least one of the light receiving circuits within the light detector array.

[0241] (17) The optical receiving device according to (16), further comprising:

[0242] a counter circuit configured to count the number of pulses output from at least one of the light receiving circuits within the light detector array, wherein

[0243] The control circuit is configured to change a state of the latch circuit based on the number of pulses.

[0244] (18) The light receiving device according to (17), wherein:

[0245] The control circuit is configured to set the latch circuit of one of the light receiving circuits whose count number of pulses exceeds a threshold value in a selected state, and to set the latch circuit of one of the light receiving circuits whose count number of pulses is equal to or less than the threshold value in a non-selected state.

[0246] (19) The light receiving device according to any one of (16) to (18), further comprising:

[0247] TDC, where

[0248] A plurality of light receiving circuits are connected to each other through a common lead, and are coupled to the TDC via a hard-wired OR.

[0249] (20) The light receiving device according to (19), wherein:

[0250] A plurality of light receiving circuits that are not adjacent to each other in the photodetector array are connected via a common lead line.

[0251] (21) A distance measuring device comprising:

[0252] An array light source, comprising a plurality of light emitting elements arranged in an array;

[0253] a photodetector array comprising a plurality of pixels, each pixel configured to output a pulse in response to a reaction of the photodetector to a photon;

[0254] a control circuit configured to enable or disable output of a pulse of at least one of the pixels of the photodetector array; and

[0255] a counter circuit configured to count pulses output from at least one of the pixels of the photodetector array, wherein

[0256] The control circuit is configured to determine pixels to be enabled and pixels to be disabled in the photodetector array based on a counted number of pulses from the counter circuit.

[0257] One aspect of the present disclosure is not limited to the above-mentioned individual embodiments, which include various modifications that can be thought of by those skilled in the art, and the effects of the present disclosure are not limited to the above-mentioned contents. In other words, various additions, changes and partial deletions are acceptable without departing from the conceptual concept and scope of the present disclosure obtained from the contents defined in the claims and their equivalents.

[0258] [Reference Numbers List]

[0259] PD: Photodiode

[0260] 1: Distance measuring device

[0261] 2: Light source device

[0262] 3: Collimating lens

[0263] 4: Focusing lens

[0264] 5: Bandpass filter

[0265] 10, 10A: Light receiving device

[0266] 11: SPAD array (photodetector array)

[0267] 11P: Pixel

[0268] 12: Readout circuit

[0269] 13A: TDC

[0270] 16: Control circuit

[0271] 20, 20A: Optical receiving circuit

[0272] 21: Latch circuit

[0273] 22: NAND gate

[0274] 23, 24: Inverter

[0275] 30: Counter circuit

[0276] 31: Storage

Claims

1. A light receiving device, comprising: a photodetector array comprising a plurality of pixels, each pixel configured to output a pulse in response to a reaction of the photodetector to a photon; a counter circuit configured to count said pulses output from at least one said pixel of said photodetector array; as well as a control circuit configured to select pixels of the plurality of pixels to be enabled and pixels of the plurality of pixels to be disabled from the photodetector array based on the counted number of the pulses from the counter circuit, The control circuit is configured to enable pixels in the photodetector array whose count number of pulses exceeds a threshold, and disable pixels in the photodetector array whose count number of pulses is equal to or less than the threshold.

2. The optical receiving device according to claim 1, further comprising: TDC, where A plurality of the pixels are connected to each other through a common lead and are coupled to the TDC via a hard-line OR.

3. The light receiving device according to claim 2, wherein: A plurality of the pixels that are not adjacent to each other in the photodetector array are connected by the common lead line.

4. The light receiving device according to claim 2, wherein: The TDC is coupled to a plurality of the pixels in even columns or a plurality of the pixels in odd columns.

5. The light receiving device according to claim 2, wherein: The plurality of common leads are coupled to the TDC through an OR gate.

6. The optical receiving device according to claim 5, further comprising: The one-shot circuit is at least coupled between the pixels or between the input terminal of the OR gate and the pixel.

7. The light receiving device according to claim 6, wherein: The one-shot circuit includes an AND gate and an inverter chain coupled to one input terminal of the AND gate.

8. The light receiving device according to claim 1, wherein The photodetectors of the photodetector array include avalanche photodiodes.

9. The light receiving device according to claim 8, wherein: The avalanche photodiode is configured to operate in Geiger mode, and the pixels in the photodetector array each include a quenching circuit.

Images