A Doherty power amplifier with optimized matching

Abstract

The present invention provides a Doherty power amplifier with optimized matching, including an input matching circuit, a first-stage driver amplifier, an interstage matching circuit I, a second-stage driver amplifier, an interstage matching circuit II, a power divider, an interstage matching circuit III, a main PA, an on-chip DC blocking capacitor, a 1 / 4 wavelength transmission line I, an auxiliary PA, an output matching network, an Offsetline, and a 1 / 4 wavelength transmission line II. The flow direction of the radio frequency signal is that the leftmost radio frequency signal input (RFin) is amplified by the input matching circuit, the first-stage driver amplifier (DA1) and the interstage matching circuit I, and then amplified by the second-stage driver amplifier (DA2) and the interstage matching circuit II. The present invention optimizes the output matching network of the main PA, so that the main PA obtains the optimal load impedance in both power back-off and saturated output states, thereby improving the output power and efficiency of the PA in both states.

Description

Technical Field

[0001] The invention belongs to the field of electronic information technology, and in particular relates to a matching-optimized Doherty power amplifier. Background Art

[0002] The traditional Doherty power amplifier consists of two main and auxiliary power amplifiers. The signal is distributed to the main and auxiliary amplifiers through a power divider, and the power is finally synthesized after amplification. Active load modulation is achieved through the output matching network and transmission line, so as to achieve a higher PAE even when the power is backed off. However, since the impedance at both ends of the traditional LC matching network does not change proportionally, the main PA cannot obtain the corresponding proportional load impedance value in the saturated output state and the power back-off state at the same time, resulting in the main PA can only obtain the optimal load impedance in one of the two states.

[0003] ① If the main PA is matched in the power fallback state, the saturated output power and the PAE at the saturated output power point will be reduced;

[0004] ② If the matching is in the saturated output state, the power back-off point PAE will be reduced.

[0005] The matching optimization structure proposed in the present invention can enable the main PA to obtain the optimal load impedance in both states, while eliminating the deterioration of the output power and efficiency caused by the insertion loss of the matching network, thereby improving the output power and efficiency of the main PA in both states.

[0006] In the RF wireless transmission front-end system, the power amplifier, as the core module, directly determines the gain, linearity and output power of the entire system, and has always been a design difficulty in the RF wireless communication front-end system. The development of modern communication systems is towards large bandwidth, high data transmission rate and low power consumption. Improving the utilization of frequency bands has always been the focus and difficulty of communication system research. In order to have a larger channel capacity and higher data transmission rate within limited frequency resources, the current communication system adopts more complex modulation methods, such as multi-carrier technology and orthogonal frequency division multiple access technology. These modulated signals are non-constant envelope modulation signals with a high peak-to-average ratio, which puts forward very high requirements on the linearity of the RF front-end power amplifier. The RF power amplifier generally works at the mean power, so the power amplifier generally works at a power back-off of 6-10dB, resulting in extremely low efficiency of the power amplifier and serious waste of energy. The Doherty structure can achieve high efficiency even when the power is backed off through active load modulation.

[0007] The traditional Doherty structure is as follows Figure 1As shown, the signal is distributed to the main and auxiliary amplifiers through the power divider, and then passes through the input offset line, input matching, PA, output matching and transmission line, and finally the power is synthesized and output, and active load modulation is achieved through a quarter-wavelength transmission line, so as to achieve a higher PAE even when the power is backed off. However, the output matching behind the main path is generally achieved through an LC network, and the impedance at both ends of the LC matching network does not change proportionally, so the main PA cannot obtain the corresponding proportional load impedance value in the saturated output state and the power back-off state at the same time, resulting in the main PA can only obtain the optimal load impedance in one of the two states, which will deteriorate the output power and efficiency of the Doherty PA.

[0008] In the above-mentioned traditional Doherty structure, there are two typical working states: power back-off state and saturated output state.

[0009] (1) Power fallback state: Since the auxiliary PA is generally biased in Class C, the auxiliary PA is not turned on when the input power is relatively small. At this time, Zp approaches infinity, and Zm3 = Zload. According to the impedance transformation principle of a quarter-wavelength transmission line, Zm2 = Z0 2 / Zm3, transform Zm2 to Zm1 through the output matching network, at this time Zm1 is the load impedance value seen by the transistor.

[0010] (2) Saturated output state: When the input power increases to the point where the auxiliary PA is turned on, the auxiliary output current i p Will produce impedance traction on Zm3, assuming i p =i m , then Zm3=2*Zload, that is, Zm3 becomes twice of the original value. According to the impedance transformation principle of quarter-wavelength transmission line, Zm2 becomes 1 / 2 of the original value. The output matching network converts Zm2 at this time into Zm1. Zm1 is the load impedance value seen by the transistor in the saturated output state.

[0011] The traditional symmetrical Doherty structure generally designs the load impedance seen by the tube to be 2*Zopt during power back-off, so that the voltage swing of the main PA reaches the full swing in advance, resulting in the peak PAE during power back-off and improving the efficiency during power back-off; the load impedance seen by the tube is designed to be the optimal load impedance Zopt during saturated output, in order to achieve higher saturated output power and efficiency. According to the above analysis, the traditional Doherty structure can change Zm2 to 1 / 2 of the original value when in the saturated output state, but because the output matching network cannot proportionally transform the impedances at both ends, that is, when the impedance Zm2 at the right end of the matching network changes to 1 / 2 of the original value, it cannot be guaranteed that the impedance Zm1 at the left end also changes to 1 / 2 of the original value, that is, it cannot be guaranteed that the load impedance seen by the tube changes to the optimal load impedance Zopt during saturated output, resulting in the aforementioned problem ①: the saturated output power of the PA and the PAE at the saturated output power point are reduced.

[0012] Similarly, if the load impedance seen by the tube during saturation output is designed to be 1 / 2*Zopt, it should be Zopt in the power back-off state in theory, in order to achieve high power back-off efficiency. However, when Zm2 becomes twice as large as before, it cannot be guaranteed that Zm1 becomes twice as large as before, that is, it cannot be guaranteed that the load impedance seen by the tube becomes the optimal load impedance Zopt during power back-off, resulting in the aforementioned problem ②: the power back-off point PAE of the PA decreases. Summary of the invention

[0013] The purpose of the present invention is to solve the defects of the above-mentioned prior art and provide a Doherty power amplifier with optimized matching.

[0014] The matching optimization structure proposed in the present invention can enable the main PA to obtain the optimal load impedance in both states, while eliminating the deterioration of the output power and efficiency caused by the insertion loss of the matching network, thereby improving the output power and efficiency of the main PA in both states.

[0015] The present invention adopts the following technical solution:

[0016] A matching optimized Doherty power amplifier comprises an input matching circuit, a first-stage driving amplifier, an inter-stage matching circuit I, a second-stage driving amplifier, an inter-stage matching circuit II, a power divider, an inter-stage matching circuit III, a main PA, an on-chip DC blocking capacitor, a 1 / 4 wavelength transmission line I, an auxiliary PA, an output matching network, an offset line, and a 1 / 4 wavelength transmission line II;

[0017] The RF signal flow is that the RF signal input (RFin) on the far left is amplified by the input matching circuit, the first-stage driver amplifier (DA1) and the inter-stage matching circuit I, and then amplified by the second-stage driver amplifier (DA2) and the inter-stage matching circuit II.

[0018] The third stage is the Doherty power stage. The signal is divided into two paths through the power divider and enters the main path and the auxiliary path respectively through the inter-stage matching circuit II. After the signal passes through the main path PA and the on-chip DC blocking capacitor, it directly jumps to the 1 / 4 wavelength transmission line outside the chip through the gold wire. After the signal through the auxiliary path PA passes through the output matching network and the offset line, it is synthesized with the signal output by the main path PA. Finally, after passing through the last section of the 1 / 4 wavelength transmission line II, the amplified signal is output (RFout).

[0019] 1 / 4 wavelength transmission line I, 1 / 4 wavelength transmission line II, and offset line are all implemented on PCB.

[0020] VCC is connected to the on-chip components through a choke inductor, which is implemented using off-chip discrete components. It is used to isolate AC signals from power supply.

[0021] Both the driver stage and the Doherty main circuit bias adopt adaptive bias circuits, and the Doherty auxiliary circuit is directly biased through an off-chip pad.

[0022] Both VCC and RF output pads have ESD circuits for electrostatic protection.

[0023] Beneficial effects of the present invention:

[0024] (1) Compared with the traditional Doherty structure, the present invention optimizes the output matching circuit and 1 / 4 wavelength transmission line behind the Doherty main path into a single 1 / 4 wavelength transmission line, so that the main path PA obtains the optimal load impedance in both power back-off and saturated output states, thereby improving the output power and efficiency of the PA in both states.

[0025] (2) The present invention eliminates the degradation of output power and efficiency caused by insertion loss of the matching network, thereby improving the output power and efficiency of the PA.

[0026] (3) The present invention optimizes the output matching network of the main PA, simplifies the circuit complexity, and reduces the layout area. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Figure 1 This is the traditional Doherty structure diagram;

[0028] Figure 2 The Doherty structure block diagram of the present invention is compared with the traditional Doherty structure block diagram;

[0029] Figure 3 The Doherty PA with matching optimization proposed by the present invention;

[0030] FIG4(a), FIG4(b), and FIG4(c) are diagrams of adaptive bias circuits;

[0031] Figure 5 The curve of load impedance changing with output power is shown for the main transistor;

[0032] Figure 6 for Figure 5 At this time, the curve of the overall PAE of the circuit changes with the output power.

[0033] In the figure: 1-input matching circuit, 2-first stage driver amplifier, 3-inter-stage matching circuit I, 4-second stage driver amplifier, 5-inter-stage matching circuit II, 6-power divider, 7-inter-stage matching circuit III, 8-main line PA, 9-on-chip DC blocking capacitor, 10-1 / 4 wavelength transmission line I, 11-auxiliary line PA, 12-output matching network, 13-Offset line, 14-1 / 4 wavelength transmission line II, 15-choke inductor. DETAILED DESCRIPTION

[0034] In order to make the purpose, technical solution and advantages of the present invention clearer, the technical solution of the present invention is described clearly and completely below. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0035] PA: Power Amplifier

[0036] Doherty power amplifier: an amplifier structure proposed by Doherty.WH to improve power back-off efficiency

[0037] PAE: Power Added Efficiency

[0038] DA: driver amplifier

[0039] ESD: Electrostatic protection circuit. The purpose of adding an ESD circuit to the chip pad is to protect the transistor from being broken down when subjected to static electricity.

[0040] Die: Chip

[0041] The matching optimization mechanism proposed in the present invention can enable the main PA to obtain the optimal load impedance in both states, while eliminating the deterioration of the output power and efficiency caused by the insertion loss of the matching network, thereby improving the output power and efficiency of the main PA in both states.

[0042] like Figure 2As shown, the difference between the present invention and the traditional Doherty structure is that the output matching circuit and the 1 / 4 wavelength transmission line behind the Doherty main path are replaced by a single 1 / 4 wavelength transmission line. At this time, Zm3 is directly converted into the tube impedance Zm1 through the 1 / 4 wavelength transmission line, and there is no need to pass through the output matching network to change from Zm2 to Zm1. Due to the inverse proportional relationship between the impedances at both ends of the 1 / 4 wavelength transmission line, the main path PA can obtain the optimal load impedance in both states, and at the same time eliminate the deterioration of the output power and efficiency caused by the insertion loss of the matching network, thereby improving the output power and efficiency of the main path PA in both states.

[0043] like Figure 3 As shown, a matching optimized Doherty power amplifier includes an input matching circuit 1, a first-stage driver amplifier 2, an inter-stage matching circuit I3, a second-stage driver amplifier 4, an inter-stage matching circuit II5, a power divider 6, an inter-stage matching circuit III7, a main path PA8, an on-chip DC blocking capacitor 9, a 1 / 4 wavelength transmission line I10, an auxiliary path PA11, an output matching network 12, an offset line 13, and a 1 / 4 wavelength transmission line II14;

[0044] The RF signal flow direction is that the RF signal input (RFin) on the far left is amplified by the input matching circuit 1, the first-stage driver amplifier (DA1) 2 and the inter-stage matching circuit Ⅰ3, and then amplified by the second-stage driver amplifier (DA2) 4 and the inter-stage matching circuit Ⅱ5.

[0045] The third stage is the Doherty power stage. The signal is divided into two paths through the power divider 6 and enters the main path and the auxiliary path respectively through the inter-stage matching circuit Ⅱ5. After the signal passes through the main path PA8 and the on-chip DC blocking capacitor 9, it directly jumps to the 1 / 4 wavelength transmission line 10 outside the chip through the gold wire. The signal through the auxiliary path PA passes through the output matching network and offsetline13, and is synthesized with the signal output by the main path PA8. Finally, after passing through the last section of the 1 / 4 wavelength transmission line Ⅱ14, the amplified signal is output (RFout).

[0046] The present invention is composed of a three-stage amplifier circuit. The first two stages are driving stages, both of which are traditional PAs biased in class AB. The third stage adopts a two-way asymmetric Doherty structure. The output of the main transistor directly jumps to a quarter-wavelength transmission line outside the chip after passing through a DC blocking capacitor. The 1 / 4 wavelength transmission line and the offset line are both implemented on the PCB. The choke inductor is implemented using off-chip discrete components. The driving stage and the Doherty main bias both use an adaptive bias circuit, such as Figure 4(a)-Figure 4(c) As shown, the Doherty auxiliary circuit is biased directly from outside the chip, and ESD circuits are added to the VCC and RF output pads for electrostatic protection.

[0047] Figure 6 As shown, it can be seen that due to Figure 5 The desired transformation of the main line impedance from the back-off state to the saturation state is realized, so that the PA has a PAE peak in both the power back-off state and the saturated output state, and can maintain a high PAE during power back-off and saturated output.

[0048] Compared with the traditional Doherty structure, the output matching circuit and 1 / 4 wavelength transmission line behind the Doherty main path are replaced by a single 1 / 4 wavelength transmission line. The output of the main path transistor directly jumps to the quarter wavelength transmission line outside the chip after passing through a DC blocking capacitor. Since the impedance at both ends of the quarter wavelength transmission line can achieve a proportional change relationship, the main path PA can obtain the optimal load impedance in both states, and at the same time eliminate the deterioration of the output power and efficiency caused by the insertion loss of the matching network, thereby improving the output power and efficiency of the main path PA in both states.

[0049] At the same time, the present invention optimizes the output matching network of the main PA, so that the main PA obtains the optimal load impedance in both power fallback and saturated output states, thereby improving the output power and efficiency of the PA in both states.

[0050] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A Doherty power amplifier with optimized matching, characterized in that: It includes input matching circuit, first-stage driver amplifier, inter-stage matching circuit I, second-stage driver amplifier, inter-stage matching circuit II, power divider, inter-stage matching circuit III, main PA, on-chip DC blocking capacitor, 1 / 4 wavelength transmission line I, auxiliary PA, output matching network, offset line, 1 / 4 wavelength transmission line II; The RF signal is inputted through the RF signal, and is amplified at the first stage through the input matching circuit, the first stage driving amplifier and the interstage matching circuit I, and then amplified at the second stage through the second stage driving amplifier and the interstage matching circuit II; The third stage is the Doherty power stage. The signal is divided into two paths through the power divider and enters the main path and the auxiliary path respectively through the inter-stage matching circuit II. After the signal passes through the main path PA and the on-chip DC blocking capacitor, it directly jumps to the 1 / 4 wavelength transmission line I outside the chip through the gold wire. After the signal through the auxiliary path PA passes through the output matching network and offsetline, it is synthesized with the signal output by the main path PA. Finally, after passing through the last section of the 1 / 4 wavelength transmission line II, the amplified signal is output; 1 / 4 wavelength transmission line I, 1 / 4 wavelength transmission line II, and offset line are all implemented on PCB.

2. The Doherty power amplifier with optimized matching according to claim 1, characterized in that: VCC is connected to the on-chip components through a choke inductor, and the choke inductor is implemented using off-chip discrete components.

3. The Doherty power amplifier with optimized matching according to claim 1, characterized in that: The first-stage driver amplifier, the second-stage driver amplifier, and the main PA bias all use adaptive bias circuits, and the auxiliary PA is directly biased through an off-chip pad.

4. The Doherty power amplifier with optimized matching according to claim 1, characterized in that: Both VCC and RF output pads have ESD circuits for electrostatic protection.

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