Motor command output module with error detection function and command error detection method thereof

Abstract

The present invention provides a motor command output module with a debugging function, which includes a central processing unit and a field programmable logic gate array unit. The central processing unit calculates a motor position command and a motor speed command according to a motion command. The field programmable logic gate array unit is electrically connected to the central processing unit and can generate a motor pulse command according to the motor position command and the motor speed command, and decode the motor pulse command into actual motor position data to compare with predetermined position data, and calculate whether the motor pulse command is correct through system time. The present invention also proposes a motor command debugging method.

Description

Technical Field

[0001] The present invention relates to a motor command output module with error detection function and a command error detection method thereof, and in particular to a motor command output module which generates motor pulse wave command by digital difference method and a command error detection method thereof. Background Art

[0002] Precision motor motion positioning control is a very basic and important core technology in many industrial machinery and industrial applications. The common open-loop motion control architecture can be composed of industrial computers, motion controllers, drivers, motors and machines. Industrial computers are used to issue different motion commands such as linear or circular motion to the motion controller. The motion controller calculates the position command and time period based on the motion command and constraints given by the computer, and then generates a series of uniform pulse commands to the driver through the digital differential analyzer (DDA) so that the motor drives the machine to move to a specific position at a specific time. The pulse command output provided by the DDA algorithm is a common motor control signal in industrial applications. The user can set the DDA cycle time by himself, and convert the motor speed into the number of pulses required in a DDA cycle. The motion controller can evenly send the planned pulse amount to the driver in this DDA cycle, so that the motor moves at a constant speed in each DDA cycle.

[0003] Inaccurate machine positioning is a common problem in this technical field. In addition to safety concerns, it also reduces the quality of machine processing and production efficiency. In the past, the common method of confirming positioning was to confirm that the machine was offset to the target position by receiving the actual position signal sent back by the driver, and then investigate possible causes from the perspective of mechanism design or control loop adjustment. However, since the problem of inaccurate machine positioning may be caused by incorrect commands given by the motion controller or by mechanism design or control loop adjustment, it takes more time to troubleshoot to confirm the real cause. Summary of the invention

[0004] Based on at least one embodiment of the present invention, the motor command output module with error detection function and the command error detection method thereof of the present invention can first confirm whether the motor command given by the motor command output module is wrong when positioning errors occur, thereby saving the troubleshooting time consumed when machine positioning inaccuracy occurs.

[0005] One aspect of the present invention is to provide a motor command output module with an error detection function. The motor command output module includes a central processing unit and a field programmable logic gate array unit. The central processing unit includes a motion control circuit and an error detection circuit electrically connected to the motion control circuit, and the motion control circuit is configured to calculate a motor position command and a motor speed command according to a motion command. The field programmable logic gate array unit is electrically connected to the central processing unit and includes a digital differential method pulse generation circuit, a pulse command decoding circuit, a first buffer circuit, a second buffer circuit, a high-speed comparison circuit, a latch circuit, a position command counting circuit, and a time counting circuit. The digital differential method pulse generation circuit is configured to generate a motor pulse command through a digital differential algorithm according to the motor position command and the motor speed command. The motion control circuit is also configured to convert the motor position command and the motor speed command into a pulse number corresponding to each differential cycle of the motor pulse command and give it to the error detection circuit. The error detection circuit is configured to calculate a plurality of predetermined passing position data according to the pulse number, and set the predetermined passing position data in sequence to the first buffer circuit. The pulse command decoding circuit is configured to decode the motor pulse command, and the position command counting circuit is configured to generate a plurality of motor current position data according to the decoded motor pulse command. The high-speed comparison circuit is configured to sequentially compare the predetermined passing position data with the motor current position data, and trigger the latch circuit when the motor current position data reaches the predetermined passing position. The time counting circuit is configured to continuously update the system time value. After being triggered, the latch circuit is configured to sequentially write the motor current position data reaching the predetermined passing position and the system time value of the time counting circuit into the second buffer circuit. The error detection circuit is also configured to sequentially read the motor current position data and the corresponding system time value in the second buffer circuit and calculate them, so as to determine whether the motor pulse command generated by the digital differential pulse generating circuit is correct.

[0006] Another aspect of the present invention is to provide a motor command error detection method, which is applied to the above motor command output module and comprises the following steps:

[0007] a. Providing a motion command to the motion control circuit, the motion control circuit calculates the motor position command and the motor speed command according to the motion command;

[0008] b. The digital differential pulse generating circuit generates a motor pulse command through a digital differential algorithm according to the motor position command and the motor speed command;

[0009] c. the motion control circuit converts the motor position command and the motor speed command into the number of pulses corresponding to each differential cycle of the motor pulse command and gives it to the error detection circuit;

[0010] d. The error detection circuit calculates a plurality of predetermined passing position data according to the pulse number, and sets the predetermined passing position data sequentially into the first buffer circuit;

[0011] e. The pulse command decoding circuit decodes the motor pulse command;

[0012] f. The position command counting circuit generates multiple motor current position data based on the decoded motor pulse command;

[0013] g. The high-speed comparison circuit sequentially compares the predetermined position data with the current position data of the motor, and when the current position data of the motor reaches the predetermined position, the latch circuit is triggered;

[0014] h. The latch circuit sequentially writes the current position data of the motor that has reached the predetermined position and the system time value of the time counting circuit into the second buffer circuit; and

[0015] i. The error detection circuit sequentially reads the current position data of the motor and the corresponding system time value in the second buffer circuit and calculates them to determine whether the motor pulse command generated by the digital differential pulse generating circuit is correct.

[0016] Optionally, the field programmable logic gate array unit further comprises an interrupt control circuit, and the error detection circuit is configured to cause the interrupt control circuit to issue an interrupt signal when the digital differential pulse generating circuit issues an incorrect motor pulse command.

[0017] Optionally, the motor command error detection method further comprises step j: when the motor pulse command digital differential method pulse generating circuit issues an incorrect motor pulse command, the error detection circuit instructs the interrupt control circuit to issue a command to issue an interrupt signal.

[0018] Optionally, the motor command output module with a debug function further includes a substrate, and the central processing unit and the field programmable logic gate array unit are integrated circuits respectively arranged on the substrate.

[0019] Optionally, the central processing unit is a digital signal processor.

[0020] Optionally, the substrate comprises an electrical connection portion.

[0021] Optionally, the first buffer circuit and the second buffer circuit are both first-in-first-out memories.

[0022] Optionally, the high-speed comparison circuit transmits an edge trigger signal to the latch circuit to trigger the latch circuit.

[0023] Thus, the motor command output module with error detection function and the command error detection method of the present invention can confirm whether the given motor pulse command is correct before confirming whether the machine position is correct, so as to save the troubleshooting time consumed when the machine positioning is inaccurate. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required to be used in the description of the embodiments will be briefly introduced below. Obviously, the drawings in the following description are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.

[0025] Figure 1 It is a block diagram of a motor command output module with a debugging function according to a specific embodiment of the present invention;

[0026] Figure 2 A block diagram of a motor command output module, a computer, a driver and a machine with a debugging function according to a specific embodiment of the present invention;

[0027] Figure 3 It is a flowchart of a motor command error detection method according to a specific embodiment of the present invention;

[0028] Figure 4 is a block diagram of an error detection circuit, a first buffer circuit and a high-speed comparison circuit according to a specific embodiment of the present invention;

[0029] Figure 5 It is a block diagram of a latch circuit, a second buffer circuit and an error detection circuit according to a specific embodiment of the present invention.

[0030] [Reference Signs]

[0031] 1 Motor command output module

[0032] 10 Central Processing Unit

[0033] 101 Motion Control Circuit

[0034] 102 Error detection circuit

[0035] 11 Field Programmable Gate Array Unit

[0036] 111 Digital differential pulse generation circuit

[0037] 112 Interrupt control circuit

[0038] 113 Pulse command decoding circuit

[0039] 114 First buffer circuit

[0040] 115 Second buffer circuit

[0041] 116 High-speed comparison circuit

[0042] 117 Latch Circuit

[0043] 118 Position command counting circuit

[0044] 119 Time counting circuit

[0045] 13 substrate

[0046] 131 Electrical connection

[0047] 3. Terminal Block

[0048] 4 Drivers

[0049] 41 Driver interface

[0050] 42 Control loop

[0051] 43 Electric Motor

[0052] 5 Machines

[0053] P0~Pn Predicted passing position data

[0054] P10~P1n Current position data of the motor

[0055] T0~Tn system time value

[0056] S101 Step a

[0057] S102 Step b

[0058] S103 Step c

[0059] S104 Step d

[0060] S105 Step e

[0061] S106 Step f

[0062] S107 Step g

[0063] S108 Step h

[0064] S109 Step i

[0065] S110 Step j DETAILED DESCRIPTION

[0066] The above and other technical contents, features and effects of the present invention will be clearly presented in the following detailed description of the preferred embodiments with reference to the accompanying drawings. It is worth mentioning that the directional terms mentioned in the following embodiments, such as: up, down, left, right, front or back, etc., are only reference directions of the accompanying drawings. Therefore, the directional terms used are for illustration, not for limitation of the present invention. In addition, in the following embodiments, the same or similar components will be marked with the same or similar numbers.

[0067] The following will further illustrate the motor command output module with error detection function and the command error detection method according to the embodiment of the present invention with reference to the accompanying drawings.

[0068] Please refer to Figure 1 and Figure 2 The first aspect of the present invention is to provide a motor command output module 1 with an error detection function, which is configured in a computer (not shown in the figure), and the motor command output module 1 includes a central processing unit 10 and a field programmable logic gate array unit (FPGA) 11. The central processing unit 10 can be a digital signal processor, which includes a motion control circuit 101 and an error detection circuit 102 electrically connected to the motion control circuit 101, and the motion control circuit 101 is configured to calculate a motor position command and a motor speed command according to the motion command provided by the computer. The motor position in the motor position command refers to the rotational position of the motor rotor, and the motor speed in the motor speed command refers to the rotational speed of the motor rotor. The field programmable logic gate array unit 11 is electrically connected to the central processing unit 10 and includes a digital differential method pulse wave generating circuit 111, a pulse wave command decoding circuit 113, a first buffer circuit 114, a second buffer circuit 115, a high-speed comparison circuit 116, a latch circuit 117, a position command counting circuit 118 and a time counting circuit 119.

[0069] like Figure 1 and Figure 2As shown, the digital differential pulse generating circuit 111 is configured to generate a motor pulse command by a digital differential algorithm according to the motor position command and the motor speed command. The motion control circuit 101 is also configured to convert the motor position command and the motor speed command into the number of pulses corresponding to each differential cycle of the motor pulse command and give them to the error detection circuit 102. The error detection circuit 102 is configured to calculate a plurality of predetermined passing position data according to the pulse number, and sequentially set the predetermined passing position data to the first buffer circuit 114. The pulse command decoding circuit 113 is configured to decode the motor pulse command, and the position command counting circuit 118 is configured to generate a plurality of motor current position data according to the decoded motor pulse command. The high-speed comparison circuit 116 is configured to sequentially compare the predetermined passing position data with the motor current position data, and trigger the latch circuit 117 when the motor current position data reaches the predetermined passing position. The time counting circuit 119 is configured to continuously update the system time value. After being triggered, the latch circuit 117 is configured to sequentially write the current position data of the motor that has reached the predetermined passing position and the system time value of the time counting circuit 119 into the second buffer circuit 115. The error detection circuit 102 is also configured to sequentially read the current position data of the motor and the corresponding system time value in the second buffer circuit 115 and calculate them, so as to determine whether the motor pulse command generated by the digital differential pulse generating circuit 111 is correct.

[0070] like Figures 1 to 3 As shown, the second aspect of the present invention is to provide a motor command error detection method, which is applied to the above-mentioned motor command output module 1 and includes the following steps:

[0071] Step S101: providing a motion command to the motion control circuit 101, and the motion control circuit 101 calculates a motor position command and a motor speed command according to the motion command;

[0072] Step S102: the digital differential pulse generating circuit 111 generates a motor pulse command through a digital differential algorithm according to the motor position command and the motor speed command;

[0073] Step S103: the motion control circuit 101 converts the motor position command and the motor speed command into the number of pulses corresponding to each differential cycle of the motor pulse command and sends them to the error detection circuit 102;

[0074] Step S104: the error detection circuit 102 calculates a plurality of predetermined passing position data according to the pulse number, and sets the predetermined passing position data into the first buffer circuit 114 in sequence;

[0075] Step S105: the pulse command decoding circuit 113 decodes the motor pulse command;

[0076] Step S106: the position command counting circuit 118 generates a plurality of motor current position data according to the decoded motor pulse command;

[0077] Step S107: the high-speed comparison circuit 116 sequentially compares the predetermined passing position data with the current position data of the motor, and triggers the latch circuit 117 when the current position data of the motor reaches the predetermined passing position;

[0078] Step S108: the latch circuit 117 sequentially writes the current position data of the motor reaching the predetermined passing position and the system time value of the time counting circuit 119 into the second buffer circuit 115; and

[0079] Step S109: The error detection circuit 102 sequentially reads the motor current position data and the corresponding system time value in the second buffer circuit and performs calculations to determine whether the motor pulse command generated by the digital differential pulse generating circuit is correct.

[0080] Thus, the motor command output module 1 with error detection function and the motor command error detection method of the present invention can confirm whether the given motor pulse command is correct before confirming whether the machine position is correct, so as to shorten the troubleshooting time consumed when the machine positioning is inaccurate.

[0081] like Figure 1 and Figure 2 As shown, in an embodiment, the FPGA unit 11 may further include an interrupt control circuit 112. The error detection circuit 102 is configured to enable the interrupt control circuit 112 to send an interrupt signal to the computer when the digital differential pulse generating circuit 111 sends an incorrect motor pulse command.

[0082] like Figures 1 to 3 As shown, in an embodiment, the motor command error detection method of the present invention may further include the steps of:

[0083] S110: When the digital differential pulse generating circuit 111 issues an incorrect motor pulse command, the error detecting circuit 102 causes the interrupt control circuit 112 to issue an interrupt signal.

[0084] like Figure 1 and Figure 2 As shown, in an embodiment, the motor command output module 1 with a debugging function of the present invention may further include a substrate 13, and the central processing unit 10 and the field programmable logic gate array unit 11 are integrated circuits respectively arranged on the substrate 13. The field programmable logic gate array unit 11 has the characteristics of being modifiable and editable, and the digital differential method pulse wave generating circuit 111, the interrupt control circuit 112, the pulse wave command decoding circuit 113, the first buffer circuit 114, the second buffer circuit 115, the high-speed comparison circuit 116, the latch circuit 117, the position command counting circuit 118 and the time counting circuit 119 may be a plurality of logic blocks connected in the field programmable logic gate array unit 11. The substrate 13 includes an electrical connection portion 131 to be electrically connected to the motherboard of the computer (not shown in the figure). The electrical connection portion 131 may be a PCI bus (PCI BUS), but is not limited thereto.

[0085] like Figure 1 and Figure 2 As shown, in an embodiment, the motion control circuit 101 can set the digital differential method pulse number and period to the digital differential method pulse generating circuit 111 to generate the motor pulse command.

[0086] like Figure 1 and Figure 2 As shown, in the embodiment, the error detection circuit 102 can determine whether the number of pulses and the pulse frequency of each differential cycle of the motor pulse command are correct. If the motor pulse command is determined to be incorrect, the motion control circuit 101 can urgently stop the digital differential pulse generating circuit 111 from issuing the motor pulse command, and at the same time, the interrupt control circuit 112 can notify the software in the computer through the electrical connection part 131. For example, when the error detection circuit 102 confirms that the speed data or position data in a digital differential cycle is incorrect, it can write a temporary storage circuit (not shown) to the interrupt control circuit 112 to issue an interrupt signal (interrupt signal) to the driver installed in the computer through the electrical connection part 131. After receiving the interrupt signal, the driver will automatically enter the interrupt service routine (ISR) to execute a pre-specified program, such as notifying the upper layer software in the computer. However, the present invention is not limited to this.

[0087] like Figure 1 and Figure 2As shown, in the embodiment, the pulse command decoding circuit 113 can support multiple modes of high-speed signal decoding, whereby the position command counting circuit 118 can generate the current position data of the motor according to the decoding result, but the present invention is not limited thereto.

[0088] like Figure 1 and Figure 2 As shown, in an embodiment, the time counting circuit 119 may have a high-resolution time counting function for the error detection circuit 102 to calculate the speed data of each differential cycle, but the present invention is not limited thereto.

[0089] like Figure 1 , Figure 2 , Figure 4 and Figure 5 As shown, in the embodiment, the first buffer circuit 114 and the second buffer circuit 115 are both first-in-first-out (FIFO) memories. Since the error detection circuit 102 converts the pulse number of each differential cycle into a plurality of predetermined passing position data P0, P1...Pn, and these predetermined passing position data P0, P1...Pn must be arranged in sequence before being compared with the current position of the motor, the position data must be written into the first buffer circuit 114 first. Similarly, the error detection circuit 102 must also read the current position data P10, P11...P1n of the motor in sequence to correctly calculate the speed data of the differential cycle, so the current position data P10, P11...P1n of the motor must be sorted by the second buffer circuit 115 first. The high-speed comparison circuit 116 compares the position data with the current position data of the motor one by one in a table mode. If the value of the current position data P10 of the motor reaches the position data P0, an edge-triggered signal is transmitted to the latch circuit 117 to trigger the latch circuit 117. After receiving the trigger signal, the latch circuit 117 writes the current position data P10 of the motor into the second buffer circuit 115 after combining it with the system time T0 through the time counting circuit 119. Similarly, the current position data P11, P12, ..., P1n of the motor are sequentially written into the second buffer circuit 115 in combination with the system time values ​​T1, T2, ..., Tn.

[0090] like Figure 1 and Figure 2As shown, in the embodiment, the digital differential pulse generating circuit 111 of the motor command output module 1 can be electrically connected to the wiring board 3, and the wiring board 3 can be electrically connected to the driving device 4. The driving device 4 can be electrically connected to the machine 5. The driving device 4 can receive the motor pulse command through the wiring board 3 to drive the machine 5 to operate. The driving device 4 includes a driving interface 41, a control circuit 42 and a motor 43. The driving interface 41 can be a switching circuit board electrically connected to the wiring board 3 to convert the motor pulse command into a command that can be used by the control circuit 42 to drive the motor 43. The motor pulse command decoded by the pulse command decoding circuit 113 can come from the wiring board 3, but is not limited thereto, and can also come directly from the digital differential pulse generating circuit 111. When the machine 5 has a problem of inaccurate positioning, the motor command output module 1 with a debugging function and the motor command debugging method of the present invention can first confirm whether the motor pulse command is incorrect. After confirming that the motor pulse command is incorrect, it can be checked whether the wiring board 3 or the drive interface 41 of the drive device 4 has a fault.

[0091] The above description is merely an embodiment of the present invention and is not intended to limit the patent scope of the present invention.

Claims

1. A motor command output module with error detection function, characterized in that: include: a central processing unit, comprising a motion control circuit and an error detection circuit electrically connected to the motion control circuit, wherein the motion control circuit is configured to calculate a motor position command and a motor speed command according to the motion command; as well as A field programmable logic gate array unit, which is electrically connected to the central processing unit and includes a digital differential pulse generating circuit, a pulse command decoding circuit, a first buffer circuit, a second buffer circuit, a high-speed comparison circuit, a latch circuit, a position command counting circuit, and a time counting circuit; Wherein, the digital differential pulse generating circuit is configured to generate a motor pulse command through a digital differential algorithm according to the motor position command and the motor speed command; Wherein, the motion control circuit is further configured to convert the motor position command and the motor speed command into the number of pulses corresponding to each differential cycle of the motor pulse command and give them to the error detection circuit; The error detection circuit is configured to calculate a plurality of predetermined passing position data according to the pulse number, and set the predetermined passing position data into the first buffer circuit in sequence; Wherein, the pulse command decoding circuit is configured to decode the motor pulse command, and the position command counting circuit is configured to generate a plurality of motor current position data according to the decoded motor pulse command; Wherein, the high-speed comparison circuit is configured to sequentially compare the predetermined passing position data with the current position data of the motor, and trigger the latch circuit when the current position data of the motor reaches the predetermined passing position; Wherein, the time counting circuit is configured to continuously update the system time value; wherein, after being triggered, the latch circuit is configured to sequentially write the current position data of the motor reaching the predetermined passing position and the system time value of the time counting circuit into the second buffer circuit; The error detection circuit is further configured to sequentially read the current position data of the motor and the corresponding system time value in the second buffer circuit and perform calculations to determine whether the motor pulse command generated by the digital differential pulse generating circuit is correct.

2. The motor command output module with error detection function according to claim 1, characterized in that: The field programmable logic gate array unit further includes an interrupt control circuit. The error detection circuit is configured to enable the interrupt control circuit to issue an interrupt signal when the motor pulse commands the digital differential method pulse generating circuit to issue an incorrect motor pulse command.

3. The motor command output module with debugging function according to claim 1, further comprising a substrate, wherein the central processing unit and the field programmable logic gate array unit are integrated circuits respectively arranged on the substrate.

4. The motor command output module with error detection function according to claim 3, characterized in that: The substrate includes an electrical connection portion.

5. The motor command output module with error detection function according to claim 1, characterized in that: The first buffer circuit and the second buffer circuit are both first-in-first-out memories.

6. The motor command output module with error detection function according to claim 1, characterized in that: The central processing unit is a digital signal processor.

7. A motor command error detection method, applied to a motor command output module, the motor command output module comprising a central processing unit and a field programmable logic gate array unit, the central processing unit comprising a motion control circuit and an error detection circuit electrically connected to the motion control circuit, the field programmable logic gate array unit is electrically connected to the central processing unit and comprises a digital differential pulse generating circuit, an interrupt control circuit, a pulse command decoding circuit, a first buffer circuit, a second buffer circuit, a high-speed comparison circuit, a latch circuit, a position command counting circuit and a time counting circuit that continuously updates a system time value, characterized in that: The motor command error detection method comprises the following steps: a. Providing a motion command to the motion control circuit, the motion control circuit calculates the motor position command and the motor speed command according to the motion command; b. The digital differential pulse generating circuit generates a motor pulse command according to the motor position command and the motor speed command; c. the motion control circuit converts the motor position command and the motor speed command into the number of pulses corresponding to each differential cycle of the motor pulse command and gives it to the error detection circuit; d. The error detection circuit calculates a plurality of predetermined passing position data according to the pulse number, and sets the predetermined passing position data sequentially into the first buffer circuit; e. The pulse command decoding circuit decodes the motor pulse command; f. The position command counting circuit generates multiple motor current position data based on the decoded motor pulse command; g. The high-speed comparison circuit sequentially compares the predetermined position data with the current position data of the motor, and when the current position data of the motor reaches the predetermined position, the latch circuit is triggered; h. The latch circuit sequentially writes the current position data of the motor that has reached the predetermined position and the system time value of the time counting circuit into the second buffer circuit; as well as i. The error detection circuit sequentially reads the current position data of the motor and the corresponding system time value in the second buffer circuit and calculates them to determine whether the motor pulse command generated by the digital differential pulse generating circuit is correct.

8. The motor command error detection method according to claim 7, characterized in that: The field programmable logic gate array unit further includes an interrupt control circuit, and the motor command error detection method further includes step j: When the digital differential pulse generating circuit issues an incorrect motor pulse command, the error detecting circuit causes the interrupt control circuit to issue an interrupt signal.

9. The motor command error detection method according to claim 7, characterized in that: The first buffer circuit and the second buffer circuit are both first-in-first-out memories.

10. The motor command error detection method according to claim 7, characterized in that: The high-speed comparison circuit transmits an edge trigger signal to the latch circuit to trigger the latch circuit.

11. The motor command error detection method according to claim 7, characterized in that: The motor command output module further comprises a substrate, and the central processing unit and the field programmable logic gate array unit are integrated circuits respectively arranged on the substrate.

Images