A method and device for optimizing execution of interpreter instructions

Abstract

The present application provides an optimized execution method, apparatus, computing device and computer-readable storage medium for interpreter instructions. In the method, two branch instructions are generated in the interpretation branch for each interpreter instruction that needs to be initialized in a custom interpreter, wherein the code logic of the first branch instruction includes the initialization code, and the code logic of the second branch instruction does not include the initialization code; when the first branch instruction is executed and before entering the next instruction, the current instruction number of the interpreter is modified to the instruction number of the second branch instruction, so when the interpreter interprets and executes the same hot-updated code again, the instruction without the initialization code will be directly executed, thereby greatly speeding up the execution speed of the interpreter.

Description

Technical Field

[0001] The present application relates to the field of computer compilation technology, and in particular to a method, apparatus, computing device and computer-readable storage medium for optimizing the execution of interpreter instructions. Background Art

[0002] In the applicant's prior application CN 202210078151.3, a hot update method and device for the Unity platform are proposed. In this application, a new hot update architecture is implemented by customizing the IL2CPP tool and adding a custom interpreter to the IL2CPP tool, which loads the hot update assembly and the main program into the same runtime. In this scheme, there is also the following scenario. In traditional interpreters, some instructions need to be initialized when executed. These interpreters do not optimize this type of instruction, resulting in repeated initialization when executed again, causing unnecessary overhead. Summary of the invention

[0003] In view of this, the present application example provides an optimized execution method, apparatus, computing device and computer-readable storage medium for interpreter instructions to solve the technical defects existing in the prior art.

[0004] According to a first aspect of an embodiment of the present application, a method for optimizing execution of an interpreter instruction is provided, comprising:

[0005] Get the interpreter instructions that need to be initialized;

[0006] For each of the interpreter instructions that need to be initialized, two branch instructions are generated in the interpretation branch, wherein the code logic of the first branch instruction includes the initialization code, and the code logic of the second branch instruction does not include the initialization code;

[0007] When the first branch instruction is executed and before entering the next instruction, the current instruction number of the interpreter is modified to the instruction number of the second branch instruction.

[0008] According to a second aspect of an embodiment of the present application, there is provided an optimized execution device for interpreter instructions, comprising:

[0009] An acquisition unit, used for acquiring interpreter instructions that need to be initialized;

[0010] A branch unit, used for generating two branch instructions in the interpretation branch for each of the interpreter instructions that need to be initialized, wherein the code logic of the first branch instruction includes the initialization code, and the code logic of the second branch instruction does not include the initialization code;

[0011] The replacement unit is used to modify the current instruction number of the interpreter to the instruction number of the second branch instruction before entering the next instruction after the first branch instruction is executed.

[0012] According to a third aspect of an embodiment of the present application, a computing device is provided, comprising a memory, a processor, and computer instructions stored in the memory and executable on the processor, wherein when the processor executes the instructions, the steps of the optimized execution method of the interpreter instructions are implemented.

[0013] According to a fourth aspect of an embodiment of the present application, a computer-readable storage medium is provided, which stores computer instructions, and when the instructions are executed by a processor, the steps of the optimized execution method of the interpreter instructions are implemented.

[0014] Through the method and device in the embodiment of the present application, two branches are defined for the instructions that need to be initialized in the interpretation branch of the custom interpreter. When the branch with the initialized instruction is executed, the current instruction number is modified to the instruction number of another instruction without the initialization code. Therefore, when the interpreter interprets and executes the same hot-updated code again, the instruction without the initialization code will be directly executed, thereby greatly speeding up the execution speed of the interpreter. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 is a structural block diagram of a computing device provided in an embodiment of the present application;

[0016] Figure 2 It is a flowchart of a program optimization execution method provided by an embodiment of the present application;

[0017] Figure 3 It is a structural diagram of a program optimization execution device provided in an embodiment of the present application; DETAILED DESCRIPTION

[0018] Many specific details are described in the following description to facilitate a full understanding of the present application. However, the present application can be implemented in many other ways than those described herein, and those skilled in the art can make similar generalizations without violating the connotation of the present application, so the present application is not limited by the specific implementation disclosed below.

[0019] The terms used in one or more embodiments of the present application are only for the purpose of describing specific embodiments, and are not intended to limit one or more embodiments of the present application. The singular forms of "a", "said" and "the" used in one or more embodiments of the present application and the appended claims are also intended to include plural forms, unless the context clearly indicates other meanings. It should also be understood that the term "and / or" used in one or more embodiments of the present application refers to and includes any or all possible combinations of one or more associated listed items.

[0020] It should be understood that, although the terms first, second, etc. may be used to describe various information in one or more embodiments of the present application, these information should not be limited to these terms. These terms are only used to distinguish the same type of information from each other. For example, without departing from the scope of one or more embodiments of the present application, the first may also be referred to as the second, and similarly, the second may also be referred to as the first. Depending on the context, the word "if" as used herein may be interpreted as "in response to determination".

[0021] In the present application, a program optimization execution method and apparatus, a computing device, and a computer-readable storage medium are provided, which are described in detail one by one in the following embodiments.

[0022] Figure 1 The structure block diagram of a computing device 100 according to an embodiment of the present application is shown. The components of the computing device 100 include but are not limited to a memory 110 and a processor 120. The processor 120 is connected to the memory 110 via a bus 130, and the database 150 is used to store data.

[0023] The computing device 100 also includes an access device 140 that enables the computing device 100 to communicate via one or more networks 160. Examples of these networks include a public switched telephone network (PSTN), a local area network (LAN), a wide area network (WAN), a personal area network (PAN), or a combination of communication networks such as the Internet. The access device 140 may include one or more of any type of network interface (e.g., a network interface card (NIC)) whether wired or wireless, such as an IEEE 802.11 wireless local area network (WLAN) wireless interface, a World Wide Interoperability for Microwave Access (Wi-MAX) interface, an Ethernet interface, a universal serial bus (USB) interface, a cellular network interface, a Bluetooth interface, a near field communication (NFC) interface, and the like.

[0024] In one embodiment of the present application, the above components of the computing device 100 and Figure 1 Other components not shown in the figure may also be connected to each other, for example, via a bus. It should be understood that Figure 1 The computing device structure block diagram shown is only for the purpose of illustration, and is not intended to limit the scope of the present application. Those skilled in the art may add or replace other components as needed.

[0025] The computing device 100 may be any type of stationary or mobile computing device, including a mobile computer or mobile computing device (e.g., a tablet computer, a personal digital assistant, a laptop computer, a notebook computer, a netbook, etc.), a mobile phone (e.g., a smart phone), a wearable computing device (e.g., a smart watch, smart glasses, etc.), or other types of mobile devices, or a stationary computing device such as a desktop computer or PC. The computing device 100 may also be a mobile or stationary server.

[0026] In the Unity development platform, IL2CPP is a new scripting backend method that processes the IL (intermediate language) compiled by the platform, converts the IL language into static C++ code, and then directly compiles it into executable native assembly code by the C++ compiler of each platform, thereby realizing Unity's cross-platform development. In addition to its high execution efficiency, this method can also use the C++ compiler of each platform to perform compile-time optimization on the code, which can further reduce the size of the final game and increase the running speed of the game. Therefore, almost all Unity-based development processes use the IL2CPP tool.

[0027] Among them, IL2CPP mainly consists of two parts:

[0028] AOT (Ahead Of Time) static compilation compiler (il2cpp.exe);

[0029] Runtime library (libil2cpp);

[0030] The AOT compiler converts IL into C++ code, and then gives it to the C++ compiler of each platform for compilation. Since AOT static compilation is used, the types that need to be used must be completely determined during compilation; the runtime library will provide services and abstractions such as garbage collection, thread / file acquisition, and internal calls to directly modify the native generation of managed data structures.

[0031] In the applicant's prior application CN 202210078151.3, by adding an IL interpreter to the IL2CPP tool, the IL2CPP tool has the functions of AOT compiler, runtime environment and IL interpreter, and has the basis for compilation and hot update of multiple different platforms. Among them, the code that does not need to be updated is statically compiled into C++ code using AOT, and then compiled into a local executable program by the target platform; for the code in the hot update program set, it is interpreted and executed by the interpreter.

[0032] In traditional interpreter solutions, some instructions, such as stsfld, need to perform certain initialization operations when they are executed for the first time. When these instructions are executed again, these operations are no longer required. However, in these interpreters, such instructions are not optimized. When these instructions are executed again, repeated initialization checks are required, which affects the execution efficiency of the interpreter.

[0033] Therefore, in an embodiment of the present application, in order to solve the above-mentioned problem, a method and device for optimizing the execution of interpreter instructions are proposed, so that when the interpreter executes these instructions again subsequently, it is no longer necessary to perform repeated operations.

[0034] Instructions attached Figure 1 The processor 120 in the embodiment may execute Figure 2 The program shown optimizes the steps in the execution method. Figure 2 A flowchart of a method for implementing optimized execution of interpreter instructions is shown in FIG, including steps 202 to 206.

[0035] Step 202: Obtain interpreter instructions that need to be initialized;

[0036] In this step, common instructions that need to be initialized in the interpreter instructions are obtained, such as the ldsfld instruction, the stsfld instruction, etc. Among them, the ldsfld instruction is responsible for pushing the value of the static field to the calculation stack, and the stsfld instruction is responsible for replacing the value of the static field with the value from the calculation stack.

[0037] Those skilled in the art should be aware that the above instructions are merely examples and not exhaustive, and there are many instructions in the interpreter that need to be initialized, which are not listed here one by one.

[0038] Step 204: Generate two branch instructions in the interpretation branch for each interpreter instruction that needs to be initialized, wherein the code logic of the first branch instruction includes the initialization code, and the code logic of the second branch instruction does not include the initialization code.

[0039] In the interpreter, the switch-case structure is common, and the interpreter usually performs branch judgment in the switch. In a feasible implementation, the corresponding case is entered according to the type of the instruction number, and its type is customized according to the type of the instruction, including but not limited to:

[0040]

[0041] In a feasible implementation, two instructions are generated in the interpretation branch for each interpreter instruction that needs to be initialized. For example, for the ldsfld instruction, two branch instructions are generated in the interpreter branch:

[0042]

[0043]

[0044] The expression of the switch statement is the current instruction number after the instruction translation of the hot update assembly code.

[0045] Furthermore, in the first branch instruction Ldsfld_check_init, a conventional instruction execution process is performed, which has a complete code logic with check initialization.

[0046] In the above second branch instruction Ldsfld_not_check, the initialization code is removed from the complete code logic.

[0047] Those skilled in the art should know that in addition to using the switch-case structure to judge the instruction, other structures such as if-else statements can also be used, which are not listed here one by one.

[0048] Step 206: When the first branch instruction is executed and before entering the next instruction, the current instruction number of the interpreter is modified to the instruction number of the second branch instruction.

[0049] In a feasible implementation, when the above-mentioned first instruction is executed and before entering the next instruction, the current instruction number of the interpreter is modified to the second branch instruction.

[0050]

[0051]

[0052] That is, the code indicated by the underline replaces the current instruction number ip from Ldsfld_check_init to Ldsfld_not_check. Since the instruction set is converted from the function in the hot update code, when the same function in the hot update code is interpreted and executed next time, the interpreter will execute the second branch instruction Ldsfld_not_check according to the instruction number, so that the initialization operation is no longer required.

[0053] In the above implementation, the hot-updated code and the main program code run seamlessly in the same runtime, wherein the main program code that does not need to be updated is statically compiled into a local executable program through AOT, and the code in the hot-updated program set is interpreted and executed by the interpreter; the traditional interpreter does not optimize the initialization process in the instruction when executing the instruction, and performs an initialization process every time the instruction is executed, which reduces the execution speed of the interpreter. In order to improve this, in the embodiment of the present application, two branches are defined for the instructions that need to be initialized in the interpretation branch of the custom interpreter. When the branch with the initialized instruction is executed, the current instruction number is modified to the instruction number of another instruction without the initialization code. Therefore, when the interpreter interprets and executes the same hot-updated code again, the instruction without the initialization code will be directly executed, thereby greatly improving the execution performance of the interpreter, for example, avoiding the significant drag on performance caused by the CPU branch prediction failure that may be caused by the initialization check.

[0054] Corresponding to the above method embodiment, the present application also provides an embodiment of an optimized execution device for interpreter instructions, Figure 3 FIG. 1 is a schematic diagram showing a structure of an optimized execution device for interpreter instructions according to an embodiment of the present application. Figure 3 As shown, the device comprises:

[0055] An acquisition unit, used for acquiring interpreter instructions that need to be initialized;

[0056] A branch unit, used for generating two branch instructions in the interpretation branch for each of the interpreter instructions that need to be initialized, wherein the code logic of the first branch instruction includes the initialization code, and the code logic of the second branch instruction does not include the initialization code;

[0057] The replacement unit is used to modify the current instruction number of the interpreter to the instruction number of the second branch instruction before entering the next instruction after the first branch instruction is executed.

[0058] The above is a schematic scheme of an optimized execution device for interpreter instructions of this embodiment. It should be noted that the technical scheme of the optimized execution device for interpreter instructions and the technical scheme of the execution method for interpreter instructions described above belong to the same concept, and the details of the technical scheme of the optimized execution device for interpreter instructions that are not described in detail can all be found in the description of the technical scheme of the optimized execution method for interpreter instructions described above.

[0059] In one embodiment of the present application, a computing device is also provided, including a memory, a processor, and computer instructions stored in the memory and executable on the processor, wherein when the processor executes the instructions, the steps of the optimized execution method of the interpreter instructions are implemented.

[0060] The above is a schematic scheme of a computing device of this embodiment. It should be noted that the technical scheme of the computing device and the technical scheme of the optimized execution method of the above-mentioned interpreter instruction belong to the same concept, and the details not described in detail in the technical scheme of the computing device can be found in the description of the technical scheme of the optimized execution method of the above-mentioned interpreter instruction.

[0061] An embodiment of the present application also provides a computer-readable storage medium storing computer instructions, which, when executed by a processor, implement the steps of the optimized execution method of the interpreter instructions as described above.

[0062] The above is a schematic scheme of a computer-readable storage medium of this embodiment. It should be noted that the technical scheme of the storage medium and the technical scheme of the optimized execution method of the above-mentioned interpreter instruction belong to the same concept, and the details not described in detail in the technical scheme of the storage medium can be found in the description of the technical scheme of the optimized execution method of the above-mentioned interpreter instruction.

[0063] The above describes specific embodiments of the present application. Other embodiments are within the scope of the appended claims. In some cases, the actions or steps recorded in the claims can be performed in an order different from that in the embodiments and still achieve the desired results. In addition, the processes depicted in the accompanying drawings do not necessarily require the specific order or continuous order shown to achieve the desired results. In some embodiments, multitasking and parallel processing are also possible or may be advantageous.

[0064] The computer instructions include computer program codes, which may be in source code form, object code form, executable files or some intermediate forms, etc. The computer-readable medium may include: any entity or device capable of carrying the computer program code, recording medium, USB flash drive, mobile hard disk, magnetic disk, optical disk, computer memory, read-only memory (ROM), random access memory (RAM), electric carrier signal, telecommunication signal and software distribution medium, etc. It should be noted that the content contained in the computer-readable medium may be appropriately increased or decreased according to the requirements of legislation and patent practice in the jurisdiction. For example, in some jurisdictions, according to legislation and patent practice, computer-readable media do not include electric carrier signals and telecommunication signals.

[0065] It should be noted that, for the above-mentioned method embodiments, for the sake of simplicity of description, they are all expressed as a series of action combinations, but those skilled in the art should be aware that the present application is not limited by the described action sequence, because according to the present application, certain steps can be performed in other sequences or simultaneously. Secondly, those skilled in the art should also be aware that the embodiments described in the specification are all preferred embodiments, and the actions and modules involved are not necessarily required by the present application.

[0066] In the above embodiments, the description of each embodiment has its own emphasis. For parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0067] The preferred embodiments of the present application disclosed above are only used to help explain the present application. The optional embodiments do not describe all the details in detail, nor do they limit the invention to the specific implementation methods described. Obviously, many modifications and changes can be made according to the content of the present application. The present application selects and specifically describes these embodiments in order to better explain the principles and practical applications of the present application, so that those skilled in the art can understand and use the present application well. The present application is only limited by the claims and their full scope and equivalents.

Claims

1. A method for optimizing the execution of interpreter instructions, characterized in that: include: Get the interpreter instructions that need to be initialized; For each of the interpreter instructions that need to be initialized, two branch instructions are generated in the interpretation branch, wherein the code logic of the first branch instruction includes the initialization code, and the code logic of the second branch instruction does not include the initialization code; When the first branch instruction is executed and before entering the next instruction, the current instruction number of the interpreter is modified to the instruction number of the second branch instruction.

2. The method according to claim 1, wherein: The interpretation branch is a branch of a switch-case structure.

3. The method according to claim 2, wherein: The expression of the switch statement is the current instruction number after instruction translation of the hot update assembly code.

4. The method according to claim 3, wherein: When performing instruction translation on the hot update program set code, the hot update program set code is first translated into a first branch instruction corresponding thereto.

5. The method according to claim 1, wherein: After generating two branch instructions in the interpretation branch for the interpreter instruction that needs to be initialized, the code in the hot update assembly is interpreted and executed.

6. An optimized execution device for interpreter instructions, characterized in that: include: An acquisition unit, used for acquiring interpreter instructions that need to be initialized; A branch unit, used for generating two branch instructions in the interpretation branch for each of the interpreter instructions that need to be initialized, wherein the code logic of the first branch instruction includes the initialization code, and the code logic of the second branch instruction does not include the initialization code; The replacement unit is used to modify the current instruction number of the interpreter to the instruction number of the second branch instruction before entering the next instruction after the first branch instruction is executed.

7. The device according to claim 6, wherein: The interpretation branch is a branch of a switch-case structure.

8. The device according to claim 7, wherein: The expression of the switch statement is the current instruction number after the hot update assembly code is translated.

9. A computing device comprising a memory, a processor, and computer instructions stored in the memory and executable on the processor, characterized in that: When the processor executes the instructions, the steps of the method according to any one of claims 1 to 5 are implemented.

10. A computer-readable storage medium storing computer instructions, characterized in that: When the instruction is executed by a processor, the steps of the method described in any one of claims 1 to 5 are implemented.

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