semiconductor devices
By employing a configuration of multiple leads and islands in semiconductor devices, the problem of low production efficiency during miniaturization is solved, enabling smaller and more efficient production, reducing the risk of lead short circuits, and improving packaging quality.
Patent Information
- Application Number
- CN202210670342.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2020-03-19
- Filing Date
- 2020-08-31
- Publication Date
- 2025-10-28
- Estimated Expiration
- 2040-08-31
AI Technical Summary
Existing leadless packaged semiconductor devices suffer from low production efficiency during miniaturization, especially due to the reduced rotational handling efficiency caused by the need to tilt the semiconductor element at a 45-degree angle relative to the resin package.
By employing a configuration of multiple leads and islands, the angle between the edge of the semiconductor element and the resin package is less than 20 degrees. The island is connected to the lead frame via its lifting arm, avoiding rotation operations and improving production efficiency.
This enables miniaturization of semiconductor devices and improves manufacturing performance, reduces the possibility of short circuits between leads and islands, and improves production efficiency and packaging quality.
Smart Images

Figure CN115050719B_ABST
Abstract
Description
[0001] This invention is a divisional application of the following application, the original application information of which is as follows:
[0002] Application date: August 31, 2020
[0003] Application Number: 202010895058.2
[0004] Invention Title: Semiconductor Device
[0005] Related applications
[0006] This application enjoys priority based on Japanese Patent Application No. 2020-49744 (filed on March 19, 2020). This application includes all contents of the basic application by reference to that basic application. Technical Field
[0007] The implementation involves a semiconductor device. Background Technology
[0008] Semiconductor devices are generally known as non-leaded packages, which are surface-mount packages in which the leads do not extend from the resin package, but rather the electrodes are exposed on the lower surface of the resin package. Semiconductor devices using non-leaded packages have a structure in which a rectangular semiconductor element and a lead frame are sealed together with resin encapsulation.
[0009] Semiconductor devices, for example, include islands formed by appropriately cutting patterned metal lead frames that have undergone etching, and multiple leads disposed around the islands. Such semiconductor devices are further required to be miniaturized. Therefore, leads are typically formed at the four corners of a resin package, and the semiconductor elements are disposed at a 45-degree angle relative to the resin package.
[0010] However, in order to position the semiconductor element at a 45-degree angle relative to the resin package, the semiconductor element needs to be rotated, which may reduce production efficiency. Summary of the Invention
[0011] The implementation provides a semiconductor device that enables miniaturization and improved manufacturing performance.
[0012] The semiconductor device of the embodiment includes a semiconductor element, a first terminal, a plurality of second terminals, and an inner enclosure. The semiconductor element is rectangular. The first terminal is bonded to the back surface of the semiconductor element on its upper surface. The plurality of second terminals are disposed around the first terminal. The inner enclosure seals the conductive wires, the semiconductor element, the first terminal, and the plurality of second terminals disposed between the surface of the semiconductor element and the upper surfaces of the plurality of second terminals. It has a rectangular bottom surface including a first side, a second side, a third side, and a fourth side, and has a first side surface, a second side surface, a third side surface, and a fourth side surface respectively connected to the first side surface, the third side surface, and the fourth side surface, with the first side surface facing the third side surface and the second side surface facing the fourth side surface. The plurality of second terminals are disposed exposed from the bottom surface at the four corners of the inner enclosure. Each side of the semiconductor element faces the first side surface, the second side surface, the third side surface, and the fourth side surface. The first terminal is separated from the first side surface and the third side surface, with its lower surface exposed from the bottom surface and a portion exposed from the second side surface and the fourth side surface. Attached Figure Description
[0013] Figure 1(A) is a bottom view illustrating the configuration of a semiconductor device 1 according to one embodiment.
[0014] Figure 1(B) is a top view of a semiconductor device according to one embodiment.
[0015] Figure 1(C) is a cross-sectional view of Figure 1(B) along line A-A.
[0016] Figure 1(D) is a B-B cross-sectional view of Figure 1(B).
[0017] Figure 2 This is a diagram showing an example of the configuration of multiple semiconductor devices 1 within a resin seal.
[0018] Figure 3(A) is a bottom view illustrating the configuration of semiconductor device 1a.
[0019] Figure 3(B) is a top view of semiconductor device 1a.
[0020] Figure 3(C) is a cross-sectional view of Figure 3(B) along line A-A.
[0021] Figure 3(D) is a B-B cross-sectional view of Figure 3(B).
[0022] Figure 4(A) is a bottom view illustrating the configuration of semiconductor device 1b.
[0023] Figure 4(B) is a top view of semiconductor device 1b.
[0024] Figure 4(C) is a cross-sectional view of Figure 4(B) along line A-A.
[0025] Figure 4(D) is a B-B cross-sectional view of Figure 4(B). Detailed Implementation
[0026] Hereinafter, a semiconductor device according to embodiments of the present invention will be described in detail with reference to the accompanying drawings. Furthermore, the embodiments shown below are examples of embodiments of the present invention, and the present invention is not limited to these embodiments. Additionally, in the drawings referenced in these embodiments, there are instances where the same or similar reference numerals are used to denote the same parts or parts having the same function, and repeated descriptions are omitted. Furthermore, the aspect ratios of the drawings may differ from actual ratios for ease of explanation, and some components may be omitted from the drawings.
[0027] (One implementation method)
[0028] Using Figures 1(A) to (D), the configuration of a semiconductor device 1 according to one embodiment will be described. Figures 1(A) to (D) are diagrams illustrating the configuration of the semiconductor device 1. Figure 1(A) is a bottom view of the semiconductor device 1. Figure 1(B) is a top view of the semiconductor device 1. Figure 1(C) is a cross-sectional view along line A-A of Figure 1(B). Figure 1(D) is a cross-sectional view along line B-B of Figure 1(B). In this embodiment, the direction from the upper surface to the lower surface of the semiconductor device 1 is represented by the Z direction, and the directions orthogonal to the Z direction are represented by the X direction and the Y direction.
[0029] As shown in Figures 1(A) to (D), the semiconductor device 1 includes four leads 2, islands 3, semiconductor elements 4, bonding wires 5, and a resin package 6. The semiconductor device 1 is a cuboid. The size of the semiconductor device 1 is not particularly limited. In Figure 1(A), the dashed line 50 represents the lead 50 of the comparative example described below using Figures 3(A) to (D), and the dashed line 60 represents an example of the formation of the island 60 of the comparative example described later. Figure 1(B) is a top view showing the resin package 6. Therefore, the upper surface of the semiconductor device 1 is actually covered by the resin package 6. In Figure 1(B), the dashed line 200 represents the lead 2 shown in Figure 1(A), and the dashed line 300 represents the lower surface pattern of the island 3.
[0030] Figure 2 This is a diagram showing an example of the configuration of multiple semiconductor devices 1 within a resin seal 400.
[0031] like Figure 2 As shown, a plurality of semiconductor devices 1 are disposed within the resin seal 400. The semiconductor devices 1 are generated by cutting away the lead frame 500 of the resin seal 400 along with the resin.
[0032] The materials of lead 2 and island 3 are not particularly limited, for example, Cu. For example, lead 2 and island 3 can be formed from the same metal plate with the same maximum thickness. In addition, in this embodiment, island 3 corresponds to the first terminal, lead 2 corresponds to the second terminal, bonding wire 5 corresponds to the conductive wire, and resin encapsulation 6 corresponds to the inner package.
[0033] The four leads 2 are separated from the island 3 and the semiconductor element 4. That is, in this embodiment, the four leads 2 are separately arranged with respect to the island 3 and the semiconductor element 4. Thus, the four leads 2 are arranged at the four corners of the resin package 6. In this case, as shown by arrow W2 in FIG1(A), the semiconductor device 1 may also have an edge on its side covered by the resin package 6 with the leads 2.
[0034] Each lead 2 has a non-etched portion exposed from the bottom surface of the resin package 6, and a terminal semi-etched portion 2a covered by the resin package 6 on the lower surface side and with a thickness less than the non-etched portion. The terminal semi-etched portion 2a extends a predetermined length (width) from the non-etched portion toward the island 3 and the adjacent lead 2. The terminal semi-etched portion 2a can be formed, for example, by chemical etching or flattening. The material of the resin package 6 enters and covers the terminal semi-etched portion 2a.
[0035] In this specification, the lower surfaces and shapes of leads 2 and islands 3 refer to the un-etched portions and their shapes exposed from the bottom surface of the resin package 6. The shapes of leads 2 and islands 3, or the shapes of their upper surfaces, refer to the shapes that combine the un-etched portions with the partially etched portions when viewed from above. The un-etched portions and partially etched portions of leads 2 and islands 3 are smoothly continuous on the upper surface. The upper surfaces of leads 2 and islands 3 have a shape that increases the width of the partially etched portion from the lower surfaces of leads 2 and islands 3.
[0036] The lower surface of each lead 2, except for the terminal half-etched portion 2a, is exposed on the bottom surface of the resin package 6, and functions as an external terminal for connection with the wiring substrate (not shown).
[0037] The lower surface of lead 2 is pentagonal in shape, having sides 20 and 22 parallel to one set of opposing sides of semiconductor element 4, and sides 21 and 23 parallel to another set of opposing sides of semiconductor element 4. Each lead 2 also has a side 24 that is not parallel to any side of semiconductor element 4, for example, tilted at 45 degrees. Side 23 is shorter than side 20.
[0038] The upper surface of lead 2 is pentagonal in shape, having sides 120 and 122 parallel to one set of opposing sides of semiconductor element 4, and sides 121 and 123 parallel to another set of opposing sides of semiconductor element 4. Each lead 2 also has a side 124 that is not parallel to any side of semiconductor element 4, for example, tilted at 45 degrees. Side 123 is shorter than side 120.
[0039] The lower surface of island 3 is approximately rhomboid. Furthermore, in this embodiment, the lower surface of island 3 has a shape in which the corners of the rhombus are rounded, for example, by removing them. The sides of the rhombus in the lower surface of island 3 are not parallel to the sides of the resin encapsulation 6. In other words, the lower surface of island 3 has a shape with two sets of mutually parallel opposite sides. The two sets of opposite sides of island 3 are not parallel to any side of the resin encapsulation 6. Moreover, the length of the lower surface of island 3 in the X direction is longer than its length in the Y direction. The upper surface of island 3, except for portions 30a and 30b, is also approximately rhomboid; in terms of the approximately rhomboid shape, it can be said to be the same as the lower surface of island 3.
[0040] Furthermore, the lower surface of island 3 is exposed on the bottom surface of resin package 6. Moreover, an island half-etched portion 3a is formed on the side of island 3 opposite to the lead 2. Material from resin package 6 enters the island half-etched portion 3a. In other words, each lead 2 has a non-etched portion exposed from the bottom surface of resin package 6, and an island half-etched portion 2a covered by resin package on the lower surface side, with a thickness less than the non-etched portion. The island half-etched portion 2a extends from the non-etched portion in the XY plane with a predetermined length (width). This improves the bonding strength between island 3 and resin package 6. The island half-etched portion 3a can be formed, for example, by chemical etching or flattening.
[0041] The island half-etched portion 3a of island 3 has protruding boom portions 30a and 30b extending along the X direction. For example... Figure 2 As shown, the boom portions 30a and 30b are connected to the lead frame 500 to prevent the island 3 from detaching from the lead frame 500. Furthermore, in this embodiment, as... Figure 2 As shown, the regions 30a and 30b of the island 3, which are connected to the adjacent lead frame 500 before being cut, are referred to as lifting arms or lifting pins. When viewed from above along the Z direction, a plurality of leads 2 are disposed at the ends of the two sides of the resin encapsulation 6 extending along the X direction. The lifting arms 30a and 30b are contained in two spaces A2 formed between the adjacent ends along the Y direction.
[0042] On the other hand, when viewed from above along the Z direction, island 3 is separated from the two sides extending along the X direction. In other words, island 3 is separated from the side of the resin package 6, which is parallel to both the Z and X directions. Therefore, when viewed from above along the Z direction, a region B2 can be provided where island 3 and the two sides of the resin package 6 extending along the X direction do not meet.
[0043] In Figure 1(B), or in other words, when viewed from above along the Z direction, the points where the boom portions 30a and 30b meet the two opposing sides of the resin encapsulation 6 are at least two separate points. As shown in Figure 1(A), when viewed from above, the midpoint of the island 3 is located between the two points of the boom portions 30a and 30b.
[0044] Semiconductor element 4 (semiconductor chip) has a rectangular shape. With the surface of semiconductor element 4 on which the functional element is formed (device forming surface) facing upward, its back side is bonded to island 3 via a bonding agent. The bonding material is, for example, a non-conductive bonding material, but a conductive bonding material can also be used.
[0045] The angle between the edge of the semiconductor element 4 and the edge of the resin package 6 is 20 degrees or less. More preferably, the edge of the semiconductor element and the edge of the resin package 6 are parallel. As shown in FIG1(B), when viewed from above along the Z direction, there is no angle between two adjacent leads 2 along the X direction. When viewed from above along the Z direction, there is an angle between two adjacent leads 2 along the Y direction.
[0046] A pad 4a corresponding to each lead 2 is formed on the surface of the semiconductor element 4. One end of a bonding wire 5 is bonded to each pad 4a. The other end of the bonding wire 5 is bonded to the upper surface of each lead 2. Thus, the semiconductor element 4 is electrically connected to the lead 2 via the bonding wire 5.
[0047] The configuration of a comparative example 1a of a semiconductor device 1 according to one embodiment will be described using Figures 3(A) to (D). Figures 3(A) to (D) are diagrams illustrating the configuration of semiconductor device 1a. Figure 3(A) is a bottom view of semiconductor device 1a. Figure 3(B) is a top view of semiconductor device 1a. Figure 3(C) is a cross-sectional view along A-A in Figure 3(B). Figure 3(D) is a cross-sectional view along B-B in Figure 3(B).
[0048] As shown in Figures 3(A) to (D), semiconductor device 1a includes four leads 50, islands 60, semiconductor elements 4, bonding wires 5, and a resin package 6. Semiconductor device 1a is a cuboid. Semiconductor device 1a includes the semiconductor elements 4 and the resin package 6, which are also present in semiconductor device 1. Figure 3(B) is a top view showing the resin package 6. Therefore, the upper surface of semiconductor device 1 is actually covered by the resin package 6. The dashed line 200a in Figure 3(B) represents the leads 50 shown in Figure 3(A). The semiconductor element 4, for example, has the same shape as the lower surface pattern of the island 60 and is positioned directly above the lower surface pattern of the island 60.
[0049] As shown in Figure 3(A), on the lower surface, one side of each lead 50 and four sides of the island 60 are arranged at a predetermined angle relative to the edge of the resin package 6, for example, at a 45-degree angle. That is, on the lower surface, one side of each lead 50 is arranged parallel to any one side of the island 60 at a distance.
[0050] In the comparative example semiconductor device 1a, the edge of the semiconductor element 4 is arranged at a 45-degree angle to the edge of the resin package 6. Thus, the semiconductor device 1a takes up a larger area of the island 60 and the lead 50, while the upper surface of the lead 50 located at the four corners of the package 6 is arranged separately from the lower surface of the semiconductor element 4.
[0051] In manufacturing the comparative example semiconductor device 1a, a rotation operation is required to make the edge of the semiconductor element 4 conform to a 45-degree angle relative to the edge of the resin package 6. Generally, the alignment accuracy of the semiconductor element 4 decreases with the rotation operation. In the comparative example, one corner of the semiconductor element 4 is cut at a 45-degree angle, and the resulting edge is aligned with the X direction, thereby improving the alignment accuracy during the rotation operation. In addition, by obtaining a larger area of the island 60, a larger alignment margin for the semiconductor element 4 is obtained. The vertices of the rectangular semiconductor element 4 are close to the edge of the resin package 6.
[0052] Furthermore, the lead 50 is triangular in shape. Additionally, the lower surface of the island 60 in this embodiment has a shape that rounds off the corners of the triangle, for example, by removing them. The boom portion of the island 60 extends and protrudes towards each side of the resin encapsulation 6. Because the island 3 has a large area, the possibility of the island 60 approaching and short-circuiting with each lead 50 is increased, both in the X and Y directions.
[0053] In the comparative example, the boom extends along the X and Y directions to prevent offset or twisting when the island 60 is connected to the lead frame.
[0054] Since the semiconductor device 1 of Embodiment 1 does not have a boom extending in the Y direction, it can capture a larger area B2. Therefore, the gap between the edge 121 of the lead 2 and the island 3 in the X direction can be captured more broadly. Thus, even with further miniaturization, short circuits between the lead 2 and the island 3 that may occur due to metal dragging or the like when cutting the lead frame along the line extending in the X direction can be suppressed.
[0055] The island 3 of the semiconductor device 1 has a roughly rhomboid shape in which the length in the Y direction is smaller than the length in the X direction. Therefore, in the X direction, the distance between the island 3 and the edge 24 of each lead 2 increases as it moves from the end of the resin package 6 toward the midpoint.
[0056] The length of the lead 2 in the Y direction is shorter than its length in the X direction. Therefore, even near the X-direction end of the resin package 6, the distance between the island 3 and the edge 24 of each lead 2 can be obtained more significantly. Furthermore, the distance between the edge 22 of each lead 2 and the lifting arm portions 30a and 30b, as well as the distance between the edge 22 of each lead 2 and the back surface of the semiconductor element 4, can be obtained more significantly.
[0057] Therefore, the possibility of short circuits between lead 2 and island 3 is further reduced. That is, the gap is further increased. As a result, the semiconductor device 1 can be further miniaturized.
[0058] The boom portions 30a and 30b are exposed from the resin package 6 at at least two points separated in the Y direction and connected to the lead frame. Since the boom portions 30a and 30b are divided into two branches, compared to providing a single, thicker boom portion, the cutting area of the metal during cutting can be reduced, stress concentration can be mitigated, and the package quality can be improved. Furthermore, when using a cutting blade, clogging of the cutting blade can be prevented.
[0059] In semiconductor device 1, the angle between the edge of semiconductor element 4 and the edge of resin package 6 is 20 degrees or less, or they are parallel. Therefore, the operation of making semiconductor element 4 conform to a 45-degree angle with the edge of resin package 6, as in the comparative example, is not required, and the manufacturing performance of semiconductor device 1 is further improved. In other words, by further shortening the edge 23 of lead 2, semiconductor device 1 can be configured even without making the edge of semiconductor element 4 conform to a 45-degree angle with the edge of resin package 6.
[0060] Furthermore, in semiconductor element 1, since the distance between semiconductor element 4 and the side of resin package 6 can be obtained at a relatively large distance, the stress applied to semiconductor element 4 when resin package 6 is cut can be reduced.
[0061] As explained above, according to this embodiment, multiple leads 2 are arranged at the four corners of the resin package 6, such that the angle between the edge of the semiconductor element 4 and the edge of the resin package 6 is 20 degrees or less. As a result, the distance between the vertex of the semiconductor element 4 and the edge of the resin package 6 becomes longer, the possibility of short circuit between the island 3 and each lead 2 is further suppressed, miniaturization can be further achieved, and it is not necessary to make the semiconductor element 4 conform to a 45-degree angle with the edge of the resin package 6, further improving the manufacturing performance of the semiconductor device 1.
[0062] Furthermore, the island half-etched portion 3a of island 3 has hanging arm portions 30a and 30b that extend and protrude in the X direction when viewed from above in the Z direction and are exposed from the side of the resin package 6, and are formed separately from the side of the resin package 6 in the Y direction. This prevents island 3 from falling off the lead frame and allows for the provision of a region B2 where island 3 does not contact the side of the resin package 6. Thus, miniaturization of the semiconductor device 1 can be further achieved, and the manufacturing performance of the semiconductor device 1 can be further improved.
[0063] (A variation of one implementation method)
[0064] The semiconductor device 1b of one embodiment differs from the semiconductor device 1 of another embodiment in that the semiconductor device 1b is disposed offset to the left and right in opposite directions from the midpoint of the opposite side of the resin encapsulation 6 at the boom portions 32 and 34 of the island 3.
[0065] Figures 4(A) to (D) illustrate the configuration of a modified example of a semiconductor device 1b according to one embodiment. Figure 4(A) is a bottom view of the semiconductor device 1b. Figure 4(B) is a top view of the semiconductor device 1b. Figure 4(C) is a cross-sectional view along A-A in Figure 4(B). Figure 4(D) is a cross-sectional view along B-B in Figure 4(B). The lifting arms 32 and 34 of the island 3 are offset to the left and right in opposite directions from the midpoint of the opposite side of the resin encapsulation 6. Torsion can be suppressed by using the lifting arms 32 and 34.
[0066] Although this specification describes that the semiconductor device 1 has a semiconductor element 4 mounted on a lead frame, it may also be a so-called lead-frame-less type in which the semiconductor element 4 is mounted on a substrate or the like.
[0067] While several embodiments of the invention have been described, these embodiments are presented as examples and are not intended to limit the scope of the invention. These new embodiments can be implemented in various other ways, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their variations are included in the scope and spirit of the invention, and are also included in the scope of the invention as described in the claims and its equivalents.
Claims
1. A semiconductor device comprising: Rectangular semiconductor components; The first terminal is attached to the back side of the semiconductor element on the upper surface; Multiple second terminals are disposed around the first terminal; as well as The inner enclosure seals the conductive lines, the semiconductor element, the first terminal, and the plurality of second terminals positioned between the surface of the semiconductor element and the upper surfaces of the plurality of second terminals. It has a rectangular bottom surface including a first side, a second side, a third side, and a fourth side, and has a first side surface, a second side surface, a third side surface, and a fourth side surface respectively connected to the first side surface, the second side surface, the third side surface, and the fourth side surface. The first side surface is opposite to the third side surface, and the second side surface is opposite to the fourth side surface. The plurality of second terminals are configured to protrude from the bottom surface at the four corners of the inner casing. Each side of the semiconductor element is opposite to the first side, the second side, the third side, and the fourth side. The lower surface of the first terminal is exposed from the bottom surface, and a portion of the first terminal is exposed from the second side surface and the fourth side surface. The four corners of the rectangular semiconductor element protrude from the upper surface of the first terminal in a direction parallel to the upper surface of the first terminal. The first terminal has an island portion that engages with the semiconductor element. The island portion has a roughly rhomboid shape with a length in the direction parallel to the second side that is smaller than the length in the direction parallel to the first side.
2. The semiconductor device according to claim 1, Each side of the semiconductor element is parallel to the first side, the second side, the third side, and the fourth side.
3. The semiconductor device according to claim 1, The first terminal has a boom portion that extends from the island portion and protrudes from the second side and the fourth side.
4. The semiconductor device according to claim 1, The first terminal is exposed at least two mutually separated locations on the second side and at least two mutually separated locations on the fourth side.
5. The semiconductor device according to claim 3, The boom portion is exposed from the second side and the fourth side respectively at a position where it separates from the midpoint of the second side and the fourth side in the direction of extension of the second side and the fourth side.
6. The semiconductor device according to claim 1, When viewed from above, the portion of the first terminal exposed on the second and fourth sides does not include the midpoint of each side of the bottom surface.
7. The semiconductor device according to claim 1, The lower surface of the first terminal has a shape having at least two sets of opposing, parallel sides. The opposing edges of the two groups are not parallel to any of the first edge, the second edge, the third edge, or the fourth edge.
8. The semiconductor device according to claim 7, The lower surface of the second terminal is pentagonal, having two sides parallel to one set of opposing sides of the semiconductor element, two sides parallel to another set of opposing sides of the semiconductor element, and one side opposing one side of the lower surface of the first terminal and not parallel to that side of the lower surface of the first terminal.
9. The semiconductor device according to claim 1, The length of the second terminal in the direction parallel to the first side is longer than the length of the second terminal in the direction parallel to the second side.
10. The semiconductor device according to claim 1, The first terminal has a first portion and a second portion, the first portion protruding from the bottom surface, and the second portion disposed around the first portion, covered by the inner portion, and having a thickness less than that of the first portion.
11. The semiconductor device according to claim 2, The first terminal has an island portion that engages with the semiconductor element, and a boom portion that extends from the island portion and protrudes from the second side and the fourth side.
12. The semiconductor device according to claim 1, The second terminal has a third portion and a fourth portion. The third portion protrudes from the bottom surface, and the fourth portion is disposed around the third portion, covered by the inner portion, and has a thickness less than that of the third portion.
13. The semiconductor device according to claim 1, The upper surface of the second terminal is pentagonal in shape, having two sides parallel to one set of opposing sides of the semiconductor element, two sides parallel to another set of opposing sides of the semiconductor element, and one side parallel to one side of the upper surface of the first terminal.
14. The semiconductor device according to claim 1, The lower surface of the second terminal is pentagonal in shape, having two sides parallel to one set of opposing sides of the semiconductor element, and two sides parallel to another set of opposing sides of the semiconductor element, and having one side that is not parallel to any side of the semiconductor element and is tilted at 45 degrees relative to one side of the semiconductor element.
15. The semiconductor device according to claim 1, On the side of the inner package, the inner package has an edge that covers the second terminal.
16. The semiconductor device according to claim 1, The surface of the second terminal exposed from the bottom surface is connected to the wiring substrate.
17. The semiconductor device according to claim 1, The first terminal and the second terminal are formed from the same metal plate.
18. The semiconductor device according to claim 1, The first terminal and the second terminal are made of copper.
Citation Information
Patent Citations
Image processing device, information processing method and program
JP2020049744A
Semiconductor device
CN102428558A
Electronic device
JP2018125530A