On-chip Two-way Gain Optical Amplification Device and Its Preparation Method

Abstract

The present disclosure provides an on-chip two-way gain optical amplification device and a preparation method thereof. The device includes: a silicon-based Mach-Zehnder interferometer and a semiconductor optical amplifier; wherein, the silicon-based Mach-Zehnder interferometer includes: a long-arm silicon waveguide and a short-arm silicon waveguide; the long-arm silicon waveguide is connected to the semiconductor optical amplifier for inputting signal light and coupling the signal light into the semiconductor optical amplifier; the semiconductor optical amplifier is used for amplifying the signal light to obtain amplified signal light and coupling the amplified signal light into the long-arm silicon waveguide; the short-arm silicon waveguide is used for coupling out the amplified signal light from the long-arm silicon waveguide and outputting the amplified signal light; an antireflection film is coated on one end of the semiconductor optical amplifier close to the long-arm silicon waveguide to prevent the self-lasing of the semiconductor optical amplifier, and a high-reflection film is coated on the end far from the long-arm silicon waveguide to reflect the amplified signal light. The device of the present disclosure realizes the two-way gain of the signal light and the single-end input and output of the on-chip SOA.

Description

Technical Field

[0001] The present disclosure relates to the technical field of semiconductor optical amplifiers, and particularly to an on-chip two-way gain optical amplification device and a preparation method thereof. Background Art

[0002] Since the birth of modern microelectronics technology in the 1950s of the last century, silicon materials have occupied an important position in the field of semiconductor materials. Semiconductor devices made mainly of silicon have been widely used in human life. Based on silicon complementary metal oxide semiconductor (COMS) technology, the size of integrated circuits has gradually decreased, and the number of transistors has become larger and larger, realizing high-volume and large-batch manufacturing of electronic systems. With the development of microelectronic process technology, traditional electrical interconnections show great disadvantages in terms of crosstalk, interconnection, power consumption, and delay. Moreover, in order to increase the operating frequency of the chip, when the line width enters the deep nanometer size, the quantum tunneling effect will occur, and its impact cannot be ignored, becoming an important factor restricting the further development of semiconductor devices. Due to the advantages of photons such as having no rest mass, no interference with each other, and different wavelengths of light can be used for multiplex simultaneous communication, optical interconnection technology has attracted great interest from scientists. Using photons for communication can achieve greater bandwidth and rate.

[0003] Among many silicon-based optoelectronic integrated devices, optical amplifiers can compensate for optical losses from individual photonic components and are key components for achieving high-level photonic integration. However, since silicon is an indirect bandgap material and cannot be used as an active device, amplifiers with silicon as the gain medium are only realized by using the Raman effect through optical pumping in silicon. This method has high integration difficulty and poor gain performance. Summary of the Invention

[0004] (1) Technical Problems to be Solved

[0005] In view of the existing technical problems, the present disclosure provides an on-chip two-way gain optical amplification device and a preparation method thereof to at least partially solve the above technical problems.

[0006] (2) Technical Solutions

[0007] The present disclosure provides an on-chip two-way gain optical amplification device, including: a silicon-based Mach-Zehnder interferometer and a semiconductor optical amplifier; wherein, the silicon-based Mach-Zehnder interferometer includes: a long-arm silicon waveguide and a short-arm silicon waveguide; the long-arm silicon waveguide is connected to the semiconductor optical amplifier, and is used for inputting signal light and coupling the signal light into the semiconductor optical amplifier; the semiconductor optical amplifier is used for amplifying the signal light to obtain amplified signal light, and coupling the amplified signal light into the long-arm silicon waveguide; the short-arm silicon waveguide is used for coupling out the amplified signal light from the long-arm silicon waveguide and outputting the amplified signal light; an antireflection film is coated on one end of the semiconductor optical amplifier close to the long-arm silicon waveguide to prevent the semiconductor optical amplifier from lasing by itself, and a high-reflection film is coated on the end far from the long-arm silicon waveguide to reflect the amplified signal light.

[0008] Optionally, the connection part between the long-arm silicon waveguide and the semiconductor optical amplifier is an adiabatic tapered waveguide structure; wherein, the adiabatic tapered waveguide structure includes: a superimposed tapered silicon waveguide and a tapered semiconductor optical amplifier region; the width of the tapered silicon waveguide becomes narrower along the direction of entering the semiconductor optical amplifier, and the width of the tapered semiconductor optical amplifier region becomes wider along the direction of entering the semiconductor optical amplifier.

[0009] Optionally, a magneto-optical material is coated on the region of the long-arm silicon waveguide far from the short-arm silicon waveguide, and is used for controlling the optical path difference between the signal light and the amplified signal light.

[0010] Optionally, the semiconductor optical amplifier includes: a substrate, a ridge silicon waveguide, a silicon dioxide isolation layer, a BCB layer, an n-type waveguide layer, an active layer, a p-type upper confinement layer, a p-type ohmic contact layer, and a p-side electrode contact layer superimposed in sequence; or, a substrate, a ridge silicon waveguide, a bonding layer, a superlattice layer, an n-type waveguide layer, an active layer, a p-type upper confinement layer, a p-type ohmic contact layer, and a p-side electrode contact layer superimposed in sequence; wherein, the silicon-based Mach-Zehnder interferometer and the semiconductor optical amplifier share the substrate; the width from the active layer to the p-side electrode contact layer is smaller than the width of the n-type waveguide layer, forming a ridge structure.

[0011] Optionally, the material of the bonding layer is InP, the superlattice layer is an interleaved layer structure of InP and InGaAsP, the material of the n-type waveguide layer is InP, the material of the active layer is an AlGaInAs strained quantum well material, the material of the p-type upper confinement layer is AlGaInAs, the material of the p-type ohmic contact layer is InGaAsP, and the material of the p-side electrode contact layer is InGaAs.

[0012] Optionally, the width variation range of the tapered silicon waveguide and the tapered semiconductor optical amplifier region is 0.8 μm to 4 μm.

[0013] Optionally, the loss of the signal light in the silicon-based Mach-Zehnder interferometer is less than the single-pass gain in the semiconductor optical amplifier.

[0014] Optionally, the magneto-optical material is yttrium iron garnet. The width of the magneto-optical material is the same as that of the long-arm silicon waveguide, the thickness is 135 - 165 nm, and the length is 540 - 660 nm.

[0015] On the other hand, the present disclosure provides a method for preparing an on-chip two-way gain optical amplification device, including: etching a silicon wafer to obtain a silicon-based Mach-Zehnder interferometer; preparing a semiconductor optical amplifier by using MOCVD, oxidation, and etching processes. Among them, etching the silicon wafer to obtain the silicon-based Mach-Zehnder interferometer includes: etching the silicon wafer to obtain a long-arm silicon waveguide and a short-arm silicon waveguide respectively; the long-arm silicon waveguide is connected to the semiconductor optical amplifier for inputting signal light and coupling the signal light into the semiconductor optical amplifier; the semiconductor optical amplifier is used for amplifying the signal light to obtain amplified signal light and coupling the amplified signal light into the long-arm silicon waveguide; the short-arm silicon waveguide is used for coupling out the amplified signal light from the long-arm silicon waveguide and outputting the amplified signal light; an antireflection film is deposited on one end of the semiconductor optical amplifier close to the long-arm silicon waveguide, and a high-reflection film is deposited on the end far from the long-arm silicon waveguide.

[0016] Optionally, preparing the semiconductor optical amplifier by using MOCVD, oxidation, and etching processes includes: sequentially preparing a ridge-type silicon waveguide, a silicon dioxide isolation layer, a BCB layer, an n-type waveguide layer, an active layer, a p-type upper confinement layer, a p-type ohmic contact layer, and a p-face electrode contact layer on a substrate; or sequentially preparing a ridge-type silicon waveguide, a bonding layer, a superlattice layer, an n-type waveguide layer, an active layer, a p-type upper confinement layer, a p-type ohmic contact layer, and a p-face electrode contact layer on a substrate; etching the p-face electrode contact layer to the active layer to form a ridge structure. Among them, the silicon-based Mach-Zehnder interferometer and the semiconductor optical amplifier share a substrate; preparing the bonding layer includes: preparing the bonding layer by using any one of the processes of heterogeneous bonding, flip-chip integration, micro-transfer printing, and direct epitaxial growth.

[0017] (III) Beneficial effects

[0018] The present disclosure provides an on-chip two-way gain optical amplification device, which integrates a silicon-based Mach-Zehnder interferometer (constituting a circulator) and an SOA (semiconductor optical amplifier) that are interconnected on the chip, and an antireflection film and a total reflection film are respectively deposited on both ends of the SOA, so that two-way gain of the on-chip SOA can be realized, thereby improving on-chip gain and output power. Integrated with a silicon-based circulator, single-end input and output of the on-chip SOA are realized, and it can be widely applied to multiple fields such as silicon-based integration and optical signal processing. Description of the drawings

[0019] Through the following description of the embodiments of the present disclosure with reference to the drawings, the above and other objects, features, and advantages of the present disclosure will become clearer. In the drawings:

[0020] Figure 1Schematically shows the structural diagram of an on-chip two-way gain optical amplification device according to an embodiment of the present disclosure;

[0021] Figure 2 Schematically shows the optical path diagram of an on-chip two-way gain optical amplification device according to an embodiment of the present disclosure;

[0022] Figure 3 Schematically shows the schematic diagram of an adiabatic tapered waveguide structure according to an embodiment of the present disclosure;

[0023] Figure 4 Schematically shows the three-dimensional structural diagram of a semiconductor optical amplifier according to an embodiment of the present disclosure;

[0024] Figure 5 Schematically shows the cross-sectional view of a semiconductor optical amplifier according to an embodiment of the present disclosure;

[0025] Figure 6 Schematically shows the cross-sectional view of the epitaxial structure of a semiconductor optical amplifier according to an embodiment of the present disclosure;

[0026] Figure 7 Schematically shows the cross-sectional view of a semiconductor optical amplifier according to another embodiment of the present disclosure;

[0027] Figure 8 Schematically shows the cross-sectional view of the epitaxial structure of a semiconductor optical amplifier according to another embodiment of the present disclosure.

[0028]

Description of Reference Numerals

[0029] A - Silicon-based Mach-Zehnder interferometer; A1 - First port; A2 - Second port; A3 - Third port; B - Semiconductor optical amplifier; B1 - Tapered semiconductor optical amplifier region; B2 - Antireflection coating; B3 - High-reflection coating; C - Adiabatic tapered waveguide structure; D - Magneto-optical material; 1 - Long-arm silicon waveguide; 101 - Tapered silicon waveguide; 2 - Short-arm silicon waveguide; 3 - Substrate; 4 - Ridge silicon waveguide; 5 - Silicon dioxide isolation layer; 6 - BCB layer; 7 - Bonding layer; 8 - Superlattice layer; 9 - n-type waveguide layer; 10 - Active layer; 11 - p-type upper confinement layer; 12 - p-type ohmic contact layer; 13 - p-side electrode contact layer; 14 - n-side electrode; 15 - p-side electrode. Detailed Embodiments

[0030] To make the objectives, technical solutions, and advantages of the present disclosure clearer and more understandable, the following further describes the present disclosure in detail with reference to specific embodiments and the accompanying drawings.

[0031] It should be noted that in the drawings or the description of the specification, similar or identical parts are all denoted by the same reference numerals. The technical features in each of the embodiments exemplified in the specification can be freely combined to form a new solution on the premise of no conflict. In addition, each claim can be taken as an embodiment alone, or the technical features in each claim can be combined as a new embodiment. Moreover, in the drawings, the shape or thickness of the embodiment can be enlarged, and it can be simplified or conveniently marked. Furthermore, the elements or implementation manners not depicted or described in the drawings are in the forms known to those of ordinary skill in the art. In addition, although this document may provide examples of parameters including specific values, it should be understood that the parameters do not necessarily exactly equal the corresponding values, but may approximate the corresponding values within an acceptable error tolerance or design constraint.

[0032] Unless there are technical obstacles or contradictions, the above various embodiments of the present disclosure can be freely combined to form additional embodiments, and these additional embodiments are all within the protection scope of the present disclosure.

[0033] Although the present disclosure has been described in conjunction with the drawings, the embodiments disclosed in the drawings are intended to exemplarily illustrate the preferred embodiments of the present disclosure and should not be construed as a limitation to the present disclosure. The dimensional ratios in the drawings are merely illustrative and should not be construed as a limitation to the present disclosure.

[0034] Although some embodiments of the general concept of the present disclosure have been shown and described, those of ordinary skill in the art will understand that changes can be made to these embodiments without departing from the principles and spirit of the general concept of the present disclosure. The scope of the present disclosure is defined by the claims and their equivalents.

[0035] Figure 1 The structural diagram of an on-chip two-way gain optical amplification device according to an embodiment of the present disclosure is schematically shown.

[0036] According to an embodiment of the present disclosure, as Figure 1As shown in the figure, the on-chip two-way gain optical amplification device includes, for example: a silicon-based Mach-Zehnder interferometer (MZI) A and a semiconductor optical amplifier B. Among them, the silicon-based Mach-Zehnder interferometer A includes, for example: a long-arm silicon waveguide 1 and a short-arm silicon waveguide 2. The long-arm silicon waveguide 1 is connected to the semiconductor optical amplifier B, and is used to input signal light and couple the signal light into the semiconductor optical amplifier B. The semiconductor optical amplifier B is used to amplify the signal light to obtain amplified signal light, and couple the amplified signal light into the long-arm silicon waveguide 1. The short-arm silicon waveguide 2 is used to couple out the amplified signal light from the long-arm silicon waveguide 1 and output the amplified signal light. An antireflection film B2 is coated on one end of the semiconductor optical amplifier B close to the long-arm silicon waveguide 1 to prevent the lasing of the semiconductor optical amplifier B itself, and a high-reflection film B3 (for example, a total reflection film) is coated on the end far from the long-arm silicon waveguide 1 to reflect the signal light amplified by the active layer to achieve two-way gain. The two ports of the long-arm silicon waveguide 1 are, for example, a first port A1 and a second port A2, and the long-arm silicon waveguide 1 is connected to the semiconductor optical amplifier B through the second port A2. The short-arm silicon waveguide 2 has a third port A3, and the third port A3 is, for example, located on the side close to the first port A1.

[0037] Optionally, for example, the transmission loss of the signal light in the silicon-based Mach-Zehnder interferometer A can be controlled to be less than the single-pass gain in the semiconductor optical amplifier B.

[0038] Figure 2 The optical path diagram of the on-chip two-way gain optical amplification device according to an embodiment of the present disclosure is schematically shown.

[0039] According to an embodiment of the present disclosure, as Figure 2 shown, by designing the lengths of the long-arm silicon waveguide 1 and the short-arm silicon waveguide 2, the signal light enters the long-arm silicon waveguide 1 from the first port A1 (that is, enters the magneto-optic circulator, MOC), and travels along the long-arm silicon waveguide 1 (the signal light will be coupled where the long-arm silicon waveguide 1 and the short-arm silicon waveguide 2 are close. The design is such that the signal light coupled into the short-arm silicon waveguide 2 in the first proximity region close to the first port A1 and the third port A3 is recoupled back into the long-arm silicon waveguide 1 in the second proximity region close to the second port A2), and is coupled into the SOA chip at the second port A2. The signal light is amplified in the active region of the SOA chip and is reflected by the high-reflection film B3 to achieve two-way gain and obtain amplified signal light. Then, it is recoupled back into the long-arm silicon waveguide 1 at the second port A2. The design is such that the amplified signal light is coupled into the short-arm silicon waveguide 2 and output from the third port A3.

[0040] Preferably, the long-arm silicon waveguide 1 of the silicon-based MZI is, for example, about 1520 μm, and the short-arm silicon waveguide 2 is, for example, about 1450 μm.

[0041] Figure 3Schematically shows a schematic diagram of an adiabatic tapered waveguide structure according to an embodiment of the present disclosure.

[0042] According to an embodiment of the present disclosure, in order to confine more light in the active region of the semiconductor optical amplifier B to achieve gain amplification, as Figure 3 shown, the connection between the long-arm silicon waveguide 1 and the semiconductor optical amplifier B (i.e., at the second port A2) is, for example, an adiabatic tapered waveguide structure C. Among them, the adiabatic tapered waveguide structure C includes, for example: a superimposed tapered silicon waveguide 101 and a tapered semiconductor optical amplifier region B1. The width of the tapered silicon waveguide 101 gradually narrows along the direction of entering the semiconductor optical amplifier B, and the width of the tapered semiconductor optical amplifier region B1 gradually widens along the direction of entering the semiconductor optical amplifier B. The long-arm silicon waveguide 1 gradually narrows from wide to narrow at the second port A2 and extends into the III-V region of the semiconductor optical amplifier B (for example, a III-V based semiconductor optical amplifier), and merges with the ridge silicon waveguide 4 in the semiconductor optical amplifier B to form an integral body, while the layer structure above the ridge silicon waveguide 4 in the semiconductor optical amplifier B extends above the long-arm silicon waveguide 1 and also gradually narrows along the extension direction. The tapered structure of the long-arm silicon waveguide 1 and the tapered structure of the semiconductor optical amplifier B together form the adiabatic tapered waveguide structure C, and the coupling of the signal light at the adiabatic tapered waveguide structure C is, for example, evanescent wave coupling. That is, the signal light undergoes evanescent wave coupling through the adiabatic tapered waveguide between the silicon waveguide and the III-V material.

[0043] Preferably, the width variation range of the tapered silicon waveguide 101 and the tapered semiconductor optical amplifier region B1 is, for example, 0.8 μm to 4 μm.

[0044] According to an embodiment of the present disclosure, in order to better output the amplified signal light, for example, the optical paths of the light transmitted in two directions from the first port A1 to the second port A2 and from the second port A2 to the first port A1 in the long-arm silicon waveguide 1 can be controlled so that their optical paths are different, thereby causing the signal light to produce a "magneto-optical circulator effect of input at the first port A1 and output at the second port A2; input at the second port A2 and output at the third port A3" after coupling in the proximity region of the long-arm silicon waveguide 1 and the short-arm silicon waveguide 2. The present disclosure, for example, adopts a circulator, a double-sided coated SOA, and an evanescent wave coupling structure. The signal light is input from the first port A1 of the circulator, forms an evanescent wave coupling structure with the SOA at the second port A2, is coupled into the SOA chip, then realizes double-pass gain through the end-face reflection of the SOA, and finally is output through the third port A3 of the circulator.

[0045] Specifically, as Figure 1 shown, for example, a magneto-optical material D is deposited on the region of the long-arm silicon waveguide 1 far from the short-arm silicon waveguide 2, so that the light has different optical paths when passing through this section of the waveguide in two directions, which is used to control the difference in the optical paths of the signal light and the amplified signal light.

[0046] Preferably, the magneto-optical material is, for example, yttrium iron garnet (YIG). The width of the magneto-optical material is the same as that of the long-arm silicon waveguide 1, for example, 4 μm, the thickness is 135-165 nm, and 150 nm can be selected, for example. The length is 540-660 nm, and 600 nm can be selected, for example. The final suitable light intensity can be determined by adjusting the light intensity of the magneto-optical material and observing the output of the third port A3.

[0047] Figure 4 A three-dimensional structural diagram of a semiconductor optical amplifier according to an embodiment of the present disclosure is schematically shown.

[0048] Figure 5 A cross-sectional view of a semiconductor optical amplifier according to an embodiment of the present disclosure is schematically shown. According to an embodiment of the present disclosure, as Figure 5 shown, the semiconductor optical amplifier B includes, for example: a substrate 3, a ridge silicon waveguide 4, a silicon dioxide isolation layer 5, a BCB layer 6, an n-type waveguide layer 9, an active layer 10, a p-type upper confinement layer 11, a p-type ohmic contact layer 12, and a p-side electrode contact layer 13, which are stacked in sequence. Among them, the silicon-based Mach-Zehnder interferometer A and the semiconductor optical amplifier B can share the substrate 3, which is beneficial to improving the integration efficiency. The widths of the active layer 10 to the p-side electrode contact layer 13 are smaller than the width of the n-type waveguide layer 9, forming a ridge structure, and the three-dimensional structure is as Figure 4 shown. The semiconductor optical amplifier B may further include, for example: an n-side electrode 14 and a p-side electrode 15. The n-side electrode 14 is in contact with the n-type waveguide layer 9, and the p-side electrode 15 is in contact with the p-side electrode contact layer 13. Most regions of the n-side electrode 14 and the p-side electrode 15 can be isolated from other layers by the silicon dioxide isolation layer 5 to improve the current transmission effect.

[0049] Preferably, the material of the n-type waveguide layer 9 is, for example, InP, the material of the active layer 10 is, for example, AlGaInAs strained quantum well material, the material of the p-type upper confinement layer 11 is, for example, AlGaInAs, the material of the p-type ohmic contact layer 12 is, for example, InGaAsP, and the material of the p-side electrode contact layer 13 is, for example, InGaAs. The material of the substrate 3 is, for example, SiO 2 , and the p-type upper confinement layer 11 is, for example, an SCH (separate confinement and suppression layer).

[0050] Figure 6 A cross-sectional view of an epitaxial structure of a semiconductor optical amplifier according to an embodiment of the present disclosure is schematically shown.

[0051] According to an embodiment of the present disclosure, as Figure 6As shown, before etching the ridge structure and fabricating the metal electrodes, the epitaxial structure of the semiconductor optical amplifier includes, for example: a substrate 3, a ridge silicon waveguide 4, a silicon dioxide isolation layer 5, a BCB layer 6, an n-type waveguide layer 9, an active layer 10, a p-type upper confinement layer 11, a p-type ohmic contact layer 12, and a p-side electrode contact layer 13 stacked in sequence.

[0052] Specifically, the parameters of each layer of material are, for example, as shown in Table 1:

[0053] Table 1 Parameters of Each Layer of Material in the Epitaxial Structure of the Semiconductor Optical Amplifier

[0054]

[0055] Figure 7 Schematically shows a cross-sectional view of a semiconductor optical amplifier according to another embodiment of the present disclosure.

[0056] According to an embodiment of the present disclosure, in addition to Figure 5 the connection structure of the ridge silicon waveguide layer 4 and the n-type waveguide layer 9 shown, another structure can also be used to connect them. As Figure 7 shown, the semiconductor optical amplifier B includes, for example: a substrate 3, a ridge silicon waveguide 4, a bonding layer 7, a superlattice layer 8, an n-type waveguide layer 9, an active layer 10, a p-type upper confinement layer 11, a p-type ohmic contact layer 12, and a p-side electrode contact layer 13 stacked in sequence.

[0057] Preferably, the material of the bonding layer 7 is, for example, InP, and the superlattice layer 8 is, for example, an interleaved layer structure of InP and InGaAsP. The superlattice layer 8 is, for example, 4 layers of InP layer, InGaAsP layer, InP layer, and InGaAsP layer stacked in sequence. The thickness of each layer is, for example, 7.5 nm, that is, the thickness of the superlattice layer 8 is 30 nm. The thickness of the bonding layer 7 is, for example, 10 nm.

[0058] Figure 8 Schematically shows a cross-sectional view of the epitaxial structure of a semiconductor optical amplifier according to another embodiment of the present disclosure.

[0059] According to an embodiment of the present disclosure, corresponding to the layer structure of the optical amplifier in Figure 7 before etching the ridge structure and fabricating the metal electrodes, as Figure 8 shown, the epitaxial structure of the semiconductor optical amplifier includes, for example: a substrate 3, a ridge silicon waveguide 4, a bonding layer 7, a superlattice layer 8, an n-type waveguide layer 9, an active layer 10, a p-type upper confinement layer 11, a p-type ohmic contact layer 12, and a p-side electrode contact layer 13 stacked in sequence. Among them, Figure 8 the ridge silicon waveguide 4 in Figure 5The ridge-type silicon waveguides 4 in [it] have the same function, which is to propagate light. The two silicon waveguides on both sides are used to support the layer structures such as the bonding layer 7 above. There is, for example, an unfilled gap between the silicon waveguides on both sides and the silicon waveguide in the middle.

[0060] In summary, the present disclosure provides an on-chip two-way gain optical amplifier based on a silicon-based circulator, including a silicon-based circulator and an on-chip SOA. Utilizing the port transmission characteristics of the magneto-optical circulator, after the optical signal passes through the circulator, the optical signal in the silicon waveguide is coupled into the active region of the III-V SOA chip by means of an evanescent wave coupling structure (i.e., an adiabatic tapered waveguide structure) for amplification. One end of the SOA chip is coated with an antireflection film to prevent lasing, and the other end is coated with a high-reflection film to reflect the signal light, achieving two-way gain. Then, it is coupled into the silicon waveguide through the evanescent wave coupling structure and output through another port of the circulator, realizing single-ended input and output of the on-chip SOA.

[0061] On the other hand, the present disclosure provides a method for manufacturing an on-chip two-way gain optical amplification device, for example, including:

[0062] S710, etching a silicon wafer to obtain a silicon-based Mach-Zehnder interferometer A.

[0063] S720, preparing a semiconductor optical amplifier B by using MOCVD, oxidation, and etching processes.

[0064] Among them, etching the silicon wafer to obtain the silicon-based Mach-Zehnder interferometer A, for example, includes:

[0065] S711, etching the silicon wafer to obtain a long-arm silicon waveguide 1 and a short-arm silicon waveguide 2 respectively.

[0066] According to an embodiment of the present disclosure, the long-arm silicon waveguide 1 is connected to the semiconductor optical amplifier B, which is used to input the signal light and couple the signal light into the semiconductor optical amplifier B. The semiconductor optical amplifier B is used to amplify the signal light to obtain an amplified signal light, and couple the amplified signal light into the long-arm silicon waveguide 1. The short-arm silicon waveguide 2 is used to couple out the amplified signal light from the long-arm silicon waveguide 1 and output the amplified signal light.

[0067] S712, coating an antireflection film on one end of the semiconductor optical amplifier B close to the long-arm silicon waveguide 1, and coating a high-reflection film on the end far from the long-arm silicon waveguide 1.

[0068] Preparing the semiconductor optical amplifier B by using MOCVD, oxidation, and etching processes, for example, includes:

[0069] S721. On the substrate 3, a ridge-shaped silicon waveguide 4, a silicon dioxide isolation layer 5, a BCB layer 6, an n-type waveguide layer 9, an active layer 10, a p-type upper confinement layer 11, a p-type ohmic contact layer 12, and a p-side electrode contact layer 13 are sequentially fabricated. Alternatively, on the substrate 3, a ridge-shaped silicon waveguide 4, a bonding layer 7, a superlattice layer 8, an n-type waveguide layer 9, an active layer 10, a p-type upper confinement layer 11, a p-type ohmic contact layer 12, and a p-side electrode contact layer 13 are sequentially fabricated.

[0070] S722. The p-side electrode contact layer 13 is etched to the active layer 10 (including etching the active layer 10) to form a ridge structure.

[0071] Among them, the silicon-based Mach-Zehnder interferometer A and the semiconductor optical amplifier B can share the substrate 3, for example. When fabricating the ridge-shaped silicon waveguide 4, it can be carried out synchronously with the fabrication of the long-arm silicon waveguide 1, that is, the long-arm silicon waveguide 1 (including the tapered silicon waveguide 101) and the ridge-shaped silicon waveguide 4 are etched from the same silicon plate on the substrate 3.

[0072] The fabrication of the bonding layer 7 includes, for example:

[0073] S7211. The bonding layer 7 is fabricated by any one of the processes of heterogeneous bonding, flip-chip integration, micro-transfer printing, and direct epitaxial growth. Figure 6 The cross-sectional view shows a hybrid integration layer realized by, for example, the heterogeneous bonding method.

[0074] For the details not described in the method embodiment part, they are similar to those in the device embodiment part. Please refer to the device embodiment part and will not be elaborated here.

[0075] It should be understood that the specific order or hierarchy of the steps in the disclosed process is an example of an exemplary method. Based on design preferences, it should be understood that the specific order or hierarchy of the steps in the process can be rearranged without departing from the protection scope of the present disclosure. The appended method claims present the elements of the various steps in an exemplary order and are not limited to the specific order or hierarchy.

[0076] It should also be noted that the directional terms mentioned in the embodiments, such as "upper", "lower", "front", "rear", "left", "right", etc., are only references to the directions in the drawings and are not used to limit the protection scope of the present disclosure. Throughout the drawings, the same elements are denoted by the same or similar reference numerals. When it may cause confusion in the understanding of the present disclosure, the conventional structures or configurations will be omitted. And the shapes, sizes, and positional relationships of the components in the drawings do not reflect the true sizes, proportions, and actual positional relationships.

[0077] In the foregoing detailed description, various features are combined in a single embodiment to simplify the present disclosure. This method of disclosure should not be interpreted as reflecting an intention that the embodiments of the claimed subject matter require more features than are expressly recited in each claim. On the contrary, as reflected in the appended claims, the present disclosure lies in a state less than all the features of the single disclosed embodiment. Accordingly, the appended claims are hereby expressly incorporated into the detailed description, with each claim standing alone as a separate preferred embodiment of the present disclosure.

[0078] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, features defined with "first" and "second" may explicitly or implicitly include one or more of such features. In the description of the present disclosure, "a plurality of" means at least two, such as two, three, etc., unless otherwise specifically defined. Regarding the term "comprising" used in the specification or claims, the manner in which this word encompasses is similar to the term "including", as explained when "including" is used as a transitional word in the claims. Any use of the term "or" in the specification or claims of the claims is intended to mean "non-exclusive or".

[0079] The specific embodiments described above further elaborate on the objectives, technical solutions, and beneficial effects of the present disclosure. It should be understood that the above description is only specific embodiments of the present disclosure and is not used to limit the present disclosure. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present disclosure shall be included within the protection scope of the present disclosure.

Claims

1. An on-chip two-way gain optical amplification device, characterized in that, it includes: a silicon-based Mach-Zehnder interferometer (A) and a semiconductor optical amplifier (B); wherein, the silicon-based Mach-Zehnder interferometer (A) includes: a long-arm silicon waveguide (1) and a short-arm silicon waveguide (2); the long-arm silicon waveguide (1) is connected to the semiconductor optical amplifier (B) for inputting signal light and coupling the signal light into the semiconductor optical amplifier (B); the semiconductor optical amplifier (B) is used to amplify the signal light to obtain amplified signal light and couple the amplified signal light into the long-arm silicon waveguide (1); the short-arm silicon waveguide (2) is used to couple out the amplified signal light from the long-arm silicon waveguide (1) and output the amplified signal light; an antireflection film (B2) is coated on one end of the semiconductor optical amplifier (B) close to the long-arm silicon waveguide (1) to prevent self-lasing of the semiconductor optical amplifier (B), and a high-reflection film (B3) is coated on the end far from the long-arm silicon waveguide (1) to reflect the amplified signal light.

2. The on-chip two-way gain optical amplification device according to claim 1, characterized in that, the connection between the long-arm silicon waveguide (1) and the semiconductor optical amplifier (B) is an adiabatic tapered waveguide structure (C); wherein, the adiabatic tapered waveguide structure (C) includes: a superimposed tapered silicon waveguide (101) and a tapered semiconductor optical amplifier region (B1); the width of the tapered silicon waveguide (101) becomes narrower along the direction of entering the semiconductor optical amplifier (B), and the width of the tapered semiconductor optical amplifier region (B1) becomes wider along the direction of entering the semiconductor optical amplifier (B).

3. The on-chip two-way gain optical amplification device according to claim 1, characterized in that, a magneto-optical material (D) is coated on the region of the long-arm silicon waveguide (1) far from the short-arm silicon waveguide (2) for controlling the optical path difference between the signal light and the amplified signal light.

4. The on-chip two-way gain optical amplification device according to claim 1, characterized in that, the semiconductor optical amplifier (B) includes: a substrate (3), a ridge silicon waveguide (4), a silicon dioxide isolation layer (5), a BCB layer (6), an n-type waveguide layer (9), an active layer (10), a p-type upper confinement layer (11), a p-type ohmic contact layer (12) and a p-side electrode contact layer (13) superimposed in sequence; or, a substrate (3), a ridge silicon waveguide (4), a bonding layer (7), a superlattice layer (8), an n-type waveguide layer (9), an active layer (10), a p-type upper confinement layer (11), a p-type ohmic contact layer (12) and a p-side electrode contact layer (13) superimposed in sequence; wherein, the silicon-based Mach-Zehnder interferometer (A) and the semiconductor optical amplifier (B) share the substrate (3); the active layer (10) to the p-side electrode contact layer (13) are etched to form a ridge structure.

5. The on-chip two-way gain optical amplification device according to claim 4, characterized in that, The bonding layer (7) is made of InP, the superlattice layer (8) is an interleaved layer structure of InP and InGaAsP, the n-type waveguide layer (9) is made of InP, the active layer (10) is made of AlGaInAs strained quantum well material, the p-type upper confinement layer (11) is made of AlGaInAs, the p-type ohmic contact layer (12) is made of InGaAsP, and the p-side electrode contact layer (13) is made of InGaAs.

6. The on-chip two-way gain optical amplification device according to claim 2, characterized in that the width variation range of the tapered silicon waveguide (101) and the tapered semiconductor optical amplifier region (B1) is 0.8 μm to 4 μm.

7. The on-chip two-way gain optical amplification device according to claim 1, characterized in that the loss of the signal light in the silicon-based Mach-Zehnder interferometer (A) is less than the single-pass gain in the semiconductor optical amplifier (B).

8. The on-chip two-way gain optical amplification device according to claim 3, characterized in that the magneto-optical material (D) is yttrium iron garnet, the width of the magneto-optical material is the same as the width of the long-arm silicon waveguide (1), the thickness is 135 to 165 nm, and the length is 540 to 660 nm.

9. A preparation method of an on-chip two-way gain optical amplification device, characterized in that it includes: etching a silicon wafer to obtain a silicon-based Mach-Zehnder interferometer (A); preparing a semiconductor optical amplifier (B) by using MOCVD, oxidation and etching processes; wherein, etching the silicon wafer to obtain the silicon-based Mach-Zehnder interferometer (A) includes: etching the silicon wafer to obtain a long-arm silicon waveguide (1) and a short-arm silicon waveguide (2) respectively; the long-arm silicon waveguide (1) is connected to the semiconductor optical amplifier (B) for inputting signal light and coupling the signal light into the semiconductor optical amplifier (B); the semiconductor optical amplifier (B) is used for amplifying the signal light to obtain amplified signal light and coupling the amplified signal light into the long-arm silicon waveguide (1); the short-arm silicon waveguide (2) is used for coupling out the amplified signal light from the long-arm silicon waveguide (1) and outputting the amplified signal light; coating an antireflection film (B2) at one end of the semiconductor optical amplifier (B) close to the long-arm silicon waveguide (1) and coating a high-reflection film (B3) at the end far from the long-arm silicon waveguide (1).

10. The preparation method of the on-chip two-way gain optical amplification device according to claim 9, characterized in that the preparing the semiconductor optical amplifier (B) by using MOCVD, oxidation and etching processes includes: successively preparing a ridge silicon waveguide (4), a silicon dioxide isolation layer (5), a BCB layer (6), an n-type waveguide layer (9), an active layer (10), a p-type upper confinement layer (11), a p-type ohmic contact layer (12) and a p-side electrode contact layer (13) on a substrate (3); or, A ridge-shaped silicon waveguide (4), a bonding layer (7), a superlattice layer (8), an n-type waveguide layer (9), an active layer (10), a p-type upper confinement layer (11), a p-type ohmic contact layer (12), and a p-side electrode contact layer (13) are sequentially fabricated on a substrate (3); The p-side electrode contact layer (13) is etched to the active layer (10) to form a ridge-shaped structure; Wherein, the silicon-based Mach-Zehnder interferometer (A) and the semiconductor optical amplifier (B) share the substrate (3); Fabricating the bonding layer (7) includes: The bonding layer (7) is fabricated by any one of heterogeneous bonding, flip-chip integration, micro-transfer printing, and direct epitaxial growth.

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